cc y / mbed

Fork of mbed by mbed official

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
92:4fc01daae5a5
Child:
123:b0220dba8be7
Release 122 of the mbed library

Changes:
- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4
- Thread safety addition - mbed API should contain a statement about thread safety
- critical section API addition
- CAS API (core_util_atomic_incr/decr)
- DEVICE_ are generated from targets.json file, device.h deprecated
- Callback replaces FunctionPointer to provide std like interface
- mbed HAL API docs improvements
- toolchain - prexif attributes with MBED_
- add new attributes - packed, weak, forcedinline, align
- target.json - contains targets definitions
- ST - L1XX - Cube update to 1.5
- SPI clock selection fix (clock from APB domain)
- F7 - Cube update v1.4.0
- L0 - baudrate init fix
- L1 - Cube update v1.5
- F3 - baudrate init fix, 3 targets CAN support
- F4 - Cube update v1.12.0, 3 targets CAN support
- L4XX - Cube update v1.5.1
- F0 - update Cube to v1.5.0
- L4 - 2 targets (L476RG/VG) CAN support
- NXP - pwm clock fix for KSDK2 MCU
- LPC2368 - remove ARM toolchain support - due to regression
- KSDK2 - fix SPI , I2C address and repeat start
- Silabs - some fixes backported from mbed 3
- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 86:04dd9b1680ae 1 /**
bogdanm 86:04dd9b1680ae 2 ******************************************************************************
bogdanm 86:04dd9b1680ae 3 * @file stm32f3xx_hal_tim_ex.h
bogdanm 86:04dd9b1680ae 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.2.1
Kojto 122:f9eeca106725 6 * @date 29-April-2015
bogdanm 92:4fc01daae5a5 7 * @brief Header file of TIM HAL Extended module.
bogdanm 86:04dd9b1680ae 8 ******************************************************************************
bogdanm 86:04dd9b1680ae 9 * @attention
bogdanm 86:04dd9b1680ae 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 86:04dd9b1680ae 12 *
bogdanm 86:04dd9b1680ae 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 86:04dd9b1680ae 14 * are permitted provided that the following conditions are met:
bogdanm 86:04dd9b1680ae 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 86:04dd9b1680ae 16 * this list of conditions and the following disclaimer.
bogdanm 86:04dd9b1680ae 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 86:04dd9b1680ae 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 86:04dd9b1680ae 19 * and/or other materials provided with the distribution.
bogdanm 86:04dd9b1680ae 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 86:04dd9b1680ae 21 * may be used to endorse or promote products derived from this software
bogdanm 86:04dd9b1680ae 22 * without specific prior written permission.
bogdanm 86:04dd9b1680ae 23 *
bogdanm 86:04dd9b1680ae 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 86:04dd9b1680ae 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 86:04dd9b1680ae 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 86:04dd9b1680ae 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 86:04dd9b1680ae 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 86:04dd9b1680ae 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 86:04dd9b1680ae 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 86:04dd9b1680ae 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 86:04dd9b1680ae 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 86:04dd9b1680ae 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 86:04dd9b1680ae 34 *
bogdanm 86:04dd9b1680ae 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
bogdanm 86:04dd9b1680ae 37
bogdanm 86:04dd9b1680ae 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 86:04dd9b1680ae 39 #ifndef __STM32F3xx_HAL_TIM_EX_H
bogdanm 86:04dd9b1680ae 40 #define __STM32F3xx_HAL_TIM_EX_H
bogdanm 86:04dd9b1680ae 41
bogdanm 86:04dd9b1680ae 42 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 43 extern "C" {
bogdanm 86:04dd9b1680ae 44 #endif
bogdanm 86:04dd9b1680ae 45
bogdanm 86:04dd9b1680ae 46 /* Includes ------------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 47 #include "stm32f3xx_hal_def.h"
bogdanm 86:04dd9b1680ae 48
bogdanm 86:04dd9b1680ae 49 /** @addtogroup STM32F3xx_HAL_Driver
bogdanm 86:04dd9b1680ae 50 * @{
bogdanm 86:04dd9b1680ae 51 */
bogdanm 86:04dd9b1680ae 52
bogdanm 86:04dd9b1680ae 53 /** @addtogroup TIMEx
bogdanm 86:04dd9b1680ae 54 * @{
Kojto 122:f9eeca106725 55 */
bogdanm 86:04dd9b1680ae 56
Kojto 122:f9eeca106725 57 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 58 /** @defgroup TIMEx_Exported_Types TIMEx Exported Types
bogdanm 92:4fc01daae5a5 59 * @{
bogdanm 92:4fc01daae5a5 60 */
bogdanm 86:04dd9b1680ae 61
Kojto 122:f9eeca106725 62 /**
Kojto 122:f9eeca106725 63 * @brief TIM Hall sensor Configuration Structure definition
bogdanm 86:04dd9b1680ae 64 */
bogdanm 86:04dd9b1680ae 65
bogdanm 86:04dd9b1680ae 66 typedef struct
bogdanm 86:04dd9b1680ae 67 {
Kojto 122:f9eeca106725 68
bogdanm 86:04dd9b1680ae 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
bogdanm 86:04dd9b1680ae 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
Kojto 122:f9eeca106725 71
bogdanm 86:04dd9b1680ae 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
bogdanm 86:04dd9b1680ae 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
Kojto 122:f9eeca106725 74
bogdanm 86:04dd9b1680ae 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
Kojto 122:f9eeca106725 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 122:f9eeca106725 77 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
Kojto 122:f9eeca106725 78 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
bogdanm 86:04dd9b1680ae 79 } TIM_HallSensor_InitTypeDef;
bogdanm 86:04dd9b1680ae 80
bogdanm 86:04dd9b1680ae 81 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 122:f9eeca106725 82 /**
Kojto 122:f9eeca106725 83 * @brief TIM Master configuration Structure definition
bogdanm 86:04dd9b1680ae 84 * @note STM32F373xC and STM32F378xx: timer instances provide a single TRGO
bogdanm 86:04dd9b1680ae 85 * output
Kojto 122:f9eeca106725 86 */
bogdanm 86:04dd9b1680ae 87 typedef struct {
Kojto 122:f9eeca106725 88 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
Kojto 122:f9eeca106725 89 This parameter can be a value of @ref TIM_Master_Mode_Selection */
Kojto 122:f9eeca106725 90 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
bogdanm 86:04dd9b1680ae 91 This parameter can be a value of @ref TIM_Master_Slave_Mode */
bogdanm 86:04dd9b1680ae 92 }TIM_MasterConfigTypeDef;
bogdanm 86:04dd9b1680ae 93
Kojto 122:f9eeca106725 94 /**
Kojto 122:f9eeca106725 95 * @brief TIM Break and Dead time configuration Structure definition
bogdanm 86:04dd9b1680ae 96 * @note STM32F373xC and STM32F378xx: single break input with configurable polarity.
Kojto 122:f9eeca106725 97 */
bogdanm 86:04dd9b1680ae 98 typedef struct
bogdanm 86:04dd9b1680ae 99 {
Kojto 122:f9eeca106725 100 uint32_t OffStateRunMode; /*!< TIM off state in run mode
bogdanm 86:04dd9b1680ae 101 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
Kojto 122:f9eeca106725 102 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
bogdanm 86:04dd9b1680ae 103 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
Kojto 122:f9eeca106725 104 uint32_t LockLevel; /*!< TIM Lock level
Kojto 122:f9eeca106725 105 This parameter can be a value of @ref TIM_Lock_level */
Kojto 122:f9eeca106725 106 uint32_t DeadTime; /*!< TIM dead Time
bogdanm 86:04dd9b1680ae 107 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
Kojto 122:f9eeca106725 108 uint32_t BreakState; /*!< TIM Break State
bogdanm 86:04dd9b1680ae 109 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
Kojto 122:f9eeca106725 110 uint32_t BreakPolarity; /*!< TIM Break input polarity
bogdanm 86:04dd9b1680ae 111 This parameter can be a value of @ref TIM_Break_Polarity */
Kojto 122:f9eeca106725 112 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
Kojto 122:f9eeca106725 113 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
bogdanm 86:04dd9b1680ae 114 } TIM_BreakDeadTimeConfigTypeDef;
bogdanm 86:04dd9b1680ae 115
bogdanm 86:04dd9b1680ae 116 #endif /* STM32F373xC || STM32F378xx */
bogdanm 86:04dd9b1680ae 117
bogdanm 92:4fc01daae5a5 118 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
bogdanm 92:4fc01daae5a5 119 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
bogdanm 92:4fc01daae5a5 120 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
bogdanm 92:4fc01daae5a5 121 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 122:f9eeca106725 122 /**
Kojto 122:f9eeca106725 123 * @brief TIM Break input(s) and Dead time configuration Structure definition
Kojto 122:f9eeca106725 124 * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable
bogdanm 86:04dd9b1680ae 125 * filter and polarity.
Kojto 122:f9eeca106725 126 */
bogdanm 86:04dd9b1680ae 127 typedef struct
bogdanm 86:04dd9b1680ae 128 {
Kojto 122:f9eeca106725 129 uint32_t OffStateRunMode; /*!< TIM off state in run mode
bogdanm 86:04dd9b1680ae 130 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
Kojto 122:f9eeca106725 131 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
bogdanm 86:04dd9b1680ae 132 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
Kojto 122:f9eeca106725 133 uint32_t LockLevel; /*!< TIM Lock level
Kojto 122:f9eeca106725 134 This parameter can be a value of @ref TIM_Lock_level */
Kojto 122:f9eeca106725 135 uint32_t DeadTime; /*!< TIM dead Time
bogdanm 86:04dd9b1680ae 136 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
Kojto 122:f9eeca106725 137 uint32_t BreakState; /*!< TIM Break State
bogdanm 86:04dd9b1680ae 138 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
Kojto 122:f9eeca106725 139 uint32_t BreakPolarity; /*!< TIM Break input polarity
bogdanm 86:04dd9b1680ae 140 This parameter can be a value of @ref TIM_Break_Polarity */
bogdanm 86:04dd9b1680ae 141 uint32_t BreakFilter; /*!< Specifies the brek input filter.
Kojto 122:f9eeca106725 142 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 122:f9eeca106725 143 uint32_t Break2State; /*!< TIM Break2 State
bogdanm 86:04dd9b1680ae 144 This parameter can be a value of @ref TIMEx_Break2_Input_enable_disable */
Kojto 122:f9eeca106725 145 uint32_t Break2Polarity; /*!< TIM Break2 input polarity
bogdanm 86:04dd9b1680ae 146 This parameter can be a value of @ref TIMEx_Break2_Polarity */
bogdanm 86:04dd9b1680ae 147 uint32_t Break2Filter; /*!< TIM break2 input filter.
Kojto 122:f9eeca106725 148 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 122:f9eeca106725 149 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
Kojto 122:f9eeca106725 150 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
bogdanm 86:04dd9b1680ae 151 } TIM_BreakDeadTimeConfigTypeDef;
bogdanm 86:04dd9b1680ae 152
Kojto 122:f9eeca106725 153 /**
Kojto 122:f9eeca106725 154 * @brief TIM Master configuration Structure definition
bogdanm 86:04dd9b1680ae 155 * @note Advanced timers provide TRGO2 internal line which is redirected
Kojto 122:f9eeca106725 156 * to the ADC
Kojto 122:f9eeca106725 157 */
bogdanm 86:04dd9b1680ae 158 typedef struct {
Kojto 122:f9eeca106725 159 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
Kojto 122:f9eeca106725 160 This parameter can be a value of @ref TIM_Master_Mode_Selection */
Kojto 122:f9eeca106725 161 uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection
bogdanm 86:04dd9b1680ae 162 This parameter can be a value of @ref TIMEx_Master_Mode_Selection_2 */
Kojto 122:f9eeca106725 163 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
bogdanm 86:04dd9b1680ae 164 This parameter can be a value of @ref TIM_Master_Slave_Mode */
bogdanm 86:04dd9b1680ae 165 }TIM_MasterConfigTypeDef;
bogdanm 92:4fc01daae5a5 166 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
bogdanm 86:04dd9b1680ae 167 /* STM32F302xC || STM32F303xC || STM32F358xx || */
bogdanm 92:4fc01daae5a5 168 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
bogdanm 92:4fc01daae5a5 169 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
bogdanm 92:4fc01daae5a5 170 /**
bogdanm 92:4fc01daae5a5 171 * @}
bogdanm 92:4fc01daae5a5 172 */
bogdanm 86:04dd9b1680ae 173
bogdanm 86:04dd9b1680ae 174 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 175 /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants
bogdanm 86:04dd9b1680ae 176 * @{
bogdanm 86:04dd9b1680ae 177 */
bogdanm 86:04dd9b1680ae 178
bogdanm 86:04dd9b1680ae 179 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 122:f9eeca106725 180 /** @defgroup TIMEx_Channel TIMEx Channel
bogdanm 86:04dd9b1680ae 181 * @{
bogdanm 86:04dd9b1680ae 182 */
bogdanm 86:04dd9b1680ae 183 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
bogdanm 86:04dd9b1680ae 184 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
bogdanm 86:04dd9b1680ae 185 #define TIM_CHANNEL_3 ((uint32_t)0x0008)
bogdanm 86:04dd9b1680ae 186 #define TIM_CHANNEL_4 ((uint32_t)0x000C)
bogdanm 86:04dd9b1680ae 187 #define TIM_CHANNEL_ALL ((uint32_t)0x0018)
bogdanm 86:04dd9b1680ae 188 /**
bogdanm 86:04dd9b1680ae 189 * @}
Kojto 122:f9eeca106725 190 */
bogdanm 86:04dd9b1680ae 191
Kojto 122:f9eeca106725 192 /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIMEx Output Compare and PWM Modes
bogdanm 86:04dd9b1680ae 193 * @{
bogdanm 86:04dd9b1680ae 194 */
bogdanm 86:04dd9b1680ae 195 #define TIM_OCMODE_TIMING ((uint32_t)0x0000)
bogdanm 86:04dd9b1680ae 196 #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
bogdanm 86:04dd9b1680ae 197 #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
bogdanm 86:04dd9b1680ae 198 #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1)
bogdanm 86:04dd9b1680ae 199 #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
bogdanm 86:04dd9b1680ae 200 #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M)
bogdanm 86:04dd9b1680ae 201 #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
bogdanm 86:04dd9b1680ae 202 #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
bogdanm 86:04dd9b1680ae 203 /**
bogdanm 86:04dd9b1680ae 204 * @}
bogdanm 86:04dd9b1680ae 205 */
bogdanm 86:04dd9b1680ae 206
Kojto 122:f9eeca106725 207 /** @defgroup TIMEx_ClearInput_Source TIMEx Clear Input Source
bogdanm 86:04dd9b1680ae 208 * @{
bogdanm 86:04dd9b1680ae 209 */
Kojto 122:f9eeca106725 210 #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
bogdanm 86:04dd9b1680ae 211 #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
Kojto 122:f9eeca106725 212 /**
Kojto 122:f9eeca106725 213 * @}
Kojto 122:f9eeca106725 214 */
bogdanm 86:04dd9b1680ae 215
Kojto 122:f9eeca106725 216 /** @defgroup TIMEx_Slave_Mode TIMEx Slave Mode
Kojto 122:f9eeca106725 217 * @{
Kojto 122:f9eeca106725 218 */
Kojto 122:f9eeca106725 219 #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
Kojto 122:f9eeca106725 220 #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2))
Kojto 122:f9eeca106725 221 #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0))
Kojto 122:f9eeca106725 222 #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1))
Kojto 122:f9eeca106725 223 #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0))
bogdanm 86:04dd9b1680ae 224 /**
bogdanm 86:04dd9b1680ae 225 * @}
bogdanm 86:04dd9b1680ae 226 */
bogdanm 86:04dd9b1680ae 227
Kojto 122:f9eeca106725 228 /** @defgroup TIMEx_Event_Source TIMEx Event Source
bogdanm 86:04dd9b1680ae 229 * @{
bogdanm 86:04dd9b1680ae 230 */
Kojto 122:f9eeca106725 231 #define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
Kojto 122:f9eeca106725 232 #define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
Kojto 122:f9eeca106725 233 #define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
Kojto 122:f9eeca106725 234 #define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
Kojto 122:f9eeca106725 235 #define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
Kojto 122:f9eeca106725 236 #define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */
Kojto 122:f9eeca106725 237 #define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */
Kojto 122:f9eeca106725 238 #define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */
bogdanm 86:04dd9b1680ae 239 /**
bogdanm 86:04dd9b1680ae 240 * @}
bogdanm 86:04dd9b1680ae 241 */
bogdanm 86:04dd9b1680ae 242
Kojto 122:f9eeca106725 243 /** @defgroup TIMEx_DMA_Base_address TIMEx DMA BAse Address
Kojto 122:f9eeca106725 244 * @{
Kojto 122:f9eeca106725 245 */
Kojto 122:f9eeca106725 246 #define TIM_DMABASE_CR1 (0x00000000)
Kojto 122:f9eeca106725 247 #define TIM_DMABASE_CR2 (0x00000001)
Kojto 122:f9eeca106725 248 #define TIM_DMABASE_SMCR (0x00000002)
Kojto 122:f9eeca106725 249 #define TIM_DMABASE_DIER (0x00000003)
Kojto 122:f9eeca106725 250 #define TIM_DMABASE_SR (0x00000004)
Kojto 122:f9eeca106725 251 #define TIM_DMABASE_EGR (0x00000005)
Kojto 122:f9eeca106725 252 #define TIM_DMABASE_CCMR1 (0x00000006)
Kojto 122:f9eeca106725 253 #define TIM_DMABASE_CCMR2 (0x00000007)
Kojto 122:f9eeca106725 254 #define TIM_DMABASE_CCER (0x00000008)
Kojto 122:f9eeca106725 255 #define TIM_DMABASE_CNT (0x00000009)
Kojto 122:f9eeca106725 256 #define TIM_DMABASE_PSC (0x0000000A)
Kojto 122:f9eeca106725 257 #define TIM_DMABASE_ARR (0x0000000B)
Kojto 122:f9eeca106725 258 #define TIM_DMABASE_RCR (0x0000000C)
Kojto 122:f9eeca106725 259 #define TIM_DMABASE_CCR1 (0x0000000D)
Kojto 122:f9eeca106725 260 #define TIM_DMABASE_CCR2 (0x0000000E)
Kojto 122:f9eeca106725 261 #define TIM_DMABASE_CCR3 (0x0000000F)
Kojto 122:f9eeca106725 262 #define TIM_DMABASE_CCR4 (0x00000010)
Kojto 122:f9eeca106725 263 #define TIM_DMABASE_BDTR (0x00000011)
Kojto 122:f9eeca106725 264 #define TIM_DMABASE_DCR (0x00000012)
Kojto 122:f9eeca106725 265 #define TIM_DMABASE_OR (0x00000013)
bogdanm 86:04dd9b1680ae 266 /**
bogdanm 86:04dd9b1680ae 267 * @}
Kojto 122:f9eeca106725 268 */
bogdanm 86:04dd9b1680ae 269 #endif /* STM32F373xC || STM32F378xx */
bogdanm 86:04dd9b1680ae 270
bogdanm 92:4fc01daae5a5 271 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
bogdanm 92:4fc01daae5a5 272 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
bogdanm 92:4fc01daae5a5 273 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
bogdanm 92:4fc01daae5a5 274 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 122:f9eeca106725 275 /** @defgroup TIMEx_Channel TIMEx Channel
bogdanm 86:04dd9b1680ae 276 * @{
bogdanm 86:04dd9b1680ae 277 */
bogdanm 86:04dd9b1680ae 278 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
bogdanm 86:04dd9b1680ae 279 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
bogdanm 86:04dd9b1680ae 280 #define TIM_CHANNEL_3 ((uint32_t)0x0008)
bogdanm 86:04dd9b1680ae 281 #define TIM_CHANNEL_4 ((uint32_t)0x000C)
bogdanm 86:04dd9b1680ae 282 #define TIM_CHANNEL_5 ((uint32_t)0x0010)
bogdanm 86:04dd9b1680ae 283 #define TIM_CHANNEL_6 ((uint32_t)0x0014)
bogdanm 86:04dd9b1680ae 284 #define TIM_CHANNEL_ALL ((uint32_t)0x003C)
bogdanm 86:04dd9b1680ae 285 /**
bogdanm 86:04dd9b1680ae 286 * @}
Kojto 122:f9eeca106725 287 */
bogdanm 86:04dd9b1680ae 288
Kojto 122:f9eeca106725 289 /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIMEx Output Compare and PWM Modes
bogdanm 86:04dd9b1680ae 290 * @{
bogdanm 86:04dd9b1680ae 291 */
bogdanm 86:04dd9b1680ae 292 #define TIM_OCMODE_TIMING ((uint32_t)0x0000)
bogdanm 86:04dd9b1680ae 293 #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
bogdanm 86:04dd9b1680ae 294 #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
bogdanm 86:04dd9b1680ae 295 #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
bogdanm 86:04dd9b1680ae 296 #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
bogdanm 86:04dd9b1680ae 297 #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
bogdanm 86:04dd9b1680ae 298 #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
bogdanm 86:04dd9b1680ae 299 #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
bogdanm 86:04dd9b1680ae 300
bogdanm 86:04dd9b1680ae 301 #define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3)
bogdanm 86:04dd9b1680ae 302 #define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
bogdanm 86:04dd9b1680ae 303 #define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
bogdanm 86:04dd9b1680ae 304 #define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
bogdanm 86:04dd9b1680ae 305 #define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
bogdanm 86:04dd9b1680ae 306 #define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
bogdanm 86:04dd9b1680ae 307
Kojto 122:f9eeca106725 308 /**
Kojto 122:f9eeca106725 309 * @}
Kojto 122:f9eeca106725 310 */
Kojto 122:f9eeca106725 311
Kojto 122:f9eeca106725 312 /** @defgroup TIMEx_ClearInput_Source TIMEx Clear Input Source
Kojto 122:f9eeca106725 313 * @{
Kojto 122:f9eeca106725 314 */
Kojto 122:f9eeca106725 315 #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
Kojto 122:f9eeca106725 316 #define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002)
Kojto 122:f9eeca106725 317 #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
Kojto 122:f9eeca106725 318 /**
Kojto 122:f9eeca106725 319 * @}
Kojto 122:f9eeca106725 320 */
Kojto 122:f9eeca106725 321
Kojto 122:f9eeca106725 322 /** @defgroup TIMEx_Break2_Input_enable_disable TIMEX Break input 2 Enable
Kojto 122:f9eeca106725 323 * @{
Kojto 122:f9eeca106725 324 */
Kojto 122:f9eeca106725 325 #define TIM_BREAK2_DISABLE ((uint32_t)0x00000000)
Kojto 122:f9eeca106725 326 #define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E)
Kojto 122:f9eeca106725 327 /**
Kojto 122:f9eeca106725 328 * @}
Kojto 122:f9eeca106725 329 */
Kojto 122:f9eeca106725 330
Kojto 122:f9eeca106725 331 /** @defgroup TIMEx_Break2_Polarity TIMEx Break Input 2 Polarity
Kojto 122:f9eeca106725 332 * @{
Kojto 122:f9eeca106725 333 */
Kojto 122:f9eeca106725 334 #define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000)
Kojto 122:f9eeca106725 335 #define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P)
Kojto 122:f9eeca106725 336 /**
Kojto 122:f9eeca106725 337 * @}
Kojto 122:f9eeca106725 338 */
Kojto 122:f9eeca106725 339
Kojto 122:f9eeca106725 340 /** @defgroup TIMEx_Master_Mode_Selection_2 TIMEx Master Mode Selection 2 (TRGO2)
Kojto 122:f9eeca106725 341 * @{
Kojto 122:f9eeca106725 342 */
Kojto 122:f9eeca106725 343 #define TIM_TRGO2_RESET ((uint32_t)0x00000000)
Kojto 122:f9eeca106725 344 #define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0))
Kojto 122:f9eeca106725 345 #define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1))
Kojto 122:f9eeca106725 346 #define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 122:f9eeca106725 347 #define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2))
Kojto 122:f9eeca106725 348 #define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
Kojto 122:f9eeca106725 349 #define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1))
Kojto 122:f9eeca106725 350 #define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 122:f9eeca106725 351 #define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3))
Kojto 122:f9eeca106725 352 #define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0))
Kojto 122:f9eeca106725 353 #define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1))
Kojto 122:f9eeca106725 354 #define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 122:f9eeca106725 355 #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2))
Kojto 122:f9eeca106725 356 #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
Kojto 122:f9eeca106725 357 #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1))
Kojto 122:f9eeca106725 358 #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 122:f9eeca106725 359 /**
Kojto 122:f9eeca106725 360 * @}
Kojto 122:f9eeca106725 361 */
Kojto 122:f9eeca106725 362
Kojto 122:f9eeca106725 363 /** @defgroup TIMEx_Slave_Mode TIMEx Slave mode
Kojto 122:f9eeca106725 364 * @{
Kojto 122:f9eeca106725 365 */
Kojto 122:f9eeca106725 366 #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
Kojto 122:f9eeca106725 367 #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2))
Kojto 122:f9eeca106725 368 #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0))
Kojto 122:f9eeca106725 369 #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1))
Kojto 122:f9eeca106725 370 #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0))
Kojto 122:f9eeca106725 371 #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3))
Kojto 122:f9eeca106725 372 /**
Kojto 122:f9eeca106725 373 * @}
Kojto 122:f9eeca106725 374 */
Kojto 122:f9eeca106725 375
Kojto 122:f9eeca106725 376 /** @defgroup TIM_Event_Source TIMEx Event Source
Kojto 122:f9eeca106725 377 * @{
Kojto 122:f9eeca106725 378 */
Kojto 122:f9eeca106725 379 #define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
Kojto 122:f9eeca106725 380 #define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
Kojto 122:f9eeca106725 381 #define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
Kojto 122:f9eeca106725 382 #define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
Kojto 122:f9eeca106725 383 #define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
Kojto 122:f9eeca106725 384 #define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */
Kojto 122:f9eeca106725 385 #define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */
Kojto 122:f9eeca106725 386 #define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */
Kojto 122:f9eeca106725 387 #define TIM_EVENTSOURCE_BREAK2 TIM_EGR_B2G /*!< A break 2 event is generated */
Kojto 122:f9eeca106725 388 /**
Kojto 122:f9eeca106725 389 * @}
Kojto 122:f9eeca106725 390 */
Kojto 122:f9eeca106725 391
Kojto 122:f9eeca106725 392 /** @defgroup TIM_DMA_Base_address TIMEx DMA Base Address
Kojto 122:f9eeca106725 393 * @{
Kojto 122:f9eeca106725 394 */
Kojto 122:f9eeca106725 395 #define TIM_DMABASE_CR1 (0x00000000)
Kojto 122:f9eeca106725 396 #define TIM_DMABASE_CR2 (0x00000001)
Kojto 122:f9eeca106725 397 #define TIM_DMABASE_SMCR (0x00000002)
Kojto 122:f9eeca106725 398 #define TIM_DMABASE_DIER (0x00000003)
Kojto 122:f9eeca106725 399 #define TIM_DMABASE_SR (0x00000004)
Kojto 122:f9eeca106725 400 #define TIM_DMABASE_EGR (0x00000005)
Kojto 122:f9eeca106725 401 #define TIM_DMABASE_CCMR1 (0x00000006)
Kojto 122:f9eeca106725 402 #define TIM_DMABASE_CCMR2 (0x00000007)
Kojto 122:f9eeca106725 403 #define TIM_DMABASE_CCER (0x00000008)
Kojto 122:f9eeca106725 404 #define TIM_DMABASE_CNT (0x00000009)
Kojto 122:f9eeca106725 405 #define TIM_DMABASE_PSC (0x0000000A)
Kojto 122:f9eeca106725 406 #define TIM_DMABASE_ARR (0x0000000B)
Kojto 122:f9eeca106725 407 #define TIM_DMABASE_RCR (0x0000000C)
Kojto 122:f9eeca106725 408 #define TIM_DMABASE_CCR1 (0x0000000D)
Kojto 122:f9eeca106725 409 #define TIM_DMABASE_CCR2 (0x0000000E)
Kojto 122:f9eeca106725 410 #define TIM_DMABASE_CCR3 (0x0000000F)
Kojto 122:f9eeca106725 411 #define TIM_DMABASE_CCR4 (0x00000010)
Kojto 122:f9eeca106725 412 #define TIM_DMABASE_BDTR (0x00000011)
Kojto 122:f9eeca106725 413 #define TIM_DMABASE_DCR (0x00000012)
Kojto 122:f9eeca106725 414 #define TIM_DMABASE_CCMR3 (0x00000015)
Kojto 122:f9eeca106725 415 #define TIM_DMABASE_CCR5 (0x00000016)
Kojto 122:f9eeca106725 416 #define TIM_DMABASE_CCR6 (0x00000017)
Kojto 122:f9eeca106725 417 #define TIM_DMABASE_OR (0x00000018)
Kojto 122:f9eeca106725 418 /**
Kojto 122:f9eeca106725 419 * @}
Kojto 122:f9eeca106725 420 */
Kojto 122:f9eeca106725 421 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 122:f9eeca106725 422 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 122:f9eeca106725 423 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 122:f9eeca106725 424 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 122:f9eeca106725 425
Kojto 122:f9eeca106725 426 #if defined(STM32F302xE) || \
Kojto 122:f9eeca106725 427 defined(STM32F302xC) || \
Kojto 122:f9eeca106725 428 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 122:f9eeca106725 429 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 122:f9eeca106725 430 /** @defgroup TIMEx_Remap TIMEx Remapping
Kojto 122:f9eeca106725 431 * @{
Kojto 122:f9eeca106725 432 */
Kojto 122:f9eeca106725 433 #define TIM_TIM1_ADC1_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 122:f9eeca106725 434 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /*!< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 122:f9eeca106725 435 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /*!< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 122:f9eeca106725 436 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /*!< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 122:f9eeca106725 437 #define TIM_TIM16_GPIO (0x00000000) /*!< TIM16 TI1 is connected to GPIO */
Kojto 122:f9eeca106725 438 #define TIM_TIM16_RTC (0x00000001) /*!< TIM16 TI1 is connected to RTC_clock */
Kojto 122:f9eeca106725 439 #define TIM_TIM16_HSE (0x00000002) /*!< TIM16 TI1 is connected to HSE/32 */
Kojto 122:f9eeca106725 440 #define TIM_TIM16_MCO (0x00000003) /*!< TIM16 TI1 is connected to MCO */
Kojto 122:f9eeca106725 441 /**
Kojto 122:f9eeca106725 442 * @}
Kojto 122:f9eeca106725 443 */
Kojto 122:f9eeca106725 444 #endif /* STM32F302xE || */
Kojto 122:f9eeca106725 445 /* STM32F302xC || */
Kojto 122:f9eeca106725 446 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 122:f9eeca106725 447 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
Kojto 122:f9eeca106725 448
Kojto 122:f9eeca106725 449 #if defined(STM32F303xC) || defined(STM32F358xx)
Kojto 122:f9eeca106725 450 /** @defgroup TIMEx_Remap TIMEx Remapping 1
Kojto 122:f9eeca106725 451 * @{
Kojto 122:f9eeca106725 452 */
Kojto 122:f9eeca106725 453 #define TIM_TIM1_ADC1_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 122:f9eeca106725 454 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /*!< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 122:f9eeca106725 455 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /*!< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 122:f9eeca106725 456 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /*!< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 122:f9eeca106725 457 #define TIM_TIM8_ADC2_NONE (0x00000000) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 122:f9eeca106725 458 #define TIM_TIM8_ADC2_AWD1 (0x00000001) /*!< TIM8_ETR is connected to ADC2 AWD1 */
Kojto 122:f9eeca106725 459 #define TIM_TIM8_ADC2_AWD2 (0x00000002) /*!< TIM8_ETR is connected to ADC2 AWD2 */
Kojto 122:f9eeca106725 460 #define TIM_TIM8_ADC2_AWD3 (0x00000003) /*!< TIM8_ETR is connected to ADC2 AWD3 */
Kojto 122:f9eeca106725 461 #define TIM_TIM16_GPIO (0x00000000) /*!< TIM16 TI1 is connected to GPIO */
Kojto 122:f9eeca106725 462 #define TIM_TIM16_RTC (0x00000001) /*!< TIM16 TI1 is connected to RTC_clock */
Kojto 122:f9eeca106725 463 #define TIM_TIM16_HSE (0x00000002) /*!< TIM16 TI1 is connected to HSE/32 */
Kojto 122:f9eeca106725 464 #define TIM_TIM16_MCO (0x00000003) /*!< TIM16 TI1 is connected to MCO */
Kojto 122:f9eeca106725 465 /**
Kojto 122:f9eeca106725 466 * @}
Kojto 122:f9eeca106725 467 */
Kojto 122:f9eeca106725 468
Kojto 122:f9eeca106725 469 /** @defgroup TIMEx_Remap2 TIMEx Remapping 2
Kojto 122:f9eeca106725 470 * @{
Kojto 122:f9eeca106725 471 */
Kojto 122:f9eeca106725 472 #define TIM_TIM1_ADC4_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 122:f9eeca106725 473 #define TIM_TIM1_ADC4_AWD1 (0x00000004) /*!< TIM1_ETR is connected to ADC4 AWD1 */
Kojto 122:f9eeca106725 474 #define TIM_TIM1_ADC4_AWD2 (0x00000008) /*!< TIM1_ETR is connected to ADC4 AWD2 */
Kojto 122:f9eeca106725 475 #define TIM_TIM1_ADC4_AWD3 (0x0000000C) /*!< TIM1_ETR is connected to ADC4 AWD3 */
Kojto 122:f9eeca106725 476 #define TIM_TIM8_ADC3_NONE (0x00000000) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 122:f9eeca106725 477 #define TIM_TIM8_ADC3_AWD1 (0x00000004) /*!< TIM8_ETR is connected to ADC3 AWD1 */
Kojto 122:f9eeca106725 478 #define TIM_TIM8_ADC3_AWD2 (0x00000008) /*!< TIM8_ETR is connected to ADC3 AWD2 */
Kojto 122:f9eeca106725 479 #define TIM_TIM8_ADC3_AWD3 (0x0000000C) /*!< TIM8_ETR is connected to ADC3 AWD3 */
Kojto 122:f9eeca106725 480 #define TIM_TIM16_NONE (0x00000000) /*!< Non significant value for TIM16 */
Kojto 122:f9eeca106725 481 /**
Kojto 122:f9eeca106725 482 * @}
Kojto 122:f9eeca106725 483 */
Kojto 122:f9eeca106725 484 #endif /* STM32F303xC || STM32F358xx */
Kojto 122:f9eeca106725 485
Kojto 122:f9eeca106725 486 #if defined(STM32F303xE) || defined(STM32F398xx)
Kojto 122:f9eeca106725 487 /** @defgroup TIMEx_Remap TIMEx Remapping 1
Kojto 122:f9eeca106725 488 * @{
Kojto 122:f9eeca106725 489 */
Kojto 122:f9eeca106725 490 #define TIM_TIM1_ADC1_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 122:f9eeca106725 491 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /*!< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 122:f9eeca106725 492 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /*!< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 122:f9eeca106725 493 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /*!< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 122:f9eeca106725 494 #define TIM_TIM8_ADC2_NONE (0x00000000) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 122:f9eeca106725 495 #define TIM_TIM8_ADC2_AWD1 (0x00000001) /*!< TIM8_ETR is connected to ADC2 AWD1 */
Kojto 122:f9eeca106725 496 #define TIM_TIM8_ADC2_AWD2 (0x00000002) /*!< TIM8_ETR is connected to ADC2 AWD2 */
Kojto 122:f9eeca106725 497 #define TIM_TIM8_ADC2_AWD3 (0x00000003) /*!< TIM8_ETR is connected to ADC2 AWD3 */
Kojto 122:f9eeca106725 498 #define TIM_TIM16_GPIO (0x00000000) /*!< TIM16 TI1 is connected to GPIO */
Kojto 122:f9eeca106725 499 #define TIM_TIM16_RTC (0x00000001) /*!< TIM16 TI1 is connected to RTC_clock */
Kojto 122:f9eeca106725 500 #define TIM_TIM16_HSE (0x00000002) /*!< TIM16 TI1 is connected to HSE/32 */
Kojto 122:f9eeca106725 501 #define TIM_TIM16_MCO (0x00000003) /*!< TIM16 TI1 is connected to MCO */
Kojto 122:f9eeca106725 502 #define TIM_TIM20_ADC3_NONE (0x00000000) /*!< TIM20_ETR is not connected to any AWD (analog watchdog) */
Kojto 122:f9eeca106725 503 #define TIM_TIM20_ADC3_AWD1 (0x00000001) /*!< TIM20_ETR is connected to ADC3 AWD1 */
Kojto 122:f9eeca106725 504 #define TIM_TIM20_ADC3_AWD2 (0x00000002) /*!< TIM20_ETR is connected to ADC3 AWD2 */
Kojto 122:f9eeca106725 505 #define TIM_TIM20_ADC3_AWD3 (0x00000003) /*!< TIM20_ETR is connected to ADC3 AWD3 */
Kojto 122:f9eeca106725 506 /**
Kojto 122:f9eeca106725 507 * @}
Kojto 122:f9eeca106725 508 */
Kojto 122:f9eeca106725 509
Kojto 122:f9eeca106725 510 /** @defgroup TIMEx_Remap2 TIMEx Remapping 2
Kojto 122:f9eeca106725 511 * @{
Kojto 122:f9eeca106725 512 */
Kojto 122:f9eeca106725 513 #define TIM_TIM1_ADC4_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 122:f9eeca106725 514 #define TIM_TIM1_ADC4_AWD1 (0x00000004) /*!< TIM1_ETR is connected to ADC4 AWD1 */
Kojto 122:f9eeca106725 515 #define TIM_TIM1_ADC4_AWD2 (0x00000008) /*!< TIM1_ETR is connected to ADC4 AWD2 */
Kojto 122:f9eeca106725 516 #define TIM_TIM1_ADC4_AWD3 (0x0000000C) /*!< TIM1_ETR is connected to ADC4 AWD3 */
Kojto 122:f9eeca106725 517 #define TIM_TIM8_ADC3_NONE (0x00000000) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 122:f9eeca106725 518 #define TIM_TIM8_ADC3_AWD1 (0x00000004) /*!< TIM8_ETR is connected to ADC3 AWD1 */
Kojto 122:f9eeca106725 519 #define TIM_TIM8_ADC3_AWD2 (0x00000008) /*!< TIM8_ETR is connected to ADC3 AWD2 */
Kojto 122:f9eeca106725 520 #define TIM_TIM8_ADC3_AWD3 (0x0000000C) /*!< TIM8_ETR is connected to ADC3 AWD3 */
Kojto 122:f9eeca106725 521 #define TIM_TIM16_NONE (0x00000000) /*!< Non significant value for TIM16 */
Kojto 122:f9eeca106725 522 #define TIM_TIM20_ADC4_NONE (0x00000000) /*!< TIM20_ETR is not connected to any AWD (analog watchdog) */
Kojto 122:f9eeca106725 523 #define TIM_TIM20_ADC4_AWD1 (0x00000004) /*!< TIM20_ETR is connected to ADC4 AWD1 */
Kojto 122:f9eeca106725 524 #define TIM_TIM20_ADC4_AWD2 (0x00000008) /*!< TIM20_ETR is connected to ADC4 AWD2 */
Kojto 122:f9eeca106725 525 #define TIM_TIM20_ADC4_AWD3 (0x0000000C) /*!< TIM20_ETR is connected to ADC4 AWD3 */
Kojto 122:f9eeca106725 526 /**
Kojto 122:f9eeca106725 527 * @}
Kojto 122:f9eeca106725 528 */
Kojto 122:f9eeca106725 529 #endif /* STM32F303xE || STM32F398xx */
Kojto 122:f9eeca106725 530
Kojto 122:f9eeca106725 531
Kojto 122:f9eeca106725 532 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 122:f9eeca106725 533 /** @defgroup TIMEx_Remap TIMEx remapping
Kojto 122:f9eeca106725 534 * @{
Kojto 122:f9eeca106725 535 */
Kojto 122:f9eeca106725 536 #define TIM_TIM2_TIM8_TRGO (0x00000000) /*!< TIM8 TRGOUT is connected to TIM2_ITR1 */
Kojto 122:f9eeca106725 537 #define TIM_TIM2_ETH_PTP (0x00000400) /*!< PTP trigger output is connected to TIM2_ITR1 */
Kojto 122:f9eeca106725 538 #define TIM_TIM2_USBFS_SOF (0x00000800) /*!< OTG FS SOF is connected to the TIM2_ITR1 input */
Kojto 122:f9eeca106725 539 #define TIM_TIM2_USBHS_SOF (0x00000C00) /*!< OTG HS SOF is connected to the TIM2_ITR1 input */
Kojto 122:f9eeca106725 540 #define TIM_TIM14_GPIO (0x00000000) /*!< TIM14 TI1 is connected to GPIO */
Kojto 122:f9eeca106725 541 #define TIM_TIM14_RTC (0x00000001) /*!< TIM14 TI1 is connected to RTC_clock */
Kojto 122:f9eeca106725 542 #define TIM_TIM14_HSE (0x00000002) /*!< TIM14 TI1 is connected to HSE/32 */
Kojto 122:f9eeca106725 543 #define TIM_TIM14_MCO (0x00000003) /*!< TIM14 TI1 is connected to MCO */
Kojto 122:f9eeca106725 544 /**
Kojto 122:f9eeca106725 545 * @}
Kojto 122:f9eeca106725 546 */
Kojto 122:f9eeca106725 547 #endif /* STM32F373xC || STM32F378xx */
Kojto 122:f9eeca106725 548
Kojto 122:f9eeca106725 549 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 122:f9eeca106725 550 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 122:f9eeca106725 551 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 122:f9eeca106725 552 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 122:f9eeca106725 553 /** @defgroup TIMEx_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3
Kojto 122:f9eeca106725 554 * @{
Kojto 122:f9eeca106725 555 */
Kojto 122:f9eeca106725 556 #define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /*!< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */
Kojto 122:f9eeca106725 557 #define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /*!< OC1REFC is the logical AND of OC1REFC and OC5REF */
Kojto 122:f9eeca106725 558 #define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /*!< OC2REFC is the logical AND of OC2REFC and OC5REF */
Kojto 122:f9eeca106725 559 #define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /*!< OC3REFC is the logical AND of OC3REFC and OC5REF */
Kojto 122:f9eeca106725 560 /**
Kojto 122:f9eeca106725 561 * @}
Kojto 122:f9eeca106725 562 */
Kojto 122:f9eeca106725 563 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 122:f9eeca106725 564 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 122:f9eeca106725 565 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 122:f9eeca106725 566 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 122:f9eeca106725 567
Kojto 122:f9eeca106725 568 /**
Kojto 122:f9eeca106725 569 * @}
Kojto 122:f9eeca106725 570 */
Kojto 122:f9eeca106725 571
Kojto 122:f9eeca106725 572
Kojto 122:f9eeca106725 573 /* Private Macros -----------------------------------------------------------*/
Kojto 122:f9eeca106725 574 /** @defgroup TIM_Private_Macros TIM Private Macros
Kojto 122:f9eeca106725 575 * @{
Kojto 122:f9eeca106725 576 */
Kojto 122:f9eeca106725 577 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 122:f9eeca106725 578
Kojto 122:f9eeca106725 579 #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 122:f9eeca106725 580 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 122:f9eeca106725 581 ((CHANNEL) == TIM_CHANNEL_3) || \
Kojto 122:f9eeca106725 582 ((CHANNEL) == TIM_CHANNEL_4) || \
Kojto 122:f9eeca106725 583 ((CHANNEL) == TIM_CHANNEL_ALL))
Kojto 122:f9eeca106725 584
Kojto 122:f9eeca106725 585 #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 122:f9eeca106725 586 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 122:f9eeca106725 587
Kojto 122:f9eeca106725 588 #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 122:f9eeca106725 589 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 122:f9eeca106725 590 ((CHANNEL) == TIM_CHANNEL_3))
Kojto 122:f9eeca106725 591
Kojto 122:f9eeca106725 592 #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \
Kojto 122:f9eeca106725 593 ((MODE) == TIM_OCMODE_PWM2))
Kojto 122:f9eeca106725 594
Kojto 122:f9eeca106725 595 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \
Kojto 122:f9eeca106725 596 ((MODE) == TIM_OCMODE_ACTIVE) || \
Kojto 122:f9eeca106725 597 ((MODE) == TIM_OCMODE_INACTIVE) || \
Kojto 122:f9eeca106725 598 ((MODE) == TIM_OCMODE_TOGGLE) || \
Kojto 122:f9eeca106725 599 ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \
Kojto 122:f9eeca106725 600 ((MODE) == TIM_OCMODE_FORCED_INACTIVE))
Kojto 122:f9eeca106725 601
Kojto 122:f9eeca106725 602 #define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) || \
Kojto 122:f9eeca106725 603 ((SOURCE) == TIM_CLEARINPUTSOURCE_ETR))
Kojto 122:f9eeca106725 604
Kojto 122:f9eeca106725 605 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \
Kojto 122:f9eeca106725 606 ((MODE) == TIM_SLAVEMODE_RESET) || \
Kojto 122:f9eeca106725 607 ((MODE) == TIM_SLAVEMODE_GATED) || \
Kojto 122:f9eeca106725 608 ((MODE) == TIM_SLAVEMODE_TRIGGER) || \
Kojto 122:f9eeca106725 609 ((MODE) == TIM_SLAVEMODE_EXTERNAL1))
Kojto 122:f9eeca106725 610
Kojto 122:f9eeca106725 611 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFF00U) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto 122:f9eeca106725 612
Kojto 122:f9eeca106725 613 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABASE_CR1) || \
Kojto 122:f9eeca106725 614 ((BASE) == TIM_DMABASE_CR2) || \
Kojto 122:f9eeca106725 615 ((BASE) == TIM_DMABASE_SMCR) || \
Kojto 122:f9eeca106725 616 ((BASE) == TIM_DMABASE_DIER) || \
Kojto 122:f9eeca106725 617 ((BASE) == TIM_DMABASE_SR) || \
Kojto 122:f9eeca106725 618 ((BASE) == TIM_DMABASE_EGR) || \
Kojto 122:f9eeca106725 619 ((BASE) == TIM_DMABASE_CCMR1) || \
Kojto 122:f9eeca106725 620 ((BASE) == TIM_DMABASE_CCMR2) || \
Kojto 122:f9eeca106725 621 ((BASE) == TIM_DMABASE_CCER) || \
Kojto 122:f9eeca106725 622 ((BASE) == TIM_DMABASE_CNT) || \
Kojto 122:f9eeca106725 623 ((BASE) == TIM_DMABASE_PSC) || \
Kojto 122:f9eeca106725 624 ((BASE) == TIM_DMABASE_ARR) || \
Kojto 122:f9eeca106725 625 ((BASE) == TIM_DMABASE_RCR) || \
Kojto 122:f9eeca106725 626 ((BASE) == TIM_DMABASE_CCR1) || \
Kojto 122:f9eeca106725 627 ((BASE) == TIM_DMABASE_CCR2) || \
Kojto 122:f9eeca106725 628 ((BASE) == TIM_DMABASE_CCR3) || \
Kojto 122:f9eeca106725 629 ((BASE) == TIM_DMABASE_CCR4) || \
Kojto 122:f9eeca106725 630 ((BASE) == TIM_DMABASE_BDTR) || \
Kojto 122:f9eeca106725 631 ((BASE) == TIM_DMABASE_DCR) || \
Kojto 122:f9eeca106725 632 ((BASE) == TIM_DMABASE_OR))
Kojto 122:f9eeca106725 633
Kojto 122:f9eeca106725 634 #endif /* STM32F373xC || STM32F378xx */
Kojto 122:f9eeca106725 635
Kojto 122:f9eeca106725 636
Kojto 122:f9eeca106725 637
Kojto 122:f9eeca106725 638 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 122:f9eeca106725 639 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 122:f9eeca106725 640 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 122:f9eeca106725 641 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 122:f9eeca106725 642
Kojto 122:f9eeca106725 643 #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 122:f9eeca106725 644 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 122:f9eeca106725 645 ((CHANNEL) == TIM_CHANNEL_3) || \
Kojto 122:f9eeca106725 646 ((CHANNEL) == TIM_CHANNEL_4) || \
Kojto 122:f9eeca106725 647 ((CHANNEL) == TIM_CHANNEL_5) || \
Kojto 122:f9eeca106725 648 ((CHANNEL) == TIM_CHANNEL_6) || \
Kojto 122:f9eeca106725 649 ((CHANNEL) == TIM_CHANNEL_ALL))
Kojto 122:f9eeca106725 650
Kojto 122:f9eeca106725 651 #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 122:f9eeca106725 652 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 122:f9eeca106725 653
Kojto 122:f9eeca106725 654 #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 122:f9eeca106725 655 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 122:f9eeca106725 656 ((CHANNEL) == TIM_CHANNEL_3))
Kojto 122:f9eeca106725 657
bogdanm 86:04dd9b1680ae 658 #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \
bogdanm 86:04dd9b1680ae 659 ((MODE) == TIM_OCMODE_PWM2) || \
bogdanm 86:04dd9b1680ae 660 ((MODE) == TIM_OCMODE_COMBINED_PWM1) || \
bogdanm 86:04dd9b1680ae 661 ((MODE) == TIM_OCMODE_COMBINED_PWM2) || \
bogdanm 86:04dd9b1680ae 662 ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
bogdanm 86:04dd9b1680ae 663 ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM2))
bogdanm 86:04dd9b1680ae 664
bogdanm 86:04dd9b1680ae 665 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \
bogdanm 86:04dd9b1680ae 666 ((MODE) == TIM_OCMODE_ACTIVE) || \
bogdanm 86:04dd9b1680ae 667 ((MODE) == TIM_OCMODE_INACTIVE) || \
bogdanm 86:04dd9b1680ae 668 ((MODE) == TIM_OCMODE_TOGGLE) || \
bogdanm 86:04dd9b1680ae 669 ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \
bogdanm 86:04dd9b1680ae 670 ((MODE) == TIM_OCMODE_FORCED_INACTIVE) || \
bogdanm 86:04dd9b1680ae 671 ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \
bogdanm 86:04dd9b1680ae 672 ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM2))
bogdanm 86:04dd9b1680ae 673
bogdanm 86:04dd9b1680ae 674 #define IS_TIM_CLEARINPUT_SOURCE(MODE) (((MODE) == TIM_CLEARINPUTSOURCE_ETR) || \
bogdanm 86:04dd9b1680ae 675 ((MODE) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \
bogdanm 86:04dd9b1680ae 676 ((MODE) == TIM_CLEARINPUTSOURCE_NONE))
bogdanm 86:04dd9b1680ae 677
bogdanm 86:04dd9b1680ae 678 #define IS_TIM_BREAK_FILTER(BRKFILTER) ((BRKFILTER) <= 0xF)
bogdanm 86:04dd9b1680ae 679
bogdanm 86:04dd9b1680ae 680 #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_BREAK2_ENABLE) || \
bogdanm 86:04dd9b1680ae 681 ((STATE) == TIM_BREAK2_DISABLE))
bogdanm 86:04dd9b1680ae 682
bogdanm 86:04dd9b1680ae 683 #define IS_TIM_BREAK2_POLARITY(POLARITY) (((POLARITY) == TIM_BREAK2POLARITY_LOW) || \
bogdanm 86:04dd9b1680ae 684 ((POLARITY) == TIM_BREAK2POLARITY_HIGH))
bogdanm 86:04dd9b1680ae 685
bogdanm 86:04dd9b1680ae 686 #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2_RESET) || \
bogdanm 86:04dd9b1680ae 687 ((SOURCE) == TIM_TRGO2_ENABLE) || \
bogdanm 86:04dd9b1680ae 688 ((SOURCE) == TIM_TRGO2_UPDATE) || \
bogdanm 86:04dd9b1680ae 689 ((SOURCE) == TIM_TRGO2_OC1) || \
bogdanm 86:04dd9b1680ae 690 ((SOURCE) == TIM_TRGO2_OC1REF) || \
bogdanm 86:04dd9b1680ae 691 ((SOURCE) == TIM_TRGO2_OC2REF) || \
bogdanm 86:04dd9b1680ae 692 ((SOURCE) == TIM_TRGO2_OC3REF) || \
bogdanm 86:04dd9b1680ae 693 ((SOURCE) == TIM_TRGO2_OC3REF) || \
bogdanm 86:04dd9b1680ae 694 ((SOURCE) == TIM_TRGO2_OC4REF) || \
bogdanm 86:04dd9b1680ae 695 ((SOURCE) == TIM_TRGO2_OC5REF) || \
bogdanm 86:04dd9b1680ae 696 ((SOURCE) == TIM_TRGO2_OC6REF) || \
bogdanm 86:04dd9b1680ae 697 ((SOURCE) == TIM_TRGO2_OC4REF_RISINGFALLING) || \
bogdanm 86:04dd9b1680ae 698 ((SOURCE) == TIM_TRGO2_OC6REF_RISINGFALLING) || \
bogdanm 86:04dd9b1680ae 699 ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \
bogdanm 86:04dd9b1680ae 700 ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \
bogdanm 86:04dd9b1680ae 701 ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \
bogdanm 86:04dd9b1680ae 702 ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING))
bogdanm 86:04dd9b1680ae 703
bogdanm 86:04dd9b1680ae 704 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \
bogdanm 86:04dd9b1680ae 705 ((MODE) == TIM_SLAVEMODE_RESET) || \
bogdanm 86:04dd9b1680ae 706 ((MODE) == TIM_SLAVEMODE_GATED) || \
bogdanm 86:04dd9b1680ae 707 ((MODE) == TIM_SLAVEMODE_TRIGGER) || \
bogdanm 86:04dd9b1680ae 708 ((MODE) == TIM_SLAVEMODE_EXTERNAL1) || \
bogdanm 86:04dd9b1680ae 709 ((MODE) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))
bogdanm 86:04dd9b1680ae 710
Kojto 122:f9eeca106725 711 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFE00U) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto 122:f9eeca106725 712
Kojto 122:f9eeca106725 713 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABASE_CR1) || \
Kojto 122:f9eeca106725 714 ((BASE) == TIM_DMABASE_CR2) || \
Kojto 122:f9eeca106725 715 ((BASE) == TIM_DMABASE_SMCR) || \
Kojto 122:f9eeca106725 716 ((BASE) == TIM_DMABASE_DIER) || \
Kojto 122:f9eeca106725 717 ((BASE) == TIM_DMABASE_SR) || \
Kojto 122:f9eeca106725 718 ((BASE) == TIM_DMABASE_EGR) || \
Kojto 122:f9eeca106725 719 ((BASE) == TIM_DMABASE_CCMR1) || \
Kojto 122:f9eeca106725 720 ((BASE) == TIM_DMABASE_CCMR2) || \
Kojto 122:f9eeca106725 721 ((BASE) == TIM_DMABASE_CCER) || \
Kojto 122:f9eeca106725 722 ((BASE) == TIM_DMABASE_CNT) || \
Kojto 122:f9eeca106725 723 ((BASE) == TIM_DMABASE_PSC) || \
Kojto 122:f9eeca106725 724 ((BASE) == TIM_DMABASE_ARR) || \
Kojto 122:f9eeca106725 725 ((BASE) == TIM_DMABASE_RCR) || \
Kojto 122:f9eeca106725 726 ((BASE) == TIM_DMABASE_CCR1) || \
Kojto 122:f9eeca106725 727 ((BASE) == TIM_DMABASE_CCR2) || \
Kojto 122:f9eeca106725 728 ((BASE) == TIM_DMABASE_CCR3) || \
Kojto 122:f9eeca106725 729 ((BASE) == TIM_DMABASE_CCR4) || \
Kojto 122:f9eeca106725 730 ((BASE) == TIM_DMABASE_BDTR) || \
Kojto 122:f9eeca106725 731 ((BASE) == TIM_DMABASE_CCMR3) || \
Kojto 122:f9eeca106725 732 ((BASE) == TIM_DMABASE_CCR5) || \
Kojto 122:f9eeca106725 733 ((BASE) == TIM_DMABASE_CCR6) || \
Kojto 122:f9eeca106725 734 ((BASE) == TIM_DMABASE_OR))
Kojto 122:f9eeca106725 735
bogdanm 92:4fc01daae5a5 736 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
bogdanm 86:04dd9b1680ae 737 /* STM32F302xC || STM32F303xC || STM32F358xx || */
bogdanm 92:4fc01daae5a5 738 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
bogdanm 92:4fc01daae5a5 739 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
bogdanm 86:04dd9b1680ae 740
bogdanm 92:4fc01daae5a5 741 #if defined(STM32F302xE) || \
bogdanm 92:4fc01daae5a5 742 defined(STM32F302xC) || \
bogdanm 92:4fc01daae5a5 743 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
bogdanm 92:4fc01daae5a5 744 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
bogdanm 86:04dd9b1680ae 745
bogdanm 86:04dd9b1680ae 746 #define IS_TIM_REMAP(REMAP) (((REMAP) == TIM_TIM1_ADC1_NONE) ||\
bogdanm 86:04dd9b1680ae 747 ((REMAP) == TIM_TIM1_ADC1_AWD1) ||\
bogdanm 86:04dd9b1680ae 748 ((REMAP) == TIM_TIM1_ADC1_AWD2) ||\
bogdanm 86:04dd9b1680ae 749 ((REMAP) == TIM_TIM1_ADC1_AWD3) ||\
bogdanm 86:04dd9b1680ae 750 ((REMAP) == TIM_TIM16_GPIO) ||\
bogdanm 86:04dd9b1680ae 751 ((REMAP) == TIM_TIM16_RTC) ||\
bogdanm 86:04dd9b1680ae 752 ((REMAP) == TIM_TIM16_HSE) ||\
bogdanm 86:04dd9b1680ae 753 ((REMAP) == TIM_TIM16_MCO))
Kojto 122:f9eeca106725 754
bogdanm 92:4fc01daae5a5 755 #endif /* STM32F302xE || */
bogdanm 92:4fc01daae5a5 756 /* STM32F302xC || */
bogdanm 92:4fc01daae5a5 757 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
bogdanm 92:4fc01daae5a5 758 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
bogdanm 86:04dd9b1680ae 759
bogdanm 86:04dd9b1680ae 760 #if defined(STM32F303xC) || defined(STM32F358xx)
bogdanm 86:04dd9b1680ae 761
bogdanm 86:04dd9b1680ae 762 #define IS_TIM_REMAP(REMAP1) (((REMAP1) == TIM_TIM1_ADC1_NONE) ||\
bogdanm 86:04dd9b1680ae 763 ((REMAP1) == TIM_TIM1_ADC1_AWD1) ||\
bogdanm 86:04dd9b1680ae 764 ((REMAP1) == TIM_TIM1_ADC1_AWD2) ||\
bogdanm 86:04dd9b1680ae 765 ((REMAP1) == TIM_TIM1_ADC1_AWD3) ||\
bogdanm 86:04dd9b1680ae 766 ((REMAP1) == TIM_TIM8_ADC2_NONE) ||\
bogdanm 86:04dd9b1680ae 767 ((REMAP1) == TIM_TIM8_ADC2_AWD1) ||\
bogdanm 86:04dd9b1680ae 768 ((REMAP1) == TIM_TIM8_ADC2_AWD2) ||\
bogdanm 86:04dd9b1680ae 769 ((REMAP1) == TIM_TIM8_ADC2_AWD3) ||\
bogdanm 86:04dd9b1680ae 770 ((REMAP1) == TIM_TIM16_GPIO) ||\
bogdanm 86:04dd9b1680ae 771 ((REMAP1) == TIM_TIM16_RTC) ||\
bogdanm 86:04dd9b1680ae 772 ((REMAP1) == TIM_TIM16_HSE) ||\
bogdanm 86:04dd9b1680ae 773 ((REMAP1) == TIM_TIM16_MCO))
bogdanm 86:04dd9b1680ae 774
bogdanm 86:04dd9b1680ae 775 #define IS_TIM_REMAP2(REMAP2) (((REMAP2) == TIM_TIM1_ADC4_NONE) ||\
bogdanm 86:04dd9b1680ae 776 ((REMAP2) == TIM_TIM1_ADC4_AWD1) ||\
bogdanm 86:04dd9b1680ae 777 ((REMAP2) == TIM_TIM1_ADC4_AWD2) ||\
bogdanm 86:04dd9b1680ae 778 ((REMAP2) == TIM_TIM1_ADC4_AWD3) ||\
bogdanm 86:04dd9b1680ae 779 ((REMAP2) == TIM_TIM8_ADC3_NONE) ||\
bogdanm 86:04dd9b1680ae 780 ((REMAP2) == TIM_TIM8_ADC3_AWD1) ||\
bogdanm 86:04dd9b1680ae 781 ((REMAP2) == TIM_TIM8_ADC3_AWD2) ||\
bogdanm 86:04dd9b1680ae 782 ((REMAP2) == TIM_TIM8_ADC3_AWD3) ||\
bogdanm 86:04dd9b1680ae 783 ((REMAP2) == TIM_TIM16_NONE))
Kojto 122:f9eeca106725 784
bogdanm 86:04dd9b1680ae 785 #endif /* STM32F303xC || STM32F358xx */
bogdanm 86:04dd9b1680ae 786
bogdanm 92:4fc01daae5a5 787 #if defined(STM32F303xE) || defined(STM32F398xx)
bogdanm 92:4fc01daae5a5 788
bogdanm 92:4fc01daae5a5 789 #define IS_TIM_REMAP(REMAP1) (((REMAP1) == TIM_TIM1_ADC1_NONE) ||\
bogdanm 92:4fc01daae5a5 790 ((REMAP1) == TIM_TIM1_ADC1_AWD1) ||\
bogdanm 92:4fc01daae5a5 791 ((REMAP1) == TIM_TIM1_ADC1_AWD2) ||\
bogdanm 92:4fc01daae5a5 792 ((REMAP1) == TIM_TIM1_ADC1_AWD3) ||\
bogdanm 92:4fc01daae5a5 793 ((REMAP1) == TIM_TIM8_ADC2_NONE) ||\
bogdanm 92:4fc01daae5a5 794 ((REMAP1) == TIM_TIM8_ADC2_AWD1) ||\
bogdanm 92:4fc01daae5a5 795 ((REMAP1) == TIM_TIM8_ADC2_AWD2) ||\
bogdanm 92:4fc01daae5a5 796 ((REMAP1) == TIM_TIM8_ADC2_AWD3) ||\
bogdanm 92:4fc01daae5a5 797 ((REMAP1) == TIM_TIM16_GPIO) ||\
bogdanm 92:4fc01daae5a5 798 ((REMAP1) == TIM_TIM16_RTC) ||\
bogdanm 92:4fc01daae5a5 799 ((REMAP1) == TIM_TIM16_HSE) ||\
bogdanm 92:4fc01daae5a5 800 ((REMAP1) == TIM_TIM16_MCO) ||\
bogdanm 92:4fc01daae5a5 801 ((REMAP1) == TIM_TIM20_ADC3_NONE) ||\
bogdanm 92:4fc01daae5a5 802 ((REMAP1) == TIM_TIM20_ADC3_AWD1) ||\
bogdanm 92:4fc01daae5a5 803 ((REMAP1) == TIM_TIM20_ADC3_AWD2) ||\
bogdanm 92:4fc01daae5a5 804 ((REMAP1) == TIM_TIM20_ADC3_AWD3))
bogdanm 92:4fc01daae5a5 805
bogdanm 92:4fc01daae5a5 806 #define IS_TIM_REMAP2(REMAP2) (((REMAP2) == TIM_TIM1_ADC4_NONE) ||\
bogdanm 92:4fc01daae5a5 807 ((REMAP2) == TIM_TIM1_ADC4_AWD1) ||\
bogdanm 92:4fc01daae5a5 808 ((REMAP2) == TIM_TIM1_ADC4_AWD2) ||\
bogdanm 92:4fc01daae5a5 809 ((REMAP2) == TIM_TIM1_ADC4_AWD3) ||\
bogdanm 92:4fc01daae5a5 810 ((REMAP2) == TIM_TIM8_ADC3_NONE) ||\
bogdanm 92:4fc01daae5a5 811 ((REMAP2) == TIM_TIM8_ADC3_AWD1) ||\
bogdanm 92:4fc01daae5a5 812 ((REMAP2) == TIM_TIM8_ADC3_AWD2) ||\
bogdanm 92:4fc01daae5a5 813 ((REMAP2) == TIM_TIM8_ADC3_AWD3) ||\
bogdanm 92:4fc01daae5a5 814 ((REMAP2) == TIM_TIM16_NONE) ||\
bogdanm 92:4fc01daae5a5 815 ((REMAP2) == TIM_TIM20_ADC4_NONE) ||\
bogdanm 92:4fc01daae5a5 816 ((REMAP2) == TIM_TIM20_ADC4_AWD1) ||\
bogdanm 92:4fc01daae5a5 817 ((REMAP2) == TIM_TIM20_ADC4_AWD2) ||\
bogdanm 92:4fc01daae5a5 818 ((REMAP2) == TIM_TIM20_ADC4_AWD3))
Kojto 122:f9eeca106725 819
bogdanm 92:4fc01daae5a5 820 #endif /* STM32F303xE || STM32F398xx */
bogdanm 92:4fc01daae5a5 821
bogdanm 86:04dd9b1680ae 822 #if defined(STM32F373xC) || defined(STM32F378xx)
bogdanm 86:04dd9b1680ae 823
bogdanm 86:04dd9b1680ae 824 #define IS_TIM_REMAP(REMAP) (((REMAP) == TIM_TIM2_TIM8_TRGO) ||\
bogdanm 86:04dd9b1680ae 825 ((REMAP) == TIM_TIM2_ETH_PTP) ||\
bogdanm 86:04dd9b1680ae 826 ((REMAP) == TIM_TIM2_USBFS_SOF) ||\
bogdanm 86:04dd9b1680ae 827 ((REMAP) == TIM_TIM2_USBHS_SOF) ||\
bogdanm 86:04dd9b1680ae 828 ((REMAP) == TIM_TIM14_GPIO) ||\
bogdanm 86:04dd9b1680ae 829 ((REMAP) == TIM_TIM14_RTC) ||\
bogdanm 86:04dd9b1680ae 830 ((REMAP) == TIM_TIM14_HSE) ||\
bogdanm 86:04dd9b1680ae 831 ((REMAP) == TIM_TIM14_MCO))
bogdanm 86:04dd9b1680ae 832
bogdanm 86:04dd9b1680ae 833 #endif /* STM32F373xC || STM32F378xx */
bogdanm 86:04dd9b1680ae 834
Kojto 122:f9eeca106725 835
bogdanm 92:4fc01daae5a5 836 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
bogdanm 92:4fc01daae5a5 837 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
bogdanm 92:4fc01daae5a5 838 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
bogdanm 92:4fc01daae5a5 839 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
bogdanm 86:04dd9b1680ae 840
bogdanm 86:04dd9b1680ae 841 #define IS_TIM_GROUPCH5(OCREF) ((((OCREF) & 0x1FFFFFFF) == 0x00000000))
Kojto 122:f9eeca106725 842
bogdanm 92:4fc01daae5a5 843 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
bogdanm 86:04dd9b1680ae 844 /* STM32F302xC || STM32F303xC || STM32F358xx || */
bogdanm 92:4fc01daae5a5 845 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
bogdanm 92:4fc01daae5a5 846 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 122:f9eeca106725 847
bogdanm 92:4fc01daae5a5 848 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFF)
bogdanm 92:4fc01daae5a5 849
bogdanm 86:04dd9b1680ae 850 /**
bogdanm 86:04dd9b1680ae 851 * @}
Kojto 122:f9eeca106725 852 */
Kojto 122:f9eeca106725 853 /* End of private macros -----------------------------------------------------*/
Kojto 122:f9eeca106725 854
bogdanm 86:04dd9b1680ae 855
bogdanm 86:04dd9b1680ae 856 /* Exported macro ------------------------------------------------------------*/
Kojto 122:f9eeca106725 857 /** @defgroup TIMEx_Exported_Macros TIMEx Exported Macros
bogdanm 92:4fc01daae5a5 858 * @{
Kojto 122:f9eeca106725 859 */
bogdanm 92:4fc01daae5a5 860
bogdanm 86:04dd9b1680ae 861 #if defined(STM32F373xC) || defined(STM32F378xx)
bogdanm 86:04dd9b1680ae 862 /**
bogdanm 86:04dd9b1680ae 863 * @brief Sets the TIM Capture Compare Register value on runtime without
bogdanm 86:04dd9b1680ae 864 * calling another time ConfigChannel function.
bogdanm 86:04dd9b1680ae 865 * @param __HANDLE__: TIM handle.
Kojto 122:f9eeca106725 866 * @param __CHANNEL__: TIM Channels to be configured.
bogdanm 86:04dd9b1680ae 867 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 868 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 86:04dd9b1680ae 869 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 86:04dd9b1680ae 870 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 86:04dd9b1680ae 871 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 86:04dd9b1680ae 872 * @param __COMPARE__: specifies the Capture Compare register new value.
bogdanm 86:04dd9b1680ae 873 * @retval None
bogdanm 86:04dd9b1680ae 874 */
Kojto 122:f9eeca106725 875 #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \
bogdanm 86:04dd9b1680ae 876 (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)) = (__COMPARE__))
bogdanm 86:04dd9b1680ae 877
bogdanm 86:04dd9b1680ae 878 /**
bogdanm 86:04dd9b1680ae 879 * @brief Gets the TIM Capture Compare Register value on runtime
bogdanm 86:04dd9b1680ae 880 * @param __HANDLE__: TIM handle.
Kojto 122:f9eeca106725 881 * @param __CHANNEL__: TIM Channel associated with the capture compare register
bogdanm 86:04dd9b1680ae 882 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 883 * @arg TIM_CHANNEL_1: get capture/compare 1 register value
bogdanm 86:04dd9b1680ae 884 * @arg TIM_CHANNEL_2: get capture/compare 2 register value
bogdanm 86:04dd9b1680ae 885 * @arg TIM_CHANNEL_3: get capture/compare 3 register value
bogdanm 86:04dd9b1680ae 886 * @arg TIM_CHANNEL_4: get capture/compare 4 register value
bogdanm 86:04dd9b1680ae 887 * @retval None
bogdanm 86:04dd9b1680ae 888 */
Kojto 122:f9eeca106725 889 #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \
bogdanm 86:04dd9b1680ae 890 (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)))
bogdanm 86:04dd9b1680ae 891 #endif /* STM32F373xC || STM32F378xx */
Kojto 122:f9eeca106725 892
bogdanm 92:4fc01daae5a5 893 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
bogdanm 92:4fc01daae5a5 894 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
bogdanm 92:4fc01daae5a5 895 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
bogdanm 92:4fc01daae5a5 896 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
bogdanm 86:04dd9b1680ae 897 /**
bogdanm 86:04dd9b1680ae 898 * @brief Sets the TIM Capture Compare Register value on runtime without
bogdanm 86:04dd9b1680ae 899 * calling another time ConfigChannel function.
bogdanm 86:04dd9b1680ae 900 * @param __HANDLE__: TIM handle.
Kojto 122:f9eeca106725 901 * @param __CHANNEL__: TIM Channels to be configured.
bogdanm 86:04dd9b1680ae 902 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 903 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
bogdanm 86:04dd9b1680ae 904 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
bogdanm 86:04dd9b1680ae 905 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
bogdanm 86:04dd9b1680ae 906 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
bogdanm 86:04dd9b1680ae 907 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
bogdanm 86:04dd9b1680ae 908 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
bogdanm 86:04dd9b1680ae 909 * @param __COMPARE__: specifies the Capture Compare register new value.
bogdanm 86:04dd9b1680ae 910 * @retval None
bogdanm 86:04dd9b1680ae 911 */
Kojto 122:f9eeca106725 912 #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \
bogdanm 86:04dd9b1680ae 913 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\
bogdanm 86:04dd9b1680ae 914 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\
bogdanm 86:04dd9b1680ae 915 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\
bogdanm 86:04dd9b1680ae 916 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\
bogdanm 86:04dd9b1680ae 917 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\
Kojto 122:f9eeca106725 918 ((__HANDLE__)->Instance->CCR6 = (__COMPARE__)))
bogdanm 86:04dd9b1680ae 919
bogdanm 86:04dd9b1680ae 920 /**
bogdanm 86:04dd9b1680ae 921 * @brief Gets the TIM Capture Compare Register value on runtime
bogdanm 86:04dd9b1680ae 922 * @param __HANDLE__: TIM handle.
Kojto 122:f9eeca106725 923 * @param __CHANNEL__: TIM Channel associated with the capture compare register
bogdanm 86:04dd9b1680ae 924 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 925 * @arg TIM_CHANNEL_1: get capture/compare 1 register value
bogdanm 86:04dd9b1680ae 926 * @arg TIM_CHANNEL_2: get capture/compare 2 register value
bogdanm 86:04dd9b1680ae 927 * @arg TIM_CHANNEL_3: get capture/compare 3 register value
bogdanm 86:04dd9b1680ae 928 * @arg TIM_CHANNEL_4: get capture/compare 4 register value
bogdanm 86:04dd9b1680ae 929 * @arg TIM_CHANNEL_5: get capture/compare 5 register value
bogdanm 86:04dd9b1680ae 930 * @arg TIM_CHANNEL_6: get capture/compare 6 register value
bogdanm 86:04dd9b1680ae 931 * @retval None
bogdanm 86:04dd9b1680ae 932 */
Kojto 122:f9eeca106725 933 #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \
bogdanm 86:04dd9b1680ae 934 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\
bogdanm 86:04dd9b1680ae 935 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\
bogdanm 86:04dd9b1680ae 936 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\
bogdanm 86:04dd9b1680ae 937 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\
bogdanm 86:04dd9b1680ae 938 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\
bogdanm 86:04dd9b1680ae 939 ((__HANDLE__)->Instance->CCR6))
bogdanm 92:4fc01daae5a5 940 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
bogdanm 86:04dd9b1680ae 941 /* STM32F302xC || STM32F303xC || STM32F358xx || */
bogdanm 92:4fc01daae5a5 942 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
bogdanm 92:4fc01daae5a5 943 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
bogdanm 92:4fc01daae5a5 944 /**
bogdanm 92:4fc01daae5a5 945 * @}
Kojto 122:f9eeca106725 946 */
bogdanm 86:04dd9b1680ae 947
bogdanm 86:04dd9b1680ae 948 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 949 /** @addtogroup TIMEx_Exported_Functions
bogdanm 92:4fc01daae5a5 950 * @{
bogdanm 92:4fc01daae5a5 951 */
bogdanm 86:04dd9b1680ae 952
Kojto 122:f9eeca106725 953 /** @addtogroup TIMEx_Exported_Functions_Group1
bogdanm 92:4fc01daae5a5 954 * @{
bogdanm 92:4fc01daae5a5 955 */
bogdanm 86:04dd9b1680ae 956 /* Timer Hall Sensor functions **********************************************/
bogdanm 86:04dd9b1680ae 957 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
bogdanm 86:04dd9b1680ae 958 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
bogdanm 86:04dd9b1680ae 959
bogdanm 86:04dd9b1680ae 960 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
bogdanm 86:04dd9b1680ae 961 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
bogdanm 86:04dd9b1680ae 962
bogdanm 86:04dd9b1680ae 963 /* Blocking mode: Polling */
bogdanm 86:04dd9b1680ae 964 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
bogdanm 86:04dd9b1680ae 965 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
bogdanm 86:04dd9b1680ae 966 /* Non-Blocking mode: Interrupt */
bogdanm 86:04dd9b1680ae 967 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
bogdanm 86:04dd9b1680ae 968 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
bogdanm 86:04dd9b1680ae 969 /* Non-Blocking mode: DMA */
bogdanm 86:04dd9b1680ae 970 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
bogdanm 86:04dd9b1680ae 971 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
bogdanm 92:4fc01daae5a5 972 /**
bogdanm 92:4fc01daae5a5 973 * @}
bogdanm 92:4fc01daae5a5 974 */
bogdanm 86:04dd9b1680ae 975
Kojto 122:f9eeca106725 976 /** @addtogroup TIMEx_Exported_Functions_Group2
bogdanm 92:4fc01daae5a5 977 * @{
bogdanm 92:4fc01daae5a5 978 */
bogdanm 86:04dd9b1680ae 979 /* Timer Complementary Output Compare functions *****************************/
bogdanm 86:04dd9b1680ae 980 /* Blocking mode: Polling */
bogdanm 86:04dd9b1680ae 981 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 86:04dd9b1680ae 982 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 86:04dd9b1680ae 983
bogdanm 86:04dd9b1680ae 984 /* Non-Blocking mode: Interrupt */
bogdanm 86:04dd9b1680ae 985 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 86:04dd9b1680ae 986 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 86:04dd9b1680ae 987
bogdanm 86:04dd9b1680ae 988 /* Non-Blocking mode: DMA */
bogdanm 86:04dd9b1680ae 989 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
bogdanm 86:04dd9b1680ae 990 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 92:4fc01daae5a5 991 /**
bogdanm 92:4fc01daae5a5 992 * @}
bogdanm 92:4fc01daae5a5 993 */
bogdanm 86:04dd9b1680ae 994
Kojto 122:f9eeca106725 995 /** @addtogroup TIMEx_Exported_Functions_Group3
bogdanm 92:4fc01daae5a5 996 * @{
bogdanm 92:4fc01daae5a5 997 */
bogdanm 86:04dd9b1680ae 998 /* Timer Complementary PWM functions ****************************************/
bogdanm 86:04dd9b1680ae 999 /* Blocking mode: Polling */
bogdanm 86:04dd9b1680ae 1000 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 86:04dd9b1680ae 1001 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 86:04dd9b1680ae 1002
bogdanm 86:04dd9b1680ae 1003 /* Non-Blocking mode: Interrupt */
bogdanm 86:04dd9b1680ae 1004 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 86:04dd9b1680ae 1005 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 86:04dd9b1680ae 1006 /* Non-Blocking mode: DMA */
bogdanm 86:04dd9b1680ae 1007 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
bogdanm 86:04dd9b1680ae 1008 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
bogdanm 92:4fc01daae5a5 1009 /**
bogdanm 92:4fc01daae5a5 1010 * @}
bogdanm 92:4fc01daae5a5 1011 */
bogdanm 86:04dd9b1680ae 1012
Kojto 122:f9eeca106725 1013 /** @addtogroup TIMEx_Exported_Functions_Group4
bogdanm 92:4fc01daae5a5 1014 * @{
bogdanm 92:4fc01daae5a5 1015 */
bogdanm 86:04dd9b1680ae 1016 /* Timer Complementary One Pulse functions **********************************/
bogdanm 86:04dd9b1680ae 1017 /* Blocking mode: Polling */
bogdanm 86:04dd9b1680ae 1018 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm 86:04dd9b1680ae 1019 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm 86:04dd9b1680ae 1020
bogdanm 86:04dd9b1680ae 1021 /* Non-Blocking mode: Interrupt */
bogdanm 86:04dd9b1680ae 1022 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm 86:04dd9b1680ae 1023 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
bogdanm 92:4fc01daae5a5 1024 /**
bogdanm 92:4fc01daae5a5 1025 * @}
bogdanm 92:4fc01daae5a5 1026 */
bogdanm 86:04dd9b1680ae 1027
Kojto 122:f9eeca106725 1028 /** @addtogroup TIMEx_Exported_Functions_Group5
bogdanm 92:4fc01daae5a5 1029 * @{
bogdanm 92:4fc01daae5a5 1030 */
bogdanm 92:4fc01daae5a5 1031 /* Extended Control functions ************************************************/
bogdanm 86:04dd9b1680ae 1032 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 86:04dd9b1680ae 1033 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 86:04dd9b1680ae 1034 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 86:04dd9b1680ae 1035 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
bogdanm 86:04dd9b1680ae 1036 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
bogdanm 86:04dd9b1680ae 1037
bogdanm 92:4fc01daae5a5 1038 #if defined(STM32F303xE) || defined(STM32F398xx) || \
bogdanm 92:4fc01daae5a5 1039 defined(STM32F303xC) || defined(STM32F358xx)
bogdanm 86:04dd9b1680ae 1040 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap1, uint32_t Remap2);
bogdanm 92:4fc01daae5a5 1041 #endif /* STM32F303xE || STM32F398xx || */
bogdanm 92:4fc01daae5a5 1042 /* STM32F303xC || STM32F358xx */
bogdanm 86:04dd9b1680ae 1043
bogdanm 92:4fc01daae5a5 1044 #if defined(STM32F302xE) || \
bogdanm 92:4fc01daae5a5 1045 defined(STM32F302xC) || \
bogdanm 86:04dd9b1680ae 1046 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
bogdanm 92:4fc01daae5a5 1047 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
bogdanm 86:04dd9b1680ae 1048 defined(STM32F373xC) || defined(STM32F378xx)
bogdanm 86:04dd9b1680ae 1049 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
bogdanm 92:4fc01daae5a5 1050 #endif /* STM32F302xE || */
bogdanm 92:4fc01daae5a5 1051 /* STM32F302xC || */
bogdanm 86:04dd9b1680ae 1052 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
bogdanm 92:4fc01daae5a5 1053 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
bogdanm 92:4fc01daae5a5 1054 /* STM32F373xC || STM32F378xx */
bogdanm 86:04dd9b1680ae 1055
bogdanm 92:4fc01daae5a5 1056 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
bogdanm 92:4fc01daae5a5 1057 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
bogdanm 92:4fc01daae5a5 1058 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
bogdanm 92:4fc01daae5a5 1059 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
bogdanm 86:04dd9b1680ae 1060 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
bogdanm 92:4fc01daae5a5 1061 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
bogdanm 86:04dd9b1680ae 1062 /* STM32F302xC || STM32F303xC || STM32F358xx || */
bogdanm 92:4fc01daae5a5 1063 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
bogdanm 92:4fc01daae5a5 1064 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
bogdanm 92:4fc01daae5a5 1065 /**
bogdanm 92:4fc01daae5a5 1066 * @}
bogdanm 92:4fc01daae5a5 1067 */
bogdanm 86:04dd9b1680ae 1068
Kojto 122:f9eeca106725 1069 /** @addtogroup TIMEx_Exported_Functions_Group6
bogdanm 92:4fc01daae5a5 1070 * @{
bogdanm 92:4fc01daae5a5 1071 */
bogdanm 92:4fc01daae5a5 1072 /* Extended Callback *********************************************************/
bogdanm 86:04dd9b1680ae 1073 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
bogdanm 86:04dd9b1680ae 1074 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
bogdanm 92:4fc01daae5a5 1075 /**
bogdanm 92:4fc01daae5a5 1076 * @}
bogdanm 92:4fc01daae5a5 1077 */
bogdanm 86:04dd9b1680ae 1078
Kojto 122:f9eeca106725 1079 /** @addtogroup TIMEx_Exported_Functions_Group7
bogdanm 92:4fc01daae5a5 1080 * @{
bogdanm 92:4fc01daae5a5 1081 */
bogdanm 92:4fc01daae5a5 1082 /* Extended Peripheral State functions **************************************/
bogdanm 86:04dd9b1680ae 1083 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
bogdanm 92:4fc01daae5a5 1084 /**
bogdanm 92:4fc01daae5a5 1085 * @}
bogdanm 92:4fc01daae5a5 1086 */
bogdanm 92:4fc01daae5a5 1087
bogdanm 92:4fc01daae5a5 1088 /**
bogdanm 92:4fc01daae5a5 1089 * @}
Kojto 122:f9eeca106725 1090 */
Kojto 122:f9eeca106725 1091 /* End of exported functions -------------------------------------------------*/
bogdanm 86:04dd9b1680ae 1092
Kojto 122:f9eeca106725 1093 /* Private functions----------------------------------------------------------*/
Kojto 122:f9eeca106725 1094 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
Kojto 122:f9eeca106725 1095 * @{
Kojto 122:f9eeca106725 1096 */
Kojto 122:f9eeca106725 1097 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
bogdanm 86:04dd9b1680ae 1098 /**
bogdanm 86:04dd9b1680ae 1099 * @}
Kojto 122:f9eeca106725 1100 */
Kojto 122:f9eeca106725 1101 /* End of private functions --------------------------------------------------*/
bogdanm 86:04dd9b1680ae 1102
bogdanm 86:04dd9b1680ae 1103 /**
bogdanm 86:04dd9b1680ae 1104 * @}
bogdanm 86:04dd9b1680ae 1105 */
Kojto 122:f9eeca106725 1106
Kojto 122:f9eeca106725 1107 /**
Kojto 122:f9eeca106725 1108 * @}
Kojto 122:f9eeca106725 1109 */
Kojto 122:f9eeca106725 1110
bogdanm 86:04dd9b1680ae 1111 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 1112 }
bogdanm 86:04dd9b1680ae 1113 #endif
bogdanm 86:04dd9b1680ae 1114
bogdanm 86:04dd9b1680ae 1115
bogdanm 86:04dd9b1680ae 1116 #endif /* __STM32F3xx_HAL_TIM_EX_H */
bogdanm 86:04dd9b1680ae 1117
bogdanm 86:04dd9b1680ae 1118 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/