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TARGET_NUCLEO_F070RB/stm32f0xx_hal_pwr_ex.h@122:f9eeca106725, 2016-07-07 (annotated)
- Committer:
- Kojto
- Date:
- Thu Jul 07 14:34:11 2016 +0100
- Revision:
- 122:f9eeca106725
- Parent:
- 108:34e6b704fe68
Release 122 of the mbed library
Changes:
- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4
- Thread safety addition - mbed API should contain a statement about thread safety
- critical section API addition
- CAS API (core_util_atomic_incr/decr)
- DEVICE_ are generated from targets.json file, device.h deprecated
- Callback replaces FunctionPointer to provide std like interface
- mbed HAL API docs improvements
- toolchain - prexif attributes with MBED_
- add new attributes - packed, weak, forcedinline, align
- target.json - contains targets definitions
- ST - L1XX - Cube update to 1.5
- SPI clock selection fix (clock from APB domain)
- F7 - Cube update v1.4.0
- L0 - baudrate init fix
- L1 - Cube update v1.5
- F3 - baudrate init fix, 3 targets CAN support
- F4 - Cube update v1.12.0, 3 targets CAN support
- L4XX - Cube update v1.5.1
- F0 - update Cube to v1.5.0
- L4 - 2 targets (L476RG/VG) CAN support
- NXP - pwm clock fix for KSDK2 MCU
- LPC2368 - remove ARM toolchain support - due to regression
- KSDK2 - fix SPI , I2C address and repeat start
- Silabs - some fixes backported from mbed 3
- Renesas - RZ_A1H - SystemCoreClockUpdate addition
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 93:e188a91d3eaa | 1 | /** |
| Kojto | 93:e188a91d3eaa | 2 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 3 | * @file stm32f0xx_hal_pwr_ex.h |
| Kojto | 93:e188a91d3eaa | 4 | * @author MCD Application Team |
| Kojto | 122:f9eeca106725 | 5 | * @version V1.4.0 |
| Kojto | 122:f9eeca106725 | 6 | * @date 27-May-2016 |
| Kojto | 93:e188a91d3eaa | 7 | * @brief Header file of PWR HAL Extension module. |
| Kojto | 93:e188a91d3eaa | 8 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 9 | * @attention |
| Kojto | 93:e188a91d3eaa | 10 | * |
| Kojto | 122:f9eeca106725 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| Kojto | 93:e188a91d3eaa | 12 | * |
| Kojto | 93:e188a91d3eaa | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 93:e188a91d3eaa | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 93:e188a91d3eaa | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 93:e188a91d3eaa | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 93:e188a91d3eaa | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 93:e188a91d3eaa | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 93:e188a91d3eaa | 19 | * and/or other materials provided with the distribution. |
| Kojto | 93:e188a91d3eaa | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 93:e188a91d3eaa | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 93:e188a91d3eaa | 22 | * without specific prior written permission. |
| Kojto | 93:e188a91d3eaa | 23 | * |
| Kojto | 93:e188a91d3eaa | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 93:e188a91d3eaa | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 93:e188a91d3eaa | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 93:e188a91d3eaa | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 93:e188a91d3eaa | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 93:e188a91d3eaa | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 93:e188a91d3eaa | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 93:e188a91d3eaa | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 93:e188a91d3eaa | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 93:e188a91d3eaa | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 93:e188a91d3eaa | 34 | * |
| Kojto | 93:e188a91d3eaa | 35 | ****************************************************************************** |
| Kojto | 93:e188a91d3eaa | 36 | */ |
| Kojto | 93:e188a91d3eaa | 37 | |
| Kojto | 93:e188a91d3eaa | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 39 | #ifndef __STM32F0xx_HAL_PWR_EX_H |
| Kojto | 93:e188a91d3eaa | 40 | #define __STM32F0xx_HAL_PWR_EX_H |
| Kojto | 93:e188a91d3eaa | 41 | |
| Kojto | 93:e188a91d3eaa | 42 | #ifdef __cplusplus |
| Kojto | 93:e188a91d3eaa | 43 | extern "C" { |
| Kojto | 93:e188a91d3eaa | 44 | #endif |
| Kojto | 93:e188a91d3eaa | 45 | |
| Kojto | 93:e188a91d3eaa | 46 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 47 | #include "stm32f0xx_hal_def.h" |
| Kojto | 93:e188a91d3eaa | 48 | |
| Kojto | 93:e188a91d3eaa | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
| Kojto | 93:e188a91d3eaa | 50 | * @{ |
| Kojto | 93:e188a91d3eaa | 51 | */ |
| Kojto | 93:e188a91d3eaa | 52 | |
| Kojto | 93:e188a91d3eaa | 53 | /** @addtogroup PWREx |
| Kojto | 93:e188a91d3eaa | 54 | * @{ |
| Kojto | 93:e188a91d3eaa | 55 | */ |
| Kojto | 93:e188a91d3eaa | 56 | |
| Kojto | 93:e188a91d3eaa | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 58 | |
| Kojto | 93:e188a91d3eaa | 59 | /** @defgroup PWREx_Exported_Types PWREx Exported Types |
| Kojto | 93:e188a91d3eaa | 60 | * @{ |
| Kojto | 93:e188a91d3eaa | 61 | */ |
| Kojto | 93:e188a91d3eaa | 62 | |
| Kojto | 93:e188a91d3eaa | 63 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 64 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 65 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 66 | |
| Kojto | 93:e188a91d3eaa | 67 | /** |
| Kojto | 93:e188a91d3eaa | 68 | * @brief PWR PVD configuration structure definition |
| Kojto | 93:e188a91d3eaa | 69 | */ |
| Kojto | 93:e188a91d3eaa | 70 | typedef struct |
| Kojto | 93:e188a91d3eaa | 71 | { |
| Kojto | 93:e188a91d3eaa | 72 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level |
| Kojto | 93:e188a91d3eaa | 73 | This parameter can be a value of @ref PWREx_PVD_detection_level */ |
| Kojto | 93:e188a91d3eaa | 74 | |
| Kojto | 93:e188a91d3eaa | 75 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
| Kojto | 93:e188a91d3eaa | 76 | This parameter can be a value of @ref PWREx_PVD_Mode */ |
| Kojto | 93:e188a91d3eaa | 77 | }PWR_PVDTypeDef; |
| Kojto | 93:e188a91d3eaa | 78 | |
| Kojto | 93:e188a91d3eaa | 79 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 80 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 81 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 82 | /** |
| Kojto | 93:e188a91d3eaa | 83 | * @} |
| Kojto | 93:e188a91d3eaa | 84 | */ |
| Kojto | 93:e188a91d3eaa | 85 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 86 | |
| Kojto | 93:e188a91d3eaa | 87 | /** @defgroup PWREx_Exported_Constants PWREx Exported Constants |
| Kojto | 93:e188a91d3eaa | 88 | * @{ |
| Kojto | 93:e188a91d3eaa | 89 | */ |
| Kojto | 93:e188a91d3eaa | 90 | |
| Kojto | 93:e188a91d3eaa | 91 | |
| Kojto | 93:e188a91d3eaa | 92 | /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins |
| Kojto | 93:e188a91d3eaa | 93 | * @{ |
| Kojto | 93:e188a91d3eaa | 94 | */ |
| Kojto | 122:f9eeca106725 | 95 | #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 122:f9eeca106725 | 96 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 122:f9eeca106725 | 97 | #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1) |
| Kojto | 122:f9eeca106725 | 98 | #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2) |
| Kojto | 122:f9eeca106725 | 99 | #define PWR_WAKEUP_PIN3 ((uint32_t)PWR_CSR_EWUP3) |
| Kojto | 122:f9eeca106725 | 100 | #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4) |
| Kojto | 122:f9eeca106725 | 101 | #define PWR_WAKEUP_PIN5 ((uint32_t)PWR_CSR_EWUP5) |
| Kojto | 122:f9eeca106725 | 102 | #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6) |
| Kojto | 122:f9eeca106725 | 103 | #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7) |
| Kojto | 122:f9eeca106725 | 104 | #define PWR_WAKEUP_PIN8 ((uint32_t)PWR_CSR_EWUP8) |
| Kojto | 93:e188a91d3eaa | 105 | |
| Kojto | 93:e188a91d3eaa | 106 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ |
| Kojto | 93:e188a91d3eaa | 107 | ((PIN) == PWR_WAKEUP_PIN2) || \ |
| Kojto | 93:e188a91d3eaa | 108 | ((PIN) == PWR_WAKEUP_PIN3) || \ |
| Kojto | 93:e188a91d3eaa | 109 | ((PIN) == PWR_WAKEUP_PIN4) || \ |
| Kojto | 93:e188a91d3eaa | 110 | ((PIN) == PWR_WAKEUP_PIN5) || \ |
| Kojto | 93:e188a91d3eaa | 111 | ((PIN) == PWR_WAKEUP_PIN6) || \ |
| Kojto | 93:e188a91d3eaa | 112 | ((PIN) == PWR_WAKEUP_PIN7) || \ |
| Kojto | 93:e188a91d3eaa | 113 | ((PIN) == PWR_WAKEUP_PIN8)) |
| Kojto | 122:f9eeca106725 | 114 | |
| Kojto | 122:f9eeca106725 | 115 | #elif defined(STM32F030xC) || defined (STM32F070xB) |
| Kojto | 122:f9eeca106725 | 116 | #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1) |
| Kojto | 122:f9eeca106725 | 117 | #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2) |
| Kojto | 122:f9eeca106725 | 118 | #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4) |
| Kojto | 122:f9eeca106725 | 119 | #define PWR_WAKEUP_PIN5 ((uint32_t)PWR_CSR_EWUP5) |
| Kojto | 122:f9eeca106725 | 120 | #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6) |
| Kojto | 122:f9eeca106725 | 121 | #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7) |
| Kojto | 122:f9eeca106725 | 122 | |
| Kojto | 122:f9eeca106725 | 123 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ |
| Kojto | 122:f9eeca106725 | 124 | ((PIN) == PWR_WAKEUP_PIN2) || \ |
| Kojto | 122:f9eeca106725 | 125 | ((PIN) == PWR_WAKEUP_PIN4) || \ |
| Kojto | 122:f9eeca106725 | 126 | ((PIN) == PWR_WAKEUP_PIN5) || \ |
| Kojto | 122:f9eeca106725 | 127 | ((PIN) == PWR_WAKEUP_PIN6) || \ |
| Kojto | 122:f9eeca106725 | 128 | ((PIN) == PWR_WAKEUP_PIN7)) |
| Kojto | 122:f9eeca106725 | 129 | |
| Kojto | 122:f9eeca106725 | 130 | #elif defined(STM32F042x6) || defined (STM32F048xx) |
| Kojto | 122:f9eeca106725 | 131 | #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1) |
| Kojto | 122:f9eeca106725 | 132 | #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2) |
| Kojto | 122:f9eeca106725 | 133 | #define PWR_WAKEUP_PIN4 ((uint32_t)PWR_CSR_EWUP4) |
| Kojto | 122:f9eeca106725 | 134 | #define PWR_WAKEUP_PIN6 ((uint32_t)PWR_CSR_EWUP6) |
| Kojto | 122:f9eeca106725 | 135 | #define PWR_WAKEUP_PIN7 ((uint32_t)PWR_CSR_EWUP7) |
| Kojto | 122:f9eeca106725 | 136 | |
| Kojto | 122:f9eeca106725 | 137 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ |
| Kojto | 122:f9eeca106725 | 138 | ((PIN) == PWR_WAKEUP_PIN2) || \ |
| Kojto | 122:f9eeca106725 | 139 | ((PIN) == PWR_WAKEUP_PIN4) || \ |
| Kojto | 122:f9eeca106725 | 140 | ((PIN) == PWR_WAKEUP_PIN6) || \ |
| Kojto | 122:f9eeca106725 | 141 | ((PIN) == PWR_WAKEUP_PIN7)) |
| Kojto | 122:f9eeca106725 | 142 | |
| Kojto | 122:f9eeca106725 | 143 | #else |
| Kojto | 122:f9eeca106725 | 144 | #define PWR_WAKEUP_PIN1 ((uint32_t)PWR_CSR_EWUP1) |
| Kojto | 122:f9eeca106725 | 145 | #define PWR_WAKEUP_PIN2 ((uint32_t)PWR_CSR_EWUP2) |
| Kojto | 122:f9eeca106725 | 146 | |
| Kojto | 93:e188a91d3eaa | 147 | |
| Kojto | 93:e188a91d3eaa | 148 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ |
| Kojto | 93:e188a91d3eaa | 149 | ((PIN) == PWR_WAKEUP_PIN2)) |
| Kojto | 122:f9eeca106725 | 150 | |
| Kojto | 122:f9eeca106725 | 151 | #endif |
| Kojto | 122:f9eeca106725 | 152 | |
| Kojto | 93:e188a91d3eaa | 153 | /** |
| Kojto | 93:e188a91d3eaa | 154 | * @} |
| Kojto | 93:e188a91d3eaa | 155 | */ |
| Kojto | 93:e188a91d3eaa | 156 | |
| Kojto | 93:e188a91d3eaa | 157 | /** @defgroup PWREx_EXTI_Line PWREx EXTI Line |
| Kojto | 93:e188a91d3eaa | 158 | * @{ |
| Kojto | 93:e188a91d3eaa | 159 | */ |
| Kojto | 93:e188a91d3eaa | 160 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 161 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 162 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 163 | |
| Kojto | 108:34e6b704fe68 | 164 | #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
| Kojto | 93:e188a91d3eaa | 165 | |
| Kojto | 93:e188a91d3eaa | 166 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 167 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 168 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 169 | |
| Kojto | 93:e188a91d3eaa | 170 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 171 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 172 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 93:e188a91d3eaa | 173 | |
| Kojto | 108:34e6b704fe68 | 174 | #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)EXTI_IMR_MR31) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */ |
| Kojto | 93:e188a91d3eaa | 175 | |
| Kojto | 93:e188a91d3eaa | 176 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\ |
| Kojto | 93:e188a91d3eaa | 177 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 178 | defined (STM32F091xC) || defined (STM32F098xx) ||*/ |
| Kojto | 93:e188a91d3eaa | 179 | /** |
| Kojto | 93:e188a91d3eaa | 180 | * @} |
| Kojto | 93:e188a91d3eaa | 181 | */ |
| Kojto | 93:e188a91d3eaa | 182 | |
| Kojto | 93:e188a91d3eaa | 183 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 184 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 185 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 186 | /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level |
| Kojto | 93:e188a91d3eaa | 187 | * @{ |
| Kojto | 93:e188a91d3eaa | 188 | */ |
| Kojto | 93:e188a91d3eaa | 189 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
| Kojto | 93:e188a91d3eaa | 190 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
| Kojto | 93:e188a91d3eaa | 191 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
| Kojto | 93:e188a91d3eaa | 192 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
| Kojto | 93:e188a91d3eaa | 193 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
| Kojto | 93:e188a91d3eaa | 194 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
| Kojto | 93:e188a91d3eaa | 195 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
| Kojto | 93:e188a91d3eaa | 196 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 |
| Kojto | 93:e188a91d3eaa | 197 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
| Kojto | 93:e188a91d3eaa | 198 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
| Kojto | 93:e188a91d3eaa | 199 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
| Kojto | 93:e188a91d3eaa | 200 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
| Kojto | 93:e188a91d3eaa | 201 | /** |
| Kojto | 93:e188a91d3eaa | 202 | * @} |
| Kojto | 93:e188a91d3eaa | 203 | */ |
| Kojto | 93:e188a91d3eaa | 204 | |
| Kojto | 93:e188a91d3eaa | 205 | /** @defgroup PWREx_PVD_Mode PWREx PVD Mode |
| Kojto | 93:e188a91d3eaa | 206 | * @{ |
| Kojto | 93:e188a91d3eaa | 207 | */ |
| Kojto | 93:e188a91d3eaa | 208 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ |
| Kojto | 93:e188a91d3eaa | 209 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 210 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 211 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 212 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 213 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 214 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ |
| Kojto | 93:e188a91d3eaa | 215 | |
| Kojto | 93:e188a91d3eaa | 216 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
| Kojto | 93:e188a91d3eaa | 217 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
| Kojto | 93:e188a91d3eaa | 218 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
| Kojto | 93:e188a91d3eaa | 219 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
| Kojto | 93:e188a91d3eaa | 220 | /** |
| Kojto | 93:e188a91d3eaa | 221 | * @} |
| Kojto | 93:e188a91d3eaa | 222 | */ |
| Kojto | 93:e188a91d3eaa | 223 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 224 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 225 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 226 | |
| Kojto | 93:e188a91d3eaa | 227 | /** @defgroup PWREx_Flag PWREx Flag |
| Kojto | 93:e188a91d3eaa | 228 | * @{ |
| Kojto | 93:e188a91d3eaa | 229 | */ |
| Kojto | 93:e188a91d3eaa | 230 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 231 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 232 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 233 | |
| Kojto | 93:e188a91d3eaa | 234 | #define PWR_FLAG_WU PWR_CSR_WUF |
| Kojto | 93:e188a91d3eaa | 235 | #define PWR_FLAG_SB PWR_CSR_SBF |
| Kojto | 93:e188a91d3eaa | 236 | #define PWR_FLAG_PVDO PWR_CSR_PVDO |
| Kojto | 93:e188a91d3eaa | 237 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF |
| Kojto | 93:e188a91d3eaa | 238 | #elif defined (STM32F070x6) || defined (STM32F070xB) || defined (STM32F030xC) |
| Kojto | 93:e188a91d3eaa | 239 | #define PWR_FLAG_WU PWR_CSR_WUF |
| Kojto | 93:e188a91d3eaa | 240 | #define PWR_FLAG_SB PWR_CSR_SBF |
| Kojto | 93:e188a91d3eaa | 241 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF |
| Kojto | 93:e188a91d3eaa | 242 | #else |
| Kojto | 93:e188a91d3eaa | 243 | #define PWR_FLAG_WU PWR_CSR_WUF |
| Kojto | 93:e188a91d3eaa | 244 | #define PWR_FLAG_SB PWR_CSR_SBF |
| Kojto | 93:e188a91d3eaa | 245 | |
| Kojto | 93:e188a91d3eaa | 246 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 247 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 248 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 249 | /** |
| Kojto | 93:e188a91d3eaa | 250 | * @} |
| Kojto | 93:e188a91d3eaa | 251 | */ |
| Kojto | 93:e188a91d3eaa | 252 | |
| Kojto | 93:e188a91d3eaa | 253 | /** |
| Kojto | 93:e188a91d3eaa | 254 | * @} |
| Kojto | 93:e188a91d3eaa | 255 | */ |
| Kojto | 93:e188a91d3eaa | 256 | |
| Kojto | 93:e188a91d3eaa | 257 | /* Exported macro ------------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 258 | /** @defgroup PWREx_Exported_Macros PWREx Exported Macros |
| Kojto | 93:e188a91d3eaa | 259 | * @{ |
| Kojto | 93:e188a91d3eaa | 260 | */ |
| Kojto | 93:e188a91d3eaa | 261 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 262 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 263 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 264 | /** |
| Kojto | 93:e188a91d3eaa | 265 | * @brief Enable interrupt on PVD Exti Line 16. |
| Kojto | 93:e188a91d3eaa | 266 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 267 | */ |
| Kojto | 93:e188a91d3eaa | 268 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 269 | |
| Kojto | 93:e188a91d3eaa | 270 | /** |
| Kojto | 93:e188a91d3eaa | 271 | * @brief Disable interrupt on PVD Exti Line 16. |
| Kojto | 93:e188a91d3eaa | 272 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 273 | */ |
| Kojto | 93:e188a91d3eaa | 274 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 275 | |
| Kojto | 93:e188a91d3eaa | 276 | /** |
| Kojto | 93:e188a91d3eaa | 277 | * @brief Enable event on PVD Exti Line 16. |
| Kojto | 93:e188a91d3eaa | 278 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 279 | */ |
| Kojto | 93:e188a91d3eaa | 280 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 281 | |
| Kojto | 93:e188a91d3eaa | 282 | /** |
| Kojto | 93:e188a91d3eaa | 283 | * @brief Disable event on PVD Exti Line 16. |
| Kojto | 93:e188a91d3eaa | 284 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 285 | */ |
| Kojto | 93:e188a91d3eaa | 286 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 287 | |
| Kojto | 93:e188a91d3eaa | 288 | /** |
| Kojto | 108:34e6b704fe68 | 289 | * @brief Disable the PVD Extended Interrupt Rising Trigger. |
| Kojto | 108:34e6b704fe68 | 290 | * @retval None. |
| Kojto | 108:34e6b704fe68 | 291 | */ |
| Kojto | 108:34e6b704fe68 | 292 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
| Kojto | 108:34e6b704fe68 | 293 | |
| Kojto | 108:34e6b704fe68 | 294 | /** |
| Kojto | 108:34e6b704fe68 | 295 | * @brief Disable the PVD Extended Interrupt Falling Trigger. |
| Kojto | 93:e188a91d3eaa | 296 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 297 | */ |
| Kojto | 108:34e6b704fe68 | 298 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
| Kojto | 108:34e6b704fe68 | 299 | |
| Kojto | 108:34e6b704fe68 | 300 | /** |
| Kojto | 108:34e6b704fe68 | 301 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
| Kojto | 108:34e6b704fe68 | 302 | * @retval None |
| Kojto | 108:34e6b704fe68 | 303 | */ |
| Kojto | 108:34e6b704fe68 | 304 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); |
| Kojto | 108:34e6b704fe68 | 305 | |
| Kojto | 93:e188a91d3eaa | 306 | |
| Kojto | 93:e188a91d3eaa | 307 | /** |
| Kojto | 93:e188a91d3eaa | 308 | * @brief PVD EXTI line configuration: set falling edge trigger. |
| Kojto | 93:e188a91d3eaa | 309 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 310 | */ |
| Kojto | 108:34e6b704fe68 | 311 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR |= (PWR_EXTI_LINE_PVD) |
| Kojto | 93:e188a91d3eaa | 312 | |
| Kojto | 93:e188a91d3eaa | 313 | /** |
| Kojto | 93:e188a91d3eaa | 314 | * @brief PVD EXTI line configuration: set rising edge trigger. |
| Kojto | 93:e188a91d3eaa | 315 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 316 | */ |
| Kojto | 108:34e6b704fe68 | 317 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() EXTI->RTSR |= (PWR_EXTI_LINE_PVD) |
| Kojto | 108:34e6b704fe68 | 318 | |
| Kojto | 108:34e6b704fe68 | 319 | /** |
| Kojto | 108:34e6b704fe68 | 320 | * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. |
| Kojto | 108:34e6b704fe68 | 321 | * @retval None |
| Kojto | 108:34e6b704fe68 | 322 | */ |
| Kojto | 108:34e6b704fe68 | 323 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); |
| Kojto | 93:e188a91d3eaa | 324 | |
| Kojto | 93:e188a91d3eaa | 325 | /** |
| Kojto | 93:e188a91d3eaa | 326 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not. |
| Kojto | 93:e188a91d3eaa | 327 | * @retval EXTI PVD Line Status. |
| Kojto | 93:e188a91d3eaa | 328 | */ |
| Kojto | 93:e188a91d3eaa | 329 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 330 | |
| Kojto | 93:e188a91d3eaa | 331 | /** |
| Kojto | 93:e188a91d3eaa | 332 | * @brief Clear the PVD EXTI flag. |
| Kojto | 93:e188a91d3eaa | 333 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 334 | */ |
| Kojto | 93:e188a91d3eaa | 335 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 336 | |
| Kojto | 93:e188a91d3eaa | 337 | /** |
| Kojto | 93:e188a91d3eaa | 338 | * @brief Generate a Software interrupt on selected EXTI line. |
| Kojto | 93:e188a91d3eaa | 339 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 340 | */ |
| Kojto | 93:e188a91d3eaa | 341 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) |
| Kojto | 93:e188a91d3eaa | 342 | |
| Kojto | 93:e188a91d3eaa | 343 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 344 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 345 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 346 | |
| Kojto | 93:e188a91d3eaa | 347 | |
| Kojto | 93:e188a91d3eaa | 348 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 349 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 350 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 93:e188a91d3eaa | 351 | /** |
| Kojto | 93:e188a91d3eaa | 352 | * @brief Enable interrupt on Vddio2 Monitor Exti Line 31. |
| Kojto | 93:e188a91d3eaa | 353 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 354 | */ |
| Kojto | 93:e188a91d3eaa | 355 | #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 356 | |
| Kojto | 93:e188a91d3eaa | 357 | /** |
| Kojto | 93:e188a91d3eaa | 358 | * @brief Disable interrupt on Vddio2 Monitor Exti Line 31. |
| Kojto | 93:e188a91d3eaa | 359 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 360 | */ |
| Kojto | 93:e188a91d3eaa | 361 | #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 362 | |
| Kojto | 93:e188a91d3eaa | 363 | /** |
| Kojto | 93:e188a91d3eaa | 364 | * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger. |
| Kojto | 93:e188a91d3eaa | 365 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 366 | */ |
| Kojto | 122:f9eeca106725 | 367 | #define __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE() \ |
| Kojto | 122:f9eeca106725 | 368 | do{ \ |
| Kojto | 122:f9eeca106725 | 369 | EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \ |
| Kojto | 122:f9eeca106725 | 370 | EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2); \ |
| Kojto | 122:f9eeca106725 | 371 | } while(0) |
| Kojto | 122:f9eeca106725 | 372 | |
| Kojto | 93:e188a91d3eaa | 373 | /** |
| Kojto | 93:e188a91d3eaa | 374 | * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger. |
| Kojto | 93:e188a91d3eaa | 375 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 376 | */ |
| Kojto | 108:34e6b704fe68 | 377 | #define __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2) |
| Kojto | 93:e188a91d3eaa | 378 | |
| Kojto | 93:e188a91d3eaa | 379 | /** |
| Kojto | 93:e188a91d3eaa | 380 | * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not. |
| Kojto | 93:e188a91d3eaa | 381 | * @retval EXTI VDDIO2 Monitor Line Status. |
| Kojto | 93:e188a91d3eaa | 382 | */ |
| Kojto | 93:e188a91d3eaa | 383 | #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 384 | |
| Kojto | 93:e188a91d3eaa | 385 | /** |
| Kojto | 93:e188a91d3eaa | 386 | * @brief Clear the VDDIO2 Monitor EXTI flag. |
| Kojto | 93:e188a91d3eaa | 387 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 388 | */ |
| Kojto | 93:e188a91d3eaa | 389 | #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 390 | |
| Kojto | 93:e188a91d3eaa | 391 | /** |
| Kojto | 93:e188a91d3eaa | 392 | * @brief Generate a Software interrupt on selected EXTI line. |
| Kojto | 93:e188a91d3eaa | 393 | * @retval None. |
| Kojto | 93:e188a91d3eaa | 394 | */ |
| Kojto | 93:e188a91d3eaa | 395 | #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2)) |
| Kojto | 93:e188a91d3eaa | 396 | |
| Kojto | 93:e188a91d3eaa | 397 | |
| Kojto | 93:e188a91d3eaa | 398 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\ |
| Kojto | 93:e188a91d3eaa | 399 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 400 | defined (STM32F091xC) || defined (STM32F098xx) */ |
| Kojto | 93:e188a91d3eaa | 401 | |
| Kojto | 93:e188a91d3eaa | 402 | /** |
| Kojto | 93:e188a91d3eaa | 403 | * @} |
| Kojto | 93:e188a91d3eaa | 404 | */ |
| Kojto | 93:e188a91d3eaa | 405 | |
| Kojto | 93:e188a91d3eaa | 406 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 93:e188a91d3eaa | 407 | |
| Kojto | 93:e188a91d3eaa | 408 | /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions |
| Kojto | 93:e188a91d3eaa | 409 | * @{ |
| Kojto | 93:e188a91d3eaa | 410 | */ |
| Kojto | 93:e188a91d3eaa | 411 | |
| Kojto | 93:e188a91d3eaa | 412 | /** @addtogroup PWREx_Exported_Functions_Group1 |
| Kojto | 93:e188a91d3eaa | 413 | * @{ |
| Kojto | 93:e188a91d3eaa | 414 | */ |
| Kojto | 93:e188a91d3eaa | 415 | /* I/O operation functions ***************************************************/ |
| Kojto | 93:e188a91d3eaa | 416 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 417 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 418 | defined (STM32F091xC) |
| Kojto | 93:e188a91d3eaa | 419 | void HAL_PWR_PVD_IRQHandler(void); |
| Kojto | 93:e188a91d3eaa | 420 | void HAL_PWR_PVDCallback(void); |
| Kojto | 93:e188a91d3eaa | 421 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 422 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 423 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 424 | |
| Kojto | 93:e188a91d3eaa | 425 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 426 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 427 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 108:34e6b704fe68 | 428 | void HAL_PWREx_Vddio2Monitor_IRQHandler(void); |
| Kojto | 108:34e6b704fe68 | 429 | void HAL_PWREx_Vddio2MonitorCallback(void); |
| Kojto | 93:e188a91d3eaa | 430 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 431 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 432 | defined (STM32F091xC) || defined (STM32F098xx) */ |
| Kojto | 93:e188a91d3eaa | 433 | |
| Kojto | 93:e188a91d3eaa | 434 | /* Peripheral Control functions **********************************************/ |
| Kojto | 93:e188a91d3eaa | 435 | #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \ |
| Kojto | 93:e188a91d3eaa | 436 | defined (STM32F071xB) || defined (STM32F072xB) || \ |
| Kojto | 93:e188a91d3eaa | 437 | defined (STM32F091xC) |
| Kojto | 108:34e6b704fe68 | 438 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
| Kojto | 93:e188a91d3eaa | 439 | void HAL_PWR_EnablePVD(void); |
| Kojto | 93:e188a91d3eaa | 440 | void HAL_PWR_DisablePVD(void); |
| Kojto | 93:e188a91d3eaa | 441 | #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */ |
| Kojto | 93:e188a91d3eaa | 442 | /* defined (STM32F071xB) || defined (STM32F072xB) || */ |
| Kojto | 93:e188a91d3eaa | 443 | /* defined (STM32F091xC) */ |
| Kojto | 93:e188a91d3eaa | 444 | |
| Kojto | 93:e188a91d3eaa | 445 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 446 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 447 | defined (STM32F091xC) || defined (STM32F098xx) |
| Kojto | 108:34e6b704fe68 | 448 | void HAL_PWREx_EnableVddio2Monitor(void); |
| Kojto | 108:34e6b704fe68 | 449 | void HAL_PWREx_DisableVddio2Monitor(void); |
| Kojto | 93:e188a91d3eaa | 450 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
| Kojto | 93:e188a91d3eaa | 451 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
| Kojto | 93:e188a91d3eaa | 452 | defined (STM32F091xC) || defined (STM32F098xx) */ |
| Kojto | 93:e188a91d3eaa | 453 | |
| Kojto | 93:e188a91d3eaa | 454 | /** |
| Kojto | 93:e188a91d3eaa | 455 | * @} |
| Kojto | 93:e188a91d3eaa | 456 | */ |
| Kojto | 93:e188a91d3eaa | 457 | |
| Kojto | 93:e188a91d3eaa | 458 | /** |
| Kojto | 93:e188a91d3eaa | 459 | * @} |
| Kojto | 93:e188a91d3eaa | 460 | */ |
| Kojto | 93:e188a91d3eaa | 461 | |
| Kojto | 93:e188a91d3eaa | 462 | /** |
| Kojto | 93:e188a91d3eaa | 463 | * @} |
| Kojto | 93:e188a91d3eaa | 464 | */ |
| Kojto | 93:e188a91d3eaa | 465 | |
| Kojto | 93:e188a91d3eaa | 466 | /** |
| Kojto | 93:e188a91d3eaa | 467 | * @} |
| Kojto | 93:e188a91d3eaa | 468 | */ |
| Kojto | 93:e188a91d3eaa | 469 | |
| Kojto | 93:e188a91d3eaa | 470 | #ifdef __cplusplus |
| Kojto | 93:e188a91d3eaa | 471 | } |
| Kojto | 93:e188a91d3eaa | 472 | #endif |
| Kojto | 93:e188a91d3eaa | 473 | |
| Kojto | 93:e188a91d3eaa | 474 | #endif /* __STM32F0xx_HAL_PWR_EX_H */ |
| Kojto | 93:e188a91d3eaa | 475 | |
| Kojto | 93:e188a91d3eaa | 476 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| Kojto | 93:e188a91d3eaa | 477 |