cc y / mbed

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed by mbed official

TARGET_ELMO_F411RE/stm32f4xx_ll_fsmc.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
110:165afa46840b 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 108:34e6b704fe68 1 /**
Kojto 108:34e6b704fe68 2 ******************************************************************************
Kojto 108:34e6b704fe68 3 * @file stm32f4xx_ll_fsmc.h
Kojto 108:34e6b704fe68 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.5.0
Kojto 122:f9eeca106725 6 * @date 06-May-2016
Kojto 108:34e6b704fe68 7 * @brief Header file of FSMC HAL module.
Kojto 108:34e6b704fe68 8 ******************************************************************************
Kojto 108:34e6b704fe68 9 * @attention
Kojto 108:34e6b704fe68 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 108:34e6b704fe68 12 *
Kojto 108:34e6b704fe68 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 108:34e6b704fe68 14 * are permitted provided that the following conditions are met:
Kojto 108:34e6b704fe68 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 108:34e6b704fe68 16 * this list of conditions and the following disclaimer.
Kojto 108:34e6b704fe68 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 108:34e6b704fe68 18 * this list of conditions and the following disclaimer in the documentation
Kojto 108:34e6b704fe68 19 * and/or other materials provided with the distribution.
Kojto 108:34e6b704fe68 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 108:34e6b704fe68 21 * may be used to endorse or promote products derived from this software
Kojto 108:34e6b704fe68 22 * without specific prior written permission.
Kojto 108:34e6b704fe68 23 *
Kojto 108:34e6b704fe68 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 108:34e6b704fe68 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 108:34e6b704fe68 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 108:34e6b704fe68 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 108:34e6b704fe68 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 108:34e6b704fe68 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 108:34e6b704fe68 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 108:34e6b704fe68 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 108:34e6b704fe68 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 108:34e6b704fe68 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 108:34e6b704fe68 34 *
Kojto 108:34e6b704fe68 35 ******************************************************************************
Kojto 108:34e6b704fe68 36 */
Kojto 108:34e6b704fe68 37
Kojto 108:34e6b704fe68 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 108:34e6b704fe68 39 #ifndef __STM32F4xx_LL_FSMC_H
Kojto 108:34e6b704fe68 40 #define __STM32F4xx_LL_FSMC_H
Kojto 108:34e6b704fe68 41
Kojto 108:34e6b704fe68 42 #ifdef __cplusplus
Kojto 108:34e6b704fe68 43 extern "C" {
Kojto 108:34e6b704fe68 44 #endif
Kojto 108:34e6b704fe68 45
Kojto 108:34e6b704fe68 46 /* Includes ------------------------------------------------------------------*/
Kojto 108:34e6b704fe68 47 #include "stm32f4xx_hal_def.h"
Kojto 108:34e6b704fe68 48
Kojto 108:34e6b704fe68 49 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 108:34e6b704fe68 50 * @{
Kojto 108:34e6b704fe68 51 */
Kojto 108:34e6b704fe68 52
Kojto 108:34e6b704fe68 53 /** @addtogroup FSMC_LL
Kojto 108:34e6b704fe68 54 * @{
Kojto 108:34e6b704fe68 55 */
Kojto 108:34e6b704fe68 56
Kojto 122:f9eeca106725 57 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx)
Kojto 108:34e6b704fe68 58 /* Private types -------------------------------------------------------------*/
Kojto 108:34e6b704fe68 59 /** @defgroup FSMC_LL_Private_Types FSMC Private Types
Kojto 108:34e6b704fe68 60 * @{
Kojto 108:34e6b704fe68 61 */
Kojto 108:34e6b704fe68 62
Kojto 108:34e6b704fe68 63 /**
Kojto 108:34e6b704fe68 64 * @brief FSMC NORSRAM Configuration Structure definition
Kojto 108:34e6b704fe68 65 */
Kojto 108:34e6b704fe68 66 typedef struct
Kojto 108:34e6b704fe68 67 {
Kojto 108:34e6b704fe68 68 uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used.
Kojto 108:34e6b704fe68 69 This parameter can be a value of @ref FSMC_NORSRAM_Bank */
Kojto 108:34e6b704fe68 70
Kojto 108:34e6b704fe68 71 uint32_t DataAddressMux; /*!< Specifies whether the address and data values are
Kojto 108:34e6b704fe68 72 multiplexed on the data bus or not.
Kojto 108:34e6b704fe68 73 This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */
Kojto 108:34e6b704fe68 74
Kojto 108:34e6b704fe68 75 uint32_t MemoryType; /*!< Specifies the type of external memory attached to
Kojto 108:34e6b704fe68 76 the corresponding memory device.
Kojto 108:34e6b704fe68 77 This parameter can be a value of @ref FSMC_Memory_Type */
Kojto 108:34e6b704fe68 78
Kojto 108:34e6b704fe68 79 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
Kojto 108:34e6b704fe68 80 This parameter can be a value of @ref FSMC_NORSRAM_Data_Width */
Kojto 108:34e6b704fe68 81
Kojto 108:34e6b704fe68 82 uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
Kojto 108:34e6b704fe68 83 valid only with synchronous burst Flash memories.
Kojto 108:34e6b704fe68 84 This parameter can be a value of @ref FSMC_Burst_Access_Mode */
Kojto 108:34e6b704fe68 85
Kojto 108:34e6b704fe68 86 uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
Kojto 108:34e6b704fe68 87 the Flash memory in burst mode.
Kojto 108:34e6b704fe68 88 This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */
Kojto 108:34e6b704fe68 89
Kojto 108:34e6b704fe68 90 uint32_t WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
Kojto 108:34e6b704fe68 91 memory, valid only when accessing Flash memories in burst mode.
Kojto 122:f9eeca106725 92 This parameter can be a value of @ref FSMC_Wrap_Mode
Kojto 122:f9eeca106725 93 This mode is available only for the STM32F405/407/4015/417xx devices */
Kojto 108:34e6b704fe68 94
Kojto 108:34e6b704fe68 95 uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
Kojto 108:34e6b704fe68 96 clock cycle before the wait state or during the wait state,
Kojto 108:34e6b704fe68 97 valid only when accessing memories in burst mode.
Kojto 108:34e6b704fe68 98 This parameter can be a value of @ref FSMC_Wait_Timing */
Kojto 108:34e6b704fe68 99
Kojto 108:34e6b704fe68 100 uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FSMC.
Kojto 108:34e6b704fe68 101 This parameter can be a value of @ref FSMC_Write_Operation */
Kojto 108:34e6b704fe68 102
Kojto 108:34e6b704fe68 103 uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait
Kojto 108:34e6b704fe68 104 signal, valid for Flash memory access in burst mode.
Kojto 108:34e6b704fe68 105 This parameter can be a value of @ref FSMC_Wait_Signal */
Kojto 108:34e6b704fe68 106
Kojto 108:34e6b704fe68 107 uint32_t ExtendedMode; /*!< Enables or disables the extended mode.
Kojto 108:34e6b704fe68 108 This parameter can be a value of @ref FSMC_Extended_Mode */
Kojto 108:34e6b704fe68 109
Kojto 108:34e6b704fe68 110 uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
Kojto 108:34e6b704fe68 111 valid only with asynchronous Flash memories.
Kojto 108:34e6b704fe68 112 This parameter can be a value of @ref FSMC_AsynchronousWait */
Kojto 108:34e6b704fe68 113
Kojto 108:34e6b704fe68 114 uint32_t WriteBurst; /*!< Enables or disables the write burst operation.
Kojto 108:34e6b704fe68 115 This parameter can be a value of @ref FSMC_Write_Burst */
Kojto 108:34e6b704fe68 116
Kojto 122:f9eeca106725 117 uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices.
Kojto 122:f9eeca106725 118 This parameter is only enabled through the FMC_BCR1 register, and don't care
Kojto 122:f9eeca106725 119 through FMC_BCR2..4 registers.
Kojto 122:f9eeca106725 120 This parameter can be a value of @ref FMC_Continous_Clock
Kojto 122:f9eeca106725 121 This mode is available only for the STM32F412Vx/Zx/Rx devices */
Kojto 122:f9eeca106725 122
Kojto 122:f9eeca106725 123 uint32_t WriteFifo; /*!< Enables or disables the write FIFO used by the FMC controller.
Kojto 122:f9eeca106725 124 This parameter is only enabled through the FMC_BCR1 register, and don't care
Kojto 122:f9eeca106725 125 through FMC_BCR2..4 registers.
Kojto 122:f9eeca106725 126 This parameter can be a value of @ref FMC_Write_FIFO
Kojto 122:f9eeca106725 127 This mode is available only for the STM32F412Vx/Vx devices */
Kojto 122:f9eeca106725 128
Kojto 122:f9eeca106725 129 uint32_t PageSize; /*!< Specifies the memory page size.
Kojto 122:f9eeca106725 130 This parameter can be a value of @ref FMC_Page_Size */
Kojto 108:34e6b704fe68 131 }FSMC_NORSRAM_InitTypeDef;
Kojto 108:34e6b704fe68 132
Kojto 108:34e6b704fe68 133 /**
Kojto 108:34e6b704fe68 134 * @brief FSMC NORSRAM Timing parameters structure definition
Kojto 108:34e6b704fe68 135 */
Kojto 108:34e6b704fe68 136 typedef struct
Kojto 108:34e6b704fe68 137 {
Kojto 108:34e6b704fe68 138 uint32_t AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
Kojto 108:34e6b704fe68 139 the duration of the address setup time.
Kojto 108:34e6b704fe68 140 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
Kojto 108:34e6b704fe68 141 @note This parameter is not used with synchronous NOR Flash memories. */
Kojto 108:34e6b704fe68 142
Kojto 108:34e6b704fe68 143 uint32_t AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
Kojto 108:34e6b704fe68 144 the duration of the address hold time.
Kojto 108:34e6b704fe68 145 This parameter can be a value between Min_Data = 1 and Max_Data = 15.
Kojto 108:34e6b704fe68 146 @note This parameter is not used with synchronous NOR Flash memories. */
Kojto 108:34e6b704fe68 147
Kojto 108:34e6b704fe68 148 uint32_t DataSetupTime; /*!< Defines the number of HCLK cycles to configure
Kojto 108:34e6b704fe68 149 the duration of the data setup time.
Kojto 108:34e6b704fe68 150 This parameter can be a value between Min_Data = 1 and Max_Data = 255.
Kojto 108:34e6b704fe68 151 @note This parameter is used for SRAMs, ROMs and asynchronous multiplexed
Kojto 108:34e6b704fe68 152 NOR Flash memories. */
Kojto 108:34e6b704fe68 153
Kojto 108:34e6b704fe68 154 uint32_t BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
Kojto 108:34e6b704fe68 155 the duration of the bus turnaround.
Kojto 108:34e6b704fe68 156 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
Kojto 108:34e6b704fe68 157 @note This parameter is only used for multiplexed NOR Flash memories. */
Kojto 108:34e6b704fe68 158
Kojto 108:34e6b704fe68 159 uint32_t CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of
Kojto 108:34e6b704fe68 160 HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16.
Kojto 108:34e6b704fe68 161 @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM
Kojto 108:34e6b704fe68 162 accesses. */
Kojto 108:34e6b704fe68 163
Kojto 108:34e6b704fe68 164 uint32_t DataLatency; /*!< Defines the number of memory clock cycles to issue
Kojto 108:34e6b704fe68 165 to the memory before getting the first data.
Kojto 108:34e6b704fe68 166 The parameter value depends on the memory type as shown below:
Kojto 108:34e6b704fe68 167 - It must be set to 0 in case of a CRAM
Kojto 108:34e6b704fe68 168 - It is don't care in asynchronous NOR, SRAM or ROM accesses
Kojto 108:34e6b704fe68 169 - It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories
Kojto 108:34e6b704fe68 170 with synchronous burst mode enable */
Kojto 108:34e6b704fe68 171
Kojto 108:34e6b704fe68 172 uint32_t AccessMode; /*!< Specifies the asynchronous access mode.
Kojto 108:34e6b704fe68 173 This parameter can be a value of @ref FSMC_Access_Mode */
Kojto 108:34e6b704fe68 174
Kojto 108:34e6b704fe68 175 }FSMC_NORSRAM_TimingTypeDef;
Kojto 108:34e6b704fe68 176
Kojto 110:165afa46840b 177 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 178 /**
Kojto 108:34e6b704fe68 179 * @brief FSMC NAND Configuration Structure definition
Kojto 108:34e6b704fe68 180 */
Kojto 108:34e6b704fe68 181 typedef struct
Kojto 108:34e6b704fe68 182 {
Kojto 108:34e6b704fe68 183 uint32_t NandBank; /*!< Specifies the NAND memory device that will be used.
Kojto 108:34e6b704fe68 184 This parameter can be a value of @ref FSMC_NAND_Bank */
Kojto 108:34e6b704fe68 185
Kojto 108:34e6b704fe68 186 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory device.
Kojto 108:34e6b704fe68 187 This parameter can be any value of @ref FSMC_Wait_feature */
Kojto 108:34e6b704fe68 188
Kojto 108:34e6b704fe68 189 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
Kojto 108:34e6b704fe68 190 This parameter can be any value of @ref FSMC_NAND_Data_Width */
Kojto 108:34e6b704fe68 191
Kojto 108:34e6b704fe68 192 uint32_t EccComputation; /*!< Enables or disables the ECC computation.
Kojto 108:34e6b704fe68 193 This parameter can be any value of @ref FSMC_ECC */
Kojto 108:34e6b704fe68 194
Kojto 108:34e6b704fe68 195 uint32_t ECCPageSize; /*!< Defines the page size for the extended ECC.
Kojto 108:34e6b704fe68 196 This parameter can be any value of @ref FSMC_ECC_Page_Size */
Kojto 108:34e6b704fe68 197
Kojto 108:34e6b704fe68 198 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 108:34e6b704fe68 199 delay between CLE low and RE low.
Kojto 108:34e6b704fe68 200 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 201
Kojto 108:34e6b704fe68 202 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 108:34e6b704fe68 203 delay between ALE low and RE low.
Kojto 108:34e6b704fe68 204 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 205
Kojto 122:f9eeca106725 206 }FSMC_NAND_InitTypeDef;
Kojto 108:34e6b704fe68 207
Kojto 108:34e6b704fe68 208 /**
Kojto 108:34e6b704fe68 209 * @brief FSMC NAND/PCCARD Timing parameters structure definition
Kojto 108:34e6b704fe68 210 */
Kojto 108:34e6b704fe68 211 typedef struct
Kojto 108:34e6b704fe68 212 {
Kojto 108:34e6b704fe68 213 uint32_t SetupTime; /*!< Defines the number of HCLK cycles to setup address before
Kojto 108:34e6b704fe68 214 the command assertion for NAND-Flash read or write access
Kojto 108:34e6b704fe68 215 to common/Attribute or I/O memory space (depending on
Kojto 108:34e6b704fe68 216 the memory space timing to be configured).
Kojto 108:34e6b704fe68 217 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 218
Kojto 108:34e6b704fe68 219 uint32_t WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
Kojto 108:34e6b704fe68 220 command for NAND-Flash read or write access to
Kojto 108:34e6b704fe68 221 common/Attribute or I/O memory space (depending on the
Kojto 108:34e6b704fe68 222 memory space timing to be configured).
Kojto 108:34e6b704fe68 223 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 224
Kojto 108:34e6b704fe68 225 uint32_t HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
Kojto 108:34e6b704fe68 226 (and data for write access) after the command de-assertion
Kojto 108:34e6b704fe68 227 for NAND-Flash read or write access to common/Attribute
Kojto 108:34e6b704fe68 228 or I/O memory space (depending on the memory space timing
Kojto 108:34e6b704fe68 229 to be configured).
Kojto 108:34e6b704fe68 230 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 231
Kojto 108:34e6b704fe68 232 uint32_t HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
Kojto 108:34e6b704fe68 233 data bus is kept in HiZ after the start of a NAND-Flash
Kojto 108:34e6b704fe68 234 write access to common/Attribute or I/O memory space (depending
Kojto 108:34e6b704fe68 235 on the memory space timing to be configured).
Kojto 108:34e6b704fe68 236 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 237
Kojto 108:34e6b704fe68 238 }FSMC_NAND_PCC_TimingTypeDef;
Kojto 108:34e6b704fe68 239
Kojto 108:34e6b704fe68 240 /**
Kojto 108:34e6b704fe68 241 * @brief FSMC NAND Configuration Structure definition
Kojto 108:34e6b704fe68 242 */
Kojto 108:34e6b704fe68 243 typedef struct
Kojto 108:34e6b704fe68 244 {
Kojto 108:34e6b704fe68 245 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the PCCARD Memory device.
Kojto 108:34e6b704fe68 246 This parameter can be any value of @ref FSMC_Wait_feature */
Kojto 108:34e6b704fe68 247
Kojto 108:34e6b704fe68 248 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 108:34e6b704fe68 249 delay between CLE low and RE low.
Kojto 108:34e6b704fe68 250 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 251
Kojto 108:34e6b704fe68 252 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 108:34e6b704fe68 253 delay between ALE low and RE low.
Kojto 108:34e6b704fe68 254 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 108:34e6b704fe68 255
Kojto 108:34e6b704fe68 256 }FSMC_PCCARD_InitTypeDef;
Kojto 108:34e6b704fe68 257 /**
Kojto 108:34e6b704fe68 258 * @}
Kojto 108:34e6b704fe68 259 */
Kojto 110:165afa46840b 260 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 108:34e6b704fe68 261
Kojto 108:34e6b704fe68 262 /* Private constants ---------------------------------------------------------*/
Kojto 108:34e6b704fe68 263 /** @defgroup FSMC_LL_Private_Constants FSMC Private Constants
Kojto 108:34e6b704fe68 264 * @{
Kojto 108:34e6b704fe68 265 */
Kojto 108:34e6b704fe68 266
Kojto 108:34e6b704fe68 267 /** @defgroup FSMC_LL_NOR_SRAM_Controller FSMC NOR/SRAM Controller
Kojto 108:34e6b704fe68 268 * @{
Kojto 108:34e6b704fe68 269 */
Kojto 108:34e6b704fe68 270 /** @defgroup FSMC_NORSRAM_Bank FSMC NOR/SRAM Bank
Kojto 108:34e6b704fe68 271 * @{
Kojto 108:34e6b704fe68 272 */
Kojto 122:f9eeca106725 273 #define FSMC_NORSRAM_BANK1 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 274 #define FSMC_NORSRAM_BANK2 ((uint32_t)0x00000002U)
Kojto 122:f9eeca106725 275 #define FSMC_NORSRAM_BANK3 ((uint32_t)0x00000004U)
Kojto 122:f9eeca106725 276 #define FSMC_NORSRAM_BANK4 ((uint32_t)0x00000006U)
Kojto 108:34e6b704fe68 277 /**
Kojto 108:34e6b704fe68 278 * @}
Kojto 108:34e6b704fe68 279 */
Kojto 108:34e6b704fe68 280
Kojto 108:34e6b704fe68 281 /** @defgroup FSMC_Data_Address_Bus_Multiplexing FSMC Data Address Bus Multiplexing
Kojto 108:34e6b704fe68 282 * @{
Kojto 108:34e6b704fe68 283 */
Kojto 122:f9eeca106725 284 #define FSMC_DATA_ADDRESS_MUX_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 285 #define FSMC_DATA_ADDRESS_MUX_ENABLE ((uint32_t)0x00000002U)
Kojto 108:34e6b704fe68 286 /**
Kojto 108:34e6b704fe68 287 * @}
Kojto 108:34e6b704fe68 288 */
Kojto 108:34e6b704fe68 289
Kojto 108:34e6b704fe68 290 /** @defgroup FSMC_Memory_Type FSMC Memory Type
Kojto 108:34e6b704fe68 291 * @{
Kojto 108:34e6b704fe68 292 */
Kojto 122:f9eeca106725 293 #define FSMC_MEMORY_TYPE_SRAM ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 294 #define FSMC_MEMORY_TYPE_PSRAM ((uint32_t)0x00000004U)
Kojto 122:f9eeca106725 295 #define FSMC_MEMORY_TYPE_NOR ((uint32_t)0x00000008U)
Kojto 108:34e6b704fe68 296 /**
Kojto 108:34e6b704fe68 297 * @}
Kojto 108:34e6b704fe68 298 */
Kojto 108:34e6b704fe68 299
Kojto 108:34e6b704fe68 300 /** @defgroup FSMC_NORSRAM_Data_Width FSMC NOR/SRAM Data Width
Kojto 108:34e6b704fe68 301 * @{
Kojto 108:34e6b704fe68 302 */
Kojto 122:f9eeca106725 303 #define FSMC_NORSRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 304 #define FSMC_NORSRAM_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010U)
Kojto 122:f9eeca106725 305 #define FSMC_NORSRAM_MEM_BUS_WIDTH_32 ((uint32_t)0x00000020U)
Kojto 108:34e6b704fe68 306 /**
Kojto 108:34e6b704fe68 307 * @}
Kojto 108:34e6b704fe68 308 */
Kojto 108:34e6b704fe68 309
Kojto 108:34e6b704fe68 310 /** @defgroup FSMC_NORSRAM_Flash_Access FSMC NOR/SRAM Flash Access
Kojto 108:34e6b704fe68 311 * @{
Kojto 108:34e6b704fe68 312 */
Kojto 122:f9eeca106725 313 #define FSMC_NORSRAM_FLASH_ACCESS_ENABLE ((uint32_t)0x00000040U)
Kojto 122:f9eeca106725 314 #define FSMC_NORSRAM_FLASH_ACCESS_DISABLE ((uint32_t)0x00000000U)
Kojto 108:34e6b704fe68 315 /**
Kojto 108:34e6b704fe68 316 * @}
Kojto 108:34e6b704fe68 317 */
Kojto 108:34e6b704fe68 318
Kojto 108:34e6b704fe68 319 /** @defgroup FSMC_Burst_Access_Mode FSMC Burst Access Mode
Kojto 108:34e6b704fe68 320 * @{
Kojto 108:34e6b704fe68 321 */
Kojto 122:f9eeca106725 322 #define FSMC_BURST_ACCESS_MODE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 323 #define FSMC_BURST_ACCESS_MODE_ENABLE ((uint32_t)0x00000100U)
Kojto 108:34e6b704fe68 324 /**
Kojto 108:34e6b704fe68 325 * @}
Kojto 108:34e6b704fe68 326 */
Kojto 108:34e6b704fe68 327
Kojto 108:34e6b704fe68 328 /** @defgroup FSMC_Wait_Signal_Polarity FSMC Wait Signal Polarity
Kojto 108:34e6b704fe68 329 * @{
Kojto 108:34e6b704fe68 330 */
Kojto 122:f9eeca106725 331 #define FSMC_WAIT_SIGNAL_POLARITY_LOW ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 332 #define FSMC_WAIT_SIGNAL_POLARITY_HIGH ((uint32_t)0x00000200U)
Kojto 108:34e6b704fe68 333 /**
Kojto 108:34e6b704fe68 334 * @}
Kojto 108:34e6b704fe68 335 */
Kojto 108:34e6b704fe68 336
Kojto 108:34e6b704fe68 337 /** @defgroup FSMC_Wrap_Mode FSMC Wrap Mode
Kojto 122:f9eeca106725 338 * @note These values are available only for the STM32F405/415/407/417xx devices.
Kojto 108:34e6b704fe68 339 * @{
Kojto 108:34e6b704fe68 340 */
Kojto 122:f9eeca106725 341 #define FSMC_WRAP_MODE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 342 #define FSMC_WRAP_MODE_ENABLE ((uint32_t)0x00000400U)
Kojto 108:34e6b704fe68 343 /**
Kojto 108:34e6b704fe68 344 * @}
Kojto 108:34e6b704fe68 345 */
Kojto 108:34e6b704fe68 346
Kojto 108:34e6b704fe68 347 /** @defgroup FSMC_Wait_Timing FSMC Wait Timing
Kojto 108:34e6b704fe68 348 * @{
Kojto 108:34e6b704fe68 349 */
Kojto 122:f9eeca106725 350 #define FSMC_WAIT_TIMING_BEFORE_WS ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 351 #define FSMC_WAIT_TIMING_DURING_WS ((uint32_t)0x00000800U)
Kojto 108:34e6b704fe68 352 /**
Kojto 108:34e6b704fe68 353 * @}
Kojto 108:34e6b704fe68 354 */
Kojto 108:34e6b704fe68 355
Kojto 108:34e6b704fe68 356 /** @defgroup FSMC_Write_Operation FSMC Write Operation
Kojto 108:34e6b704fe68 357 * @{
Kojto 108:34e6b704fe68 358 */
Kojto 122:f9eeca106725 359 #define FSMC_WRITE_OPERATION_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 360 #define FSMC_WRITE_OPERATION_ENABLE ((uint32_t)0x00001000U)
Kojto 108:34e6b704fe68 361 /**
Kojto 108:34e6b704fe68 362 * @}
Kojto 108:34e6b704fe68 363 */
Kojto 108:34e6b704fe68 364
Kojto 108:34e6b704fe68 365 /** @defgroup FSMC_Wait_Signal FSMC Wait Signal
Kojto 108:34e6b704fe68 366 * @{
Kojto 108:34e6b704fe68 367 */
Kojto 122:f9eeca106725 368 #define FSMC_WAIT_SIGNAL_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 369 #define FSMC_WAIT_SIGNAL_ENABLE ((uint32_t)0x00002000U)
Kojto 108:34e6b704fe68 370 /**
Kojto 108:34e6b704fe68 371 * @}
Kojto 108:34e6b704fe68 372 */
Kojto 108:34e6b704fe68 373
Kojto 108:34e6b704fe68 374 /** @defgroup FSMC_Extended_Mode FSMC Extended Mode
Kojto 108:34e6b704fe68 375 * @{
Kojto 108:34e6b704fe68 376 */
Kojto 122:f9eeca106725 377 #define FSMC_EXTENDED_MODE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 378 #define FSMC_EXTENDED_MODE_ENABLE ((uint32_t)0x00004000U)
Kojto 108:34e6b704fe68 379 /**
Kojto 108:34e6b704fe68 380 * @}
Kojto 108:34e6b704fe68 381 */
Kojto 108:34e6b704fe68 382
Kojto 108:34e6b704fe68 383 /** @defgroup FSMC_AsynchronousWait FSMC Asynchronous Wait
Kojto 108:34e6b704fe68 384 * @{
Kojto 108:34e6b704fe68 385 */
Kojto 122:f9eeca106725 386 #define FSMC_ASYNCHRONOUS_WAIT_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 387 #define FSMC_ASYNCHRONOUS_WAIT_ENABLE ((uint32_t)0x00008000U)
Kojto 108:34e6b704fe68 388 /**
Kojto 108:34e6b704fe68 389 * @}
Kojto 122:f9eeca106725 390 */
Kojto 122:f9eeca106725 391
Kojto 122:f9eeca106725 392 /** @defgroup FSMC_Page_Size FSMC Page Size
Kojto 122:f9eeca106725 393 * @{
Kojto 122:f9eeca106725 394 */
Kojto 122:f9eeca106725 395 #define FSMC_PAGE_SIZE_NONE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 396 #define FSMC_PAGE_SIZE_128 ((uint32_t)FSMC_BCR1_CPSIZE_0)
Kojto 122:f9eeca106725 397 #define FSMC_PAGE_SIZE_256 ((uint32_t)FSMC_BCR1_CPSIZE_1)
Kojto 122:f9eeca106725 398 #define FSMC_PAGE_SIZE_512 ((uint32_t)(FSMC_BCR1_CPSIZE_0 | FSMC_BCR1_CPSIZE_1))
Kojto 122:f9eeca106725 399 #define FSMC_PAGE_SIZE_1024 ((uint32_t)FSMC_BCR1_CPSIZE_2)
Kojto 122:f9eeca106725 400 /**
Kojto 122:f9eeca106725 401 * @}
Kojto 122:f9eeca106725 402 */
Kojto 122:f9eeca106725 403
Kojto 122:f9eeca106725 404 /** @defgroup FSMC_Write_FIFO FSMC Write FIFO
Kojto 122:f9eeca106725 405 * @note These values are available only for the STM32F412Vx/Zx/Rx devices.
Kojto 122:f9eeca106725 406 * @{
Kojto 122:f9eeca106725 407 */
Kojto 122:f9eeca106725 408 #define FSMC_WRITE_FIFO_DISABLE ((uint32_t)FSMC_BCR1_WFDIS)
Kojto 122:f9eeca106725 409 #define FSMC_WRITE_FIFO_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 410 /**
Kojto 122:f9eeca106725 411 * @}
Kojto 122:f9eeca106725 412 */
Kojto 108:34e6b704fe68 413
Kojto 108:34e6b704fe68 414 /** @defgroup FSMC_Write_Burst FSMC Write Burst
Kojto 108:34e6b704fe68 415 * @{
Kojto 108:34e6b704fe68 416 */
Kojto 122:f9eeca106725 417 #define FSMC_WRITE_BURST_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 418 #define FSMC_WRITE_BURST_ENABLE ((uint32_t)0x00080000U)
Kojto 108:34e6b704fe68 419 /**
Kojto 108:34e6b704fe68 420 * @}
Kojto 108:34e6b704fe68 421 */
Kojto 108:34e6b704fe68 422
Kojto 108:34e6b704fe68 423 /** @defgroup FSMC_Continous_Clock FSMC Continous Clock
Kojto 122:f9eeca106725 424 * @note These values are available only for the STM32F412Vx/Zx/Rx devices.
Kojto 108:34e6b704fe68 425 * @{
Kojto 108:34e6b704fe68 426 */
Kojto 122:f9eeca106725 427 #define FSMC_CONTINUOUS_CLOCK_SYNC_ONLY ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 428 #define FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC ((uint32_t)0x00100000U)
Kojto 108:34e6b704fe68 429 /**
Kojto 108:34e6b704fe68 430 * @}
Kojto 108:34e6b704fe68 431 */
Kojto 108:34e6b704fe68 432
Kojto 108:34e6b704fe68 433 /** @defgroup FSMC_Access_Mode FSMC Access Mode
Kojto 108:34e6b704fe68 434 * @{
Kojto 108:34e6b704fe68 435 */
Kojto 122:f9eeca106725 436 #define FSMC_ACCESS_MODE_A ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 437 #define FSMC_ACCESS_MODE_B ((uint32_t)0x10000000U)
Kojto 122:f9eeca106725 438 #define FSMC_ACCESS_MODE_C ((uint32_t)0x20000000U)
Kojto 122:f9eeca106725 439 #define FSMC_ACCESS_MODE_D ((uint32_t)0x30000000U)
Kojto 108:34e6b704fe68 440 /**
Kojto 108:34e6b704fe68 441 * @}
Kojto 108:34e6b704fe68 442 */
Kojto 108:34e6b704fe68 443 /**
Kojto 108:34e6b704fe68 444 * @}
Kojto 108:34e6b704fe68 445 */
Kojto 108:34e6b704fe68 446
Kojto 110:165afa46840b 447 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 448 /** @defgroup FSMC_LL_NAND_Controller FSMC NAND and PCCARD Controller
Kojto 108:34e6b704fe68 449 * @{
Kojto 108:34e6b704fe68 450 */
Kojto 108:34e6b704fe68 451 /** @defgroup FSMC_NAND_Bank FSMC NAND Bank
Kojto 108:34e6b704fe68 452 * @{
Kojto 108:34e6b704fe68 453 */
Kojto 122:f9eeca106725 454 #define FSMC_NAND_BANK2 ((uint32_t)0x00000010U)
Kojto 122:f9eeca106725 455 #define FSMC_NAND_BANK3 ((uint32_t)0x00000100U)
Kojto 108:34e6b704fe68 456 /**
Kojto 108:34e6b704fe68 457 * @}
Kojto 108:34e6b704fe68 458 */
Kojto 108:34e6b704fe68 459
Kojto 108:34e6b704fe68 460 /** @defgroup FSMC_Wait_feature FSMC Wait feature
Kojto 108:34e6b704fe68 461 * @{
Kojto 108:34e6b704fe68 462 */
Kojto 122:f9eeca106725 463 #define FSMC_NAND_PCC_WAIT_FEATURE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 464 #define FSMC_NAND_PCC_WAIT_FEATURE_ENABLE ((uint32_t)0x00000002U)
Kojto 108:34e6b704fe68 465 /**
Kojto 108:34e6b704fe68 466 * @}
Kojto 108:34e6b704fe68 467 */
Kojto 108:34e6b704fe68 468
Kojto 108:34e6b704fe68 469 /** @defgroup FSMC_PCR_Memory_Type FSMC PCR Memory Type
Kojto 108:34e6b704fe68 470 * @{
Kojto 108:34e6b704fe68 471 */
Kojto 122:f9eeca106725 472 #define FSMC_PCR_MEMORY_TYPE_PCCARD ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 473 #define FSMC_PCR_MEMORY_TYPE_NAND ((uint32_t)0x00000008U)
Kojto 108:34e6b704fe68 474 /**
Kojto 108:34e6b704fe68 475 * @}
Kojto 108:34e6b704fe68 476 */
Kojto 108:34e6b704fe68 477
Kojto 108:34e6b704fe68 478 /** @defgroup FSMC_NAND_Data_Width FSMC NAND Data Width
Kojto 108:34e6b704fe68 479 * @{
Kojto 108:34e6b704fe68 480 */
Kojto 122:f9eeca106725 481 #define FSMC_NAND_PCC_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 482 #define FSMC_NAND_PCC_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010U)
Kojto 108:34e6b704fe68 483 /**
Kojto 108:34e6b704fe68 484 * @}
Kojto 108:34e6b704fe68 485 */
Kojto 108:34e6b704fe68 486
Kojto 108:34e6b704fe68 487 /** @defgroup FSMC_ECC FSMC ECC
Kojto 108:34e6b704fe68 488 * @{
Kojto 108:34e6b704fe68 489 */
Kojto 122:f9eeca106725 490 #define FSMC_NAND_ECC_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 491 #define FSMC_NAND_ECC_ENABLE ((uint32_t)0x00000040U)
Kojto 108:34e6b704fe68 492 /**
Kojto 108:34e6b704fe68 493 * @}
Kojto 108:34e6b704fe68 494 */
Kojto 108:34e6b704fe68 495
Kojto 108:34e6b704fe68 496 /** @defgroup FSMC_ECC_Page_Size FSMC ECC Page Size
Kojto 108:34e6b704fe68 497 * @{
Kojto 108:34e6b704fe68 498 */
Kojto 122:f9eeca106725 499 #define FSMC_NAND_ECC_PAGE_SIZE_256BYTE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 500 #define FSMC_NAND_ECC_PAGE_SIZE_512BYTE ((uint32_t)0x00020000U)
Kojto 122:f9eeca106725 501 #define FSMC_NAND_ECC_PAGE_SIZE_1024BYTE ((uint32_t)0x00040000U)
Kojto 122:f9eeca106725 502 #define FSMC_NAND_ECC_PAGE_SIZE_2048BYTE ((uint32_t)0x00060000U)
Kojto 122:f9eeca106725 503 #define FSMC_NAND_ECC_PAGE_SIZE_4096BYTE ((uint32_t)0x00080000U)
Kojto 122:f9eeca106725 504 #define FSMC_NAND_ECC_PAGE_SIZE_8192BYTE ((uint32_t)0x000A0000U)
Kojto 108:34e6b704fe68 505 /**
Kojto 108:34e6b704fe68 506 * @}
Kojto 108:34e6b704fe68 507 */
Kojto 108:34e6b704fe68 508 /**
Kojto 108:34e6b704fe68 509 * @}
Kojto 108:34e6b704fe68 510 */
Kojto 110:165afa46840b 511 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 110:165afa46840b 512
Kojto 108:34e6b704fe68 513 /** @defgroup FSMC_LL_Interrupt_definition FSMC Interrupt definition
Kojto 108:34e6b704fe68 514 * @{
Kojto 108:34e6b704fe68 515 */
Kojto 122:f9eeca106725 516 #define FSMC_IT_RISING_EDGE ((uint32_t)0x00000008U)
Kojto 122:f9eeca106725 517 #define FSMC_IT_LEVEL ((uint32_t)0x00000010U)
Kojto 122:f9eeca106725 518 #define FSMC_IT_FALLING_EDGE ((uint32_t)0x00000020U)
Kojto 122:f9eeca106725 519 #define FSMC_IT_REFRESH_ERROR ((uint32_t)0x00004000U)
Kojto 108:34e6b704fe68 520 /**
Kojto 108:34e6b704fe68 521 * @}
Kojto 108:34e6b704fe68 522 */
Kojto 108:34e6b704fe68 523
Kojto 108:34e6b704fe68 524 /** @defgroup FSMC_LL_Flag_definition FSMC Flag definition
Kojto 108:34e6b704fe68 525 * @{
Kojto 108:34e6b704fe68 526 */
Kojto 122:f9eeca106725 527 #define FSMC_FLAG_RISING_EDGE ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 528 #define FSMC_FLAG_LEVEL ((uint32_t)0x00000002U)
Kojto 122:f9eeca106725 529 #define FSMC_FLAG_FALLING_EDGE ((uint32_t)0x00000004U)
Kojto 122:f9eeca106725 530 #define FSMC_FLAG_FEMPT ((uint32_t)0x00000040U)
Kojto 108:34e6b704fe68 531 /**
Kojto 108:34e6b704fe68 532 * @}
Kojto 108:34e6b704fe68 533 */
Kojto 108:34e6b704fe68 534
Kojto 108:34e6b704fe68 535 /** @defgroup FSMC_LL_Alias_definition FSMC Alias definition
Kojto 108:34e6b704fe68 536 * @{
Kojto 108:34e6b704fe68 537 */
Kojto 108:34e6b704fe68 538 #define FSMC_NORSRAM_TypeDef FSMC_Bank1_TypeDef
Kojto 108:34e6b704fe68 539 #define FSMC_NORSRAM_EXTENDED_TypeDef FSMC_Bank1E_TypeDef
Kojto 110:165afa46840b 540 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 541 #define FSMC_NAND_TypeDef FSMC_Bank2_3_TypeDef
Kojto 108:34e6b704fe68 542 #define FSMC_PCCARD_TypeDef FSMC_Bank4_TypeDef
Kojto 110:165afa46840b 543 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 108:34e6b704fe68 544
Kojto 108:34e6b704fe68 545 #define FSMC_NORSRAM_DEVICE FSMC_Bank1
Kojto 108:34e6b704fe68 546 #define FSMC_NORSRAM_EXTENDED_DEVICE FSMC_Bank1E
Kojto 110:165afa46840b 547 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 548 #define FSMC_NAND_DEVICE FSMC_Bank2_3
Kojto 108:34e6b704fe68 549 #define FSMC_PCCARD_DEVICE FSMC_Bank4
Kojto 110:165afa46840b 550 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 108:34e6b704fe68 551
Kojto 122:f9eeca106725 552 #define FMC_NORSRAM_MEM_BUS_WIDTH_8 FSMC_NORSRAM_MEM_BUS_WIDTH_8
Kojto 122:f9eeca106725 553 #define FMC_NORSRAM_MEM_BUS_WIDTH_16 FSMC_NORSRAM_MEM_BUS_WIDTH_16
Kojto 122:f9eeca106725 554 #define FMC_NORSRAM_MEM_BUS_WIDTH_32 FSMC_NORSRAM_MEM_BUS_WIDTH_32
Kojto 122:f9eeca106725 555
Kojto 108:34e6b704fe68 556 #define FMC_NORSRAM_TypeDef FSMC_NORSRAM_TypeDef
Kojto 108:34e6b704fe68 557 #define FMC_NORSRAM_EXTENDED_TypeDef FSMC_NORSRAM_EXTENDED_TypeDef
Kojto 108:34e6b704fe68 558 #define FMC_NORSRAM_InitTypeDef FSMC_NORSRAM_InitTypeDef
Kojto 108:34e6b704fe68 559 #define FMC_NORSRAM_TimingTypeDef FSMC_NORSRAM_TimingTypeDef
Kojto 108:34e6b704fe68 560
Kojto 108:34e6b704fe68 561 #define FMC_NORSRAM_Init FSMC_NORSRAM_Init
Kojto 108:34e6b704fe68 562 #define FMC_NORSRAM_Timing_Init FSMC_NORSRAM_Timing_Init
Kojto 108:34e6b704fe68 563 #define FMC_NORSRAM_Extended_Timing_Init FSMC_NORSRAM_Extended_Timing_Init
Kojto 108:34e6b704fe68 564 #define FMC_NORSRAM_DeInit FSMC_NORSRAM_DeInit
Kojto 108:34e6b704fe68 565 #define FMC_NORSRAM_WriteOperation_Enable FSMC_NORSRAM_WriteOperation_Enable
Kojto 108:34e6b704fe68 566 #define FMC_NORSRAM_WriteOperation_Disable FSMC_NORSRAM_WriteOperation_Disable
Kojto 108:34e6b704fe68 567
Kojto 108:34e6b704fe68 568 #define __FMC_NORSRAM_ENABLE __FSMC_NORSRAM_ENABLE
Kojto 108:34e6b704fe68 569 #define __FMC_NORSRAM_DISABLE __FSMC_NORSRAM_DISABLE
Kojto 108:34e6b704fe68 570
Kojto 110:165afa46840b 571 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 572 #define FMC_NAND_InitTypeDef FSMC_NAND_InitTypeDef
Kojto 108:34e6b704fe68 573 #define FMC_PCCARD_InitTypeDef FSMC_PCCARD_InitTypeDef
Kojto 108:34e6b704fe68 574 #define FMC_NAND_PCC_TimingTypeDef FSMC_NAND_PCC_TimingTypeDef
Kojto 108:34e6b704fe68 575
Kojto 108:34e6b704fe68 576 #define FMC_NAND_Init FSMC_NAND_Init
Kojto 108:34e6b704fe68 577 #define FMC_NAND_CommonSpace_Timing_Init FSMC_NAND_CommonSpace_Timing_Init
Kojto 108:34e6b704fe68 578 #define FMC_NAND_AttributeSpace_Timing_Init FSMC_NAND_AttributeSpace_Timing_Init
Kojto 108:34e6b704fe68 579 #define FMC_NAND_DeInit FSMC_NAND_DeInit
Kojto 108:34e6b704fe68 580 #define FMC_NAND_ECC_Enable FSMC_NAND_ECC_Enable
Kojto 108:34e6b704fe68 581 #define FMC_NAND_ECC_Disable FSMC_NAND_ECC_Disable
Kojto 108:34e6b704fe68 582 #define FMC_NAND_GetECC FSMC_NAND_GetECC
Kojto 108:34e6b704fe68 583 #define FMC_PCCARD_Init FSMC_PCCARD_Init
Kojto 108:34e6b704fe68 584 #define FMC_PCCARD_CommonSpace_Timing_Init FSMC_PCCARD_CommonSpace_Timing_Init
Kojto 108:34e6b704fe68 585 #define FMC_PCCARD_AttributeSpace_Timing_Init FSMC_PCCARD_AttributeSpace_Timing_Init
Kojto 108:34e6b704fe68 586 #define FMC_PCCARD_IOSpace_Timing_Init FSMC_PCCARD_IOSpace_Timing_Init
Kojto 108:34e6b704fe68 587 #define FMC_PCCARD_DeInit FSMC_PCCARD_DeInit
Kojto 108:34e6b704fe68 588
Kojto 108:34e6b704fe68 589 #define __FMC_NAND_ENABLE __FSMC_NAND_ENABLE
Kojto 108:34e6b704fe68 590 #define __FMC_NAND_DISABLE __FSMC_NAND_DISABLE
Kojto 108:34e6b704fe68 591 #define __FMC_PCCARD_ENABLE __FSMC_PCCARD_ENABLE
Kojto 108:34e6b704fe68 592 #define __FMC_PCCARD_DISABLE __FSMC_PCCARD_DISABLE
Kojto 108:34e6b704fe68 593 #define __FMC_NAND_ENABLE_IT __FSMC_NAND_ENABLE_IT
Kojto 108:34e6b704fe68 594 #define __FMC_NAND_DISABLE_IT __FSMC_NAND_DISABLE_IT
Kojto 108:34e6b704fe68 595 #define __FMC_NAND_GET_FLAG __FSMC_NAND_GET_FLAG
Kojto 108:34e6b704fe68 596 #define __FMC_NAND_CLEAR_FLAG __FSMC_NAND_CLEAR_FLAG
Kojto 108:34e6b704fe68 597 #define __FMC_PCCARD_ENABLE_IT __FSMC_PCCARD_ENABLE_IT
Kojto 108:34e6b704fe68 598 #define __FMC_PCCARD_DISABLE_IT __FSMC_PCCARD_DISABLE_IT
Kojto 108:34e6b704fe68 599 #define __FMC_PCCARD_GET_FLAG __FSMC_PCCARD_GET_FLAG
Kojto 108:34e6b704fe68 600 #define __FMC_PCCARD_CLEAR_FLAG __FSMC_PCCARD_CLEAR_FLAG
Kojto 110:165afa46840b 601 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 108:34e6b704fe68 602
Kojto 108:34e6b704fe68 603 #define FMC_NORSRAM_TypeDef FSMC_NORSRAM_TypeDef
Kojto 108:34e6b704fe68 604 #define FMC_NORSRAM_EXTENDED_TypeDef FSMC_NORSRAM_EXTENDED_TypeDef
Kojto 110:165afa46840b 605 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 606 #define FMC_NAND_TypeDef FSMC_NAND_TypeDef
Kojto 108:34e6b704fe68 607 #define FMC_PCCARD_TypeDef FSMC_PCCARD_TypeDef
Kojto 110:165afa46840b 608 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 108:34e6b704fe68 609
Kojto 122:f9eeca106725 610 #define FMC_NORSRAM_DEVICE FSMC_NORSRAM_DEVICE
Kojto 110:165afa46840b 611 #define FMC_NORSRAM_EXTENDED_DEVICE FSMC_NORSRAM_EXTENDED_DEVICE
Kojto 110:165afa46840b 612 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 122:f9eeca106725 613 #define FMC_NAND_DEVICE FSMC_NAND_DEVICE
Kojto 108:34e6b704fe68 614 #define FMC_PCCARD_DEVICE FSMC_PCCARD_DEVICE
Kojto 108:34e6b704fe68 615
Kojto 108:34e6b704fe68 616 #define FMC_NAND_BANK2 FSMC_NAND_BANK2
Kojto 110:165afa46840b 617 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 108:34e6b704fe68 618
Kojto 108:34e6b704fe68 619 #define FMC_NORSRAM_BANK1 FSMC_NORSRAM_BANK1
Kojto 108:34e6b704fe68 620 #define FMC_NORSRAM_BANK2 FSMC_NORSRAM_BANK2
Kojto 108:34e6b704fe68 621 #define FMC_NORSRAM_BANK3 FSMC_NORSRAM_BANK3
Kojto 108:34e6b704fe68 622
Kojto 108:34e6b704fe68 623 #define FMC_IT_RISING_EDGE FSMC_IT_RISING_EDGE
Kojto 108:34e6b704fe68 624 #define FMC_IT_LEVEL FSMC_IT_LEVEL
Kojto 108:34e6b704fe68 625 #define FMC_IT_FALLING_EDGE FSMC_IT_FALLING_EDGE
Kojto 108:34e6b704fe68 626 #define FMC_IT_REFRESH_ERROR FSMC_IT_REFRESH_ERROR
Kojto 108:34e6b704fe68 627
Kojto 108:34e6b704fe68 628 #define FMC_FLAG_RISING_EDGE FSMC_FLAG_RISING_EDGE
Kojto 108:34e6b704fe68 629 #define FMC_FLAG_LEVEL FSMC_FLAG_LEVEL
Kojto 108:34e6b704fe68 630 #define FMC_FLAG_FALLING_EDGE FSMC_FLAG_FALLING_EDGE
Kojto 108:34e6b704fe68 631 #define FMC_FLAG_FEMPT FSMC_FLAG_FEMPT
Kojto 108:34e6b704fe68 632 /**
Kojto 108:34e6b704fe68 633 * @}
Kojto 108:34e6b704fe68 634 */
Kojto 108:34e6b704fe68 635
Kojto 108:34e6b704fe68 636 /**
Kojto 108:34e6b704fe68 637 * @}
Kojto 108:34e6b704fe68 638 */
Kojto 108:34e6b704fe68 639
Kojto 108:34e6b704fe68 640 /* Private macro -------------------------------------------------------------*/
Kojto 108:34e6b704fe68 641 /** @defgroup FSMC_LL_Private_Macros FSMC Private Macros
Kojto 108:34e6b704fe68 642 * @{
Kojto 108:34e6b704fe68 643 */
Kojto 108:34e6b704fe68 644
Kojto 108:34e6b704fe68 645 /** @defgroup FSMC_LL_NOR_Macros FSMC NOR/SRAM Exported Macros
Kojto 108:34e6b704fe68 646 * @brief macros to handle NOR device enable/disable and read/write operations
Kojto 108:34e6b704fe68 647 * @{
Kojto 108:34e6b704fe68 648 */
Kojto 108:34e6b704fe68 649 /**
Kojto 108:34e6b704fe68 650 * @brief Enable the NORSRAM device access.
Kojto 108:34e6b704fe68 651 * @param __INSTANCE__: FSMC_NORSRAM Instance
Kojto 108:34e6b704fe68 652 * @param __BANK__: FSMC_NORSRAM Bank
Kojto 108:34e6b704fe68 653 * @retval none
Kojto 108:34e6b704fe68 654 */
Kojto 108:34e6b704fe68 655 #define __FSMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] |= FSMC_BCR1_MBKEN)
Kojto 108:34e6b704fe68 656
Kojto 108:34e6b704fe68 657 /**
Kojto 108:34e6b704fe68 658 * @brief Disable the NORSRAM device access.
Kojto 108:34e6b704fe68 659 * @param __INSTANCE__: FSMC_NORSRAM Instance
Kojto 108:34e6b704fe68 660 * @param __BANK__: FSMC_NORSRAM Bank
Kojto 108:34e6b704fe68 661 * @retval none
Kojto 108:34e6b704fe68 662 */
Kojto 108:34e6b704fe68 663 #define __FSMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] &= ~FSMC_BCR1_MBKEN)
Kojto 108:34e6b704fe68 664 /**
Kojto 108:34e6b704fe68 665 * @}
Kojto 108:34e6b704fe68 666 */
Kojto 108:34e6b704fe68 667
Kojto 108:34e6b704fe68 668 /** @defgroup FSMC_LL_NAND_Macros FSMC NAND Macros
Kojto 108:34e6b704fe68 669 * @brief macros to handle NAND device enable/disable
Kojto 108:34e6b704fe68 670 * @{
Kojto 108:34e6b704fe68 671 */
Kojto 110:165afa46840b 672 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 673 /**
Kojto 108:34e6b704fe68 674 * @brief Enable the NAND device access.
Kojto 108:34e6b704fe68 675 * @param __INSTANCE__: FSMC_NAND Instance
Kojto 108:34e6b704fe68 676 * @param __BANK__: FSMC_NAND Bank
Kojto 108:34e6b704fe68 677 * @retval none
Kojto 108:34e6b704fe68 678 */
Kojto 108:34e6b704fe68 679 #define __FSMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 |= FSMC_PCR2_PBKEN): \
Kojto 108:34e6b704fe68 680 ((__INSTANCE__)->PCR3 |= FSMC_PCR3_PBKEN))
Kojto 108:34e6b704fe68 681
Kojto 108:34e6b704fe68 682 /**
Kojto 108:34e6b704fe68 683 * @brief Disable the NAND device access.
Kojto 108:34e6b704fe68 684 * @param __INSTANCE__: FSMC_NAND Instance
Kojto 108:34e6b704fe68 685 * @param __BANK__: FSMC_NAND Bank
Kojto 108:34e6b704fe68 686 * @retval none
Kojto 108:34e6b704fe68 687 */
Kojto 108:34e6b704fe68 688 #define __FSMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 &= ~FSMC_PCR2_PBKEN): \
Kojto 108:34e6b704fe68 689 ((__INSTANCE__)->PCR3 &= ~FSMC_PCR3_PBKEN))
Kojto 108:34e6b704fe68 690 /**
Kojto 108:34e6b704fe68 691 * @}
Kojto 108:34e6b704fe68 692 */
Kojto 108:34e6b704fe68 693
Kojto 108:34e6b704fe68 694 /** @defgroup FSMC_LL_PCCARD_Macros FSMC PCCARD Macros
Kojto 108:34e6b704fe68 695 * @brief macros to handle SRAM read/write operations
Kojto 108:34e6b704fe68 696 * @{
Kojto 108:34e6b704fe68 697 */
Kojto 108:34e6b704fe68 698 /**
Kojto 108:34e6b704fe68 699 * @brief Enable the PCCARD device access.
Kojto 108:34e6b704fe68 700 * @param __INSTANCE__: FSMC_PCCARD Instance
Kojto 108:34e6b704fe68 701 * @retval none
Kojto 108:34e6b704fe68 702 */
Kojto 108:34e6b704fe68 703 #define __FSMC_PCCARD_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 |= FSMC_PCR4_PBKEN)
Kojto 108:34e6b704fe68 704
Kojto 108:34e6b704fe68 705 /**
Kojto 108:34e6b704fe68 706 * @brief Disable the PCCARD device access.
Kojto 108:34e6b704fe68 707 * @param __INSTANCE__: FSMC_PCCARD Instance
Kojto 108:34e6b704fe68 708 * @retval none
Kojto 108:34e6b704fe68 709 */
Kojto 108:34e6b704fe68 710 #define __FSMC_PCCARD_DISABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 &= ~FSMC_PCR4_PBKEN)
Kojto 108:34e6b704fe68 711 /**
Kojto 108:34e6b704fe68 712 * @}
Kojto 108:34e6b704fe68 713 */
Kojto 108:34e6b704fe68 714
Kojto 108:34e6b704fe68 715 /** @defgroup FSMC_LL_Flag_Interrupt_Macros FSMC Flag&Interrupt Macros
Kojto 108:34e6b704fe68 716 * @brief macros to handle FSMC flags and interrupts
Kojto 108:34e6b704fe68 717 * @{
Kojto 108:34e6b704fe68 718 */
Kojto 108:34e6b704fe68 719 /**
Kojto 108:34e6b704fe68 720 * @brief Enable the NAND device interrupt.
Kojto 108:34e6b704fe68 721 * @param __INSTANCE__: FSMC_NAND Instance
Kojto 108:34e6b704fe68 722 * @param __BANK__: FSMC_NAND Bank
Kojto 108:34e6b704fe68 723 * @param __INTERRUPT__: FSMC_NAND interrupt
Kojto 108:34e6b704fe68 724 * This parameter can be any combination of the following values:
Kojto 108:34e6b704fe68 725 * @arg FSMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 108:34e6b704fe68 726 * @arg FSMC_IT_LEVEL: Interrupt level.
Kojto 108:34e6b704fe68 727 * @arg FSMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 108:34e6b704fe68 728 * @retval None
Kojto 108:34e6b704fe68 729 */
Kojto 108:34e6b704fe68 730 #define __FSMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 |= (__INTERRUPT__)): \
Kojto 122:f9eeca106725 731 ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
Kojto 108:34e6b704fe68 732
Kojto 108:34e6b704fe68 733 /**
Kojto 108:34e6b704fe68 734 * @brief Disable the NAND device interrupt.
Kojto 108:34e6b704fe68 735 * @param __INSTANCE__: FSMC_NAND Instance
Kojto 108:34e6b704fe68 736 * @param __BANK__: FSMC_NAND Bank
Kojto 108:34e6b704fe68 737 * @param __INTERRUPT__: FSMC_NAND interrupt
Kojto 108:34e6b704fe68 738 * This parameter can be any combination of the following values:
Kojto 108:34e6b704fe68 739 * @arg FSMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 108:34e6b704fe68 740 * @arg FSMC_IT_LEVEL: Interrupt level.
Kojto 108:34e6b704fe68 741 * @arg FSMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 108:34e6b704fe68 742 * @retval None
Kojto 108:34e6b704fe68 743 */
Kojto 108:34e6b704fe68 744 #define __FSMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)): \
Kojto 122:f9eeca106725 745 ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
Kojto 122:f9eeca106725 746
Kojto 108:34e6b704fe68 747 /**
Kojto 108:34e6b704fe68 748 * @brief Get flag status of the NAND device.
Kojto 108:34e6b704fe68 749 * @param __INSTANCE__: FSMC_NAND Instance
Kojto 108:34e6b704fe68 750 * @param __BANK__ : FSMC_NAND Bank
Kojto 108:34e6b704fe68 751 * @param __FLAG__ : FSMC_NAND flag
Kojto 108:34e6b704fe68 752 * This parameter can be any combination of the following values:
Kojto 108:34e6b704fe68 753 * @arg FSMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 108:34e6b704fe68 754 * @arg FSMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 108:34e6b704fe68 755 * @arg FSMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 108:34e6b704fe68 756 * @arg FSMC_FLAG_FEMPT: FIFO empty flag.
Kojto 108:34e6b704fe68 757 * @retval The state of FLAG (SET or RESET).
Kojto 108:34e6b704fe68 758 */
Kojto 108:34e6b704fe68 759 #define __FSMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2)? (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)): \
Kojto 122:f9eeca106725 760 (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
Kojto 122:f9eeca106725 761
Kojto 108:34e6b704fe68 762 /**
Kojto 108:34e6b704fe68 763 * @brief Clear flag status of the NAND device.
Kojto 108:34e6b704fe68 764 * @param __INSTANCE__: FSMC_NAND Instance
Kojto 108:34e6b704fe68 765 * @param __BANK__: FSMC_NAND Bank
Kojto 108:34e6b704fe68 766 * @param __FLAG__: FSMC_NAND flag
Kojto 108:34e6b704fe68 767 * This parameter can be any combination of the following values:
Kojto 108:34e6b704fe68 768 * @arg FSMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 108:34e6b704fe68 769 * @arg FSMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 108:34e6b704fe68 770 * @arg FSMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 108:34e6b704fe68 771 * @arg FSMC_FLAG_FEMPT: FIFO empty flag.
Kojto 108:34e6b704fe68 772 * @retval None
Kojto 108:34e6b704fe68 773 */
Kojto 108:34e6b704fe68 774 #define __FSMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FSMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__FLAG__)): \
Kojto 122:f9eeca106725 775 ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
Kojto 122:f9eeca106725 776
Kojto 108:34e6b704fe68 777 /**
Kojto 108:34e6b704fe68 778 * @brief Enable the PCCARD device interrupt.
Kojto 108:34e6b704fe68 779 * @param __INSTANCE__: FSMC_PCCARD Instance
Kojto 108:34e6b704fe68 780 * @param __INTERRUPT__: FSMC_PCCARD interrupt
Kojto 108:34e6b704fe68 781 * This parameter can be any combination of the following values:
Kojto 108:34e6b704fe68 782 * @arg FSMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 108:34e6b704fe68 783 * @arg FSMC_IT_LEVEL: Interrupt level.
Kojto 108:34e6b704fe68 784 * @arg FSMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 108:34e6b704fe68 785 * @retval None
Kojto 108:34e6b704fe68 786 */
Kojto 108:34e6b704fe68 787 #define __FSMC_PCCARD_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 |= (__INTERRUPT__))
Kojto 108:34e6b704fe68 788
Kojto 108:34e6b704fe68 789 /**
Kojto 108:34e6b704fe68 790 * @brief Disable the PCCARD device interrupt.
Kojto 108:34e6b704fe68 791 * @param __INSTANCE__: FSMC_PCCARD Instance
Kojto 108:34e6b704fe68 792 * @param __INTERRUPT__: FSMC_PCCARD interrupt
Kojto 108:34e6b704fe68 793 * This parameter can be any combination of the following values:
Kojto 108:34e6b704fe68 794 * @arg FSMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 108:34e6b704fe68 795 * @arg FSMC_IT_LEVEL: Interrupt level.
Kojto 108:34e6b704fe68 796 * @arg FSMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 108:34e6b704fe68 797 * @retval None
Kojto 108:34e6b704fe68 798 */
Kojto 108:34e6b704fe68 799 #define __FSMC_PCCARD_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 &= ~(__INTERRUPT__))
Kojto 108:34e6b704fe68 800
Kojto 108:34e6b704fe68 801 /**
Kojto 108:34e6b704fe68 802 * @brief Get flag status of the PCCARD device.
Kojto 108:34e6b704fe68 803 * @param __INSTANCE__: FSMC_PCCARD Instance
Kojto 108:34e6b704fe68 804 * @param __FLAG__: FSMC_PCCARD flag
Kojto 108:34e6b704fe68 805 * This parameter can be any combination of the following values:
Kojto 108:34e6b704fe68 806 * @arg FSMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 108:34e6b704fe68 807 * @arg FSMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 108:34e6b704fe68 808 * @arg FSMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 108:34e6b704fe68 809 * @arg FSMC_FLAG_FEMPT: FIFO empty flag.
Kojto 108:34e6b704fe68 810 * @retval The state of FLAG (SET or RESET).
Kojto 108:34e6b704fe68 811 */
Kojto 108:34e6b704fe68 812 #define __FSMC_PCCARD_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->SR4 &(__FLAG__)) == (__FLAG__))
Kojto 108:34e6b704fe68 813
Kojto 108:34e6b704fe68 814 /**
Kojto 108:34e6b704fe68 815 * @brief Clear flag status of the PCCARD device.
Kojto 108:34e6b704fe68 816 * @param __INSTANCE__: FSMC_PCCARD Instance
Kojto 108:34e6b704fe68 817 * @param __FLAG__: FSMC_PCCARD flag
Kojto 108:34e6b704fe68 818 * This parameter can be any combination of the following values:
Kojto 108:34e6b704fe68 819 * @arg FSMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 108:34e6b704fe68 820 * @arg FSMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 108:34e6b704fe68 821 * @arg FSMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 108:34e6b704fe68 822 * @arg FSMC_FLAG_FEMPT: FIFO empty flag.
Kojto 108:34e6b704fe68 823 * @retval None
Kojto 108:34e6b704fe68 824 */
Kojto 108:34e6b704fe68 825 #define __FSMC_PCCARD_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SR4 &= ~(__FLAG__))
Kojto 108:34e6b704fe68 826 /**
Kojto 108:34e6b704fe68 827 * @}
Kojto 108:34e6b704fe68 828 */
Kojto 110:165afa46840b 829 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 108:34e6b704fe68 830
Kojto 108:34e6b704fe68 831 /** @defgroup FSMC_LL_Assert_Macros FSMC Assert Macros
Kojto 108:34e6b704fe68 832 * @{
Kojto 108:34e6b704fe68 833 */
Kojto 108:34e6b704fe68 834 #define IS_FSMC_NORSRAM_BANK(__BANK__) (((__BANK__) == FSMC_NORSRAM_BANK1) || \
Kojto 108:34e6b704fe68 835 ((__BANK__) == FSMC_NORSRAM_BANK2) || \
Kojto 108:34e6b704fe68 836 ((__BANK__) == FSMC_NORSRAM_BANK3) || \
Kojto 108:34e6b704fe68 837 ((__BANK__) == FSMC_NORSRAM_BANK4))
Kojto 108:34e6b704fe68 838
Kojto 108:34e6b704fe68 839 #define IS_FSMC_MUX(__MUX__) (((__MUX__) == FSMC_DATA_ADDRESS_MUX_DISABLE) || \
Kojto 108:34e6b704fe68 840 ((__MUX__) == FSMC_DATA_ADDRESS_MUX_ENABLE))
Kojto 108:34e6b704fe68 841
Kojto 108:34e6b704fe68 842 #define IS_FSMC_MEMORY(__MEMORY__) (((__MEMORY__) == FSMC_MEMORY_TYPE_SRAM) || \
Kojto 108:34e6b704fe68 843 ((__MEMORY__) == FSMC_MEMORY_TYPE_PSRAM)|| \
Kojto 108:34e6b704fe68 844 ((__MEMORY__) == FSMC_MEMORY_TYPE_NOR))
Kojto 108:34e6b704fe68 845
Kojto 108:34e6b704fe68 846 #define IS_FSMC_NORSRAM_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_8) || \
Kojto 108:34e6b704fe68 847 ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_16) || \
Kojto 108:34e6b704fe68 848 ((__WIDTH__) == FSMC_NORSRAM_MEM_BUS_WIDTH_32))
Kojto 108:34e6b704fe68 849
Kojto 108:34e6b704fe68 850 #define IS_FSMC_ACCESS_MODE(__MODE__) (((__MODE__) == FSMC_ACCESS_MODE_A) || \
Kojto 108:34e6b704fe68 851 ((__MODE__) == FSMC_ACCESS_MODE_B) || \
Kojto 108:34e6b704fe68 852 ((__MODE__) == FSMC_ACCESS_MODE_C) || \
Kojto 108:34e6b704fe68 853 ((__MODE__) == FSMC_ACCESS_MODE_D))
Kojto 108:34e6b704fe68 854
Kojto 108:34e6b704fe68 855 #define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_NAND_BANK2) || \
Kojto 108:34e6b704fe68 856 ((BANK) == FSMC_NAND_BANK3))
Kojto 108:34e6b704fe68 857
Kojto 108:34e6b704fe68 858 #define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_NAND_PCC_WAIT_FEATURE_DISABLE) || \
Kojto 108:34e6b704fe68 859 ((FEATURE) == FSMC_NAND_PCC_WAIT_FEATURE_ENABLE))
Kojto 108:34e6b704fe68 860
Kojto 108:34e6b704fe68 861 #define IS_FSMC_NAND_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_NAND_PCC_MEM_BUS_WIDTH_8) || \
Kojto 108:34e6b704fe68 862 ((WIDTH) == FSMC_NAND_PCC_MEM_BUS_WIDTH_16))
Kojto 108:34e6b704fe68 863
Kojto 108:34e6b704fe68 864 #define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_NAND_ECC_DISABLE) || \
Kojto 108:34e6b704fe68 865 ((STATE) == FSMC_NAND_ECC_ENABLE))
Kojto 108:34e6b704fe68 866
Kojto 108:34e6b704fe68 867 #define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_NAND_ECC_PAGE_SIZE_256BYTE) || \
Kojto 108:34e6b704fe68 868 ((SIZE) == FSMC_NAND_ECC_PAGE_SIZE_512BYTE) || \
Kojto 108:34e6b704fe68 869 ((SIZE) == FSMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \
Kojto 108:34e6b704fe68 870 ((SIZE) == FSMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \
Kojto 108:34e6b704fe68 871 ((SIZE) == FSMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \
Kojto 108:34e6b704fe68 872 ((SIZE) == FSMC_NAND_ECC_PAGE_SIZE_8192BYTE))
Kojto 108:34e6b704fe68 873
Kojto 122:f9eeca106725 874 #define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 255U)
Kojto 108:34e6b704fe68 875
Kojto 122:f9eeca106725 876 #define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 255U)
Kojto 108:34e6b704fe68 877
Kojto 122:f9eeca106725 878 #define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 255U)
Kojto 108:34e6b704fe68 879
Kojto 122:f9eeca106725 880 #define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 255U)
Kojto 108:34e6b704fe68 881
Kojto 122:f9eeca106725 882 #define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 255U)
Kojto 108:34e6b704fe68 883
Kojto 122:f9eeca106725 884 #define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 255U)
Kojto 108:34e6b704fe68 885
Kojto 108:34e6b704fe68 886 #define IS_FSMC_NORSRAM_DEVICE(__INSTANCE__) ((__INSTANCE__) == FSMC_NORSRAM_DEVICE)
Kojto 108:34e6b704fe68 887
Kojto 108:34e6b704fe68 888 #define IS_FSMC_NORSRAM_EXTENDED_DEVICE(__INSTANCE__) ((__INSTANCE__) == FSMC_NORSRAM_EXTENDED_DEVICE)
Kojto 108:34e6b704fe68 889
Kojto 108:34e6b704fe68 890 #define IS_FSMC_NAND_DEVICE(INSTANCE) ((INSTANCE) == FSMC_NAND_DEVICE)
Kojto 108:34e6b704fe68 891
Kojto 108:34e6b704fe68 892 #define IS_FSMC_PCCARD_DEVICE(INSTANCE) ((INSTANCE) == FSMC_PCCARD_DEVICE)
Kojto 108:34e6b704fe68 893
Kojto 108:34e6b704fe68 894 #define IS_FSMC_BURSTMODE(__STATE__) (((__STATE__) == FSMC_BURST_ACCESS_MODE_DISABLE) || \
Kojto 108:34e6b704fe68 895 ((__STATE__) == FSMC_BURST_ACCESS_MODE_ENABLE))
Kojto 108:34e6b704fe68 896
Kojto 108:34e6b704fe68 897 #define IS_FSMC_WAIT_POLARITY(__POLARITY__) (((__POLARITY__) == FSMC_WAIT_SIGNAL_POLARITY_LOW) || \
Kojto 108:34e6b704fe68 898 ((__POLARITY__) == FSMC_WAIT_SIGNAL_POLARITY_HIGH))
Kojto 108:34e6b704fe68 899
Kojto 108:34e6b704fe68 900 #define IS_FSMC_WRAP_MODE(__MODE__) (((__MODE__) == FSMC_WRAP_MODE_DISABLE) || \
Kojto 108:34e6b704fe68 901 ((__MODE__) == FSMC_WRAP_MODE_ENABLE))
Kojto 108:34e6b704fe68 902
Kojto 108:34e6b704fe68 903 #define IS_FSMC_WAIT_SIGNAL_ACTIVE(__ACTIVE__) (((__ACTIVE__) == FSMC_WAIT_TIMING_BEFORE_WS) || \
Kojto 108:34e6b704fe68 904 ((__ACTIVE__) == FSMC_WAIT_TIMING_DURING_WS))
Kojto 108:34e6b704fe68 905
Kojto 108:34e6b704fe68 906 #define IS_FSMC_WRITE_OPERATION(__OPERATION__) (((__OPERATION__) == FSMC_WRITE_OPERATION_DISABLE) || \
Kojto 108:34e6b704fe68 907 ((__OPERATION__) == FSMC_WRITE_OPERATION_ENABLE))
Kojto 108:34e6b704fe68 908
Kojto 108:34e6b704fe68 909 #define IS_FSMC_WAITE_SIGNAL(__SIGNAL__) (((__SIGNAL__) == FSMC_WAIT_SIGNAL_DISABLE) || \
Kojto 108:34e6b704fe68 910 ((__SIGNAL__) == FSMC_WAIT_SIGNAL_ENABLE))
Kojto 108:34e6b704fe68 911
Kojto 108:34e6b704fe68 912 #define IS_FSMC_EXTENDED_MODE(__MODE__) (((__MODE__) == FSMC_EXTENDED_MODE_DISABLE) || \
Kojto 108:34e6b704fe68 913 ((__MODE__) == FSMC_EXTENDED_MODE_ENABLE))
Kojto 108:34e6b704fe68 914
Kojto 108:34e6b704fe68 915 #define IS_FSMC_ASYNWAIT(__STATE__) (((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_DISABLE) || \
Kojto 108:34e6b704fe68 916 ((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_ENABLE))
Kojto 108:34e6b704fe68 917
Kojto 122:f9eeca106725 918 #define IS_FSMC_DATA_LATENCY(__LATENCY__) (((__LATENCY__) > 1U) && ((__LATENCY__) <= 17U))
Kojto 108:34e6b704fe68 919
Kojto 108:34e6b704fe68 920 #define IS_FSMC_WRITE_BURST(__BURST__) (((__BURST__) == FSMC_WRITE_BURST_DISABLE) || \
Kojto 108:34e6b704fe68 921 ((__BURST__) == FSMC_WRITE_BURST_ENABLE))
Kojto 108:34e6b704fe68 922
Kojto 122:f9eeca106725 923 #define IS_FSMC_ADDRESS_SETUP_TIME(__TIME__) ((__TIME__) <= 15U)
Kojto 108:34e6b704fe68 924
Kojto 122:f9eeca106725 925 #define IS_FSMC_ADDRESS_HOLD_TIME(__TIME__) (((__TIME__) > 0U) && ((__TIME__) <= 15U))
Kojto 108:34e6b704fe68 926
Kojto 122:f9eeca106725 927 #define IS_FSMC_DATASETUP_TIME(__TIME__) (((__TIME__) > 0U) && ((__TIME__) <= 255U))
Kojto 108:34e6b704fe68 928
Kojto 122:f9eeca106725 929 #define IS_FSMC_TURNAROUND_TIME(__TIME__) ((__TIME__) <= 15U)
Kojto 108:34e6b704fe68 930
Kojto 108:34e6b704fe68 931 #define IS_FSMC_CONTINOUS_CLOCK(CCLOCK) (((CCLOCK) == FSMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \
Kojto 108:34e6b704fe68 932 ((CCLOCK) == FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC))
Kojto 108:34e6b704fe68 933
Kojto 122:f9eeca106725 934 #define IS_FSMC_CLK_DIV(DIV) (((DIV) > 1U) && ((DIV) <= 16U))
Kojto 122:f9eeca106725 935
Kojto 122:f9eeca106725 936 #define IS_FSMC_PAGESIZE(SIZE) (((SIZE) == FSMC_PAGE_SIZE_NONE) || \
Kojto 122:f9eeca106725 937 ((SIZE) == FSMC_PAGE_SIZE_128) || \
Kojto 122:f9eeca106725 938 ((SIZE) == FSMC_PAGE_SIZE_256) || \
Kojto 122:f9eeca106725 939 ((SIZE) == FSMC_PAGE_SIZE_1024))
Kojto 122:f9eeca106725 940
Kojto 122:f9eeca106725 941 #define IS_FSMC_WRITE_FIFO(FIFO) (((FIFO) == FSMC_WRITE_FIFO_DISABLE) || \
Kojto 122:f9eeca106725 942 ((FIFO) == FSMC_WRITE_FIFO_ENABLE))
Kojto 108:34e6b704fe68 943
Kojto 108:34e6b704fe68 944 /**
Kojto 108:34e6b704fe68 945 * @}
Kojto 108:34e6b704fe68 946 */
Kojto 108:34e6b704fe68 947 /**
Kojto 108:34e6b704fe68 948 * @}
Kojto 108:34e6b704fe68 949 */
Kojto 108:34e6b704fe68 950
Kojto 108:34e6b704fe68 951 /* Private functions ---------------------------------------------------------*/
Kojto 108:34e6b704fe68 952 /** @defgroup FSMC_LL_Private_Functions FSMC LL Private Functions
Kojto 108:34e6b704fe68 953 * @{
Kojto 108:34e6b704fe68 954 */
Kojto 108:34e6b704fe68 955
Kojto 108:34e6b704fe68 956 /** @defgroup FSMC_LL_NORSRAM NOR SRAM
Kojto 108:34e6b704fe68 957 * @{
Kojto 108:34e6b704fe68 958 */
Kojto 108:34e6b704fe68 959
Kojto 108:34e6b704fe68 960 /** @defgroup FSMC_LL_NORSRAM_Private_Functions_Group1 NOR SRAM Initialization/de-initialization functions
Kojto 108:34e6b704fe68 961 * @{
Kojto 108:34e6b704fe68 962 */
Kojto 108:34e6b704fe68 963 HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_InitTypeDef *Init);
Kojto 108:34e6b704fe68 964 HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
Kojto 108:34e6b704fe68 965 HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode);
Kojto 108:34e6b704fe68 966 HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
Kojto 108:34e6b704fe68 967 /**
Kojto 108:34e6b704fe68 968 * @}
Kojto 108:34e6b704fe68 969 */
Kojto 108:34e6b704fe68 970
Kojto 108:34e6b704fe68 971 /** @defgroup FSMC_LL_NORSRAM_Private_Functions_Group2 NOR SRAM Control functions
Kojto 108:34e6b704fe68 972 * @{
Kojto 108:34e6b704fe68 973 */
Kojto 108:34e6b704fe68 974 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank);
Kojto 108:34e6b704fe68 975 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank);
Kojto 108:34e6b704fe68 976 /**
Kojto 108:34e6b704fe68 977 * @}
Kojto 108:34e6b704fe68 978 */
Kojto 108:34e6b704fe68 979 /**
Kojto 108:34e6b704fe68 980 * @}
Kojto 108:34e6b704fe68 981 */
Kojto 108:34e6b704fe68 982
Kojto 110:165afa46840b 983 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 108:34e6b704fe68 984 /** @defgroup FSMC_LL_NAND NAND
Kojto 108:34e6b704fe68 985 * @{
Kojto 108:34e6b704fe68 986 */
Kojto 108:34e6b704fe68 987 /** @defgroup FSMC_LL_NAND_Private_Functions_Group1 NAND Initialization/de-initialization functions
Kojto 108:34e6b704fe68 988 * @{
Kojto 108:34e6b704fe68 989 */
Kojto 108:34e6b704fe68 990 HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init);
Kojto 108:34e6b704fe68 991 HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
Kojto 108:34e6b704fe68 992 HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
Kojto 108:34e6b704fe68 993 HAL_StatusTypeDef FSMC_NAND_DeInit(FSMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 108:34e6b704fe68 994 /**
Kojto 108:34e6b704fe68 995 * @}
Kojto 108:34e6b704fe68 996 */
Kojto 108:34e6b704fe68 997
Kojto 108:34e6b704fe68 998 /** @defgroup FSMC_LL_NAND_Private_Functions_Group2 NAND Control functions
Kojto 108:34e6b704fe68 999 * @{
Kojto 108:34e6b704fe68 1000 */
Kojto 108:34e6b704fe68 1001 HAL_StatusTypeDef FSMC_NAND_ECC_Enable(FSMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 108:34e6b704fe68 1002 HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 108:34e6b704fe68 1003 HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout);
Kojto 108:34e6b704fe68 1004 /**
Kojto 108:34e6b704fe68 1005 * @}
Kojto 108:34e6b704fe68 1006 */
Kojto 108:34e6b704fe68 1007 /**
Kojto 108:34e6b704fe68 1008 * @}
Kojto 108:34e6b704fe68 1009 */
Kojto 108:34e6b704fe68 1010
Kojto 108:34e6b704fe68 1011 /** @defgroup FSMC_LL_PCCARD PCCARD
Kojto 108:34e6b704fe68 1012 * @{
Kojto 108:34e6b704fe68 1013 */
Kojto 108:34e6b704fe68 1014 /** @defgroup FSMC_LL_PCCARD_Private_Functions_Group1 PCCARD Initialization/de-initialization functions
Kojto 108:34e6b704fe68 1015 * @{
Kojto 108:34e6b704fe68 1016 */
Kojto 108:34e6b704fe68 1017 HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init);
Kojto 108:34e6b704fe68 1018 HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 108:34e6b704fe68 1019 HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 108:34e6b704fe68 1020 HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing);
Kojto 108:34e6b704fe68 1021 HAL_StatusTypeDef FSMC_PCCARD_DeInit(FSMC_PCCARD_TypeDef *Device);
Kojto 108:34e6b704fe68 1022 /**
Kojto 108:34e6b704fe68 1023 * @}
Kojto 108:34e6b704fe68 1024 */
Kojto 108:34e6b704fe68 1025 /**
Kojto 108:34e6b704fe68 1026 * @}
Kojto 108:34e6b704fe68 1027 */
Kojto 110:165afa46840b 1028 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 108:34e6b704fe68 1029
Kojto 108:34e6b704fe68 1030 /**
Kojto 108:34e6b704fe68 1031 * @}
Kojto 108:34e6b704fe68 1032 */
Kojto 122:f9eeca106725 1033 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
Kojto 108:34e6b704fe68 1034
Kojto 108:34e6b704fe68 1035 /**
Kojto 108:34e6b704fe68 1036 * @}
Kojto 108:34e6b704fe68 1037 */
Kojto 108:34e6b704fe68 1038
Kojto 108:34e6b704fe68 1039 /**
Kojto 108:34e6b704fe68 1040 * @}
Kojto 108:34e6b704fe68 1041 */
Kojto 108:34e6b704fe68 1042
Kojto 108:34e6b704fe68 1043 #ifdef __cplusplus
Kojto 108:34e6b704fe68 1044 }
Kojto 108:34e6b704fe68 1045 #endif
Kojto 108:34e6b704fe68 1046
Kojto 108:34e6b704fe68 1047 #endif /* __STM32F4xx_LL_FSMC_H */
Kojto 108:34e6b704fe68 1048
Kojto 108:34e6b704fe68 1049 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/