ads1115 only
Fork of mbed by
TARGET_UBLOX_EVA_NINA/core_ca_mmu.h@132:9baf128c2fab, 2016-12-20 (annotated)
- Committer:
- <>
- Date:
- Tue Dec 20 15:36:52 2016 +0000
- Revision:
- 132:9baf128c2fab
Release 132 of the mbed library
Ports for Upcoming Targets
3241: Add support for FRDM-KW41 https://github.com/ARMmbed/mbed-os/pull/3241
3291: Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q https://github.com/ARMmbed/mbed-os/pull/3291
Fixes and Changes
3062: TARGET_STM :USB device FS https://github.com/ARMmbed/mbed-os/pull/3062
3213: STM32: Refactor us_ticker.c + hal_tick.c files https://github.com/ARMmbed/mbed-os/pull/3213
3288: Dev spi asynch l0l1 https://github.com/ARMmbed/mbed-os/pull/3288
3289: Bug fix of initial value of interrupt edge in "gpio_irq_init" function. https://github.com/ARMmbed/mbed-os/pull/3289
3302: STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels https://github.com/ARMmbed/mbed-os/pull/3302
3320: STM32 - Add ADC_VREF label https://github.com/ARMmbed/mbed-os/pull/3320
3321: no HSE available by default for NUCLEO_L432KC https://github.com/ARMmbed/mbed-os/pull/3321
3352: ublox eva nina - fix line endings https://github.com/ARMmbed/mbed-os/pull/3352
3322: DISCO_L053C8 doesn't support LSE https://github.com/ARMmbed/mbed-os/pull/3322
3345: STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions https://github.com/ARMmbed/mbed-os/pull/3345
3309: [NUC472/M453] Fix CI failed tests https://github.com/ARMmbed/mbed-os/pull/3309
3157: [Silicon Labs] Adding support for EFR32MG1 wireless SoC https://github.com/ARMmbed/mbed-os/pull/3157
3301: I2C - correct return values for write functions (docs) - part 1 https://github.com/ARMmbed/mbed-os/pull/3301
3303: Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor https://github.com/ARMmbed/mbed-os/pull/3303
3304: STM32L476: no HSE is present in NUCLEO and DISCO boards https://github.com/ARMmbed/mbed-os/pull/3304
3318: Register map changes for RevG https://github.com/ARMmbed/mbed-os/pull/3318
3317: NUCLEO_F429ZI has integrated LSE https://github.com/ARMmbed/mbed-os/pull/3317
3312: K64F: SPI Asynch API implementation https://github.com/ARMmbed/mbed-os/pull/3312
3324: Dev i2c common code https://github.com/ARMmbed/mbed-os/pull/3324
3369: Add CAN2 missing pins for connector CN12 https://github.com/ARMmbed/mbed-os/pull/3369
3377: STM32 NUCLEO-L152RE Update system core clock to 32MHz https://github.com/ARMmbed/mbed-os/pull/3377
3378: K66F: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/3378
3382: [MAX32620] Fixing serial readable function. https://github.com/ARMmbed/mbed-os/pull/3382
3399: NUCLEO_F103RB - Add SERIAL_FC feature https://github.com/ARMmbed/mbed-os/pull/3399
3409: STM32L1 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3409
3416: Renames i2c_api.c for STM32F1 targets to fix IAR exporter https://github.com/ARMmbed/mbed-os/pull/3416
3348: Fix frequency function of CAN driver. https://github.com/ARMmbed/mbed-os/pull/3348
3366: NUCLEO_F412ZG - Add new platform https://github.com/ARMmbed/mbed-os/pull/3366
3379: STM32F0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3379
3393: ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4 https://github.com/ARMmbed/mbed-os/pull/3393
3408: STM32F7 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3408
3411: STM32L0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3411
3424: STM32F4 - FIX to add the update of hdma->State variable https://github.com/ARMmbed/mbed-os/pull/3424
3427: Fix stm i2c slave https://github.com/ARMmbed/mbed-os/pull/3427
3429: Fix stm i2c fix init https://github.com/ARMmbed/mbed-os/pull/3429
3434: [NUC472/M453] Fix stuck in lp_ticker_init and other updates https://github.com/ARMmbed/mbed-os/pull/3434
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 132:9baf128c2fab | 1 | ;/**************************************************************************//** |
<> | 132:9baf128c2fab | 2 | ; * @file core_ca_mmu.h |
<> | 132:9baf128c2fab | 3 | ; * @brief MMU Startup File for A9_MP Device Series |
<> | 132:9baf128c2fab | 4 | ; * @version V1.01 |
<> | 132:9baf128c2fab | 5 | ; * @date 10 Sept 2014 |
<> | 132:9baf128c2fab | 6 | ; * |
<> | 132:9baf128c2fab | 7 | ; * @note |
<> | 132:9baf128c2fab | 8 | ; * |
<> | 132:9baf128c2fab | 9 | ; ******************************************************************************/ |
<> | 132:9baf128c2fab | 10 | ;/* Copyright (c) 2012-2014 ARM LIMITED |
<> | 132:9baf128c2fab | 11 | ; |
<> | 132:9baf128c2fab | 12 | ; All rights reserved. |
<> | 132:9baf128c2fab | 13 | ; Redistribution and use in source and binary forms, with or without |
<> | 132:9baf128c2fab | 14 | ; modification, are permitted provided that the following conditions are met: |
<> | 132:9baf128c2fab | 15 | ; - Redistributions of source code must retain the above copyright |
<> | 132:9baf128c2fab | 16 | ; notice, this list of conditions and the following disclaimer. |
<> | 132:9baf128c2fab | 17 | ; - Redistributions in binary form must reproduce the above copyright |
<> | 132:9baf128c2fab | 18 | ; notice, this list of conditions and the following disclaimer in the |
<> | 132:9baf128c2fab | 19 | ; documentation and/or other materials provided with the distribution. |
<> | 132:9baf128c2fab | 20 | ; - Neither the name of ARM nor the names of its contributors may be used |
<> | 132:9baf128c2fab | 21 | ; to endorse or promote products derived from this software without |
<> | 132:9baf128c2fab | 22 | ; specific prior written permission. |
<> | 132:9baf128c2fab | 23 | ; * |
<> | 132:9baf128c2fab | 24 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 132:9baf128c2fab | 25 | ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 132:9baf128c2fab | 26 | ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
<> | 132:9baf128c2fab | 27 | ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
<> | 132:9baf128c2fab | 28 | ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
<> | 132:9baf128c2fab | 29 | ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
<> | 132:9baf128c2fab | 30 | ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
<> | 132:9baf128c2fab | 31 | ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
<> | 132:9baf128c2fab | 32 | ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
<> | 132:9baf128c2fab | 33 | ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
<> | 132:9baf128c2fab | 34 | ; POSSIBILITY OF SUCH DAMAGE. |
<> | 132:9baf128c2fab | 35 | ; ---------------------------------------------------------------------------*/ |
<> | 132:9baf128c2fab | 36 | |
<> | 132:9baf128c2fab | 37 | #ifdef __cplusplus |
<> | 132:9baf128c2fab | 38 | extern "C" { |
<> | 132:9baf128c2fab | 39 | #endif |
<> | 132:9baf128c2fab | 40 | |
<> | 132:9baf128c2fab | 41 | #ifndef _MMU_FUNC_H |
<> | 132:9baf128c2fab | 42 | #define _MMU_FUNC_H |
<> | 132:9baf128c2fab | 43 | |
<> | 132:9baf128c2fab | 44 | #define SECTION_DESCRIPTOR (0x2) |
<> | 132:9baf128c2fab | 45 | #define SECTION_MASK (0xFFFFFFFC) |
<> | 132:9baf128c2fab | 46 | |
<> | 132:9baf128c2fab | 47 | #define SECTION_TEXCB_MASK (0xFFFF8FF3) |
<> | 132:9baf128c2fab | 48 | #define SECTION_B_SHIFT (2) |
<> | 132:9baf128c2fab | 49 | #define SECTION_C_SHIFT (3) |
<> | 132:9baf128c2fab | 50 | #define SECTION_TEX0_SHIFT (12) |
<> | 132:9baf128c2fab | 51 | #define SECTION_TEX1_SHIFT (13) |
<> | 132:9baf128c2fab | 52 | #define SECTION_TEX2_SHIFT (14) |
<> | 132:9baf128c2fab | 53 | |
<> | 132:9baf128c2fab | 54 | #define SECTION_XN_MASK (0xFFFFFFEF) |
<> | 132:9baf128c2fab | 55 | #define SECTION_XN_SHIFT (4) |
<> | 132:9baf128c2fab | 56 | |
<> | 132:9baf128c2fab | 57 | #define SECTION_DOMAIN_MASK (0xFFFFFE1F) |
<> | 132:9baf128c2fab | 58 | #define SECTION_DOMAIN_SHIFT (5) |
<> | 132:9baf128c2fab | 59 | |
<> | 132:9baf128c2fab | 60 | #define SECTION_P_MASK (0xFFFFFDFF) |
<> | 132:9baf128c2fab | 61 | #define SECTION_P_SHIFT (9) |
<> | 132:9baf128c2fab | 62 | |
<> | 132:9baf128c2fab | 63 | #define SECTION_AP_MASK (0xFFFF73FF) |
<> | 132:9baf128c2fab | 64 | #define SECTION_AP_SHIFT (10) |
<> | 132:9baf128c2fab | 65 | #define SECTION_AP2_SHIFT (15) |
<> | 132:9baf128c2fab | 66 | |
<> | 132:9baf128c2fab | 67 | #define SECTION_S_MASK (0xFFFEFFFF) |
<> | 132:9baf128c2fab | 68 | #define SECTION_S_SHIFT (16) |
<> | 132:9baf128c2fab | 69 | |
<> | 132:9baf128c2fab | 70 | #define SECTION_NG_MASK (0xFFFDFFFF) |
<> | 132:9baf128c2fab | 71 | #define SECTION_NG_SHIFT (17) |
<> | 132:9baf128c2fab | 72 | |
<> | 132:9baf128c2fab | 73 | #define SECTION_NS_MASK (0xFFF7FFFF) |
<> | 132:9baf128c2fab | 74 | #define SECTION_NS_SHIFT (19) |
<> | 132:9baf128c2fab | 75 | |
<> | 132:9baf128c2fab | 76 | |
<> | 132:9baf128c2fab | 77 | #define PAGE_L1_DESCRIPTOR (0x1) |
<> | 132:9baf128c2fab | 78 | #define PAGE_L1_MASK (0xFFFFFFFC) |
<> | 132:9baf128c2fab | 79 | |
<> | 132:9baf128c2fab | 80 | #define PAGE_L2_4K_DESC (0x2) |
<> | 132:9baf128c2fab | 81 | #define PAGE_L2_4K_MASK (0xFFFFFFFD) |
<> | 132:9baf128c2fab | 82 | |
<> | 132:9baf128c2fab | 83 | #define PAGE_L2_64K_DESC (0x1) |
<> | 132:9baf128c2fab | 84 | #define PAGE_L2_64K_MASK (0xFFFFFFFC) |
<> | 132:9baf128c2fab | 85 | |
<> | 132:9baf128c2fab | 86 | #define PAGE_4K_TEXCB_MASK (0xFFFFFE33) |
<> | 132:9baf128c2fab | 87 | #define PAGE_4K_B_SHIFT (2) |
<> | 132:9baf128c2fab | 88 | #define PAGE_4K_C_SHIFT (3) |
<> | 132:9baf128c2fab | 89 | #define PAGE_4K_TEX0_SHIFT (6) |
<> | 132:9baf128c2fab | 90 | #define PAGE_4K_TEX1_SHIFT (7) |
<> | 132:9baf128c2fab | 91 | #define PAGE_4K_TEX2_SHIFT (8) |
<> | 132:9baf128c2fab | 92 | |
<> | 132:9baf128c2fab | 93 | #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3) |
<> | 132:9baf128c2fab | 94 | #define PAGE_64K_B_SHIFT (2) |
<> | 132:9baf128c2fab | 95 | #define PAGE_64K_C_SHIFT (3) |
<> | 132:9baf128c2fab | 96 | #define PAGE_64K_TEX0_SHIFT (12) |
<> | 132:9baf128c2fab | 97 | #define PAGE_64K_TEX1_SHIFT (13) |
<> | 132:9baf128c2fab | 98 | #define PAGE_64K_TEX2_SHIFT (14) |
<> | 132:9baf128c2fab | 99 | |
<> | 132:9baf128c2fab | 100 | #define PAGE_TEXCB_MASK (0xFFFF8FF3) |
<> | 132:9baf128c2fab | 101 | #define PAGE_B_SHIFT (2) |
<> | 132:9baf128c2fab | 102 | #define PAGE_C_SHIFT (3) |
<> | 132:9baf128c2fab | 103 | #define PAGE_TEX_SHIFT (12) |
<> | 132:9baf128c2fab | 104 | |
<> | 132:9baf128c2fab | 105 | #define PAGE_XN_4K_MASK (0xFFFFFFFE) |
<> | 132:9baf128c2fab | 106 | #define PAGE_XN_4K_SHIFT (0) |
<> | 132:9baf128c2fab | 107 | #define PAGE_XN_64K_MASK (0xFFFF7FFF) |
<> | 132:9baf128c2fab | 108 | #define PAGE_XN_64K_SHIFT (15) |
<> | 132:9baf128c2fab | 109 | |
<> | 132:9baf128c2fab | 110 | |
<> | 132:9baf128c2fab | 111 | #define PAGE_DOMAIN_MASK (0xFFFFFE1F) |
<> | 132:9baf128c2fab | 112 | #define PAGE_DOMAIN_SHIFT (5) |
<> | 132:9baf128c2fab | 113 | |
<> | 132:9baf128c2fab | 114 | #define PAGE_P_MASK (0xFFFFFDFF) |
<> | 132:9baf128c2fab | 115 | #define PAGE_P_SHIFT (9) |
<> | 132:9baf128c2fab | 116 | |
<> | 132:9baf128c2fab | 117 | #define PAGE_AP_MASK (0xFFFFFDCF) |
<> | 132:9baf128c2fab | 118 | #define PAGE_AP_SHIFT (4) |
<> | 132:9baf128c2fab | 119 | #define PAGE_AP2_SHIFT (9) |
<> | 132:9baf128c2fab | 120 | |
<> | 132:9baf128c2fab | 121 | #define PAGE_S_MASK (0xFFFFFBFF) |
<> | 132:9baf128c2fab | 122 | #define PAGE_S_SHIFT (10) |
<> | 132:9baf128c2fab | 123 | |
<> | 132:9baf128c2fab | 124 | #define PAGE_NG_MASK (0xFFFFF7FF) |
<> | 132:9baf128c2fab | 125 | #define PAGE_NG_SHIFT (11) |
<> | 132:9baf128c2fab | 126 | |
<> | 132:9baf128c2fab | 127 | #define PAGE_NS_MASK (0xFFFFFFF7) |
<> | 132:9baf128c2fab | 128 | #define PAGE_NS_SHIFT (3) |
<> | 132:9baf128c2fab | 129 | |
<> | 132:9baf128c2fab | 130 | #define OFFSET_1M (0x00100000) |
<> | 132:9baf128c2fab | 131 | #define OFFSET_64K (0x00010000) |
<> | 132:9baf128c2fab | 132 | #define OFFSET_4K (0x00001000) |
<> | 132:9baf128c2fab | 133 | |
<> | 132:9baf128c2fab | 134 | #define DESCRIPTOR_FAULT (0x00000000) |
<> | 132:9baf128c2fab | 135 | |
<> | 132:9baf128c2fab | 136 | /* ########################### MMU Function Access ########################### */ |
<> | 132:9baf128c2fab | 137 | /** \ingroup MMU_FunctionInterface |
<> | 132:9baf128c2fab | 138 | \defgroup MMU_Functions MMU Functions Interface |
<> | 132:9baf128c2fab | 139 | @{ |
<> | 132:9baf128c2fab | 140 | */ |
<> | 132:9baf128c2fab | 141 | |
<> | 132:9baf128c2fab | 142 | /* Attributes enumerations */ |
<> | 132:9baf128c2fab | 143 | |
<> | 132:9baf128c2fab | 144 | /* Region size attributes */ |
<> | 132:9baf128c2fab | 145 | typedef enum |
<> | 132:9baf128c2fab | 146 | { |
<> | 132:9baf128c2fab | 147 | SECTION, |
<> | 132:9baf128c2fab | 148 | PAGE_4k, |
<> | 132:9baf128c2fab | 149 | PAGE_64k, |
<> | 132:9baf128c2fab | 150 | } mmu_region_size_Type; |
<> | 132:9baf128c2fab | 151 | |
<> | 132:9baf128c2fab | 152 | /* Region type attributes */ |
<> | 132:9baf128c2fab | 153 | typedef enum |
<> | 132:9baf128c2fab | 154 | { |
<> | 132:9baf128c2fab | 155 | NORMAL, |
<> | 132:9baf128c2fab | 156 | DEVICE, |
<> | 132:9baf128c2fab | 157 | SHARED_DEVICE, |
<> | 132:9baf128c2fab | 158 | NON_SHARED_DEVICE, |
<> | 132:9baf128c2fab | 159 | STRONGLY_ORDERED |
<> | 132:9baf128c2fab | 160 | } mmu_memory_Type; |
<> | 132:9baf128c2fab | 161 | |
<> | 132:9baf128c2fab | 162 | /* Region cacheability attributes */ |
<> | 132:9baf128c2fab | 163 | typedef enum |
<> | 132:9baf128c2fab | 164 | { |
<> | 132:9baf128c2fab | 165 | NON_CACHEABLE, |
<> | 132:9baf128c2fab | 166 | WB_WA, |
<> | 132:9baf128c2fab | 167 | WT, |
<> | 132:9baf128c2fab | 168 | WB_NO_WA, |
<> | 132:9baf128c2fab | 169 | } mmu_cacheability_Type; |
<> | 132:9baf128c2fab | 170 | |
<> | 132:9baf128c2fab | 171 | /* Region parity check attributes */ |
<> | 132:9baf128c2fab | 172 | typedef enum |
<> | 132:9baf128c2fab | 173 | { |
<> | 132:9baf128c2fab | 174 | ECC_DISABLED, |
<> | 132:9baf128c2fab | 175 | ECC_ENABLED, |
<> | 132:9baf128c2fab | 176 | } mmu_ecc_check_Type; |
<> | 132:9baf128c2fab | 177 | |
<> | 132:9baf128c2fab | 178 | /* Region execution attributes */ |
<> | 132:9baf128c2fab | 179 | typedef enum |
<> | 132:9baf128c2fab | 180 | { |
<> | 132:9baf128c2fab | 181 | EXECUTE, |
<> | 132:9baf128c2fab | 182 | NON_EXECUTE, |
<> | 132:9baf128c2fab | 183 | } mmu_execute_Type; |
<> | 132:9baf128c2fab | 184 | |
<> | 132:9baf128c2fab | 185 | /* Region global attributes */ |
<> | 132:9baf128c2fab | 186 | typedef enum |
<> | 132:9baf128c2fab | 187 | { |
<> | 132:9baf128c2fab | 188 | GLOBAL, |
<> | 132:9baf128c2fab | 189 | NON_GLOBAL, |
<> | 132:9baf128c2fab | 190 | } mmu_global_Type; |
<> | 132:9baf128c2fab | 191 | |
<> | 132:9baf128c2fab | 192 | /* Region shareability attributes */ |
<> | 132:9baf128c2fab | 193 | typedef enum |
<> | 132:9baf128c2fab | 194 | { |
<> | 132:9baf128c2fab | 195 | NON_SHARED, |
<> | 132:9baf128c2fab | 196 | SHARED, |
<> | 132:9baf128c2fab | 197 | } mmu_shared_Type; |
<> | 132:9baf128c2fab | 198 | |
<> | 132:9baf128c2fab | 199 | /* Region security attributes */ |
<> | 132:9baf128c2fab | 200 | typedef enum |
<> | 132:9baf128c2fab | 201 | { |
<> | 132:9baf128c2fab | 202 | SECURE, |
<> | 132:9baf128c2fab | 203 | NON_SECURE, |
<> | 132:9baf128c2fab | 204 | } mmu_secure_Type; |
<> | 132:9baf128c2fab | 205 | |
<> | 132:9baf128c2fab | 206 | /* Region access attributes */ |
<> | 132:9baf128c2fab | 207 | typedef enum |
<> | 132:9baf128c2fab | 208 | { |
<> | 132:9baf128c2fab | 209 | NO_ACCESS, |
<> | 132:9baf128c2fab | 210 | RW, |
<> | 132:9baf128c2fab | 211 | READ, |
<> | 132:9baf128c2fab | 212 | } mmu_access_Type; |
<> | 132:9baf128c2fab | 213 | |
<> | 132:9baf128c2fab | 214 | /* Memory Region definition */ |
<> | 132:9baf128c2fab | 215 | typedef struct RegionStruct { |
<> | 132:9baf128c2fab | 216 | mmu_region_size_Type rg_t; |
<> | 132:9baf128c2fab | 217 | mmu_memory_Type mem_t; |
<> | 132:9baf128c2fab | 218 | uint8_t domain; |
<> | 132:9baf128c2fab | 219 | mmu_cacheability_Type inner_norm_t; |
<> | 132:9baf128c2fab | 220 | mmu_cacheability_Type outer_norm_t; |
<> | 132:9baf128c2fab | 221 | mmu_ecc_check_Type e_t; |
<> | 132:9baf128c2fab | 222 | mmu_execute_Type xn_t; |
<> | 132:9baf128c2fab | 223 | mmu_global_Type g_t; |
<> | 132:9baf128c2fab | 224 | mmu_secure_Type sec_t; |
<> | 132:9baf128c2fab | 225 | mmu_access_Type priv_t; |
<> | 132:9baf128c2fab | 226 | mmu_access_Type user_t; |
<> | 132:9baf128c2fab | 227 | mmu_shared_Type sh_t; |
<> | 132:9baf128c2fab | 228 | |
<> | 132:9baf128c2fab | 229 | } mmu_region_attributes_Type; |
<> | 132:9baf128c2fab | 230 | |
<> | 132:9baf128c2fab | 231 | /** \brief Set section execution-never attribute |
<> | 132:9baf128c2fab | 232 | |
<> | 132:9baf128c2fab | 233 | The function sets section execution-never attribute |
<> | 132:9baf128c2fab | 234 | |
<> | 132:9baf128c2fab | 235 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 236 | \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE. |
<> | 132:9baf128c2fab | 237 | |
<> | 132:9baf128c2fab | 238 | \return 0 |
<> | 132:9baf128c2fab | 239 | */ |
<> | 132:9baf128c2fab | 240 | __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn) |
<> | 132:9baf128c2fab | 241 | { |
<> | 132:9baf128c2fab | 242 | *descriptor_l1 &= SECTION_XN_MASK; |
<> | 132:9baf128c2fab | 243 | *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT); |
<> | 132:9baf128c2fab | 244 | return 0; |
<> | 132:9baf128c2fab | 245 | } |
<> | 132:9baf128c2fab | 246 | |
<> | 132:9baf128c2fab | 247 | /** \brief Set section domain |
<> | 132:9baf128c2fab | 248 | |
<> | 132:9baf128c2fab | 249 | The function sets section domain |
<> | 132:9baf128c2fab | 250 | |
<> | 132:9baf128c2fab | 251 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 252 | \param [in] domain Section domain |
<> | 132:9baf128c2fab | 253 | |
<> | 132:9baf128c2fab | 254 | \return 0 |
<> | 132:9baf128c2fab | 255 | */ |
<> | 132:9baf128c2fab | 256 | __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain) |
<> | 132:9baf128c2fab | 257 | { |
<> | 132:9baf128c2fab | 258 | *descriptor_l1 &= SECTION_DOMAIN_MASK; |
<> | 132:9baf128c2fab | 259 | *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT); |
<> | 132:9baf128c2fab | 260 | return 0; |
<> | 132:9baf128c2fab | 261 | } |
<> | 132:9baf128c2fab | 262 | |
<> | 132:9baf128c2fab | 263 | /** \brief Set section parity check |
<> | 132:9baf128c2fab | 264 | |
<> | 132:9baf128c2fab | 265 | The function sets section parity check |
<> | 132:9baf128c2fab | 266 | |
<> | 132:9baf128c2fab | 267 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 268 | \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED |
<> | 132:9baf128c2fab | 269 | |
<> | 132:9baf128c2fab | 270 | \return 0 |
<> | 132:9baf128c2fab | 271 | */ |
<> | 132:9baf128c2fab | 272 | __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit) |
<> | 132:9baf128c2fab | 273 | { |
<> | 132:9baf128c2fab | 274 | *descriptor_l1 &= SECTION_P_MASK; |
<> | 132:9baf128c2fab | 275 | *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT); |
<> | 132:9baf128c2fab | 276 | return 0; |
<> | 132:9baf128c2fab | 277 | } |
<> | 132:9baf128c2fab | 278 | |
<> | 132:9baf128c2fab | 279 | /** \brief Set section access privileges |
<> | 132:9baf128c2fab | 280 | |
<> | 132:9baf128c2fab | 281 | The function sets section access privileges |
<> | 132:9baf128c2fab | 282 | |
<> | 132:9baf128c2fab | 283 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 284 | \param [in] user User Level Access: NO_ACCESS, RW, READ |
<> | 132:9baf128c2fab | 285 | \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ |
<> | 132:9baf128c2fab | 286 | \param [in] afe Access flag enable |
<> | 132:9baf128c2fab | 287 | |
<> | 132:9baf128c2fab | 288 | \return 0 |
<> | 132:9baf128c2fab | 289 | */ |
<> | 132:9baf128c2fab | 290 | __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe) |
<> | 132:9baf128c2fab | 291 | { |
<> | 132:9baf128c2fab | 292 | uint32_t ap = 0; |
<> | 132:9baf128c2fab | 293 | |
<> | 132:9baf128c2fab | 294 | if (afe == 0) { //full access |
<> | 132:9baf128c2fab | 295 | if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; } |
<> | 132:9baf128c2fab | 296 | else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } |
<> | 132:9baf128c2fab | 297 | else if ((priv == RW) && (user == READ)) { ap = 0x2; } |
<> | 132:9baf128c2fab | 298 | else if ((priv == RW) && (user == RW)) { ap = 0x3; } |
<> | 132:9baf128c2fab | 299 | else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } |
<> | 132:9baf128c2fab | 300 | else if ((priv == READ) && (user == READ)) { ap = 0x7; } |
<> | 132:9baf128c2fab | 301 | } |
<> | 132:9baf128c2fab | 302 | |
<> | 132:9baf128c2fab | 303 | else { //Simplified access |
<> | 132:9baf128c2fab | 304 | if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } |
<> | 132:9baf128c2fab | 305 | else if ((priv == RW) && (user == RW)) { ap = 0x3; } |
<> | 132:9baf128c2fab | 306 | else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } |
<> | 132:9baf128c2fab | 307 | else if ((priv == READ) && (user == READ)) { ap = 0x7; } |
<> | 132:9baf128c2fab | 308 | } |
<> | 132:9baf128c2fab | 309 | |
<> | 132:9baf128c2fab | 310 | *descriptor_l1 &= SECTION_AP_MASK; |
<> | 132:9baf128c2fab | 311 | *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT; |
<> | 132:9baf128c2fab | 312 | *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT; |
<> | 132:9baf128c2fab | 313 | |
<> | 132:9baf128c2fab | 314 | return 0; |
<> | 132:9baf128c2fab | 315 | } |
<> | 132:9baf128c2fab | 316 | |
<> | 132:9baf128c2fab | 317 | /** \brief Set section shareability |
<> | 132:9baf128c2fab | 318 | |
<> | 132:9baf128c2fab | 319 | The function sets section shareability |
<> | 132:9baf128c2fab | 320 | |
<> | 132:9baf128c2fab | 321 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 322 | \param [in] s_bit Section shareability: NON_SHARED, SHARED |
<> | 132:9baf128c2fab | 323 | |
<> | 132:9baf128c2fab | 324 | \return 0 |
<> | 132:9baf128c2fab | 325 | */ |
<> | 132:9baf128c2fab | 326 | __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit) |
<> | 132:9baf128c2fab | 327 | { |
<> | 132:9baf128c2fab | 328 | *descriptor_l1 &= SECTION_S_MASK; |
<> | 132:9baf128c2fab | 329 | *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT); |
<> | 132:9baf128c2fab | 330 | return 0; |
<> | 132:9baf128c2fab | 331 | } |
<> | 132:9baf128c2fab | 332 | |
<> | 132:9baf128c2fab | 333 | /** \brief Set section Global attribute |
<> | 132:9baf128c2fab | 334 | |
<> | 132:9baf128c2fab | 335 | The function sets section Global attribute |
<> | 132:9baf128c2fab | 336 | |
<> | 132:9baf128c2fab | 337 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 338 | \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL |
<> | 132:9baf128c2fab | 339 | |
<> | 132:9baf128c2fab | 340 | \return 0 |
<> | 132:9baf128c2fab | 341 | */ |
<> | 132:9baf128c2fab | 342 | __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit) |
<> | 132:9baf128c2fab | 343 | { |
<> | 132:9baf128c2fab | 344 | *descriptor_l1 &= SECTION_NG_MASK; |
<> | 132:9baf128c2fab | 345 | *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT); |
<> | 132:9baf128c2fab | 346 | return 0; |
<> | 132:9baf128c2fab | 347 | } |
<> | 132:9baf128c2fab | 348 | |
<> | 132:9baf128c2fab | 349 | /** \brief Set section Security attribute |
<> | 132:9baf128c2fab | 350 | |
<> | 132:9baf128c2fab | 351 | The function sets section Global attribute |
<> | 132:9baf128c2fab | 352 | |
<> | 132:9baf128c2fab | 353 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 354 | \param [in] s_bit Section Security attribute: SECURE, NON_SECURE |
<> | 132:9baf128c2fab | 355 | |
<> | 132:9baf128c2fab | 356 | \return 0 |
<> | 132:9baf128c2fab | 357 | */ |
<> | 132:9baf128c2fab | 358 | __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit) |
<> | 132:9baf128c2fab | 359 | { |
<> | 132:9baf128c2fab | 360 | *descriptor_l1 &= SECTION_NS_MASK; |
<> | 132:9baf128c2fab | 361 | *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT); |
<> | 132:9baf128c2fab | 362 | return 0; |
<> | 132:9baf128c2fab | 363 | } |
<> | 132:9baf128c2fab | 364 | |
<> | 132:9baf128c2fab | 365 | /* Page 4k or 64k */ |
<> | 132:9baf128c2fab | 366 | /** \brief Set 4k/64k page execution-never attribute |
<> | 132:9baf128c2fab | 367 | |
<> | 132:9baf128c2fab | 368 | The function sets 4k/64k page execution-never attribute |
<> | 132:9baf128c2fab | 369 | |
<> | 132:9baf128c2fab | 370 | \param [out] descriptor_l2 L2 descriptor. |
<> | 132:9baf128c2fab | 371 | \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE. |
<> | 132:9baf128c2fab | 372 | \param [in] page Page size: PAGE_4k, PAGE_64k, |
<> | 132:9baf128c2fab | 373 | |
<> | 132:9baf128c2fab | 374 | \return 0 |
<> | 132:9baf128c2fab | 375 | */ |
<> | 132:9baf128c2fab | 376 | __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page) |
<> | 132:9baf128c2fab | 377 | { |
<> | 132:9baf128c2fab | 378 | if (page == PAGE_4k) |
<> | 132:9baf128c2fab | 379 | { |
<> | 132:9baf128c2fab | 380 | *descriptor_l2 &= PAGE_XN_4K_MASK; |
<> | 132:9baf128c2fab | 381 | *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT); |
<> | 132:9baf128c2fab | 382 | } |
<> | 132:9baf128c2fab | 383 | else |
<> | 132:9baf128c2fab | 384 | { |
<> | 132:9baf128c2fab | 385 | *descriptor_l2 &= PAGE_XN_64K_MASK; |
<> | 132:9baf128c2fab | 386 | *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT); |
<> | 132:9baf128c2fab | 387 | } |
<> | 132:9baf128c2fab | 388 | return 0; |
<> | 132:9baf128c2fab | 389 | } |
<> | 132:9baf128c2fab | 390 | |
<> | 132:9baf128c2fab | 391 | /** \brief Set 4k/64k page domain |
<> | 132:9baf128c2fab | 392 | |
<> | 132:9baf128c2fab | 393 | The function sets 4k/64k page domain |
<> | 132:9baf128c2fab | 394 | |
<> | 132:9baf128c2fab | 395 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 396 | \param [in] domain Page domain |
<> | 132:9baf128c2fab | 397 | |
<> | 132:9baf128c2fab | 398 | \return 0 |
<> | 132:9baf128c2fab | 399 | */ |
<> | 132:9baf128c2fab | 400 | __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain) |
<> | 132:9baf128c2fab | 401 | { |
<> | 132:9baf128c2fab | 402 | *descriptor_l1 &= PAGE_DOMAIN_MASK; |
<> | 132:9baf128c2fab | 403 | *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT); |
<> | 132:9baf128c2fab | 404 | return 0; |
<> | 132:9baf128c2fab | 405 | } |
<> | 132:9baf128c2fab | 406 | |
<> | 132:9baf128c2fab | 407 | /** \brief Set 4k/64k page parity check |
<> | 132:9baf128c2fab | 408 | |
<> | 132:9baf128c2fab | 409 | The function sets 4k/64k page parity check |
<> | 132:9baf128c2fab | 410 | |
<> | 132:9baf128c2fab | 411 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 412 | \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED |
<> | 132:9baf128c2fab | 413 | |
<> | 132:9baf128c2fab | 414 | \return 0 |
<> | 132:9baf128c2fab | 415 | */ |
<> | 132:9baf128c2fab | 416 | __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit) |
<> | 132:9baf128c2fab | 417 | { |
<> | 132:9baf128c2fab | 418 | *descriptor_l1 &= SECTION_P_MASK; |
<> | 132:9baf128c2fab | 419 | *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT); |
<> | 132:9baf128c2fab | 420 | return 0; |
<> | 132:9baf128c2fab | 421 | } |
<> | 132:9baf128c2fab | 422 | |
<> | 132:9baf128c2fab | 423 | /** \brief Set 4k/64k page access privileges |
<> | 132:9baf128c2fab | 424 | |
<> | 132:9baf128c2fab | 425 | The function sets 4k/64k page access privileges |
<> | 132:9baf128c2fab | 426 | |
<> | 132:9baf128c2fab | 427 | \param [out] descriptor_l2 L2 descriptor. |
<> | 132:9baf128c2fab | 428 | \param [in] user User Level Access: NO_ACCESS, RW, READ |
<> | 132:9baf128c2fab | 429 | \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ |
<> | 132:9baf128c2fab | 430 | \param [in] afe Access flag enable |
<> | 132:9baf128c2fab | 431 | |
<> | 132:9baf128c2fab | 432 | \return 0 |
<> | 132:9baf128c2fab | 433 | */ |
<> | 132:9baf128c2fab | 434 | __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe) |
<> | 132:9baf128c2fab | 435 | { |
<> | 132:9baf128c2fab | 436 | uint32_t ap = 0; |
<> | 132:9baf128c2fab | 437 | |
<> | 132:9baf128c2fab | 438 | if (afe == 0) { //full access |
<> | 132:9baf128c2fab | 439 | if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; } |
<> | 132:9baf128c2fab | 440 | else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } |
<> | 132:9baf128c2fab | 441 | else if ((priv == RW) && (user == READ)) { ap = 0x2; } |
<> | 132:9baf128c2fab | 442 | else if ((priv == RW) && (user == RW)) { ap = 0x3; } |
<> | 132:9baf128c2fab | 443 | else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } |
<> | 132:9baf128c2fab | 444 | else if ((priv == READ) && (user == READ)) { ap = 0x6; } |
<> | 132:9baf128c2fab | 445 | } |
<> | 132:9baf128c2fab | 446 | |
<> | 132:9baf128c2fab | 447 | else { //Simplified access |
<> | 132:9baf128c2fab | 448 | if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; } |
<> | 132:9baf128c2fab | 449 | else if ((priv == RW) && (user == RW)) { ap = 0x3; } |
<> | 132:9baf128c2fab | 450 | else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; } |
<> | 132:9baf128c2fab | 451 | else if ((priv == READ) && (user == READ)) { ap = 0x7; } |
<> | 132:9baf128c2fab | 452 | } |
<> | 132:9baf128c2fab | 453 | |
<> | 132:9baf128c2fab | 454 | *descriptor_l2 &= PAGE_AP_MASK; |
<> | 132:9baf128c2fab | 455 | *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT; |
<> | 132:9baf128c2fab | 456 | *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT; |
<> | 132:9baf128c2fab | 457 | |
<> | 132:9baf128c2fab | 458 | return 0; |
<> | 132:9baf128c2fab | 459 | } |
<> | 132:9baf128c2fab | 460 | |
<> | 132:9baf128c2fab | 461 | /** \brief Set 4k/64k page shareability |
<> | 132:9baf128c2fab | 462 | |
<> | 132:9baf128c2fab | 463 | The function sets 4k/64k page shareability |
<> | 132:9baf128c2fab | 464 | |
<> | 132:9baf128c2fab | 465 | \param [out] descriptor_l2 L2 descriptor. |
<> | 132:9baf128c2fab | 466 | \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED |
<> | 132:9baf128c2fab | 467 | |
<> | 132:9baf128c2fab | 468 | \return 0 |
<> | 132:9baf128c2fab | 469 | */ |
<> | 132:9baf128c2fab | 470 | __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit) |
<> | 132:9baf128c2fab | 471 | { |
<> | 132:9baf128c2fab | 472 | *descriptor_l2 &= PAGE_S_MASK; |
<> | 132:9baf128c2fab | 473 | *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT); |
<> | 132:9baf128c2fab | 474 | return 0; |
<> | 132:9baf128c2fab | 475 | } |
<> | 132:9baf128c2fab | 476 | |
<> | 132:9baf128c2fab | 477 | /** \brief Set 4k/64k page Global attribute |
<> | 132:9baf128c2fab | 478 | |
<> | 132:9baf128c2fab | 479 | The function sets 4k/64k page Global attribute |
<> | 132:9baf128c2fab | 480 | |
<> | 132:9baf128c2fab | 481 | \param [out] descriptor_l2 L2 descriptor. |
<> | 132:9baf128c2fab | 482 | \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL |
<> | 132:9baf128c2fab | 483 | |
<> | 132:9baf128c2fab | 484 | \return 0 |
<> | 132:9baf128c2fab | 485 | */ |
<> | 132:9baf128c2fab | 486 | __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit) |
<> | 132:9baf128c2fab | 487 | { |
<> | 132:9baf128c2fab | 488 | *descriptor_l2 &= PAGE_NG_MASK; |
<> | 132:9baf128c2fab | 489 | *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT); |
<> | 132:9baf128c2fab | 490 | return 0; |
<> | 132:9baf128c2fab | 491 | } |
<> | 132:9baf128c2fab | 492 | |
<> | 132:9baf128c2fab | 493 | /** \brief Set 4k/64k page Security attribute |
<> | 132:9baf128c2fab | 494 | |
<> | 132:9baf128c2fab | 495 | The function sets 4k/64k page Global attribute |
<> | 132:9baf128c2fab | 496 | |
<> | 132:9baf128c2fab | 497 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 498 | \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE |
<> | 132:9baf128c2fab | 499 | |
<> | 132:9baf128c2fab | 500 | \return 0 |
<> | 132:9baf128c2fab | 501 | */ |
<> | 132:9baf128c2fab | 502 | __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit) |
<> | 132:9baf128c2fab | 503 | { |
<> | 132:9baf128c2fab | 504 | *descriptor_l1 &= PAGE_NS_MASK; |
<> | 132:9baf128c2fab | 505 | *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT); |
<> | 132:9baf128c2fab | 506 | return 0; |
<> | 132:9baf128c2fab | 507 | } |
<> | 132:9baf128c2fab | 508 | |
<> | 132:9baf128c2fab | 509 | |
<> | 132:9baf128c2fab | 510 | /** \brief Set Section memory attributes |
<> | 132:9baf128c2fab | 511 | |
<> | 132:9baf128c2fab | 512 | The function sets section memory attributes |
<> | 132:9baf128c2fab | 513 | |
<> | 132:9baf128c2fab | 514 | \param [out] descriptor_l1 L1 descriptor. |
<> | 132:9baf128c2fab | 515 | \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED |
<> | 132:9baf128c2fab | 516 | \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, |
<> | 132:9baf128c2fab | 517 | \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, |
<> | 132:9baf128c2fab | 518 | |
<> | 132:9baf128c2fab | 519 | \return 0 |
<> | 132:9baf128c2fab | 520 | */ |
<> | 132:9baf128c2fab | 521 | __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner) |
<> | 132:9baf128c2fab | 522 | { |
<> | 132:9baf128c2fab | 523 | *descriptor_l1 &= SECTION_TEXCB_MASK; |
<> | 132:9baf128c2fab | 524 | |
<> | 132:9baf128c2fab | 525 | if (STRONGLY_ORDERED == mem) |
<> | 132:9baf128c2fab | 526 | { |
<> | 132:9baf128c2fab | 527 | return 0; |
<> | 132:9baf128c2fab | 528 | } |
<> | 132:9baf128c2fab | 529 | else if (SHARED_DEVICE == mem) |
<> | 132:9baf128c2fab | 530 | { |
<> | 132:9baf128c2fab | 531 | *descriptor_l1 |= (1 << SECTION_B_SHIFT); |
<> | 132:9baf128c2fab | 532 | } |
<> | 132:9baf128c2fab | 533 | else if (NON_SHARED_DEVICE == mem) |
<> | 132:9baf128c2fab | 534 | { |
<> | 132:9baf128c2fab | 535 | *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT); |
<> | 132:9baf128c2fab | 536 | } |
<> | 132:9baf128c2fab | 537 | else if (NORMAL == mem) |
<> | 132:9baf128c2fab | 538 | { |
<> | 132:9baf128c2fab | 539 | *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT; |
<> | 132:9baf128c2fab | 540 | switch(inner) |
<> | 132:9baf128c2fab | 541 | { |
<> | 132:9baf128c2fab | 542 | case NON_CACHEABLE: |
<> | 132:9baf128c2fab | 543 | break; |
<> | 132:9baf128c2fab | 544 | case WB_WA: |
<> | 132:9baf128c2fab | 545 | *descriptor_l1 |= (1 << SECTION_B_SHIFT); |
<> | 132:9baf128c2fab | 546 | break; |
<> | 132:9baf128c2fab | 547 | case WT: |
<> | 132:9baf128c2fab | 548 | *descriptor_l1 |= 1 << SECTION_C_SHIFT; |
<> | 132:9baf128c2fab | 549 | break; |
<> | 132:9baf128c2fab | 550 | case WB_NO_WA: |
<> | 132:9baf128c2fab | 551 | *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT); |
<> | 132:9baf128c2fab | 552 | break; |
<> | 132:9baf128c2fab | 553 | } |
<> | 132:9baf128c2fab | 554 | switch(outer) |
<> | 132:9baf128c2fab | 555 | { |
<> | 132:9baf128c2fab | 556 | case NON_CACHEABLE: |
<> | 132:9baf128c2fab | 557 | break; |
<> | 132:9baf128c2fab | 558 | case WB_WA: |
<> | 132:9baf128c2fab | 559 | *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT); |
<> | 132:9baf128c2fab | 560 | break; |
<> | 132:9baf128c2fab | 561 | case WT: |
<> | 132:9baf128c2fab | 562 | *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT; |
<> | 132:9baf128c2fab | 563 | break; |
<> | 132:9baf128c2fab | 564 | case WB_NO_WA: |
<> | 132:9baf128c2fab | 565 | *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT); |
<> | 132:9baf128c2fab | 566 | break; |
<> | 132:9baf128c2fab | 567 | } |
<> | 132:9baf128c2fab | 568 | } |
<> | 132:9baf128c2fab | 569 | |
<> | 132:9baf128c2fab | 570 | return 0; |
<> | 132:9baf128c2fab | 571 | } |
<> | 132:9baf128c2fab | 572 | |
<> | 132:9baf128c2fab | 573 | /** \brief Set 4k/64k page memory attributes |
<> | 132:9baf128c2fab | 574 | |
<> | 132:9baf128c2fab | 575 | The function sets 4k/64k page memory attributes |
<> | 132:9baf128c2fab | 576 | |
<> | 132:9baf128c2fab | 577 | \param [out] descriptor_l2 L2 descriptor. |
<> | 132:9baf128c2fab | 578 | \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED |
<> | 132:9baf128c2fab | 579 | \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, |
<> | 132:9baf128c2fab | 580 | \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA, |
<> | 132:9baf128c2fab | 581 | |
<> | 132:9baf128c2fab | 582 | \return 0 |
<> | 132:9baf128c2fab | 583 | */ |
<> | 132:9baf128c2fab | 584 | __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page) |
<> | 132:9baf128c2fab | 585 | { |
<> | 132:9baf128c2fab | 586 | *descriptor_l2 &= PAGE_4K_TEXCB_MASK; |
<> | 132:9baf128c2fab | 587 | |
<> | 132:9baf128c2fab | 588 | if (page == PAGE_64k) |
<> | 132:9baf128c2fab | 589 | { |
<> | 132:9baf128c2fab | 590 | //same as section |
<> | 132:9baf128c2fab | 591 | __memory_section(descriptor_l2, mem, outer, inner); |
<> | 132:9baf128c2fab | 592 | } |
<> | 132:9baf128c2fab | 593 | else |
<> | 132:9baf128c2fab | 594 | { |
<> | 132:9baf128c2fab | 595 | if (STRONGLY_ORDERED == mem) |
<> | 132:9baf128c2fab | 596 | { |
<> | 132:9baf128c2fab | 597 | return 0; |
<> | 132:9baf128c2fab | 598 | } |
<> | 132:9baf128c2fab | 599 | else if (SHARED_DEVICE == mem) |
<> | 132:9baf128c2fab | 600 | { |
<> | 132:9baf128c2fab | 601 | *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT); |
<> | 132:9baf128c2fab | 602 | } |
<> | 132:9baf128c2fab | 603 | else if (NON_SHARED_DEVICE == mem) |
<> | 132:9baf128c2fab | 604 | { |
<> | 132:9baf128c2fab | 605 | *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT); |
<> | 132:9baf128c2fab | 606 | } |
<> | 132:9baf128c2fab | 607 | else if (NORMAL == mem) |
<> | 132:9baf128c2fab | 608 | { |
<> | 132:9baf128c2fab | 609 | *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT; |
<> | 132:9baf128c2fab | 610 | switch(inner) |
<> | 132:9baf128c2fab | 611 | { |
<> | 132:9baf128c2fab | 612 | case NON_CACHEABLE: |
<> | 132:9baf128c2fab | 613 | break; |
<> | 132:9baf128c2fab | 614 | case WB_WA: |
<> | 132:9baf128c2fab | 615 | *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT); |
<> | 132:9baf128c2fab | 616 | break; |
<> | 132:9baf128c2fab | 617 | case WT: |
<> | 132:9baf128c2fab | 618 | *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT; |
<> | 132:9baf128c2fab | 619 | break; |
<> | 132:9baf128c2fab | 620 | case WB_NO_WA: |
<> | 132:9baf128c2fab | 621 | *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT); |
<> | 132:9baf128c2fab | 622 | break; |
<> | 132:9baf128c2fab | 623 | } |
<> | 132:9baf128c2fab | 624 | switch(outer) |
<> | 132:9baf128c2fab | 625 | { |
<> | 132:9baf128c2fab | 626 | case NON_CACHEABLE: |
<> | 132:9baf128c2fab | 627 | break; |
<> | 132:9baf128c2fab | 628 | case WB_WA: |
<> | 132:9baf128c2fab | 629 | *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT); |
<> | 132:9baf128c2fab | 630 | break; |
<> | 132:9baf128c2fab | 631 | case WT: |
<> | 132:9baf128c2fab | 632 | *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT; |
<> | 132:9baf128c2fab | 633 | break; |
<> | 132:9baf128c2fab | 634 | case WB_NO_WA: |
<> | 132:9baf128c2fab | 635 | *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT); |
<> | 132:9baf128c2fab | 636 | break; |
<> | 132:9baf128c2fab | 637 | } |
<> | 132:9baf128c2fab | 638 | } |
<> | 132:9baf128c2fab | 639 | } |
<> | 132:9baf128c2fab | 640 | |
<> | 132:9baf128c2fab | 641 | return 0; |
<> | 132:9baf128c2fab | 642 | } |
<> | 132:9baf128c2fab | 643 | |
<> | 132:9baf128c2fab | 644 | /** \brief Create a L1 section descriptor |
<> | 132:9baf128c2fab | 645 | |
<> | 132:9baf128c2fab | 646 | The function creates a section descriptor. |
<> | 132:9baf128c2fab | 647 | |
<> | 132:9baf128c2fab | 648 | Assumptions: |
<> | 132:9baf128c2fab | 649 | - 16MB super sections not supported |
<> | 132:9baf128c2fab | 650 | - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor |
<> | 132:9baf128c2fab | 651 | - Functions always return 0 |
<> | 132:9baf128c2fab | 652 | |
<> | 132:9baf128c2fab | 653 | \param [out] descriptor L1 descriptor |
<> | 132:9baf128c2fab | 654 | \param [out] descriptor2 L2 descriptor |
<> | 132:9baf128c2fab | 655 | \param [in] reg Section attributes |
<> | 132:9baf128c2fab | 656 | |
<> | 132:9baf128c2fab | 657 | \return 0 |
<> | 132:9baf128c2fab | 658 | */ |
<> | 132:9baf128c2fab | 659 | __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg) |
<> | 132:9baf128c2fab | 660 | { |
<> | 132:9baf128c2fab | 661 | *descriptor = 0; |
<> | 132:9baf128c2fab | 662 | |
<> | 132:9baf128c2fab | 663 | __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t); |
<> | 132:9baf128c2fab | 664 | __xn_section(descriptor,reg.xn_t); |
<> | 132:9baf128c2fab | 665 | __domain_section(descriptor, reg.domain); |
<> | 132:9baf128c2fab | 666 | __p_section(descriptor, reg.e_t); |
<> | 132:9baf128c2fab | 667 | __ap_section(descriptor, reg.priv_t, reg.user_t, 1); |
<> | 132:9baf128c2fab | 668 | __shared_section(descriptor,reg.sh_t); |
<> | 132:9baf128c2fab | 669 | __global_section(descriptor,reg.g_t); |
<> | 132:9baf128c2fab | 670 | __secure_section(descriptor,reg.sec_t); |
<> | 132:9baf128c2fab | 671 | *descriptor &= SECTION_MASK; |
<> | 132:9baf128c2fab | 672 | *descriptor |= SECTION_DESCRIPTOR; |
<> | 132:9baf128c2fab | 673 | |
<> | 132:9baf128c2fab | 674 | return 0; |
<> | 132:9baf128c2fab | 675 | |
<> | 132:9baf128c2fab | 676 | } |
<> | 132:9baf128c2fab | 677 | |
<> | 132:9baf128c2fab | 678 | |
<> | 132:9baf128c2fab | 679 | /** \brief Create a L1 and L2 4k/64k page descriptor |
<> | 132:9baf128c2fab | 680 | |
<> | 132:9baf128c2fab | 681 | The function creates a 4k/64k page descriptor. |
<> | 132:9baf128c2fab | 682 | Assumptions: |
<> | 132:9baf128c2fab | 683 | - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor |
<> | 132:9baf128c2fab | 684 | - Functions always return 0 |
<> | 132:9baf128c2fab | 685 | |
<> | 132:9baf128c2fab | 686 | \param [out] descriptor L1 descriptor |
<> | 132:9baf128c2fab | 687 | \param [out] descriptor2 L2 descriptor |
<> | 132:9baf128c2fab | 688 | \param [in] reg 4k/64k page attributes |
<> | 132:9baf128c2fab | 689 | |
<> | 132:9baf128c2fab | 690 | \return 0 |
<> | 132:9baf128c2fab | 691 | */ |
<> | 132:9baf128c2fab | 692 | __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg) |
<> | 132:9baf128c2fab | 693 | { |
<> | 132:9baf128c2fab | 694 | *descriptor = 0; |
<> | 132:9baf128c2fab | 695 | *descriptor2 = 0; |
<> | 132:9baf128c2fab | 696 | |
<> | 132:9baf128c2fab | 697 | switch (reg.rg_t) |
<> | 132:9baf128c2fab | 698 | { |
<> | 132:9baf128c2fab | 699 | case PAGE_4k: |
<> | 132:9baf128c2fab | 700 | __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k); |
<> | 132:9baf128c2fab | 701 | __xn_page(descriptor2, reg.xn_t, PAGE_4k); |
<> | 132:9baf128c2fab | 702 | __domain_page(descriptor, reg.domain); |
<> | 132:9baf128c2fab | 703 | __p_page(descriptor, reg.e_t); |
<> | 132:9baf128c2fab | 704 | __ap_page(descriptor2, reg.priv_t, reg.user_t, 1); |
<> | 132:9baf128c2fab | 705 | __shared_page(descriptor2,reg.sh_t); |
<> | 132:9baf128c2fab | 706 | __global_page(descriptor2,reg.g_t); |
<> | 132:9baf128c2fab | 707 | __secure_page(descriptor,reg.sec_t); |
<> | 132:9baf128c2fab | 708 | *descriptor &= PAGE_L1_MASK; |
<> | 132:9baf128c2fab | 709 | *descriptor |= PAGE_L1_DESCRIPTOR; |
<> | 132:9baf128c2fab | 710 | *descriptor2 &= PAGE_L2_4K_MASK; |
<> | 132:9baf128c2fab | 711 | *descriptor2 |= PAGE_L2_4K_DESC; |
<> | 132:9baf128c2fab | 712 | break; |
<> | 132:9baf128c2fab | 713 | |
<> | 132:9baf128c2fab | 714 | case PAGE_64k: |
<> | 132:9baf128c2fab | 715 | __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k); |
<> | 132:9baf128c2fab | 716 | __xn_page(descriptor2, reg.xn_t, PAGE_64k); |
<> | 132:9baf128c2fab | 717 | __domain_page(descriptor, reg.domain); |
<> | 132:9baf128c2fab | 718 | __p_page(descriptor, reg.e_t); |
<> | 132:9baf128c2fab | 719 | __ap_page(descriptor2, reg.priv_t, reg.user_t, 1); |
<> | 132:9baf128c2fab | 720 | __shared_page(descriptor2,reg.sh_t); |
<> | 132:9baf128c2fab | 721 | __global_page(descriptor2,reg.g_t); |
<> | 132:9baf128c2fab | 722 | __secure_page(descriptor,reg.sec_t); |
<> | 132:9baf128c2fab | 723 | *descriptor &= PAGE_L1_MASK; |
<> | 132:9baf128c2fab | 724 | *descriptor |= PAGE_L1_DESCRIPTOR; |
<> | 132:9baf128c2fab | 725 | *descriptor2 &= PAGE_L2_64K_MASK; |
<> | 132:9baf128c2fab | 726 | *descriptor2 |= PAGE_L2_64K_DESC; |
<> | 132:9baf128c2fab | 727 | break; |
<> | 132:9baf128c2fab | 728 | |
<> | 132:9baf128c2fab | 729 | case SECTION: |
<> | 132:9baf128c2fab | 730 | //error |
<> | 132:9baf128c2fab | 731 | break; |
<> | 132:9baf128c2fab | 732 | |
<> | 132:9baf128c2fab | 733 | } |
<> | 132:9baf128c2fab | 734 | |
<> | 132:9baf128c2fab | 735 | return 0; |
<> | 132:9baf128c2fab | 736 | |
<> | 132:9baf128c2fab | 737 | } |
<> | 132:9baf128c2fab | 738 | |
<> | 132:9baf128c2fab | 739 | /** \brief Create a 1MB Section |
<> | 132:9baf128c2fab | 740 | |
<> | 132:9baf128c2fab | 741 | \param [in] ttb Translation table base address |
<> | 132:9baf128c2fab | 742 | \param [in] base_address Section base address |
<> | 132:9baf128c2fab | 743 | \param [in] count Number of sections to create |
<> | 132:9baf128c2fab | 744 | \param [in] descriptor_l1 L1 descriptor (region attributes) |
<> | 132:9baf128c2fab | 745 | |
<> | 132:9baf128c2fab | 746 | */ |
<> | 132:9baf128c2fab | 747 | __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1) |
<> | 132:9baf128c2fab | 748 | { |
<> | 132:9baf128c2fab | 749 | uint32_t offset; |
<> | 132:9baf128c2fab | 750 | uint32_t entry; |
<> | 132:9baf128c2fab | 751 | uint32_t i; |
<> | 132:9baf128c2fab | 752 | |
<> | 132:9baf128c2fab | 753 | offset = base_address >> 20; |
<> | 132:9baf128c2fab | 754 | entry = (base_address & 0xFFF00000) | descriptor_l1; |
<> | 132:9baf128c2fab | 755 | |
<> | 132:9baf128c2fab | 756 | //4 bytes aligned |
<> | 132:9baf128c2fab | 757 | ttb = ttb + offset; |
<> | 132:9baf128c2fab | 758 | |
<> | 132:9baf128c2fab | 759 | for (i = 0; i < count; i++ ) |
<> | 132:9baf128c2fab | 760 | { |
<> | 132:9baf128c2fab | 761 | //4 bytes aligned |
<> | 132:9baf128c2fab | 762 | *ttb++ = entry; |
<> | 132:9baf128c2fab | 763 | entry += OFFSET_1M; |
<> | 132:9baf128c2fab | 764 | } |
<> | 132:9baf128c2fab | 765 | } |
<> | 132:9baf128c2fab | 766 | |
<> | 132:9baf128c2fab | 767 | /** \brief Create a 4k page entry |
<> | 132:9baf128c2fab | 768 | |
<> | 132:9baf128c2fab | 769 | \param [in] ttb L1 table base address |
<> | 132:9baf128c2fab | 770 | \param [in] base_address 4k base address |
<> | 132:9baf128c2fab | 771 | \param [in] count Number of 4k pages to create |
<> | 132:9baf128c2fab | 772 | \param [in] descriptor_l1 L1 descriptor (region attributes) |
<> | 132:9baf128c2fab | 773 | \param [in] ttb_l2 L2 table base address |
<> | 132:9baf128c2fab | 774 | \param [in] descriptor_l2 L2 descriptor (region attributes) |
<> | 132:9baf128c2fab | 775 | |
<> | 132:9baf128c2fab | 776 | */ |
<> | 132:9baf128c2fab | 777 | __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 ) |
<> | 132:9baf128c2fab | 778 | { |
<> | 132:9baf128c2fab | 779 | |
<> | 132:9baf128c2fab | 780 | uint32_t offset, offset2; |
<> | 132:9baf128c2fab | 781 | uint32_t entry, entry2; |
<> | 132:9baf128c2fab | 782 | uint32_t i; |
<> | 132:9baf128c2fab | 783 | |
<> | 132:9baf128c2fab | 784 | |
<> | 132:9baf128c2fab | 785 | offset = base_address >> 20; |
<> | 132:9baf128c2fab | 786 | entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1; |
<> | 132:9baf128c2fab | 787 | |
<> | 132:9baf128c2fab | 788 | //4 bytes aligned |
<> | 132:9baf128c2fab | 789 | ttb += offset; |
<> | 132:9baf128c2fab | 790 | //create l1_entry |
<> | 132:9baf128c2fab | 791 | *ttb = entry; |
<> | 132:9baf128c2fab | 792 | |
<> | 132:9baf128c2fab | 793 | offset2 = (base_address & 0xff000) >> 12; |
<> | 132:9baf128c2fab | 794 | ttb_l2 += offset2; |
<> | 132:9baf128c2fab | 795 | entry2 = (base_address & 0xFFFFF000) | descriptor_l2; |
<> | 132:9baf128c2fab | 796 | for (i = 0; i < count; i++ ) |
<> | 132:9baf128c2fab | 797 | { |
<> | 132:9baf128c2fab | 798 | //4 bytes aligned |
<> | 132:9baf128c2fab | 799 | *ttb_l2++ = entry2; |
<> | 132:9baf128c2fab | 800 | entry2 += OFFSET_4K; |
<> | 132:9baf128c2fab | 801 | } |
<> | 132:9baf128c2fab | 802 | } |
<> | 132:9baf128c2fab | 803 | |
<> | 132:9baf128c2fab | 804 | /** \brief Create a 64k page entry |
<> | 132:9baf128c2fab | 805 | |
<> | 132:9baf128c2fab | 806 | \param [in] ttb L1 table base address |
<> | 132:9baf128c2fab | 807 | \param [in] base_address 64k base address |
<> | 132:9baf128c2fab | 808 | \param [in] count Number of 64k pages to create |
<> | 132:9baf128c2fab | 809 | \param [in] descriptor_l1 L1 descriptor (region attributes) |
<> | 132:9baf128c2fab | 810 | \param [in] ttb_l2 L2 table base address |
<> | 132:9baf128c2fab | 811 | \param [in] descriptor_l2 L2 descriptor (region attributes) |
<> | 132:9baf128c2fab | 812 | |
<> | 132:9baf128c2fab | 813 | */ |
<> | 132:9baf128c2fab | 814 | __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 ) |
<> | 132:9baf128c2fab | 815 | { |
<> | 132:9baf128c2fab | 816 | uint32_t offset, offset2; |
<> | 132:9baf128c2fab | 817 | uint32_t entry, entry2; |
<> | 132:9baf128c2fab | 818 | uint32_t i,j; |
<> | 132:9baf128c2fab | 819 | |
<> | 132:9baf128c2fab | 820 | |
<> | 132:9baf128c2fab | 821 | offset = base_address >> 20; |
<> | 132:9baf128c2fab | 822 | entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1; |
<> | 132:9baf128c2fab | 823 | |
<> | 132:9baf128c2fab | 824 | //4 bytes aligned |
<> | 132:9baf128c2fab | 825 | ttb += offset; |
<> | 132:9baf128c2fab | 826 | //create l1_entry |
<> | 132:9baf128c2fab | 827 | *ttb = entry; |
<> | 132:9baf128c2fab | 828 | |
<> | 132:9baf128c2fab | 829 | offset2 = (base_address & 0xff000) >> 12; |
<> | 132:9baf128c2fab | 830 | ttb_l2 += offset2; |
<> | 132:9baf128c2fab | 831 | entry2 = (base_address & 0xFFFF0000) | descriptor_l2; |
<> | 132:9baf128c2fab | 832 | for (i = 0; i < count; i++ ) |
<> | 132:9baf128c2fab | 833 | { |
<> | 132:9baf128c2fab | 834 | //create 16 entries |
<> | 132:9baf128c2fab | 835 | for (j = 0; j < 16; j++) |
<> | 132:9baf128c2fab | 836 | //4 bytes aligned |
<> | 132:9baf128c2fab | 837 | *ttb_l2++ = entry2; |
<> | 132:9baf128c2fab | 838 | entry2 += OFFSET_64K; |
<> | 132:9baf128c2fab | 839 | } |
<> | 132:9baf128c2fab | 840 | } |
<> | 132:9baf128c2fab | 841 | |
<> | 132:9baf128c2fab | 842 | /*@} end of MMU_Functions */ |
<> | 132:9baf128c2fab | 843 | #endif |
<> | 132:9baf128c2fab | 844 | |
<> | 132:9baf128c2fab | 845 | #ifdef __cplusplus |
<> | 132:9baf128c2fab | 846 | } |
<> | 132:9baf128c2fab | 847 | #endif |