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TARGET_UBLOX_C027/PeripheralNames.h@77:869cf507173a, 2014-02-14 (annotated)

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Release 77 of the mbed library



Main changes:

* Add target NUCLEO_F030R8

* Add target NUCLEO_F401RE

* Add target NUCLEO_F103RB

* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /* mbed Microcontroller Library
emilmont 77:869cf507173a 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 77:869cf507173a 3 *
emilmont 77:869cf507173a 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 77:869cf507173a 5 * you may not use this file except in compliance with the License.
emilmont 77:869cf507173a 6 * You may obtain a copy of the License at
emilmont 77:869cf507173a 7 *
emilmont 77:869cf507173a 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 77:869cf507173a 9 *
emilmont 77:869cf507173a 10 * Unless required by applicable law or agreed to in writing, software
emilmont 77:869cf507173a 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 77:869cf507173a 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 77:869cf507173a 13 * See the License for the specific language governing permissions and
emilmont 77:869cf507173a 14 * limitations under the License.
emilmont 77:869cf507173a 15 */
emilmont 77:869cf507173a 16 #ifndef MBED_PERIPHERALNAMES_H
emilmont 77:869cf507173a 17 #define MBED_PERIPHERALNAMES_H
emilmont 77:869cf507173a 18
emilmont 77:869cf507173a 19 #include "cmsis.h"
emilmont 77:869cf507173a 20 #include "PinNames.h"
emilmont 77:869cf507173a 21
emilmont 77:869cf507173a 22 #ifdef __cplusplus
emilmont 77:869cf507173a 23 extern "C" {
emilmont 77:869cf507173a 24 #endif
emilmont 77:869cf507173a 25
emilmont 77:869cf507173a 26 typedef enum {
emilmont 77:869cf507173a 27 UART_0 = (int)LPC_UART0_BASE,
emilmont 77:869cf507173a 28 UART_1 = (int)LPC_UART1_BASE,
emilmont 77:869cf507173a 29 UART_2 = (int)LPC_UART2_BASE,
emilmont 77:869cf507173a 30 UART_3 = (int)LPC_UART3_BASE
emilmont 77:869cf507173a 31 } UARTName;
emilmont 77:869cf507173a 32
emilmont 77:869cf507173a 33 typedef enum {
emilmont 77:869cf507173a 34 ADC0_0 = 0,
emilmont 77:869cf507173a 35 ADC0_1,
emilmont 77:869cf507173a 36 ADC0_2,
emilmont 77:869cf507173a 37 ADC0_3,
emilmont 77:869cf507173a 38 ADC0_4,
emilmont 77:869cf507173a 39 ADC0_5,
emilmont 77:869cf507173a 40 ADC0_6,
emilmont 77:869cf507173a 41 ADC0_7
emilmont 77:869cf507173a 42 } ADCName;
emilmont 77:869cf507173a 43
emilmont 77:869cf507173a 44 typedef enum {
emilmont 77:869cf507173a 45 DAC_0 = 0
emilmont 77:869cf507173a 46 } DACName;
emilmont 77:869cf507173a 47
emilmont 77:869cf507173a 48 typedef enum {
emilmont 77:869cf507173a 49 SPI_0 = (int)LPC_SSP0_BASE,
emilmont 77:869cf507173a 50 SPI_1 = (int)LPC_SSP1_BASE
emilmont 77:869cf507173a 51 } SPIName;
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 typedef enum {
emilmont 77:869cf507173a 54 I2C_0 = (int)LPC_I2C0_BASE,
emilmont 77:869cf507173a 55 I2C_1 = (int)LPC_I2C1_BASE,
emilmont 77:869cf507173a 56 I2C_2 = (int)LPC_I2C2_BASE
emilmont 77:869cf507173a 57 } I2CName;
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 typedef enum {
emilmont 77:869cf507173a 60 PWM_1 = 1,
emilmont 77:869cf507173a 61 PWM_2,
emilmont 77:869cf507173a 62 PWM_3,
emilmont 77:869cf507173a 63 PWM_4,
emilmont 77:869cf507173a 64 PWM_5,
emilmont 77:869cf507173a 65 PWM_6
emilmont 77:869cf507173a 66 } PWMName;
emilmont 77:869cf507173a 67
emilmont 77:869cf507173a 68 typedef enum {
emilmont 77:869cf507173a 69 CAN_1 = (int)LPC_CAN1_BASE,
emilmont 77:869cf507173a 70 CAN_2 = (int)LPC_CAN2_BASE
emilmont 77:869cf507173a 71 } CANName;
emilmont 77:869cf507173a 72
emilmont 77:869cf507173a 73 #define STDIO_UART_TX USBTX
emilmont 77:869cf507173a 74 #define STDIO_UART_RX USBRX
emilmont 77:869cf507173a 75 #define STDIO_UART UART_0
emilmont 77:869cf507173a 76
emilmont 77:869cf507173a 77 // Default peripherals
emilmont 77:869cf507173a 78 #define MBED_SPI0 p5, p6, p7, p8
emilmont 77:869cf507173a 79 #define MBED_SPI1 p11, p12, p13, p14
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 #define MBED_UART0 p9, p10
emilmont 77:869cf507173a 82 #define MBED_UART1 p13, p14
emilmont 77:869cf507173a 83 #define MBED_UART2 p28, p27
emilmont 77:869cf507173a 84 #define MBED_UARTUSB USBTX, USBRX
emilmont 77:869cf507173a 85
emilmont 77:869cf507173a 86 #define MBED_I2C0 p28, p27
emilmont 77:869cf507173a 87 #define MBED_I2C1 p9, p10
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 #define MBED_CAN0 p30, p29
emilmont 77:869cf507173a 90
emilmont 77:869cf507173a 91 #define MBED_ANALOGOUT0 p18
emilmont 77:869cf507173a 92
emilmont 77:869cf507173a 93 #define MBED_ANALOGIN0 p15
emilmont 77:869cf507173a 94 #define MBED_ANALOGIN1 p16
emilmont 77:869cf507173a 95 #define MBED_ANALOGIN2 p17
emilmont 77:869cf507173a 96 #define MBED_ANALOGIN3 p18
emilmont 77:869cf507173a 97 #define MBED_ANALOGIN4 p19
emilmont 77:869cf507173a 98 #define MBED_ANALOGIN5 p20
emilmont 77:869cf507173a 99
emilmont 77:869cf507173a 100 #define MBED_PWMOUT0 p26
emilmont 77:869cf507173a 101 #define MBED_PWMOUT1 p25
emilmont 77:869cf507173a 102 #define MBED_PWMOUT2 p24
emilmont 77:869cf507173a 103 #define MBED_PWMOUT3 p23
emilmont 77:869cf507173a 104 #define MBED_PWMOUT4 p22
emilmont 77:869cf507173a 105 #define MBED_PWMOUT5 p21
emilmont 77:869cf507173a 106
emilmont 77:869cf507173a 107 #ifdef __cplusplus
emilmont 77:869cf507173a 108 }
emilmont 77:869cf507173a 109 #endif
emilmont 77:869cf507173a 110
emilmont 77:869cf507173a 111 #endif