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TARGET_NUCLEO_F030R8/stm32f0xx_i2c.h@77:869cf507173a, 2014-02-14 (annotated)
- Committer:
- emilmont
- Date:
- Fri Feb 14 14:36:43 2014 +0000
- Revision:
- 77:869cf507173a
- Child:
- 81:7d30d6019079
Release 77 of the mbed library
Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 77:869cf507173a | 1 | /** |
| emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 3 | * @file stm32f0xx_i2c.h |
| emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
| emilmont | 77:869cf507173a | 5 | * @version V1.3.0 |
| emilmont | 77:869cf507173a | 6 | * @date 16-January-2014 |
| emilmont | 77:869cf507173a | 7 | * @brief This file contains all the functions prototypes for the I2C firmware |
| emilmont | 77:869cf507173a | 8 | * library |
| emilmont | 77:869cf507173a | 9 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 10 | * @attention |
| emilmont | 77:869cf507173a | 11 | * |
| emilmont | 77:869cf507173a | 12 | * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
| emilmont | 77:869cf507173a | 13 | * |
| emilmont | 77:869cf507173a | 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
| emilmont | 77:869cf507173a | 15 | * You may not use this file except in compliance with the License. |
| emilmont | 77:869cf507173a | 16 | * You may obtain a copy of the License at: |
| emilmont | 77:869cf507173a | 17 | * |
| emilmont | 77:869cf507173a | 18 | * http://www.st.com/software_license_agreement_liberty_v2 |
| emilmont | 77:869cf507173a | 19 | * |
| emilmont | 77:869cf507173a | 20 | * Unless required by applicable law or agreed to in writing, software |
| emilmont | 77:869cf507173a | 21 | * distributed under the License is distributed on an "AS IS" BASIS, |
| emilmont | 77:869cf507173a | 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| emilmont | 77:869cf507173a | 23 | * See the License for the specific language governing permissions and |
| emilmont | 77:869cf507173a | 24 | * limitations under the License. |
| emilmont | 77:869cf507173a | 25 | * |
| emilmont | 77:869cf507173a | 26 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 27 | */ |
| emilmont | 77:869cf507173a | 28 | |
| emilmont | 77:869cf507173a | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| emilmont | 77:869cf507173a | 30 | #ifndef __STM32F0XX_I2C_H |
| emilmont | 77:869cf507173a | 31 | #define __STM32F0XX_I2C_H |
| emilmont | 77:869cf507173a | 32 | |
| emilmont | 77:869cf507173a | 33 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 34 | extern "C" { |
| emilmont | 77:869cf507173a | 35 | #endif |
| emilmont | 77:869cf507173a | 36 | |
| emilmont | 77:869cf507173a | 37 | /* Includes ------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 38 | #include "stm32f0xx.h" |
| emilmont | 77:869cf507173a | 39 | |
| emilmont | 77:869cf507173a | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver |
| emilmont | 77:869cf507173a | 41 | * @{ |
| emilmont | 77:869cf507173a | 42 | */ |
| emilmont | 77:869cf507173a | 43 | |
| emilmont | 77:869cf507173a | 44 | /** @addtogroup I2C |
| emilmont | 77:869cf507173a | 45 | * @{ |
| emilmont | 77:869cf507173a | 46 | */ |
| emilmont | 77:869cf507173a | 47 | |
| emilmont | 77:869cf507173a | 48 | /* Exported types ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 49 | |
| emilmont | 77:869cf507173a | 50 | /** |
| emilmont | 77:869cf507173a | 51 | * @brief I2C Init structure definition |
| emilmont | 77:869cf507173a | 52 | */ |
| emilmont | 77:869cf507173a | 53 | |
| emilmont | 77:869cf507173a | 54 | typedef struct |
| emilmont | 77:869cf507173a | 55 | { |
| emilmont | 77:869cf507173a | 56 | uint32_t I2C_Timing; /*!< Specifies the I2C_TIMINGR_register value. |
| emilmont | 77:869cf507173a | 57 | This parameter must be set by referring to I2C_Timing_Config_Tool*/ |
| emilmont | 77:869cf507173a | 58 | |
| emilmont | 77:869cf507173a | 59 | uint32_t I2C_AnalogFilter; /*!< Enables or disables analog noise filter. |
| emilmont | 77:869cf507173a | 60 | This parameter can be a value of @ref I2C_Analog_Filter*/ |
| emilmont | 77:869cf507173a | 61 | |
| emilmont | 77:869cf507173a | 62 | uint32_t I2C_DigitalFilter; /*!< Configures the digital noise filter. |
| emilmont | 77:869cf507173a | 63 | This parameter can be a number between 0x00 and 0x0F*/ |
| emilmont | 77:869cf507173a | 64 | |
| emilmont | 77:869cf507173a | 65 | uint32_t I2C_Mode; /*!< Specifies the I2C mode. |
| emilmont | 77:869cf507173a | 66 | This parameter can be a value of @ref I2C_mode*/ |
| emilmont | 77:869cf507173a | 67 | |
| emilmont | 77:869cf507173a | 68 | uint32_t I2C_OwnAddress1; /*!< Specifies the device own address 1. |
| emilmont | 77:869cf507173a | 69 | This parameter can be a 7-bit or 10-bit address*/ |
| emilmont | 77:869cf507173a | 70 | |
| emilmont | 77:869cf507173a | 71 | uint32_t I2C_Ack; /*!< Enables or disables the acknowledgement. |
| emilmont | 77:869cf507173a | 72 | This parameter can be a value of @ref I2C_acknowledgement*/ |
| emilmont | 77:869cf507173a | 73 | |
| emilmont | 77:869cf507173a | 74 | uint32_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged. |
| emilmont | 77:869cf507173a | 75 | This parameter can be a value of @ref I2C_acknowledged_address*/ |
| emilmont | 77:869cf507173a | 76 | }I2C_InitTypeDef; |
| emilmont | 77:869cf507173a | 77 | |
| emilmont | 77:869cf507173a | 78 | /* Exported constants --------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 79 | |
| emilmont | 77:869cf507173a | 80 | |
| emilmont | 77:869cf507173a | 81 | /** @defgroup I2C_Exported_Constants |
| emilmont | 77:869cf507173a | 82 | * @{ |
| emilmont | 77:869cf507173a | 83 | */ |
| emilmont | 77:869cf507173a | 84 | |
| emilmont | 77:869cf507173a | 85 | #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \ |
| emilmont | 77:869cf507173a | 86 | ((PERIPH) == I2C2)) |
| emilmont | 77:869cf507173a | 87 | |
| emilmont | 77:869cf507173a | 88 | #define IS_I2C_1_PERIPH(PERIPH) ((PERIPH) == I2C1) |
| emilmont | 77:869cf507173a | 89 | |
| emilmont | 77:869cf507173a | 90 | /** @defgroup I2C_Analog_Filter |
| emilmont | 77:869cf507173a | 91 | * @{ |
| emilmont | 77:869cf507173a | 92 | */ |
| emilmont | 77:869cf507173a | 93 | |
| emilmont | 77:869cf507173a | 94 | #define I2C_AnalogFilter_Enable ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 95 | #define I2C_AnalogFilter_Disable I2C_CR1_ANFOFF |
| emilmont | 77:869cf507173a | 96 | |
| emilmont | 77:869cf507173a | 97 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_AnalogFilter_Enable) || \ |
| emilmont | 77:869cf507173a | 98 | ((FILTER) == I2C_AnalogFilter_Disable)) |
| emilmont | 77:869cf507173a | 99 | /** |
| emilmont | 77:869cf507173a | 100 | * @} |
| emilmont | 77:869cf507173a | 101 | */ |
| emilmont | 77:869cf507173a | 102 | |
| emilmont | 77:869cf507173a | 103 | /** @defgroup I2C_Digital_Filter |
| emilmont | 77:869cf507173a | 104 | * @{ |
| emilmont | 77:869cf507173a | 105 | */ |
| emilmont | 77:869cf507173a | 106 | |
| emilmont | 77:869cf507173a | 107 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F) |
| emilmont | 77:869cf507173a | 108 | /** |
| emilmont | 77:869cf507173a | 109 | * @} |
| emilmont | 77:869cf507173a | 110 | */ |
| emilmont | 77:869cf507173a | 111 | |
| emilmont | 77:869cf507173a | 112 | /** @defgroup I2C_mode |
| emilmont | 77:869cf507173a | 113 | * @{ |
| emilmont | 77:869cf507173a | 114 | */ |
| emilmont | 77:869cf507173a | 115 | |
| emilmont | 77:869cf507173a | 116 | #define I2C_Mode_I2C ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 117 | #define I2C_Mode_SMBusDevice I2C_CR1_SMBDEN |
| emilmont | 77:869cf507173a | 118 | #define I2C_Mode_SMBusHost I2C_CR1_SMBHEN |
| emilmont | 77:869cf507173a | 119 | |
| emilmont | 77:869cf507173a | 120 | #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \ |
| emilmont | 77:869cf507173a | 121 | ((MODE) == I2C_Mode_SMBusDevice) || \ |
| emilmont | 77:869cf507173a | 122 | ((MODE) == I2C_Mode_SMBusHost)) |
| emilmont | 77:869cf507173a | 123 | /** |
| emilmont | 77:869cf507173a | 124 | * @} |
| emilmont | 77:869cf507173a | 125 | */ |
| emilmont | 77:869cf507173a | 126 | |
| emilmont | 77:869cf507173a | 127 | /** @defgroup I2C_acknowledgement |
| emilmont | 77:869cf507173a | 128 | * @{ |
| emilmont | 77:869cf507173a | 129 | */ |
| emilmont | 77:869cf507173a | 130 | |
| emilmont | 77:869cf507173a | 131 | #define I2C_Ack_Enable ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 132 | #define I2C_Ack_Disable I2C_CR2_NACK |
| emilmont | 77:869cf507173a | 133 | |
| emilmont | 77:869cf507173a | 134 | #define IS_I2C_ACK(ACK) (((ACK) == I2C_Ack_Enable) || \ |
| emilmont | 77:869cf507173a | 135 | ((ACK) == I2C_Ack_Disable)) |
| emilmont | 77:869cf507173a | 136 | /** |
| emilmont | 77:869cf507173a | 137 | * @} |
| emilmont | 77:869cf507173a | 138 | */ |
| emilmont | 77:869cf507173a | 139 | |
| emilmont | 77:869cf507173a | 140 | /** @defgroup I2C_acknowledged_address |
| emilmont | 77:869cf507173a | 141 | * @{ |
| emilmont | 77:869cf507173a | 142 | */ |
| emilmont | 77:869cf507173a | 143 | |
| emilmont | 77:869cf507173a | 144 | #define I2C_AcknowledgedAddress_7bit ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 145 | #define I2C_AcknowledgedAddress_10bit I2C_OAR1_OA1MODE |
| emilmont | 77:869cf507173a | 146 | |
| emilmont | 77:869cf507173a | 147 | #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \ |
| emilmont | 77:869cf507173a | 148 | ((ADDRESS) == I2C_AcknowledgedAddress_10bit)) |
| emilmont | 77:869cf507173a | 149 | /** |
| emilmont | 77:869cf507173a | 150 | * @} |
| emilmont | 77:869cf507173a | 151 | */ |
| emilmont | 77:869cf507173a | 152 | |
| emilmont | 77:869cf507173a | 153 | /** @defgroup I2C_own_address1 |
| emilmont | 77:869cf507173a | 154 | * @{ |
| emilmont | 77:869cf507173a | 155 | */ |
| emilmont | 77:869cf507173a | 156 | |
| emilmont | 77:869cf507173a | 157 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF) |
| emilmont | 77:869cf507173a | 158 | /** |
| emilmont | 77:869cf507173a | 159 | * @} |
| emilmont | 77:869cf507173a | 160 | */ |
| emilmont | 77:869cf507173a | 161 | |
| emilmont | 77:869cf507173a | 162 | /** @defgroup I2C_transfer_direction |
| emilmont | 77:869cf507173a | 163 | * @{ |
| emilmont | 77:869cf507173a | 164 | */ |
| emilmont | 77:869cf507173a | 165 | |
| emilmont | 77:869cf507173a | 166 | #define I2C_Direction_Transmitter ((uint16_t)0x0000) |
| emilmont | 77:869cf507173a | 167 | #define I2C_Direction_Receiver ((uint16_t)0x0400) |
| emilmont | 77:869cf507173a | 168 | |
| emilmont | 77:869cf507173a | 169 | #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \ |
| emilmont | 77:869cf507173a | 170 | ((DIRECTION) == I2C_Direction_Receiver)) |
| emilmont | 77:869cf507173a | 171 | /** |
| emilmont | 77:869cf507173a | 172 | * @} |
| emilmont | 77:869cf507173a | 173 | */ |
| emilmont | 77:869cf507173a | 174 | |
| emilmont | 77:869cf507173a | 175 | /** @defgroup I2C_DMA_transfer_requests |
| emilmont | 77:869cf507173a | 176 | * @{ |
| emilmont | 77:869cf507173a | 177 | */ |
| emilmont | 77:869cf507173a | 178 | |
| emilmont | 77:869cf507173a | 179 | #define I2C_DMAReq_Tx I2C_CR1_TXDMAEN |
| emilmont | 77:869cf507173a | 180 | #define I2C_DMAReq_Rx I2C_CR1_RXDMAEN |
| emilmont | 77:869cf507173a | 181 | |
| emilmont | 77:869cf507173a | 182 | #define IS_I2C_DMA_REQ(REQ) ((((REQ) & (uint32_t)0xFFFF3FFF) == 0x00) && ((REQ) != 0x00)) |
| emilmont | 77:869cf507173a | 183 | /** |
| emilmont | 77:869cf507173a | 184 | * @} |
| emilmont | 77:869cf507173a | 185 | */ |
| emilmont | 77:869cf507173a | 186 | |
| emilmont | 77:869cf507173a | 187 | /** @defgroup I2C_slave_address |
| emilmont | 77:869cf507173a | 188 | * @{ |
| emilmont | 77:869cf507173a | 189 | */ |
| emilmont | 77:869cf507173a | 190 | |
| emilmont | 77:869cf507173a | 191 | #define IS_I2C_SLAVE_ADDRESS(ADDRESS) ((ADDRESS) <= (uint16_t)0x03FF) |
| emilmont | 77:869cf507173a | 192 | /** |
| emilmont | 77:869cf507173a | 193 | * @} |
| emilmont | 77:869cf507173a | 194 | */ |
| emilmont | 77:869cf507173a | 195 | |
| emilmont | 77:869cf507173a | 196 | |
| emilmont | 77:869cf507173a | 197 | /** @defgroup I2C_own_address2 |
| emilmont | 77:869cf507173a | 198 | * @{ |
| emilmont | 77:869cf507173a | 199 | */ |
| emilmont | 77:869cf507173a | 200 | |
| emilmont | 77:869cf507173a | 201 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) |
| emilmont | 77:869cf507173a | 202 | |
| emilmont | 77:869cf507173a | 203 | /** |
| emilmont | 77:869cf507173a | 204 | * @} |
| emilmont | 77:869cf507173a | 205 | */ |
| emilmont | 77:869cf507173a | 206 | |
| emilmont | 77:869cf507173a | 207 | /** @defgroup I2C_own_address2_mask |
| emilmont | 77:869cf507173a | 208 | * @{ |
| emilmont | 77:869cf507173a | 209 | */ |
| emilmont | 77:869cf507173a | 210 | |
| emilmont | 77:869cf507173a | 211 | #define I2C_OA2_NoMask ((uint8_t)0x00) |
| emilmont | 77:869cf507173a | 212 | #define I2C_OA2_Mask01 ((uint8_t)0x01) |
| emilmont | 77:869cf507173a | 213 | #define I2C_OA2_Mask02 ((uint8_t)0x02) |
| emilmont | 77:869cf507173a | 214 | #define I2C_OA2_Mask03 ((uint8_t)0x03) |
| emilmont | 77:869cf507173a | 215 | #define I2C_OA2_Mask04 ((uint8_t)0x04) |
| emilmont | 77:869cf507173a | 216 | #define I2C_OA2_Mask05 ((uint8_t)0x05) |
| emilmont | 77:869cf507173a | 217 | #define I2C_OA2_Mask06 ((uint8_t)0x06) |
| emilmont | 77:869cf507173a | 218 | #define I2C_OA2_Mask07 ((uint8_t)0x07) |
| emilmont | 77:869cf507173a | 219 | |
| emilmont | 77:869cf507173a | 220 | #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NoMask) || \ |
| emilmont | 77:869cf507173a | 221 | ((MASK) == I2C_OA2_Mask01) || \ |
| emilmont | 77:869cf507173a | 222 | ((MASK) == I2C_OA2_Mask02) || \ |
| emilmont | 77:869cf507173a | 223 | ((MASK) == I2C_OA2_Mask03) || \ |
| emilmont | 77:869cf507173a | 224 | ((MASK) == I2C_OA2_Mask04) || \ |
| emilmont | 77:869cf507173a | 225 | ((MASK) == I2C_OA2_Mask05) || \ |
| emilmont | 77:869cf507173a | 226 | ((MASK) == I2C_OA2_Mask06) || \ |
| emilmont | 77:869cf507173a | 227 | ((MASK) == I2C_OA2_Mask07)) |
| emilmont | 77:869cf507173a | 228 | |
| emilmont | 77:869cf507173a | 229 | /** |
| emilmont | 77:869cf507173a | 230 | * @} |
| emilmont | 77:869cf507173a | 231 | */ |
| emilmont | 77:869cf507173a | 232 | |
| emilmont | 77:869cf507173a | 233 | /** @defgroup I2C_timeout |
| emilmont | 77:869cf507173a | 234 | * @{ |
| emilmont | 77:869cf507173a | 235 | */ |
| emilmont | 77:869cf507173a | 236 | |
| emilmont | 77:869cf507173a | 237 | #define IS_I2C_TIMEOUT(TIMEOUT) ((TIMEOUT) <= (uint16_t)0x0FFF) |
| emilmont | 77:869cf507173a | 238 | |
| emilmont | 77:869cf507173a | 239 | /** |
| emilmont | 77:869cf507173a | 240 | * @} |
| emilmont | 77:869cf507173a | 241 | */ |
| emilmont | 77:869cf507173a | 242 | |
| emilmont | 77:869cf507173a | 243 | /** @defgroup I2C_registers |
| emilmont | 77:869cf507173a | 244 | * @{ |
| emilmont | 77:869cf507173a | 245 | */ |
| emilmont | 77:869cf507173a | 246 | |
| emilmont | 77:869cf507173a | 247 | #define I2C_Register_CR1 ((uint8_t)0x00) |
| emilmont | 77:869cf507173a | 248 | #define I2C_Register_CR2 ((uint8_t)0x04) |
| emilmont | 77:869cf507173a | 249 | #define I2C_Register_OAR1 ((uint8_t)0x08) |
| emilmont | 77:869cf507173a | 250 | #define I2C_Register_OAR2 ((uint8_t)0x0C) |
| emilmont | 77:869cf507173a | 251 | #define I2C_Register_TIMINGR ((uint8_t)0x10) |
| emilmont | 77:869cf507173a | 252 | #define I2C_Register_TIMEOUTR ((uint8_t)0x14) |
| emilmont | 77:869cf507173a | 253 | #define I2C_Register_ISR ((uint8_t)0x18) |
| emilmont | 77:869cf507173a | 254 | #define I2C_Register_ICR ((uint8_t)0x1C) |
| emilmont | 77:869cf507173a | 255 | #define I2C_Register_PECR ((uint8_t)0x20) |
| emilmont | 77:869cf507173a | 256 | #define I2C_Register_RXDR ((uint8_t)0x24) |
| emilmont | 77:869cf507173a | 257 | #define I2C_Register_TXDR ((uint8_t)0x28) |
| emilmont | 77:869cf507173a | 258 | |
| emilmont | 77:869cf507173a | 259 | #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \ |
| emilmont | 77:869cf507173a | 260 | ((REGISTER) == I2C_Register_CR2) || \ |
| emilmont | 77:869cf507173a | 261 | ((REGISTER) == I2C_Register_OAR1) || \ |
| emilmont | 77:869cf507173a | 262 | ((REGISTER) == I2C_Register_OAR2) || \ |
| emilmont | 77:869cf507173a | 263 | ((REGISTER) == I2C_Register_TIMINGR) || \ |
| emilmont | 77:869cf507173a | 264 | ((REGISTER) == I2C_Register_TIMEOUTR) || \ |
| emilmont | 77:869cf507173a | 265 | ((REGISTER) == I2C_Register_ISR) || \ |
| emilmont | 77:869cf507173a | 266 | ((REGISTER) == I2C_Register_ICR) || \ |
| emilmont | 77:869cf507173a | 267 | ((REGISTER) == I2C_Register_PECR) || \ |
| emilmont | 77:869cf507173a | 268 | ((REGISTER) == I2C_Register_RXDR) || \ |
| emilmont | 77:869cf507173a | 269 | ((REGISTER) == I2C_Register_TXDR)) |
| emilmont | 77:869cf507173a | 270 | /** |
| emilmont | 77:869cf507173a | 271 | * @} |
| emilmont | 77:869cf507173a | 272 | */ |
| emilmont | 77:869cf507173a | 273 | |
| emilmont | 77:869cf507173a | 274 | /** @defgroup I2C_interrupts_definition |
| emilmont | 77:869cf507173a | 275 | * @{ |
| emilmont | 77:869cf507173a | 276 | */ |
| emilmont | 77:869cf507173a | 277 | |
| emilmont | 77:869cf507173a | 278 | #define I2C_IT_ERRI I2C_CR1_ERRIE |
| emilmont | 77:869cf507173a | 279 | #define I2C_IT_TCI I2C_CR1_TCIE |
| emilmont | 77:869cf507173a | 280 | #define I2C_IT_STOPI I2C_CR1_STOPIE |
| emilmont | 77:869cf507173a | 281 | #define I2C_IT_NACKI I2C_CR1_NACKIE |
| emilmont | 77:869cf507173a | 282 | #define I2C_IT_ADDRI I2C_CR1_ADDRIE |
| emilmont | 77:869cf507173a | 283 | #define I2C_IT_RXI I2C_CR1_RXIE |
| emilmont | 77:869cf507173a | 284 | #define I2C_IT_TXI I2C_CR1_TXIE |
| emilmont | 77:869cf507173a | 285 | |
| emilmont | 77:869cf507173a | 286 | #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint32_t)0xFFFFFF01) == 0x00) && ((IT) != 0x00)) |
| emilmont | 77:869cf507173a | 287 | |
| emilmont | 77:869cf507173a | 288 | /** |
| emilmont | 77:869cf507173a | 289 | * @} |
| emilmont | 77:869cf507173a | 290 | */ |
| emilmont | 77:869cf507173a | 291 | |
| emilmont | 77:869cf507173a | 292 | /** @defgroup I2C_flags_definition |
| emilmont | 77:869cf507173a | 293 | * @{ |
| emilmont | 77:869cf507173a | 294 | */ |
| emilmont | 77:869cf507173a | 295 | |
| emilmont | 77:869cf507173a | 296 | #define I2C_FLAG_TXE I2C_ISR_TXE |
| emilmont | 77:869cf507173a | 297 | #define I2C_FLAG_TXIS I2C_ISR_TXIS |
| emilmont | 77:869cf507173a | 298 | #define I2C_FLAG_RXNE I2C_ISR_RXNE |
| emilmont | 77:869cf507173a | 299 | #define I2C_FLAG_ADDR I2C_ISR_ADDR |
| emilmont | 77:869cf507173a | 300 | #define I2C_FLAG_NACKF I2C_ISR_NACKF |
| emilmont | 77:869cf507173a | 301 | #define I2C_FLAG_STOPF I2C_ISR_STOPF |
| emilmont | 77:869cf507173a | 302 | #define I2C_FLAG_TC I2C_ISR_TC |
| emilmont | 77:869cf507173a | 303 | #define I2C_FLAG_TCR I2C_ISR_TCR |
| emilmont | 77:869cf507173a | 304 | #define I2C_FLAG_BERR I2C_ISR_BERR |
| emilmont | 77:869cf507173a | 305 | #define I2C_FLAG_ARLO I2C_ISR_ARLO |
| emilmont | 77:869cf507173a | 306 | #define I2C_FLAG_OVR I2C_ISR_OVR |
| emilmont | 77:869cf507173a | 307 | #define I2C_FLAG_PECERR I2C_ISR_PECERR |
| emilmont | 77:869cf507173a | 308 | #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
| emilmont | 77:869cf507173a | 309 | #define I2C_FLAG_ALERT I2C_ISR_ALERT |
| emilmont | 77:869cf507173a | 310 | #define I2C_FLAG_BUSY I2C_ISR_BUSY |
| emilmont | 77:869cf507173a | 311 | |
| emilmont | 77:869cf507173a | 312 | #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFF4000) == 0x00) && ((FLAG) != 0x00)) |
| emilmont | 77:869cf507173a | 313 | |
| emilmont | 77:869cf507173a | 314 | #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_TXIS) || \ |
| emilmont | 77:869cf507173a | 315 | ((FLAG) == I2C_FLAG_RXNE) || ((FLAG) == I2C_FLAG_ADDR) || \ |
| emilmont | 77:869cf507173a | 316 | ((FLAG) == I2C_FLAG_NACKF) || ((FLAG) == I2C_FLAG_STOPF) || \ |
| emilmont | 77:869cf507173a | 317 | ((FLAG) == I2C_FLAG_TC) || ((FLAG) == I2C_FLAG_TCR) || \ |
| emilmont | 77:869cf507173a | 318 | ((FLAG) == I2C_FLAG_BERR) || ((FLAG) == I2C_FLAG_ARLO) || \ |
| emilmont | 77:869cf507173a | 319 | ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_PECERR) || \ |
| emilmont | 77:869cf507173a | 320 | ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_ALERT) || \ |
| emilmont | 77:869cf507173a | 321 | ((FLAG) == I2C_FLAG_BUSY)) |
| emilmont | 77:869cf507173a | 322 | |
| emilmont | 77:869cf507173a | 323 | /** |
| emilmont | 77:869cf507173a | 324 | * @} |
| emilmont | 77:869cf507173a | 325 | */ |
| emilmont | 77:869cf507173a | 326 | |
| emilmont | 77:869cf507173a | 327 | |
| emilmont | 77:869cf507173a | 328 | /** @defgroup I2C_interrupts_definition |
| emilmont | 77:869cf507173a | 329 | * @{ |
| emilmont | 77:869cf507173a | 330 | */ |
| emilmont | 77:869cf507173a | 331 | |
| emilmont | 77:869cf507173a | 332 | #define I2C_IT_TXIS I2C_ISR_TXIS |
| emilmont | 77:869cf507173a | 333 | #define I2C_IT_RXNE I2C_ISR_RXNE |
| emilmont | 77:869cf507173a | 334 | #define I2C_IT_ADDR I2C_ISR_ADDR |
| emilmont | 77:869cf507173a | 335 | #define I2C_IT_NACKF I2C_ISR_NACKF |
| emilmont | 77:869cf507173a | 336 | #define I2C_IT_STOPF I2C_ISR_STOPF |
| emilmont | 77:869cf507173a | 337 | #define I2C_IT_TC I2C_ISR_TC |
| emilmont | 77:869cf507173a | 338 | #define I2C_IT_TCR I2C_ISR_TCR |
| emilmont | 77:869cf507173a | 339 | #define I2C_IT_BERR I2C_ISR_BERR |
| emilmont | 77:869cf507173a | 340 | #define I2C_IT_ARLO I2C_ISR_ARLO |
| emilmont | 77:869cf507173a | 341 | #define I2C_IT_OVR I2C_ISR_OVR |
| emilmont | 77:869cf507173a | 342 | #define I2C_IT_PECERR I2C_ISR_PECERR |
| emilmont | 77:869cf507173a | 343 | #define I2C_IT_TIMEOUT I2C_ISR_TIMEOUT |
| emilmont | 77:869cf507173a | 344 | #define I2C_IT_ALERT I2C_ISR_ALERT |
| emilmont | 77:869cf507173a | 345 | |
| emilmont | 77:869cf507173a | 346 | #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFFFFC001) == 0x00) && ((IT) != 0x00)) |
| emilmont | 77:869cf507173a | 347 | |
| emilmont | 77:869cf507173a | 348 | #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_TXIS) || ((IT) == I2C_IT_RXNE) || \ |
| emilmont | 77:869cf507173a | 349 | ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_NACKF) || \ |
| emilmont | 77:869cf507173a | 350 | ((IT) == I2C_IT_STOPF) || ((IT) == I2C_IT_TC) || \ |
| emilmont | 77:869cf507173a | 351 | ((IT) == I2C_IT_TCR) || ((IT) == I2C_IT_BERR) || \ |
| emilmont | 77:869cf507173a | 352 | ((IT) == I2C_IT_ARLO) || ((IT) == I2C_IT_OVR) || \ |
| emilmont | 77:869cf507173a | 353 | ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_TIMEOUT) || \ |
| emilmont | 77:869cf507173a | 354 | ((IT) == I2C_IT_ALERT)) |
| emilmont | 77:869cf507173a | 355 | |
| emilmont | 77:869cf507173a | 356 | |
| emilmont | 77:869cf507173a | 357 | /** |
| emilmont | 77:869cf507173a | 358 | * @} |
| emilmont | 77:869cf507173a | 359 | */ |
| emilmont | 77:869cf507173a | 360 | |
| emilmont | 77:869cf507173a | 361 | /** @defgroup I2C_ReloadEndMode_definition |
| emilmont | 77:869cf507173a | 362 | * @{ |
| emilmont | 77:869cf507173a | 363 | */ |
| emilmont | 77:869cf507173a | 364 | |
| emilmont | 77:869cf507173a | 365 | #define I2C_Reload_Mode I2C_CR2_RELOAD |
| emilmont | 77:869cf507173a | 366 | #define I2C_AutoEnd_Mode I2C_CR2_AUTOEND |
| emilmont | 77:869cf507173a | 367 | #define I2C_SoftEnd_Mode ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 368 | |
| emilmont | 77:869cf507173a | 369 | |
| emilmont | 77:869cf507173a | 370 | #define IS_RELOAD_END_MODE(MODE) (((MODE) == I2C_Reload_Mode) || \ |
| emilmont | 77:869cf507173a | 371 | ((MODE) == I2C_AutoEnd_Mode) || \ |
| emilmont | 77:869cf507173a | 372 | ((MODE) == I2C_SoftEnd_Mode)) |
| emilmont | 77:869cf507173a | 373 | |
| emilmont | 77:869cf507173a | 374 | |
| emilmont | 77:869cf507173a | 375 | /** |
| emilmont | 77:869cf507173a | 376 | * @} |
| emilmont | 77:869cf507173a | 377 | */ |
| emilmont | 77:869cf507173a | 378 | |
| emilmont | 77:869cf507173a | 379 | /** @defgroup I2C_StartStopMode_definition |
| emilmont | 77:869cf507173a | 380 | * @{ |
| emilmont | 77:869cf507173a | 381 | */ |
| emilmont | 77:869cf507173a | 382 | |
| emilmont | 77:869cf507173a | 383 | #define I2C_No_StartStop ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 384 | #define I2C_Generate_Stop I2C_CR2_STOP |
| emilmont | 77:869cf507173a | 385 | #define I2C_Generate_Start_Read (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) |
| emilmont | 77:869cf507173a | 386 | #define I2C_Generate_Start_Write I2C_CR2_START |
| emilmont | 77:869cf507173a | 387 | |
| emilmont | 77:869cf507173a | 388 | |
| emilmont | 77:869cf507173a | 389 | #define IS_START_STOP_MODE(MODE) (((MODE) == I2C_Generate_Stop) || \ |
| emilmont | 77:869cf507173a | 390 | ((MODE) == I2C_Generate_Start_Read) || \ |
| emilmont | 77:869cf507173a | 391 | ((MODE) == I2C_Generate_Start_Write) || \ |
| emilmont | 77:869cf507173a | 392 | ((MODE) == I2C_No_StartStop)) |
| emilmont | 77:869cf507173a | 393 | |
| emilmont | 77:869cf507173a | 394 | |
| emilmont | 77:869cf507173a | 395 | /** |
| emilmont | 77:869cf507173a | 396 | * @} |
| emilmont | 77:869cf507173a | 397 | */ |
| emilmont | 77:869cf507173a | 398 | |
| emilmont | 77:869cf507173a | 399 | /** |
| emilmont | 77:869cf507173a | 400 | * @} |
| emilmont | 77:869cf507173a | 401 | */ |
| emilmont | 77:869cf507173a | 402 | |
| emilmont | 77:869cf507173a | 403 | /* Exported macro ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 404 | /* Exported functions ------------------------------------------------------- */ |
| emilmont | 77:869cf507173a | 405 | |
| emilmont | 77:869cf507173a | 406 | |
| emilmont | 77:869cf507173a | 407 | /* Initialization and Configuration functions *********************************/ |
| emilmont | 77:869cf507173a | 408 | void I2C_DeInit(I2C_TypeDef* I2Cx); |
| emilmont | 77:869cf507173a | 409 | void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); |
| emilmont | 77:869cf507173a | 410 | void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); |
| emilmont | 77:869cf507173a | 411 | void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 412 | void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx); |
| emilmont | 77:869cf507173a | 413 | void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 414 | void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 415 | void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); /*!< not applicable for STM32F030 devices */ |
| emilmont | 77:869cf507173a | 416 | void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 417 | void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask); |
| emilmont | 77:869cf507173a | 418 | void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 419 | void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 420 | void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address); |
| emilmont | 77:869cf507173a | 421 | void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 422 | |
| emilmont | 77:869cf507173a | 423 | /* Communications handling functions ******************************************/ |
| emilmont | 77:869cf507173a | 424 | void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 425 | void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 426 | void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint8_t Number_Bytes); |
| emilmont | 77:869cf507173a | 427 | void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction); |
| emilmont | 77:869cf507173a | 428 | void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 429 | void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 430 | void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 431 | void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 432 | uint8_t I2C_GetAddressMatched(I2C_TypeDef* I2Cx); |
| emilmont | 77:869cf507173a | 433 | uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx); |
| emilmont | 77:869cf507173a | 434 | void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode); |
| emilmont | 77:869cf507173a | 435 | |
| emilmont | 77:869cf507173a | 436 | /* SMBUS management functions ************************************************/ |
| emilmont | 77:869cf507173a | 437 | void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 438 | void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 439 | void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 440 | void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 441 | void I2C_TimeoutAConfig(I2C_TypeDef* I2Cx, uint16_t Timeout); |
| emilmont | 77:869cf507173a | 442 | void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout); |
| emilmont | 77:869cf507173a | 443 | void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 444 | void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 445 | uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); |
| emilmont | 77:869cf507173a | 446 | |
| emilmont | 77:869cf507173a | 447 | /* I2C registers management functions *****************************************/ |
| emilmont | 77:869cf507173a | 448 | uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); |
| emilmont | 77:869cf507173a | 449 | |
| emilmont | 77:869cf507173a | 450 | /* Data transfers management functions ****************************************/ |
| emilmont | 77:869cf507173a | 451 | void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); |
| emilmont | 77:869cf507173a | 452 | uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); |
| emilmont | 77:869cf507173a | 453 | |
| emilmont | 77:869cf507173a | 454 | /* DMA transfers management functions *****************************************/ |
| emilmont | 77:869cf507173a | 455 | void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 456 | |
| emilmont | 77:869cf507173a | 457 | /* Interrupts and flags management functions **********************************/ |
| emilmont | 77:869cf507173a | 458 | FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); |
| emilmont | 77:869cf507173a | 459 | void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); |
| emilmont | 77:869cf507173a | 460 | ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); |
| emilmont | 77:869cf507173a | 461 | void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); |
| emilmont | 77:869cf507173a | 462 | |
| emilmont | 77:869cf507173a | 463 | |
| emilmont | 77:869cf507173a | 464 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 465 | } |
| emilmont | 77:869cf507173a | 466 | #endif |
| emilmont | 77:869cf507173a | 467 | |
| emilmont | 77:869cf507173a | 468 | #endif /*__STM32F0XX_I2C_H */ |
| emilmont | 77:869cf507173a | 469 | |
| emilmont | 77:869cf507173a | 470 | /** |
| emilmont | 77:869cf507173a | 471 | * @} |
| emilmont | 77:869cf507173a | 472 | */ |
| emilmont | 77:869cf507173a | 473 | |
| emilmont | 77:869cf507173a | 474 | /** |
| emilmont | 77:869cf507173a | 475 | * @} |
| emilmont | 77:869cf507173a | 476 | */ |
| emilmont | 77:869cf507173a | 477 | |
| emilmont | 77:869cf507173a | 478 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |