cc y / mbed

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed by mbed official

TARGET_K22F/MK22F51212_features.h@120:7c328cabac7e, 2016-05-10 (annotated)

Committer:
Kojto
Date:
Tue May 10 12:23:43 2016 -0500
Revision:
120:7c328cabac7e
Release 120 of the mbed library



Changes:

- ST - STMF3XX/F4XX - directories removal

     - STMF3 - pwm range fix

     - STMF1 - Cube driver update

- Renesas - RZ_A1H - async i2c, serial and spi addition

- Freescale - KSDK2 update

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 120:7c328cabac7e 1 /*
Kojto 120:7c328cabac7e 2 ** ###################################################################
Kojto 120:7c328cabac7e 3 ** Version: rev. 2.14, 2015-06-08
Kojto 120:7c328cabac7e 4 ** Build: b151216
Kojto 120:7c328cabac7e 5 **
Kojto 120:7c328cabac7e 6 ** Abstract:
Kojto 120:7c328cabac7e 7 ** Chip specific module features.
Kojto 120:7c328cabac7e 8 **
Kojto 120:7c328cabac7e 9 ** Copyright (c) 2015 Freescale Semiconductor, Inc.
Kojto 120:7c328cabac7e 10 ** All rights reserved.
Kojto 120:7c328cabac7e 11 **
Kojto 120:7c328cabac7e 12 ** Redistribution and use in source and binary forms, with or without modification,
Kojto 120:7c328cabac7e 13 ** are permitted provided that the following conditions are met:
Kojto 120:7c328cabac7e 14 **
Kojto 120:7c328cabac7e 15 ** o Redistributions of source code must retain the above copyright notice, this list
Kojto 120:7c328cabac7e 16 ** of conditions and the following disclaimer.
Kojto 120:7c328cabac7e 17 **
Kojto 120:7c328cabac7e 18 ** o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 120:7c328cabac7e 19 ** list of conditions and the following disclaimer in the documentation and/or
Kojto 120:7c328cabac7e 20 ** other materials provided with the distribution.
Kojto 120:7c328cabac7e 21 **
Kojto 120:7c328cabac7e 22 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 120:7c328cabac7e 23 ** contributors may be used to endorse or promote products derived from this
Kojto 120:7c328cabac7e 24 ** software without specific prior written permission.
Kojto 120:7c328cabac7e 25 **
Kojto 120:7c328cabac7e 26 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 120:7c328cabac7e 27 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 120:7c328cabac7e 28 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 120:7c328cabac7e 29 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 120:7c328cabac7e 30 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 120:7c328cabac7e 31 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 120:7c328cabac7e 32 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 120:7c328cabac7e 33 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 120:7c328cabac7e 34 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 120:7c328cabac7e 35 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 120:7c328cabac7e 36 **
Kojto 120:7c328cabac7e 37 ** http: www.freescale.com
Kojto 120:7c328cabac7e 38 ** mail: support@freescale.com
Kojto 120:7c328cabac7e 39 **
Kojto 120:7c328cabac7e 40 ** Revisions:
Kojto 120:7c328cabac7e 41 ** - rev. 1.0 (2013-07-23)
Kojto 120:7c328cabac7e 42 ** Initial version.
Kojto 120:7c328cabac7e 43 ** - rev. 1.1 (2013-09-17)
Kojto 120:7c328cabac7e 44 ** RM rev. 0.4 update.
Kojto 120:7c328cabac7e 45 ** - rev. 2.0 (2013-10-29)
Kojto 120:7c328cabac7e 46 ** Register accessor macros added to the memory map.
Kojto 120:7c328cabac7e 47 ** Symbols for Processor Expert memory map compatibility added to the memory map.
Kojto 120:7c328cabac7e 48 ** Startup file for gcc has been updated according to CMSIS 3.2.
Kojto 120:7c328cabac7e 49 ** System initialization updated.
Kojto 120:7c328cabac7e 50 ** - rev. 2.1 (2013-10-30)
Kojto 120:7c328cabac7e 51 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Kojto 120:7c328cabac7e 52 ** - rev. 2.2 (2013-12-20)
Kojto 120:7c328cabac7e 53 ** Update according to reference manual rev. 0.6,
Kojto 120:7c328cabac7e 54 ** - rev. 2.3 (2014-01-13)
Kojto 120:7c328cabac7e 55 ** Update according to reference manual rev. 0.61,
Kojto 120:7c328cabac7e 56 ** - rev. 2.4 (2014-01-30)
Kojto 120:7c328cabac7e 57 ** Added single maximum value generation and a constrain to varying feature values that only numbers can have maximum.
Kojto 120:7c328cabac7e 58 ** - rev. 2.5 (2014-02-10)
Kojto 120:7c328cabac7e 59 ** The declaration of clock configurations has been moved to separate header file system_MK22F51212.h
Kojto 120:7c328cabac7e 60 ** - rev. 2.6 (2014-05-06)
Kojto 120:7c328cabac7e 61 ** Update according to reference manual rev. 1.0,
Kojto 120:7c328cabac7e 62 ** Update of system and startup files.
Kojto 120:7c328cabac7e 63 ** Module access macro module_BASES replaced by module_BASE_PTRS.
Kojto 120:7c328cabac7e 64 ** - rev. 2.7 (2014-08-28)
Kojto 120:7c328cabac7e 65 ** Update of system files - default clock configuration changed.
Kojto 120:7c328cabac7e 66 ** Update of startup files - possibility to override DefaultISR added.
Kojto 120:7c328cabac7e 67 ** - rev. 2.8 (2014-10-14)
Kojto 120:7c328cabac7e 68 ** Interrupt INT_LPTimer renamed to INT_LPTMR0, interrupt INT_Watchdog renamed to INT_WDOG_EWM.
Kojto 120:7c328cabac7e 69 ** - rev. 2.9 (2015-01-21)
Kojto 120:7c328cabac7e 70 ** Added FSL_FEATURE_SOC_peripheral_COUNT with number of peripheral instances
Kojto 120:7c328cabac7e 71 ** - rev. 2.10 (2015-02-19)
Kojto 120:7c328cabac7e 72 ** Renamed interrupt vector LLW to LLWU.
Kojto 120:7c328cabac7e 73 ** - rev. 2.11 (2015-05-19)
Kojto 120:7c328cabac7e 74 ** FSL_FEATURE_SOC_CAU_COUNT remamed to FSL_FEATURE_SOC_MMCAU_COUNT.
Kojto 120:7c328cabac7e 75 ** Added FSL_FEATURE_SOC_peripheral_COUNT for TRNG and HSADC.
Kojto 120:7c328cabac7e 76 ** Added features for PDB and PORT.
Kojto 120:7c328cabac7e 77 ** - rev. 2.12 (2015-05-25)
Kojto 120:7c328cabac7e 78 ** Added FSL_FEATURE_FLASH_PFLASH_START_ADDRESS
Kojto 120:7c328cabac7e 79 ** - rev. 2.13 (2015-05-27)
Kojto 120:7c328cabac7e 80 ** Several USB features added.
Kojto 120:7c328cabac7e 81 ** - rev. 2.14 (2015-06-08)
Kojto 120:7c328cabac7e 82 ** FTM features BUS_CLOCK and FAST_CLOCK removed.
Kojto 120:7c328cabac7e 83 **
Kojto 120:7c328cabac7e 84 ** ###################################################################
Kojto 120:7c328cabac7e 85 */
Kojto 120:7c328cabac7e 86
Kojto 120:7c328cabac7e 87 #ifndef _MK22F51212_FEATURES_H_
Kojto 120:7c328cabac7e 88 #define _MK22F51212_FEATURES_H_
Kojto 120:7c328cabac7e 89
Kojto 120:7c328cabac7e 90 /* SOC module features */
Kojto 120:7c328cabac7e 91
Kojto 120:7c328cabac7e 92 /* @brief ACMP availability on the SoC. */
Kojto 120:7c328cabac7e 93 #define FSL_FEATURE_SOC_ACMP_COUNT (0)
Kojto 120:7c328cabac7e 94 /* @brief ADC16 availability on the SoC. */
Kojto 120:7c328cabac7e 95 #define FSL_FEATURE_SOC_ADC16_COUNT (2)
Kojto 120:7c328cabac7e 96 /* @brief ADC12 availability on the SoC. */
Kojto 120:7c328cabac7e 97 #define FSL_FEATURE_SOC_ADC12_COUNT (0)
Kojto 120:7c328cabac7e 98 /* @brief AFE availability on the SoC. */
Kojto 120:7c328cabac7e 99 #define FSL_FEATURE_SOC_AFE_COUNT (0)
Kojto 120:7c328cabac7e 100 /* @brief AIPS availability on the SoC. */
Kojto 120:7c328cabac7e 101 #define FSL_FEATURE_SOC_AIPS_COUNT (0)
Kojto 120:7c328cabac7e 102 /* @brief AOI availability on the SoC. */
Kojto 120:7c328cabac7e 103 #define FSL_FEATURE_SOC_AOI_COUNT (0)
Kojto 120:7c328cabac7e 104 /* @brief AXBS availability on the SoC. */
Kojto 120:7c328cabac7e 105 #define FSL_FEATURE_SOC_AXBS_COUNT (0)
Kojto 120:7c328cabac7e 106 /* @brief ASMC availability on the SoC. */
Kojto 120:7c328cabac7e 107 #define FSL_FEATURE_SOC_ASMC_COUNT (0)
Kojto 120:7c328cabac7e 108 /* @brief CADC availability on the SoC. */
Kojto 120:7c328cabac7e 109 #define FSL_FEATURE_SOC_CADC_COUNT (0)
Kojto 120:7c328cabac7e 110 /* @brief FLEXCAN availability on the SoC. */
Kojto 120:7c328cabac7e 111 #define FSL_FEATURE_SOC_FLEXCAN_COUNT (0)
Kojto 120:7c328cabac7e 112 /* @brief MMCAU availability on the SoC. */
Kojto 120:7c328cabac7e 113 #define FSL_FEATURE_SOC_MMCAU_COUNT (0)
Kojto 120:7c328cabac7e 114 /* @brief CMP availability on the SoC. */
Kojto 120:7c328cabac7e 115 #define FSL_FEATURE_SOC_CMP_COUNT (2)
Kojto 120:7c328cabac7e 116 /* @brief CMT availability on the SoC. */
Kojto 120:7c328cabac7e 117 #define FSL_FEATURE_SOC_CMT_COUNT (0)
Kojto 120:7c328cabac7e 118 /* @brief CNC availability on the SoC. */
Kojto 120:7c328cabac7e 119 #define FSL_FEATURE_SOC_CNC_COUNT (0)
Kojto 120:7c328cabac7e 120 /* @brief CRC availability on the SoC. */
Kojto 120:7c328cabac7e 121 #define FSL_FEATURE_SOC_CRC_COUNT (1)
Kojto 120:7c328cabac7e 122 /* @brief DAC availability on the SoC. */
Kojto 120:7c328cabac7e 123 #define FSL_FEATURE_SOC_DAC_COUNT (2)
Kojto 120:7c328cabac7e 124 /* @brief DAC32 availability on the SoC. */
Kojto 120:7c328cabac7e 125 #define FSL_FEATURE_SOC_DAC32_COUNT (0)
Kojto 120:7c328cabac7e 126 /* @brief DCDC availability on the SoC. */
Kojto 120:7c328cabac7e 127 #define FSL_FEATURE_SOC_DCDC_COUNT (0)
Kojto 120:7c328cabac7e 128 /* @brief DDR availability on the SoC. */
Kojto 120:7c328cabac7e 129 #define FSL_FEATURE_SOC_DDR_COUNT (0)
Kojto 120:7c328cabac7e 130 /* @brief DMA availability on the SoC. */
Kojto 120:7c328cabac7e 131 #define FSL_FEATURE_SOC_DMA_COUNT (0)
Kojto 120:7c328cabac7e 132 /* @brief EDMA availability on the SoC. */
Kojto 120:7c328cabac7e 133 #define FSL_FEATURE_SOC_EDMA_COUNT (1)
Kojto 120:7c328cabac7e 134 /* @brief DMAMUX availability on the SoC. */
Kojto 120:7c328cabac7e 135 #define FSL_FEATURE_SOC_DMAMUX_COUNT (1)
Kojto 120:7c328cabac7e 136 /* @brief DRY availability on the SoC. */
Kojto 120:7c328cabac7e 137 #define FSL_FEATURE_SOC_DRY_COUNT (0)
Kojto 120:7c328cabac7e 138 /* @brief DSPI availability on the SoC. */
Kojto 120:7c328cabac7e 139 #define FSL_FEATURE_SOC_DSPI_COUNT (2)
Kojto 120:7c328cabac7e 140 /* @brief EMVSIM availability on the SoC. */
Kojto 120:7c328cabac7e 141 #define FSL_FEATURE_SOC_EMVSIM_COUNT (0)
Kojto 120:7c328cabac7e 142 /* @brief ENC availability on the SoC. */
Kojto 120:7c328cabac7e 143 #define FSL_FEATURE_SOC_ENC_COUNT (0)
Kojto 120:7c328cabac7e 144 /* @brief ENET availability on the SoC. */
Kojto 120:7c328cabac7e 145 #define FSL_FEATURE_SOC_ENET_COUNT (0)
Kojto 120:7c328cabac7e 146 /* @brief EWM availability on the SoC. */
Kojto 120:7c328cabac7e 147 #define FSL_FEATURE_SOC_EWM_COUNT (1)
Kojto 120:7c328cabac7e 148 /* @brief FB availability on the SoC. */
Kojto 120:7c328cabac7e 149 #define FSL_FEATURE_SOC_FB_COUNT (1)
Kojto 120:7c328cabac7e 150 /* @brief FGPIO availability on the SoC. */
Kojto 120:7c328cabac7e 151 #define FSL_FEATURE_SOC_FGPIO_COUNT (0)
Kojto 120:7c328cabac7e 152 /* @brief FLEXIO availability on the SoC. */
Kojto 120:7c328cabac7e 153 #define FSL_FEATURE_SOC_FLEXIO_COUNT (0)
Kojto 120:7c328cabac7e 154 /* @brief FMC availability on the SoC. */
Kojto 120:7c328cabac7e 155 #define FSL_FEATURE_SOC_FMC_COUNT (1)
Kojto 120:7c328cabac7e 156 /* @brief FSKDT availability on the SoC. */
Kojto 120:7c328cabac7e 157 #define FSL_FEATURE_SOC_FSKDT_COUNT (0)
Kojto 120:7c328cabac7e 158 /* @brief FTFA availability on the SoC. */
Kojto 120:7c328cabac7e 159 #define FSL_FEATURE_SOC_FTFA_COUNT (1)
Kojto 120:7c328cabac7e 160 /* @brief FTFE availability on the SoC. */
Kojto 120:7c328cabac7e 161 #define FSL_FEATURE_SOC_FTFE_COUNT (0)
Kojto 120:7c328cabac7e 162 /* @brief FTFL availability on the SoC. */
Kojto 120:7c328cabac7e 163 #define FSL_FEATURE_SOC_FTFL_COUNT (0)
Kojto 120:7c328cabac7e 164 /* @brief FTM availability on the SoC. */
Kojto 120:7c328cabac7e 165 #define FSL_FEATURE_SOC_FTM_COUNT (4)
Kojto 120:7c328cabac7e 166 /* @brief FTMRA availability on the SoC. */
Kojto 120:7c328cabac7e 167 #define FSL_FEATURE_SOC_FTMRA_COUNT (0)
Kojto 120:7c328cabac7e 168 /* @brief FTMRE availability on the SoC. */
Kojto 120:7c328cabac7e 169 #define FSL_FEATURE_SOC_FTMRE_COUNT (0)
Kojto 120:7c328cabac7e 170 /* @brief FTMRH availability on the SoC. */
Kojto 120:7c328cabac7e 171 #define FSL_FEATURE_SOC_FTMRH_COUNT (0)
Kojto 120:7c328cabac7e 172 /* @brief GPIO availability on the SoC. */
Kojto 120:7c328cabac7e 173 #define FSL_FEATURE_SOC_GPIO_COUNT (5)
Kojto 120:7c328cabac7e 174 /* @brief HSADC availability on the SoC. */
Kojto 120:7c328cabac7e 175 #define FSL_FEATURE_SOC_HSADC_COUNT (0)
Kojto 120:7c328cabac7e 176 /* @brief I2C availability on the SoC. */
Kojto 120:7c328cabac7e 177 #define FSL_FEATURE_SOC_I2C_COUNT (2)
Kojto 120:7c328cabac7e 178 /* @brief I2S availability on the SoC. */
Kojto 120:7c328cabac7e 179 #define FSL_FEATURE_SOC_I2S_COUNT (1)
Kojto 120:7c328cabac7e 180 /* @brief ICS availability on the SoC. */
Kojto 120:7c328cabac7e 181 #define FSL_FEATURE_SOC_ICS_COUNT (0)
Kojto 120:7c328cabac7e 182 /* @brief INTMUX availability on the SoC. */
Kojto 120:7c328cabac7e 183 #define FSL_FEATURE_SOC_INTMUX_COUNT (0)
Kojto 120:7c328cabac7e 184 /* @brief IRQ availability on the SoC. */
Kojto 120:7c328cabac7e 185 #define FSL_FEATURE_SOC_IRQ_COUNT (0)
Kojto 120:7c328cabac7e 186 /* @brief KBI availability on the SoC. */
Kojto 120:7c328cabac7e 187 #define FSL_FEATURE_SOC_KBI_COUNT (0)
Kojto 120:7c328cabac7e 188 /* @brief SLCD availability on the SoC. */
Kojto 120:7c328cabac7e 189 #define FSL_FEATURE_SOC_SLCD_COUNT (0)
Kojto 120:7c328cabac7e 190 /* @brief LCDC availability on the SoC. */
Kojto 120:7c328cabac7e 191 #define FSL_FEATURE_SOC_LCDC_COUNT (0)
Kojto 120:7c328cabac7e 192 /* @brief LDO availability on the SoC. */
Kojto 120:7c328cabac7e 193 #define FSL_FEATURE_SOC_LDO_COUNT (0)
Kojto 120:7c328cabac7e 194 /* @brief LLWU availability on the SoC. */
Kojto 120:7c328cabac7e 195 #define FSL_FEATURE_SOC_LLWU_COUNT (1)
Kojto 120:7c328cabac7e 196 /* @brief LMEM availability on the SoC. */
Kojto 120:7c328cabac7e 197 #define FSL_FEATURE_SOC_LMEM_COUNT (0)
Kojto 120:7c328cabac7e 198 /* @brief LPI2C availability on the SoC. */
Kojto 120:7c328cabac7e 199 #define FSL_FEATURE_SOC_LPI2C_COUNT (0)
Kojto 120:7c328cabac7e 200 /* @brief LPIT availability on the SoC. */
Kojto 120:7c328cabac7e 201 #define FSL_FEATURE_SOC_LPIT_COUNT (0)
Kojto 120:7c328cabac7e 202 /* @brief LPSCI availability on the SoC. */
Kojto 120:7c328cabac7e 203 #define FSL_FEATURE_SOC_LPSCI_COUNT (0)
Kojto 120:7c328cabac7e 204 /* @brief LPSPI availability on the SoC. */
Kojto 120:7c328cabac7e 205 #define FSL_FEATURE_SOC_LPSPI_COUNT (0)
Kojto 120:7c328cabac7e 206 /* @brief LPTMR availability on the SoC. */
Kojto 120:7c328cabac7e 207 #define FSL_FEATURE_SOC_LPTMR_COUNT (1)
Kojto 120:7c328cabac7e 208 /* @brief LPTPM availability on the SoC. */
Kojto 120:7c328cabac7e 209 #define FSL_FEATURE_SOC_LPTPM_COUNT (0)
Kojto 120:7c328cabac7e 210 /* @brief LPUART availability on the SoC. */
Kojto 120:7c328cabac7e 211 #define FSL_FEATURE_SOC_LPUART_COUNT (1)
Kojto 120:7c328cabac7e 212 /* @brief LTC availability on the SoC. */
Kojto 120:7c328cabac7e 213 #define FSL_FEATURE_SOC_LTC_COUNT (0)
Kojto 120:7c328cabac7e 214 /* @brief MC availability on the SoC. */
Kojto 120:7c328cabac7e 215 #define FSL_FEATURE_SOC_MC_COUNT (0)
Kojto 120:7c328cabac7e 216 /* @brief MCG availability on the SoC. */
Kojto 120:7c328cabac7e 217 #define FSL_FEATURE_SOC_MCG_COUNT (1)
Kojto 120:7c328cabac7e 218 /* @brief MCGLITE availability on the SoC. */
Kojto 120:7c328cabac7e 219 #define FSL_FEATURE_SOC_MCGLITE_COUNT (0)
Kojto 120:7c328cabac7e 220 /* @brief MCM availability on the SoC. */
Kojto 120:7c328cabac7e 221 #define FSL_FEATURE_SOC_MCM_COUNT (1)
Kojto 120:7c328cabac7e 222 /* @brief MMAU availability on the SoC. */
Kojto 120:7c328cabac7e 223 #define FSL_FEATURE_SOC_MMAU_COUNT (0)
Kojto 120:7c328cabac7e 224 /* @brief MMDVSQ availability on the SoC. */
Kojto 120:7c328cabac7e 225 #define FSL_FEATURE_SOC_MMDVSQ_COUNT (0)
Kojto 120:7c328cabac7e 226 /* @brief MPU availability on the SoC. */
Kojto 120:7c328cabac7e 227 #define FSL_FEATURE_SOC_MPU_COUNT (0)
Kojto 120:7c328cabac7e 228 /* @brief MSCAN availability on the SoC. */
Kojto 120:7c328cabac7e 229 #define FSL_FEATURE_SOC_MSCAN_COUNT (0)
Kojto 120:7c328cabac7e 230 /* @brief MSCM availability on the SoC. */
Kojto 120:7c328cabac7e 231 #define FSL_FEATURE_SOC_MSCM_COUNT (0)
Kojto 120:7c328cabac7e 232 /* @brief MTB availability on the SoC. */
Kojto 120:7c328cabac7e 233 #define FSL_FEATURE_SOC_MTB_COUNT (0)
Kojto 120:7c328cabac7e 234 /* @brief MTBDWT availability on the SoC. */
Kojto 120:7c328cabac7e 235 #define FSL_FEATURE_SOC_MTBDWT_COUNT (0)
Kojto 120:7c328cabac7e 236 /* @brief MU availability on the SoC. */
Kojto 120:7c328cabac7e 237 #define FSL_FEATURE_SOC_MU_COUNT (0)
Kojto 120:7c328cabac7e 238 /* @brief NFC availability on the SoC. */
Kojto 120:7c328cabac7e 239 #define FSL_FEATURE_SOC_NFC_COUNT (0)
Kojto 120:7c328cabac7e 240 /* @brief OPAMP availability on the SoC. */
Kojto 120:7c328cabac7e 241 #define FSL_FEATURE_SOC_OPAMP_COUNT (0)
Kojto 120:7c328cabac7e 242 /* @brief OSC availability on the SoC. */
Kojto 120:7c328cabac7e 243 #define FSL_FEATURE_SOC_OSC_COUNT (1)
Kojto 120:7c328cabac7e 244 /* @brief OSC32 availability on the SoC. */
Kojto 120:7c328cabac7e 245 #define FSL_FEATURE_SOC_OSC32_COUNT (0)
Kojto 120:7c328cabac7e 246 /* @brief OTFAD availability on the SoC. */
Kojto 120:7c328cabac7e 247 #define FSL_FEATURE_SOC_OTFAD_COUNT (0)
Kojto 120:7c328cabac7e 248 /* @brief PDB availability on the SoC. */
Kojto 120:7c328cabac7e 249 #define FSL_FEATURE_SOC_PDB_COUNT (1)
Kojto 120:7c328cabac7e 250 /* @brief PCC availability on the SoC. */
Kojto 120:7c328cabac7e 251 #define FSL_FEATURE_SOC_PCC_COUNT (0)
Kojto 120:7c328cabac7e 252 /* @brief PGA availability on the SoC. */
Kojto 120:7c328cabac7e 253 #define FSL_FEATURE_SOC_PGA_COUNT (0)
Kojto 120:7c328cabac7e 254 /* @brief PIT availability on the SoC. */
Kojto 120:7c328cabac7e 255 #define FSL_FEATURE_SOC_PIT_COUNT (1)
Kojto 120:7c328cabac7e 256 /* @brief PMC availability on the SoC. */
Kojto 120:7c328cabac7e 257 #define FSL_FEATURE_SOC_PMC_COUNT (1)
Kojto 120:7c328cabac7e 258 /* @brief PORT availability on the SoC. */
Kojto 120:7c328cabac7e 259 #define FSL_FEATURE_SOC_PORT_COUNT (5)
Kojto 120:7c328cabac7e 260 /* @brief PWM availability on the SoC. */
Kojto 120:7c328cabac7e 261 #define FSL_FEATURE_SOC_PWM_COUNT (0)
Kojto 120:7c328cabac7e 262 /* @brief PWT availability on the SoC. */
Kojto 120:7c328cabac7e 263 #define FSL_FEATURE_SOC_PWT_COUNT (0)
Kojto 120:7c328cabac7e 264 /* @brief QuadSPI availability on the SoC. */
Kojto 120:7c328cabac7e 265 #define FSL_FEATURE_SOC_QuadSPI_COUNT (0)
Kojto 120:7c328cabac7e 266 /* @brief RCM availability on the SoC. */
Kojto 120:7c328cabac7e 267 #define FSL_FEATURE_SOC_RCM_COUNT (1)
Kojto 120:7c328cabac7e 268 /* @brief RFSYS availability on the SoC. */
Kojto 120:7c328cabac7e 269 #define FSL_FEATURE_SOC_RFSYS_COUNT (1)
Kojto 120:7c328cabac7e 270 /* @brief RFVBAT availability on the SoC. */
Kojto 120:7c328cabac7e 271 #define FSL_FEATURE_SOC_RFVBAT_COUNT (1)
Kojto 120:7c328cabac7e 272 /* @brief RNG availability on the SoC. */
Kojto 120:7c328cabac7e 273 #define FSL_FEATURE_SOC_RNG_COUNT (1)
Kojto 120:7c328cabac7e 274 /* @brief RNGB availability on the SoC. */
Kojto 120:7c328cabac7e 275 #define FSL_FEATURE_SOC_RNGB_COUNT (0)
Kojto 120:7c328cabac7e 276 /* @brief ROM availability on the SoC. */
Kojto 120:7c328cabac7e 277 #define FSL_FEATURE_SOC_ROM_COUNT (0)
Kojto 120:7c328cabac7e 278 /* @brief RSIM availability on the SoC. */
Kojto 120:7c328cabac7e 279 #define FSL_FEATURE_SOC_RSIM_COUNT (0)
Kojto 120:7c328cabac7e 280 /* @brief RTC availability on the SoC. */
Kojto 120:7c328cabac7e 281 #define FSL_FEATURE_SOC_RTC_COUNT (1)
Kojto 120:7c328cabac7e 282 /* @brief SCG availability on the SoC. */
Kojto 120:7c328cabac7e 283 #define FSL_FEATURE_SOC_SCG_COUNT (0)
Kojto 120:7c328cabac7e 284 /* @brief SCI availability on the SoC. */
Kojto 120:7c328cabac7e 285 #define FSL_FEATURE_SOC_SCI_COUNT (0)
Kojto 120:7c328cabac7e 286 /* @brief SDHC availability on the SoC. */
Kojto 120:7c328cabac7e 287 #define FSL_FEATURE_SOC_SDHC_COUNT (0)
Kojto 120:7c328cabac7e 288 /* @brief SDRAM availability on the SoC. */
Kojto 120:7c328cabac7e 289 #define FSL_FEATURE_SOC_SDRAM_COUNT (0)
Kojto 120:7c328cabac7e 290 /* @brief SEMA42 availability on the SoC. */
Kojto 120:7c328cabac7e 291 #define FSL_FEATURE_SOC_SEMA42_COUNT (0)
Kojto 120:7c328cabac7e 292 /* @brief SIM availability on the SoC. */
Kojto 120:7c328cabac7e 293 #define FSL_FEATURE_SOC_SIM_COUNT (1)
Kojto 120:7c328cabac7e 294 /* @brief SMC availability on the SoC. */
Kojto 120:7c328cabac7e 295 #define FSL_FEATURE_SOC_SMC_COUNT (1)
Kojto 120:7c328cabac7e 296 /* @brief SPI availability on the SoC. */
Kojto 120:7c328cabac7e 297 #define FSL_FEATURE_SOC_SPI_COUNT (0)
Kojto 120:7c328cabac7e 298 /* @brief TMR availability on the SoC. */
Kojto 120:7c328cabac7e 299 #define FSL_FEATURE_SOC_TMR_COUNT (0)
Kojto 120:7c328cabac7e 300 /* @brief TPM availability on the SoC. */
Kojto 120:7c328cabac7e 301 #define FSL_FEATURE_SOC_TPM_COUNT (0)
Kojto 120:7c328cabac7e 302 /* @brief TRGMUX availability on the SoC. */
Kojto 120:7c328cabac7e 303 #define FSL_FEATURE_SOC_TRGMUX_COUNT (0)
Kojto 120:7c328cabac7e 304 /* @brief TRIAMP availability on the SoC. */
Kojto 120:7c328cabac7e 305 #define FSL_FEATURE_SOC_TRIAMP_COUNT (0)
Kojto 120:7c328cabac7e 306 /* @brief TRNG availability on the SoC. */
Kojto 120:7c328cabac7e 307 #define FSL_FEATURE_SOC_TRNG_COUNT (0)
Kojto 120:7c328cabac7e 308 /* @brief TSI availability on the SoC. */
Kojto 120:7c328cabac7e 309 #define FSL_FEATURE_SOC_TSI_COUNT (0)
Kojto 120:7c328cabac7e 310 /* @brief TSTMR availability on the SoC. */
Kojto 120:7c328cabac7e 311 #define FSL_FEATURE_SOC_TSTMR_COUNT (0)
Kojto 120:7c328cabac7e 312 /* @brief UART availability on the SoC. */
Kojto 120:7c328cabac7e 313 #define FSL_FEATURE_SOC_UART_COUNT (3)
Kojto 120:7c328cabac7e 314 /* @brief USB availability on the SoC. */
Kojto 120:7c328cabac7e 315 #define FSL_FEATURE_SOC_USB_COUNT (1)
Kojto 120:7c328cabac7e 316 /* @brief USBDCD availability on the SoC. */
Kojto 120:7c328cabac7e 317 #define FSL_FEATURE_SOC_USBDCD_COUNT (0)
Kojto 120:7c328cabac7e 318 /* @brief USBHSDCD availability on the SoC. */
Kojto 120:7c328cabac7e 319 #define FSL_FEATURE_SOC_USBHSDCD_COUNT (0)
Kojto 120:7c328cabac7e 320 /* @brief USBPHY availability on the SoC. */
Kojto 120:7c328cabac7e 321 #define FSL_FEATURE_SOC_USBPHY_COUNT (0)
Kojto 120:7c328cabac7e 322 /* @brief VREF availability on the SoC. */
Kojto 120:7c328cabac7e 323 #define FSL_FEATURE_SOC_VREF_COUNT (1)
Kojto 120:7c328cabac7e 324 /* @brief WDOG availability on the SoC. */
Kojto 120:7c328cabac7e 325 #define FSL_FEATURE_SOC_WDOG_COUNT (1)
Kojto 120:7c328cabac7e 326 /* @brief XBAR availability on the SoC. */
Kojto 120:7c328cabac7e 327 #define FSL_FEATURE_SOC_XBAR_COUNT (0)
Kojto 120:7c328cabac7e 328 /* @brief XBARA availability on the SoC. */
Kojto 120:7c328cabac7e 329 #define FSL_FEATURE_SOC_XBARA_COUNT (0)
Kojto 120:7c328cabac7e 330 /* @brief XBARB availability on the SoC. */
Kojto 120:7c328cabac7e 331 #define FSL_FEATURE_SOC_XBARB_COUNT (0)
Kojto 120:7c328cabac7e 332 /* @brief XCVR availability on the SoC. */
Kojto 120:7c328cabac7e 333 #define FSL_FEATURE_SOC_XCVR_COUNT (0)
Kojto 120:7c328cabac7e 334 /* @brief XRDC availability on the SoC. */
Kojto 120:7c328cabac7e 335 #define FSL_FEATURE_SOC_XRDC_COUNT (0)
Kojto 120:7c328cabac7e 336 /* @brief ZLL availability on the SoC. */
Kojto 120:7c328cabac7e 337 #define FSL_FEATURE_SOC_ZLL_COUNT (0)
Kojto 120:7c328cabac7e 338
Kojto 120:7c328cabac7e 339 /* ADC16 module features */
Kojto 120:7c328cabac7e 340
Kojto 120:7c328cabac7e 341 /* @brief Has Programmable Gain Amplifier (PGA) in ADC (register PGA). */
Kojto 120:7c328cabac7e 342 #define FSL_FEATURE_ADC16_HAS_PGA (0)
Kojto 120:7c328cabac7e 343 /* @brief Has PGA chopping control in ADC (bit PGA[PGACHPb] or PGA[PGACHP]). */
Kojto 120:7c328cabac7e 344 #define FSL_FEATURE_ADC16_HAS_PGA_CHOPPING (0)
Kojto 120:7c328cabac7e 345 /* @brief Has PGA offset measurement mode in ADC (bit PGA[PGAOFSM]). */
Kojto 120:7c328cabac7e 346 #define FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT (0)
Kojto 120:7c328cabac7e 347 /* @brief Has DMA support (bit SC2[DMAEN] or SC4[DMAEN]). */
Kojto 120:7c328cabac7e 348 #define FSL_FEATURE_ADC16_HAS_DMA (1)
Kojto 120:7c328cabac7e 349 /* @brief Has differential mode (bitfield SC1x[DIFF]). */
Kojto 120:7c328cabac7e 350 #define FSL_FEATURE_ADC16_HAS_DIFF_MODE (1)
Kojto 120:7c328cabac7e 351 /* @brief Has FIFO (bit SC4[AFDEP]). */
Kojto 120:7c328cabac7e 352 #define FSL_FEATURE_ADC16_HAS_FIFO (0)
Kojto 120:7c328cabac7e 353 /* @brief FIFO size if available (bitfield SC4[AFDEP]). */
Kojto 120:7c328cabac7e 354 #define FSL_FEATURE_ADC16_FIFO_SIZE (0)
Kojto 120:7c328cabac7e 355 /* @brief Has channel set a/b multiplexor (bitfield CFG2[MUXSEL]). */
Kojto 120:7c328cabac7e 356 #define FSL_FEATURE_ADC16_HAS_MUX_SELECT (1)
Kojto 120:7c328cabac7e 357 /* @brief Has HW trigger masking (bitfield SC5[HTRGMASKE]. */
Kojto 120:7c328cabac7e 358 #define FSL_FEATURE_ADC16_HAS_HW_TRIGGER_MASK (0)
Kojto 120:7c328cabac7e 359 /* @brief Has calibration feature (bit SC3[CAL] and registers CLPx, CLMx). */
Kojto 120:7c328cabac7e 360 #define FSL_FEATURE_ADC16_HAS_CALIBRATION (1)
Kojto 120:7c328cabac7e 361 /* @brief Has HW averaging (bit SC3[AVGE]). */
Kojto 120:7c328cabac7e 362 #define FSL_FEATURE_ADC16_HAS_HW_AVERAGE (1)
Kojto 120:7c328cabac7e 363 /* @brief Has offset correction (register OFS). */
Kojto 120:7c328cabac7e 364 #define FSL_FEATURE_ADC16_HAS_OFFSET_CORRECTION (1)
Kojto 120:7c328cabac7e 365 /* @brief Maximum ADC resolution. */
Kojto 120:7c328cabac7e 366 #define FSL_FEATURE_ADC16_MAX_RESOLUTION (16)
Kojto 120:7c328cabac7e 367 /* @brief Number of SC1x and Rx register pairs (conversion control and result registers). */
Kojto 120:7c328cabac7e 368 #define FSL_FEATURE_ADC16_CONVERSION_CONTROL_COUNT (2)
Kojto 120:7c328cabac7e 369
Kojto 120:7c328cabac7e 370 /* CMP module features */
Kojto 120:7c328cabac7e 371
Kojto 120:7c328cabac7e 372 /* @brief Has Trigger mode in CMP (register bit field CR1[TRIGM]). */
Kojto 120:7c328cabac7e 373 #define FSL_FEATURE_CMP_HAS_TRIGGER_MODE (1)
Kojto 120:7c328cabac7e 374 /* @brief Has Window mode in CMP (register bit field CR1[WE]). */
Kojto 120:7c328cabac7e 375 #define FSL_FEATURE_CMP_HAS_WINDOW_MODE (1)
Kojto 120:7c328cabac7e 376 /* @brief Has External sample supported in CMP (register bit field CR1[SE]). */
Kojto 120:7c328cabac7e 377 #define FSL_FEATURE_CMP_HAS_EXTERNAL_SAMPLE_SUPPORT (1)
Kojto 120:7c328cabac7e 378 /* @brief Has DMA support in CMP (register bit field SCR[DMAEN]). */
Kojto 120:7c328cabac7e 379 #define FSL_FEATURE_CMP_HAS_DMA (1)
Kojto 120:7c328cabac7e 380 /* @brief Has Pass Through mode in CMP (register bit field MUXCR[PSTM]). */
Kojto 120:7c328cabac7e 381 #define FSL_FEATURE_CMP_HAS_PASS_THROUGH_MODE (0)
Kojto 120:7c328cabac7e 382 /* @brief Has DAC Test function in CMP (register DACTEST). */
Kojto 120:7c328cabac7e 383 #define FSL_FEATURE_CMP_HAS_DAC_TEST (0)
Kojto 120:7c328cabac7e 384
Kojto 120:7c328cabac7e 385 /* CRC module features */
Kojto 120:7c328cabac7e 386
Kojto 120:7c328cabac7e 387 /* @brief Has data register with name CRC */
Kojto 120:7c328cabac7e 388 #define FSL_FEATURE_CRC_HAS_CRC_REG (0)
Kojto 120:7c328cabac7e 389
Kojto 120:7c328cabac7e 390 /* DAC module features */
Kojto 120:7c328cabac7e 391
Kojto 120:7c328cabac7e 392 /* @brief Define the size of hardware buffer */
Kojto 120:7c328cabac7e 393 #define FSL_FEATURE_DAC_BUFFER_SIZE (16)
Kojto 120:7c328cabac7e 394 /* @brief Define whether the buffer supports watermark event detection or not. */
Kojto 120:7c328cabac7e 395 #define FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION (1)
Kojto 120:7c328cabac7e 396 /* @brief Define whether the buffer supports watermark selection detection or not. */
Kojto 120:7c328cabac7e 397 #define FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION (1)
Kojto 120:7c328cabac7e 398 /* @brief Define whether the buffer supports watermark event 1 word before buffer upper limit. */
Kojto 120:7c328cabac7e 399 #define FSL_FEATURE_DAC_HAS_WATERMARK_1_WORD (1)
Kojto 120:7c328cabac7e 400 /* @brief Define whether the buffer supports watermark event 2 words before buffer upper limit. */
Kojto 120:7c328cabac7e 401 #define FSL_FEATURE_DAC_HAS_WATERMARK_2_WORDS (1)
Kojto 120:7c328cabac7e 402 /* @brief Define whether the buffer supports watermark event 3 words before buffer upper limit. */
Kojto 120:7c328cabac7e 403 #define FSL_FEATURE_DAC_HAS_WATERMARK_3_WORDS (1)
Kojto 120:7c328cabac7e 404 /* @brief Define whether the buffer supports watermark event 4 words before buffer upper limit. */
Kojto 120:7c328cabac7e 405 #define FSL_FEATURE_DAC_HAS_WATERMARK_4_WORDS (1)
Kojto 120:7c328cabac7e 406 /* @brief Define whether FIFO buffer mode is available or not. */
Kojto 120:7c328cabac7e 407 #define FSL_FEATURE_DAC_HAS_BUFFER_FIFO_MODE (1)
Kojto 120:7c328cabac7e 408 /* @brief Define whether swing buffer mode is available or not.. */
Kojto 120:7c328cabac7e 409 #define FSL_FEATURE_DAC_HAS_BUFFER_SWING_MODE (1)
Kojto 120:7c328cabac7e 410
Kojto 120:7c328cabac7e 411 /* EDMA module features */
Kojto 120:7c328cabac7e 412
Kojto 120:7c328cabac7e 413 /* @brief Number of DMA channels (related to number of registers TCD, DCHPRI, bit fields ERQ[ERQn], EEI[EEIn], INT[INTn], ERR[ERRn], HRS[HRSn] and bit field widths ES[ERRCHN], CEEI[CEEI], SEEI[SEEI], CERQ[CERQ], SERQ[SERQ], CDNE[CDNE], SSRT[SSRT], CERR[CERR], CINT[CINT], TCDn_CITER_ELINKYES[LINKCH], TCDn_CSR[MAJORLINKCH], TCDn_BITER_ELINKYES[LINKCH]). (Valid only for eDMA modules.) */
Kojto 120:7c328cabac7e 414 #define FSL_FEATURE_EDMA_MODULE_CHANNEL (16)
Kojto 120:7c328cabac7e 415 /* @brief Total number of DMA channels on all modules. */
Kojto 120:7c328cabac7e 416 #define FSL_FEATURE_EDMA_DMAMUX_CHANNELS (FSL_FEATURE_SOC_EDMA_COUNT * 16)
Kojto 120:7c328cabac7e 417 /* @brief Number of DMA channel groups (register bit fields CR[ERGA], CR[GRPnPRI], ES[GPE], DCHPRIn[GRPPRI]). (Valid only for eDMA modules.) */
Kojto 120:7c328cabac7e 418 #define FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT (1)
Kojto 120:7c328cabac7e 419 /* @brief Has DMA_Error interrupt vector. */
Kojto 120:7c328cabac7e 420 #define FSL_FEATURE_EDMA_HAS_ERROR_IRQ (1)
Kojto 120:7c328cabac7e 421 /* @brief Number of DMA channels with asynchronous request capability (register EARS). (Valid only for eDMA modules.) */
Kojto 120:7c328cabac7e 422 #define FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT (16)
Kojto 120:7c328cabac7e 423
Kojto 120:7c328cabac7e 424 /* DMAMUX module features */
Kojto 120:7c328cabac7e 425
Kojto 120:7c328cabac7e 426 /* @brief Number of DMA channels (related to number of register CHCFGn). */
Kojto 120:7c328cabac7e 427 #define FSL_FEATURE_DMAMUX_MODULE_CHANNEL (16)
Kojto 120:7c328cabac7e 428 /* @brief Total number of DMA channels on all modules. */
Kojto 120:7c328cabac7e 429 #define FSL_FEATURE_DMAMUX_DMAMUX_CHANNELS (FSL_FEATURE_SOC_DMAMUX_COUNT * 16)
Kojto 120:7c328cabac7e 430 /* @brief Has the periodic trigger capability for the triggered DMA channel 0 (register bit CHCFG0[TRIG]). */
Kojto 120:7c328cabac7e 431 #define FSL_FEATURE_DMAMUX_HAS_TRIG (1)
Kojto 120:7c328cabac7e 432
Kojto 120:7c328cabac7e 433 /* EWM module features */
Kojto 120:7c328cabac7e 434
Kojto 120:7c328cabac7e 435 /* @brief Has clock select (register CLKCTRL). */
Kojto 120:7c328cabac7e 436 #define FSL_FEATURE_EWM_HAS_CLOCK_SELECT (0)
Kojto 120:7c328cabac7e 437 /* @brief Has clock prescaler (register CLKPRESCALER). */
Kojto 120:7c328cabac7e 438 #define FSL_FEATURE_EWM_HAS_PRESCALER (1)
Kojto 120:7c328cabac7e 439
Kojto 120:7c328cabac7e 440 /* FLEXBUS module features */
Kojto 120:7c328cabac7e 441
Kojto 120:7c328cabac7e 442 /* No feature definitions */
Kojto 120:7c328cabac7e 443
Kojto 120:7c328cabac7e 444 /* FLASH module features */
Kojto 120:7c328cabac7e 445
Kojto 120:7c328cabac7e 446 /* @brief Is of type FTFA. */
Kojto 120:7c328cabac7e 447 #define FSL_FEATURE_FLASH_IS_FTFA (1)
Kojto 120:7c328cabac7e 448 /* @brief Is of type FTFE. */
Kojto 120:7c328cabac7e 449 #define FSL_FEATURE_FLASH_IS_FTFE (0)
Kojto 120:7c328cabac7e 450 /* @brief Is of type FTFL. */
Kojto 120:7c328cabac7e 451 #define FSL_FEATURE_FLASH_IS_FTFL (0)
Kojto 120:7c328cabac7e 452 /* @brief Has flags indicating the status of the FlexRAM (register bits FCNFG[EEERDY], FCNFG[RAMRDY] and FCNFG[PFLSH]). */
Kojto 120:7c328cabac7e 453 #define FSL_FEATURE_FLASH_HAS_FLEX_RAM_FLAGS (0)
Kojto 120:7c328cabac7e 454 /* @brief Has program flash swapping status flag (register bit FCNFG[SWAP]). */
Kojto 120:7c328cabac7e 455 #define FSL_FEATURE_FLASH_HAS_PFLASH_SWAPPING_STATUS_FLAG (0)
Kojto 120:7c328cabac7e 456 /* @brief Has EEPROM region protection (register FEPROT). */
Kojto 120:7c328cabac7e 457 #define FSL_FEATURE_FLASH_HAS_EEROM_REGION_PROTECTION (0)
Kojto 120:7c328cabac7e 458 /* @brief Has data flash region protection (register FDPROT). */
Kojto 120:7c328cabac7e 459 #define FSL_FEATURE_FLASH_HAS_DATA_FLASH_REGION_PROTECTION (0)
Kojto 120:7c328cabac7e 460 /* @brief Has flash access control (registers XACCHn, SACCHn, where n is a number, FACSS and FACSN). */
Kojto 120:7c328cabac7e 461 #define FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL (1)
Kojto 120:7c328cabac7e 462 /* @brief Has flash cache control in FMC module. */
Kojto 120:7c328cabac7e 463 #define FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS (1)
Kojto 120:7c328cabac7e 464 /* @brief Has flash cache control in MCM module. */
Kojto 120:7c328cabac7e 465 #define FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS (0)
Kojto 120:7c328cabac7e 466 /* @brief P-Flash start address. */
Kojto 120:7c328cabac7e 467 #define FSL_FEATURE_FLASH_PFLASH_START_ADDRESS (0x00000000)
Kojto 120:7c328cabac7e 468 /* @brief P-Flash block count. */
Kojto 120:7c328cabac7e 469 #define FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT (2)
Kojto 120:7c328cabac7e 470 /* @brief P-Flash block size. */
Kojto 120:7c328cabac7e 471 #define FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE (262144)
Kojto 120:7c328cabac7e 472 /* @brief P-Flash sector size. */
Kojto 120:7c328cabac7e 473 #define FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE (2048)
Kojto 120:7c328cabac7e 474 /* @brief P-Flash write unit size. */
Kojto 120:7c328cabac7e 475 #define FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE (4)
Kojto 120:7c328cabac7e 476 /* @brief P-Flash data path width. */
Kojto 120:7c328cabac7e 477 #define FSL_FEATURE_FLASH_PFLASH_BLOCK_DATA_PATH_WIDTH (8)
Kojto 120:7c328cabac7e 478 /* @brief P-Flash block swap feature. */
Kojto 120:7c328cabac7e 479 #define FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP (0)
Kojto 120:7c328cabac7e 480 /* @brief Has FlexNVM memory. */
Kojto 120:7c328cabac7e 481 #define FSL_FEATURE_FLASH_HAS_FLEX_NVM (0)
Kojto 120:7c328cabac7e 482 /* @brief FlexNVM start address. (Valid only if FlexNVM is available.) */
Kojto 120:7c328cabac7e 483 #define FSL_FEATURE_FLASH_FLEX_NVM_START_ADDRESS (0x00000000)
Kojto 120:7c328cabac7e 484 /* @brief FlexNVM block count. */
Kojto 120:7c328cabac7e 485 #define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_COUNT (0)
Kojto 120:7c328cabac7e 486 /* @brief FlexNVM block size. */
Kojto 120:7c328cabac7e 487 #define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SIZE (0)
Kojto 120:7c328cabac7e 488 /* @brief FlexNVM sector size. */
Kojto 120:7c328cabac7e 489 #define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SECTOR_SIZE (0)
Kojto 120:7c328cabac7e 490 /* @brief FlexNVM write unit size. */
Kojto 120:7c328cabac7e 491 #define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_WRITE_UNIT_SIZE (0)
Kojto 120:7c328cabac7e 492 /* @brief FlexNVM data path width. */
Kojto 120:7c328cabac7e 493 #define FSL_FEATURE_FLASH_FLEX_BLOCK_DATA_PATH_WIDTH (0)
Kojto 120:7c328cabac7e 494 /* @brief Has FlexRAM memory. */
Kojto 120:7c328cabac7e 495 #define FSL_FEATURE_FLASH_HAS_FLEX_RAM (0)
Kojto 120:7c328cabac7e 496 /* @brief FlexRAM start address. (Valid only if FlexRAM is available.) */
Kojto 120:7c328cabac7e 497 #define FSL_FEATURE_FLASH_FLEX_RAM_START_ADDRESS (0x00000000)
Kojto 120:7c328cabac7e 498 /* @brief FlexRAM size. */
Kojto 120:7c328cabac7e 499 #define FSL_FEATURE_FLASH_FLEX_RAM_SIZE (0)
Kojto 120:7c328cabac7e 500 /* @brief Has 0x00 Read 1s Block command. */
Kojto 120:7c328cabac7e 501 #define FSL_FEATURE_FLASH_HAS_READ_1S_BLOCK_CMD (1)
Kojto 120:7c328cabac7e 502 /* @brief Has 0x01 Read 1s Section command. */
Kojto 120:7c328cabac7e 503 #define FSL_FEATURE_FLASH_HAS_READ_1S_SECTION_CMD (1)
Kojto 120:7c328cabac7e 504 /* @brief Has 0x02 Program Check command. */
Kojto 120:7c328cabac7e 505 #define FSL_FEATURE_FLASH_HAS_PROGRAM_CHECK_CMD (1)
Kojto 120:7c328cabac7e 506 /* @brief Has 0x03 Read Resource command. */
Kojto 120:7c328cabac7e 507 #define FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD (1)
Kojto 120:7c328cabac7e 508 /* @brief Has 0x06 Program Longword command. */
Kojto 120:7c328cabac7e 509 #define FSL_FEATURE_FLASH_HAS_PROGRAM_LONGWORD_CMD (1)
Kojto 120:7c328cabac7e 510 /* @brief Has 0x07 Program Phrase command. */
Kojto 120:7c328cabac7e 511 #define FSL_FEATURE_FLASH_HAS_PROGRAM_PHRASE_CMD (0)
Kojto 120:7c328cabac7e 512 /* @brief Has 0x08 Erase Flash Block command. */
Kojto 120:7c328cabac7e 513 #define FSL_FEATURE_FLASH_HAS_ERASE_FLASH_BLOCK_CMD (1)
Kojto 120:7c328cabac7e 514 /* @brief Has 0x09 Erase Flash Sector command. */
Kojto 120:7c328cabac7e 515 #define FSL_FEATURE_FLASH_HAS_ERASE_FLASH_SECTOR_CMD (1)
Kojto 120:7c328cabac7e 516 /* @brief Has 0x0B Program Section command. */
Kojto 120:7c328cabac7e 517 #define FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD (0)
Kojto 120:7c328cabac7e 518 /* @brief Has 0x40 Read 1s All Blocks command. */
Kojto 120:7c328cabac7e 519 #define FSL_FEATURE_FLASH_HAS_READ_1S_ALL_BLOCKS_CMD (1)
Kojto 120:7c328cabac7e 520 /* @brief Has 0x41 Read Once command. */
Kojto 120:7c328cabac7e 521 #define FSL_FEATURE_FLASH_HAS_READ_ONCE_CMD (1)
Kojto 120:7c328cabac7e 522 /* @brief Has 0x43 Program Once command. */
Kojto 120:7c328cabac7e 523 #define FSL_FEATURE_FLASH_HAS_PROGRAM_ONCE_CMD (1)
Kojto 120:7c328cabac7e 524 /* @brief Has 0x44 Erase All Blocks command. */
Kojto 120:7c328cabac7e 525 #define FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_CMD (1)
Kojto 120:7c328cabac7e 526 /* @brief Has 0x45 Verify Backdoor Access Key command. */
Kojto 120:7c328cabac7e 527 #define FSL_FEATURE_FLASH_HAS_VERIFY_BACKDOOR_ACCESS_KEY_CMD (1)
Kojto 120:7c328cabac7e 528 /* @brief Has 0x46 Swap Control command. */
Kojto 120:7c328cabac7e 529 #define FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD (0)
Kojto 120:7c328cabac7e 530 /* @brief Has 0x49 Erase All Blocks Unsecure command. */
Kojto 120:7c328cabac7e 531 #define FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD (0)
Kojto 120:7c328cabac7e 532 /* @brief Has 0x80 Program Partition command. */
Kojto 120:7c328cabac7e 533 #define FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD (0)
Kojto 120:7c328cabac7e 534 /* @brief Has 0x81 Set FlexRAM Function command. */
Kojto 120:7c328cabac7e 535 #define FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD (0)
Kojto 120:7c328cabac7e 536 /* @brief P-Flash Erase/Read 1st all block command address alignment. */
Kojto 120:7c328cabac7e 537 #define FSL_FEATURE_FLASH_PFLASH_BLOCK_CMD_ADDRESS_ALIGMENT (4)
Kojto 120:7c328cabac7e 538 /* @brief P-Flash Erase sector command address alignment. */
Kojto 120:7c328cabac7e 539 #define FSL_FEATURE_FLASH_PFLASH_SECTOR_CMD_ADDRESS_ALIGMENT (8)
Kojto 120:7c328cabac7e 540 /* @brief P-Flash Rrogram/Verify section command address alignment. */
Kojto 120:7c328cabac7e 541 #define FSL_FEATURE_FLASH_PFLASH_SECTION_CMD_ADDRESS_ALIGMENT (8)
Kojto 120:7c328cabac7e 542 /* @brief P-Flash Read resource command address alignment. */
Kojto 120:7c328cabac7e 543 #define FSL_FEATURE_FLASH_PFLASH_RESOURCE_CMD_ADDRESS_ALIGMENT (4)
Kojto 120:7c328cabac7e 544 /* @brief P-Flash Program check command address alignment. */
Kojto 120:7c328cabac7e 545 #define FSL_FEATURE_FLASH_PFLASH_CHECK_CMD_ADDRESS_ALIGMENT (4)
Kojto 120:7c328cabac7e 546 /* @brief P-Flash Program check command address alignment. */
Kojto 120:7c328cabac7e 547 #define FSL_FEATURE_FLASH_PFLASH_SWAP_CONTROL_CMD_ADDRESS_ALIGMENT (0)
Kojto 120:7c328cabac7e 548 /* @brief FlexNVM Erase/Read 1st all block command address alignment. */
Kojto 120:7c328cabac7e 549 #define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_CMD_ADDRESS_ALIGMENT (0)
Kojto 120:7c328cabac7e 550 /* @brief FlexNVM Erase sector command address alignment. */
Kojto 120:7c328cabac7e 551 #define FSL_FEATURE_FLASH_FLEX_NVM_SECTOR_CMD_ADDRESS_ALIGMENT (0)
Kojto 120:7c328cabac7e 552 /* @brief FlexNVM Rrogram/Verify section command address alignment. */
Kojto 120:7c328cabac7e 553 #define FSL_FEATURE_FLASH_FLEX_NVM_SECTION_CMD_ADDRESS_ALIGMENT (0)
Kojto 120:7c328cabac7e 554 /* @brief FlexNVM Read resource command address alignment. */
Kojto 120:7c328cabac7e 555 #define FSL_FEATURE_FLASH_FLEX_NVM_RESOURCE_CMD_ADDRESS_ALIGMENT (0)
Kojto 120:7c328cabac7e 556 /* @brief FlexNVM Program check command address alignment. */
Kojto 120:7c328cabac7e 557 #define FSL_FEATURE_FLASH_FLEX_NVM_CHECK_CMD_ADDRESS_ALIGMENT (0)
Kojto 120:7c328cabac7e 558 /* @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 559 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 560 /* @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 561 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 562 /* @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 563 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 564 /* @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 565 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 566 /* @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 567 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 568 /* @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 569 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 570 /* @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 571 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 572 /* @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 573 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 574 /* @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 575 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 576 /* @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 577 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 578 /* @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 579 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 580 /* @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 581 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 582 /* @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 583 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 584 /* @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 585 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 586 /* @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 587 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 588 /* @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
Kojto 120:7c328cabac7e 589 #define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111 (0xFFFFFFFF)
Kojto 120:7c328cabac7e 590 /* @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 591 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0000 (0xFFFF)
Kojto 120:7c328cabac7e 592 /* @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 593 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0001 (0xFFFF)
Kojto 120:7c328cabac7e 594 /* @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 595 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0010 (0xFFFF)
Kojto 120:7c328cabac7e 596 /* @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 597 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0011 (0xFFFF)
Kojto 120:7c328cabac7e 598 /* @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 599 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0100 (0xFFFF)
Kojto 120:7c328cabac7e 600 /* @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 601 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0101 (0xFFFF)
Kojto 120:7c328cabac7e 602 /* @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 603 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0110 (0xFFFF)
Kojto 120:7c328cabac7e 604 /* @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 605 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0111 (0xFFFF)
Kojto 120:7c328cabac7e 606 /* @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 607 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1000 (0xFFFF)
Kojto 120:7c328cabac7e 608 /* @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 609 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1001 (0xFFFF)
Kojto 120:7c328cabac7e 610 /* @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 611 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1010 (0xFFFF)
Kojto 120:7c328cabac7e 612 /* @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 613 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1011 (0xFFFF)
Kojto 120:7c328cabac7e 614 /* @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 615 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1100 (0xFFFF)
Kojto 120:7c328cabac7e 616 /* @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 617 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1101 (0xFFFF)
Kojto 120:7c328cabac7e 618 /* @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 619 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1110 (0xFFFF)
Kojto 120:7c328cabac7e 620 /* @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
Kojto 120:7c328cabac7e 621 #define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1111 (0xFFFF)
Kojto 120:7c328cabac7e 622
Kojto 120:7c328cabac7e 623 /* FTM module features */
Kojto 120:7c328cabac7e 624
Kojto 120:7c328cabac7e 625 /* @brief Number of channels. */
Kojto 120:7c328cabac7e 626 #define FSL_FEATURE_FTM_CHANNEL_COUNTn(x) \
Kojto 120:7c328cabac7e 627 ((x) == FTM0 ? (8) : \
Kojto 120:7c328cabac7e 628 ((x) == FTM1 ? (2) : \
Kojto 120:7c328cabac7e 629 ((x) == FTM2 ? (2) : \
Kojto 120:7c328cabac7e 630 ((x) == FTM3 ? (8) : (-1)))))
Kojto 120:7c328cabac7e 631 /* @brief Has counter reset by the selected input capture event (register bits C0SC[ICRST], C1SC[ICRST], ...). */
Kojto 120:7c328cabac7e 632 #define FSL_FEATURE_FTM_HAS_COUNTER_RESET_BY_CAPTURE_EVENT (1)
Kojto 120:7c328cabac7e 633 /* @brief Enable pwm output for the module. */
Kojto 120:7c328cabac7e 634 #define FSL_FEATURE_FTM_HAS_ENABLE_PWM_OUTPUT (0)
Kojto 120:7c328cabac7e 635 /* @brief Has half-cycle reload for the module. */
Kojto 120:7c328cabac7e 636 #define FSL_FEATURE_FTM_HAS_HALFCYCLE_RELOAD (0)
Kojto 120:7c328cabac7e 637 /* @brief Has reload interrupt. */
Kojto 120:7c328cabac7e 638 #define FSL_FEATURE_FTM_HAS_RELOAD_INTERRUPT (0)
Kojto 120:7c328cabac7e 639 /* @brief Has reload initialization trigger. */
Kojto 120:7c328cabac7e 640 #define FSL_FEATURE_FTM_HAS_RELOAD_INITIALIZATION_TRIGGER (0)
Kojto 120:7c328cabac7e 641
Kojto 120:7c328cabac7e 642 /* I2C module features */
Kojto 120:7c328cabac7e 643
Kojto 120:7c328cabac7e 644 /* @brief Has System Management Bus support (registers SMB, A2, SLTL and SLTH). */
Kojto 120:7c328cabac7e 645 #define FSL_FEATURE_I2C_HAS_SMBUS (1)
Kojto 120:7c328cabac7e 646 /* @brief Maximum supported baud rate in kilobit per second. */
Kojto 120:7c328cabac7e 647 #define FSL_FEATURE_I2C_MAX_BAUD_KBPS (400)
Kojto 120:7c328cabac7e 648 /* @brief Is affected by errata with ID 6070 (repeat start cannot be generated if the F[MULT] bit field is set to a non-zero value). */
Kojto 120:7c328cabac7e 649 #define FSL_FEATURE_I2C_HAS_ERRATA_6070 (0)
Kojto 120:7c328cabac7e 650 /* @brief Has DMA support (register bit C1[DMAEN]). */
Kojto 120:7c328cabac7e 651 #define FSL_FEATURE_I2C_HAS_DMA_SUPPORT (1)
Kojto 120:7c328cabac7e 652 /* @brief Has I2C bus start and stop detection (register bits FLT[SSIE], FLT[STARTF] and FLT[STOPF]). */
Kojto 120:7c328cabac7e 653 #define FSL_FEATURE_I2C_HAS_START_STOP_DETECT (1)
Kojto 120:7c328cabac7e 654 /* @brief Has I2C bus stop detection (register bits FLT[STOPIE] and FLT[STOPF]). */
Kojto 120:7c328cabac7e 655 #define FSL_FEATURE_I2C_HAS_STOP_DETECT (0)
Kojto 120:7c328cabac7e 656 /* @brief Has I2C bus stop hold off (register bit FLT[SHEN]). */
Kojto 120:7c328cabac7e 657 #define FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF (1)
Kojto 120:7c328cabac7e 658 /* @brief Maximum width of the glitch filter in number of bus clocks. */
Kojto 120:7c328cabac7e 659 #define FSL_FEATURE_I2C_MAX_GLITCH_FILTER_WIDTH (15)
Kojto 120:7c328cabac7e 660 /* @brief Has control of the drive capability of the I2C pins. */
Kojto 120:7c328cabac7e 661 #define FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION (1)
Kojto 120:7c328cabac7e 662 /* @brief Has double buffering support (register S2). */
Kojto 120:7c328cabac7e 663 #define FSL_FEATURE_I2C_HAS_DOUBLE_BUFFERING (0)
Kojto 120:7c328cabac7e 664
Kojto 120:7c328cabac7e 665 /* SAI module features */
Kojto 120:7c328cabac7e 666
Kojto 120:7c328cabac7e 667 /* @brief Receive/transmit FIFO size in item count (register bit fields TCSR[FRDE], TCSR[FRIE], TCSR[FRF], TCR1[TFW], RCSR[FRDE], RCSR[FRIE], RCSR[FRF], RCR1[RFW], registers TFRn, RFRn). */
Kojto 120:7c328cabac7e 668 #define FSL_FEATURE_SAI_FIFO_COUNT (8)
Kojto 120:7c328cabac7e 669 /* @brief Receive/transmit channel number (register bit fields TCR3[TCE], RCR3[RCE], registers TDRn and RDRn). */
Kojto 120:7c328cabac7e 670 #define FSL_FEATURE_SAI_CHANNEL_COUNT (1)
Kojto 120:7c328cabac7e 671 /* @brief Maximum words per frame (register bit fields TCR3[WDFL], TCR4[FRSZ], TMR[TWM], RCR3[WDFL], RCR4[FRSZ], RMR[RWM]). */
Kojto 120:7c328cabac7e 672 #define FSL_FEATURE_SAI_MAX_WORDS_PER_FRAME (16)
Kojto 120:7c328cabac7e 673 /* @brief Has support of combining multiple data channel FIFOs into single channel FIFO (register bit fields TCR3[CFR], TCR4[FCOMB], TFR0[WCP], TFR1[WCP], RCR3[CFR], RCR4[FCOMB], RFR0[RCP], RFR1[RCP]). */
Kojto 120:7c328cabac7e 674 #define FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (0)
Kojto 120:7c328cabac7e 675 /* @brief Has packing of 8-bit and 16-bit data into each 32-bit FIFO word (register bit fields TCR4[FPACK], RCR4[FPACK]). */
Kojto 120:7c328cabac7e 676 #define FSL_FEATURE_SAI_HAS_FIFO_PACKING (1)
Kojto 120:7c328cabac7e 677 /* @brief Configures when the SAI will continue transmitting after a FIFO error has been detected (register bit fields TCR4[FCONT], RCR4[FCONT]). */
Kojto 120:7c328cabac7e 678 #define FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR (1)
Kojto 120:7c328cabac7e 679 /* @brief Configures if the frame sync is generated internally, a frame sync is only generated when the FIFO warning flag is clear or continuously (register bit fields TCR4[ONDEM], RCR4[ONDEM]). */
Kojto 120:7c328cabac7e 680 #define FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE (1)
Kojto 120:7c328cabac7e 681 /* @brief Simplified bit clock source and asynchronous/synchronous mode selection (register bit fields TCR2[CLKMODE], RCR2[CLKMODE]), in comparison with the exclusively implemented TCR2[SYNC,BCS,BCI,MSEL], RCR2[SYNC,BCS,BCI,MSEL]. */
Kojto 120:7c328cabac7e 682 #define FSL_FEATURE_SAI_HAS_CLOCKING_MODE (0)
Kojto 120:7c328cabac7e 683 /* @brief Has register for configuration of the MCLK divide ratio (register bit fields MDR[FRACT], MDR[DIVIDE]). */
Kojto 120:7c328cabac7e 684 #define FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER (1)
Kojto 120:7c328cabac7e 685 /* @brief Ihe interrupt source number */
Kojto 120:7c328cabac7e 686 #define FSL_FEATURE_SAI_INT_SOURCE_NUM (2)
Kojto 120:7c328cabac7e 687 /* @brief Has register of MCR. */
Kojto 120:7c328cabac7e 688 #define FSL_FEATURE_SAI_HAS_MCR (1)
Kojto 120:7c328cabac7e 689 /* @brief Has register of MDR */
Kojto 120:7c328cabac7e 690 #define FSL_FEATURE_SAI_HAS_MDR (1)
Kojto 120:7c328cabac7e 691
Kojto 120:7c328cabac7e 692 /* LLWU module features */
Kojto 120:7c328cabac7e 693
Kojto 120:7c328cabac7e 694 #if defined(CPU_MK22FN512CAP12) || defined(CPU_MK22FN512VDC12) || defined(CPU_MK22FN512VLL12)
Kojto 120:7c328cabac7e 695 /* @brief Maximum number of pins (maximal index plus one) connected to LLWU device. */
Kojto 120:7c328cabac7e 696 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN (16)
Kojto 120:7c328cabac7e 697 /* @brief Has pins 8-15 connected to LLWU device. */
Kojto 120:7c328cabac7e 698 #define FSL_FEATURE_LLWU_EXTERNAL_PIN_GROUP2 (1)
Kojto 120:7c328cabac7e 699 /* @brief Maximum number of internal modules connected to LLWU device. */
Kojto 120:7c328cabac7e 700 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE (8)
Kojto 120:7c328cabac7e 701 /* @brief Number of digital filters. */
Kojto 120:7c328cabac7e 702 #define FSL_FEATURE_LLWU_HAS_PIN_FILTER (2)
Kojto 120:7c328cabac7e 703 /* @brief Has MF5 register. */
Kojto 120:7c328cabac7e 704 #define FSL_FEATURE_LLWU_HAS_MF (0)
Kojto 120:7c328cabac7e 705 /* @brief Has PF register. */
Kojto 120:7c328cabac7e 706 #define FSL_FEATURE_LLWU_HAS_PF (0)
Kojto 120:7c328cabac7e 707 /* @brief Has possibility to enable reset in low leakage power mode and enable digital filter for RESET pin (register LLWU_RST). */
Kojto 120:7c328cabac7e 708 #define FSL_FEATURE_LLWU_HAS_RESET_ENABLE (0)
Kojto 120:7c328cabac7e 709 /* @brief Has external pin 0 connected to LLWU device. */
Kojto 120:7c328cabac7e 710 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN0 (1)
Kojto 120:7c328cabac7e 711 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 712 #define FSL_FEATURE_LLWU_PIN0_GPIO_IDX (GPIOE_IDX)
Kojto 120:7c328cabac7e 713 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 714 #define FSL_FEATURE_LLWU_PIN0_GPIO_PIN (1)
Kojto 120:7c328cabac7e 715 /* @brief Has external pin 1 connected to LLWU device. */
Kojto 120:7c328cabac7e 716 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN1 (1)
Kojto 120:7c328cabac7e 717 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 718 #define FSL_FEATURE_LLWU_PIN1_GPIO_IDX (GPIOE_IDX)
Kojto 120:7c328cabac7e 719 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 720 #define FSL_FEATURE_LLWU_PIN1_GPIO_PIN (2)
Kojto 120:7c328cabac7e 721 /* @brief Has external pin 2 connected to LLWU device. */
Kojto 120:7c328cabac7e 722 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN2 (1)
Kojto 120:7c328cabac7e 723 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 724 #define FSL_FEATURE_LLWU_PIN2_GPIO_IDX (GPIOE_IDX)
Kojto 120:7c328cabac7e 725 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 726 #define FSL_FEATURE_LLWU_PIN2_GPIO_PIN (4)
Kojto 120:7c328cabac7e 727 /* @brief Has external pin 3 connected to LLWU device. */
Kojto 120:7c328cabac7e 728 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN3 (1)
Kojto 120:7c328cabac7e 729 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 730 #define FSL_FEATURE_LLWU_PIN3_GPIO_IDX (GPIOA_IDX)
Kojto 120:7c328cabac7e 731 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 732 #define FSL_FEATURE_LLWU_PIN3_GPIO_PIN (4)
Kojto 120:7c328cabac7e 733 /* @brief Has external pin 4 connected to LLWU device. */
Kojto 120:7c328cabac7e 734 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN4 (1)
Kojto 120:7c328cabac7e 735 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 736 #define FSL_FEATURE_LLWU_PIN4_GPIO_IDX (GPIOA_IDX)
Kojto 120:7c328cabac7e 737 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 738 #define FSL_FEATURE_LLWU_PIN4_GPIO_PIN (13)
Kojto 120:7c328cabac7e 739 /* @brief Has external pin 5 connected to LLWU device. */
Kojto 120:7c328cabac7e 740 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN5 (1)
Kojto 120:7c328cabac7e 741 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 742 #define FSL_FEATURE_LLWU_PIN5_GPIO_IDX (GPIOB_IDX)
Kojto 120:7c328cabac7e 743 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 744 #define FSL_FEATURE_LLWU_PIN5_GPIO_PIN (0)
Kojto 120:7c328cabac7e 745 /* @brief Has external pin 6 connected to LLWU device. */
Kojto 120:7c328cabac7e 746 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN6 (1)
Kojto 120:7c328cabac7e 747 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 748 #define FSL_FEATURE_LLWU_PIN6_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 749 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 750 #define FSL_FEATURE_LLWU_PIN6_GPIO_PIN (1)
Kojto 120:7c328cabac7e 751 /* @brief Has external pin 7 connected to LLWU device. */
Kojto 120:7c328cabac7e 752 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN7 (1)
Kojto 120:7c328cabac7e 753 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 754 #define FSL_FEATURE_LLWU_PIN7_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 755 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 756 #define FSL_FEATURE_LLWU_PIN7_GPIO_PIN (3)
Kojto 120:7c328cabac7e 757 /* @brief Has external pin 8 connected to LLWU device. */
Kojto 120:7c328cabac7e 758 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN8 (1)
Kojto 120:7c328cabac7e 759 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 760 #define FSL_FEATURE_LLWU_PIN8_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 761 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 762 #define FSL_FEATURE_LLWU_PIN8_GPIO_PIN (4)
Kojto 120:7c328cabac7e 763 /* @brief Has external pin 9 connected to LLWU device. */
Kojto 120:7c328cabac7e 764 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN9 (1)
Kojto 120:7c328cabac7e 765 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 766 #define FSL_FEATURE_LLWU_PIN9_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 767 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 768 #define FSL_FEATURE_LLWU_PIN9_GPIO_PIN (5)
Kojto 120:7c328cabac7e 769 /* @brief Has external pin 10 connected to LLWU device. */
Kojto 120:7c328cabac7e 770 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN10 (1)
Kojto 120:7c328cabac7e 771 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 772 #define FSL_FEATURE_LLWU_PIN10_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 773 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 774 #define FSL_FEATURE_LLWU_PIN10_GPIO_PIN (6)
Kojto 120:7c328cabac7e 775 /* @brief Has external pin 11 connected to LLWU device. */
Kojto 120:7c328cabac7e 776 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN11 (1)
Kojto 120:7c328cabac7e 777 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 778 #define FSL_FEATURE_LLWU_PIN11_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 779 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 780 #define FSL_FEATURE_LLWU_PIN11_GPIO_PIN (11)
Kojto 120:7c328cabac7e 781 /* @brief Has external pin 12 connected to LLWU device. */
Kojto 120:7c328cabac7e 782 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN12 (1)
Kojto 120:7c328cabac7e 783 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 784 #define FSL_FEATURE_LLWU_PIN12_GPIO_IDX (GPIOD_IDX)
Kojto 120:7c328cabac7e 785 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 786 #define FSL_FEATURE_LLWU_PIN12_GPIO_PIN (0)
Kojto 120:7c328cabac7e 787 /* @brief Has external pin 13 connected to LLWU device. */
Kojto 120:7c328cabac7e 788 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN13 (1)
Kojto 120:7c328cabac7e 789 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 790 #define FSL_FEATURE_LLWU_PIN13_GPIO_IDX (GPIOD_IDX)
Kojto 120:7c328cabac7e 791 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 792 #define FSL_FEATURE_LLWU_PIN13_GPIO_PIN (2)
Kojto 120:7c328cabac7e 793 /* @brief Has external pin 14 connected to LLWU device. */
Kojto 120:7c328cabac7e 794 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN14 (1)
Kojto 120:7c328cabac7e 795 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 796 #define FSL_FEATURE_LLWU_PIN14_GPIO_IDX (GPIOD_IDX)
Kojto 120:7c328cabac7e 797 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 798 #define FSL_FEATURE_LLWU_PIN14_GPIO_PIN (4)
Kojto 120:7c328cabac7e 799 /* @brief Has external pin 15 connected to LLWU device. */
Kojto 120:7c328cabac7e 800 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN15 (1)
Kojto 120:7c328cabac7e 801 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 802 #define FSL_FEATURE_LLWU_PIN15_GPIO_IDX (GPIOD_IDX)
Kojto 120:7c328cabac7e 803 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 804 #define FSL_FEATURE_LLWU_PIN15_GPIO_PIN (6)
Kojto 120:7c328cabac7e 805 /* @brief Has external pin 16 connected to LLWU device. */
Kojto 120:7c328cabac7e 806 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN16 (0)
Kojto 120:7c328cabac7e 807 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 808 #define FSL_FEATURE_LLWU_PIN16_GPIO_IDX (0)
Kojto 120:7c328cabac7e 809 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 810 #define FSL_FEATURE_LLWU_PIN16_GPIO_PIN (0)
Kojto 120:7c328cabac7e 811 /* @brief Has external pin 17 connected to LLWU device. */
Kojto 120:7c328cabac7e 812 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN17 (0)
Kojto 120:7c328cabac7e 813 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 814 #define FSL_FEATURE_LLWU_PIN17_GPIO_IDX (0)
Kojto 120:7c328cabac7e 815 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 816 #define FSL_FEATURE_LLWU_PIN17_GPIO_PIN (0)
Kojto 120:7c328cabac7e 817 /* @brief Has external pin 18 connected to LLWU device. */
Kojto 120:7c328cabac7e 818 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN18 (0)
Kojto 120:7c328cabac7e 819 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 820 #define FSL_FEATURE_LLWU_PIN18_GPIO_IDX (0)
Kojto 120:7c328cabac7e 821 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 822 #define FSL_FEATURE_LLWU_PIN18_GPIO_PIN (0)
Kojto 120:7c328cabac7e 823 /* @brief Has external pin 19 connected to LLWU device. */
Kojto 120:7c328cabac7e 824 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN19 (0)
Kojto 120:7c328cabac7e 825 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 826 #define FSL_FEATURE_LLWU_PIN19_GPIO_IDX (0)
Kojto 120:7c328cabac7e 827 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 828 #define FSL_FEATURE_LLWU_PIN19_GPIO_PIN (0)
Kojto 120:7c328cabac7e 829 /* @brief Has external pin 20 connected to LLWU device. */
Kojto 120:7c328cabac7e 830 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN20 (0)
Kojto 120:7c328cabac7e 831 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 832 #define FSL_FEATURE_LLWU_PIN20_GPIO_IDX (0)
Kojto 120:7c328cabac7e 833 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 834 #define FSL_FEATURE_LLWU_PIN20_GPIO_PIN (0)
Kojto 120:7c328cabac7e 835 /* @brief Has external pin 21 connected to LLWU device. */
Kojto 120:7c328cabac7e 836 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN21 (0)
Kojto 120:7c328cabac7e 837 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 838 #define FSL_FEATURE_LLWU_PIN21_GPIO_IDX (0)
Kojto 120:7c328cabac7e 839 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 840 #define FSL_FEATURE_LLWU_PIN21_GPIO_PIN (0)
Kojto 120:7c328cabac7e 841 /* @brief Has external pin 22 connected to LLWU device. */
Kojto 120:7c328cabac7e 842 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN22 (0)
Kojto 120:7c328cabac7e 843 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 844 #define FSL_FEATURE_LLWU_PIN22_GPIO_IDX (0)
Kojto 120:7c328cabac7e 845 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 846 #define FSL_FEATURE_LLWU_PIN22_GPIO_PIN (0)
Kojto 120:7c328cabac7e 847 /* @brief Has external pin 23 connected to LLWU device. */
Kojto 120:7c328cabac7e 848 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN23 (0)
Kojto 120:7c328cabac7e 849 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 850 #define FSL_FEATURE_LLWU_PIN23_GPIO_IDX (0)
Kojto 120:7c328cabac7e 851 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 852 #define FSL_FEATURE_LLWU_PIN23_GPIO_PIN (0)
Kojto 120:7c328cabac7e 853 /* @brief Has external pin 24 connected to LLWU device. */
Kojto 120:7c328cabac7e 854 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN24 (0)
Kojto 120:7c328cabac7e 855 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 856 #define FSL_FEATURE_LLWU_PIN24_GPIO_IDX (0)
Kojto 120:7c328cabac7e 857 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 858 #define FSL_FEATURE_LLWU_PIN24_GPIO_PIN (0)
Kojto 120:7c328cabac7e 859 /* @brief Has external pin 25 connected to LLWU device. */
Kojto 120:7c328cabac7e 860 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN25 (0)
Kojto 120:7c328cabac7e 861 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 862 #define FSL_FEATURE_LLWU_PIN25_GPIO_IDX (0)
Kojto 120:7c328cabac7e 863 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 864 #define FSL_FEATURE_LLWU_PIN25_GPIO_PIN (0)
Kojto 120:7c328cabac7e 865 /* @brief Has external pin 26 connected to LLWU device. */
Kojto 120:7c328cabac7e 866 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN26 (0)
Kojto 120:7c328cabac7e 867 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 868 #define FSL_FEATURE_LLWU_PIN26_GPIO_IDX (0)
Kojto 120:7c328cabac7e 869 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 870 #define FSL_FEATURE_LLWU_PIN26_GPIO_PIN (0)
Kojto 120:7c328cabac7e 871 /* @brief Has external pin 27 connected to LLWU device. */
Kojto 120:7c328cabac7e 872 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN27 (0)
Kojto 120:7c328cabac7e 873 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 874 #define FSL_FEATURE_LLWU_PIN27_GPIO_IDX (0)
Kojto 120:7c328cabac7e 875 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 876 #define FSL_FEATURE_LLWU_PIN27_GPIO_PIN (0)
Kojto 120:7c328cabac7e 877 /* @brief Has external pin 28 connected to LLWU device. */
Kojto 120:7c328cabac7e 878 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN28 (0)
Kojto 120:7c328cabac7e 879 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 880 #define FSL_FEATURE_LLWU_PIN28_GPIO_IDX (0)
Kojto 120:7c328cabac7e 881 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 882 #define FSL_FEATURE_LLWU_PIN28_GPIO_PIN (0)
Kojto 120:7c328cabac7e 883 /* @brief Has external pin 29 connected to LLWU device. */
Kojto 120:7c328cabac7e 884 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN29 (0)
Kojto 120:7c328cabac7e 885 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 886 #define FSL_FEATURE_LLWU_PIN29_GPIO_IDX (0)
Kojto 120:7c328cabac7e 887 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 888 #define FSL_FEATURE_LLWU_PIN29_GPIO_PIN (0)
Kojto 120:7c328cabac7e 889 /* @brief Has external pin 30 connected to LLWU device. */
Kojto 120:7c328cabac7e 890 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN30 (0)
Kojto 120:7c328cabac7e 891 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 892 #define FSL_FEATURE_LLWU_PIN30_GPIO_IDX (0)
Kojto 120:7c328cabac7e 893 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 894 #define FSL_FEATURE_LLWU_PIN30_GPIO_PIN (0)
Kojto 120:7c328cabac7e 895 /* @brief Has external pin 31 connected to LLWU device. */
Kojto 120:7c328cabac7e 896 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN31 (0)
Kojto 120:7c328cabac7e 897 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 898 #define FSL_FEATURE_LLWU_PIN31_GPIO_IDX (0)
Kojto 120:7c328cabac7e 899 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 900 #define FSL_FEATURE_LLWU_PIN31_GPIO_PIN (0)
Kojto 120:7c328cabac7e 901 /* @brief Has internal module 0 connected to LLWU device. */
Kojto 120:7c328cabac7e 902 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE0 (1)
Kojto 120:7c328cabac7e 903 /* @brief Has internal module 1 connected to LLWU device. */
Kojto 120:7c328cabac7e 904 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE1 (1)
Kojto 120:7c328cabac7e 905 /* @brief Has internal module 2 connected to LLWU device. */
Kojto 120:7c328cabac7e 906 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE2 (1)
Kojto 120:7c328cabac7e 907 /* @brief Has internal module 3 connected to LLWU device. */
Kojto 120:7c328cabac7e 908 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE3 (0)
Kojto 120:7c328cabac7e 909 /* @brief Has internal module 4 connected to LLWU device. */
Kojto 120:7c328cabac7e 910 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE4 (0)
Kojto 120:7c328cabac7e 911 /* @brief Has internal module 5 connected to LLWU device. */
Kojto 120:7c328cabac7e 912 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE5 (1)
Kojto 120:7c328cabac7e 913 /* @brief Has internal module 6 connected to LLWU device. */
Kojto 120:7c328cabac7e 914 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE6 (0)
Kojto 120:7c328cabac7e 915 /* @brief Has internal module 7 connected to LLWU device. */
Kojto 120:7c328cabac7e 916 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE7 (1)
Kojto 120:7c328cabac7e 917 /* @brief Has Version ID Register (LLWU_VERID). */
Kojto 120:7c328cabac7e 918 #define FSL_FEATURE_LLWU_HAS_VERID (0)
Kojto 120:7c328cabac7e 919 /* @brief Has Parameter Register (LLWU_PARAM). */
Kojto 120:7c328cabac7e 920 #define FSL_FEATURE_LLWU_HAS_PARAM (0)
Kojto 120:7c328cabac7e 921 /* @brief Width of registers of the LLWU. */
Kojto 120:7c328cabac7e 922 #define FSL_FEATURE_LLWU_REG_BITWIDTH (8)
Kojto 120:7c328cabac7e 923 /* @brief Has DMA Enable register (LLWU_DE). */
Kojto 120:7c328cabac7e 924 #define FSL_FEATURE_LLWU_HAS_DMA_ENABLE_REG (0)
Kojto 120:7c328cabac7e 925 #elif defined(CPU_MK22FN512VLH12) || defined(CPU_MK22FN512VMP12)
Kojto 120:7c328cabac7e 926 /* @brief Maximum number of pins (maximal index plus one) connected to LLWU device. */
Kojto 120:7c328cabac7e 927 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN (16)
Kojto 120:7c328cabac7e 928 /* @brief Has pins 8-15 connected to LLWU device. */
Kojto 120:7c328cabac7e 929 #define FSL_FEATURE_LLWU_EXTERNAL_PIN_GROUP2 (1)
Kojto 120:7c328cabac7e 930 /* @brief Maximum number of internal modules connected to LLWU device. */
Kojto 120:7c328cabac7e 931 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE (8)
Kojto 120:7c328cabac7e 932 /* @brief Number of digital filters. */
Kojto 120:7c328cabac7e 933 #define FSL_FEATURE_LLWU_HAS_PIN_FILTER (2)
Kojto 120:7c328cabac7e 934 /* @brief Has MF5 register. */
Kojto 120:7c328cabac7e 935 #define FSL_FEATURE_LLWU_HAS_MF (0)
Kojto 120:7c328cabac7e 936 /* @brief Has PF register. */
Kojto 120:7c328cabac7e 937 #define FSL_FEATURE_LLWU_HAS_PF (0)
Kojto 120:7c328cabac7e 938 /* @brief Has possibility to enable reset in low leakage power mode and enable digital filter for RESET pin (register LLWU_RST). */
Kojto 120:7c328cabac7e 939 #define FSL_FEATURE_LLWU_HAS_RESET_ENABLE (0)
Kojto 120:7c328cabac7e 940 /* @brief Has external pin 0 connected to LLWU device. */
Kojto 120:7c328cabac7e 941 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN0 (1)
Kojto 120:7c328cabac7e 942 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 943 #define FSL_FEATURE_LLWU_PIN0_GPIO_IDX (GPIOE_IDX)
Kojto 120:7c328cabac7e 944 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 945 #define FSL_FEATURE_LLWU_PIN0_GPIO_PIN (1)
Kojto 120:7c328cabac7e 946 /* @brief Has external pin 1 connected to LLWU device. */
Kojto 120:7c328cabac7e 947 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN1 (0)
Kojto 120:7c328cabac7e 948 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 949 #define FSL_FEATURE_LLWU_PIN1_GPIO_IDX (0)
Kojto 120:7c328cabac7e 950 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 951 #define FSL_FEATURE_LLWU_PIN1_GPIO_PIN (0)
Kojto 120:7c328cabac7e 952 /* @brief Has external pin 2 connected to LLWU device. */
Kojto 120:7c328cabac7e 953 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN2 (0)
Kojto 120:7c328cabac7e 954 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 955 #define FSL_FEATURE_LLWU_PIN2_GPIO_IDX (0)
Kojto 120:7c328cabac7e 956 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 957 #define FSL_FEATURE_LLWU_PIN2_GPIO_PIN (0)
Kojto 120:7c328cabac7e 958 /* @brief Has external pin 3 connected to LLWU device. */
Kojto 120:7c328cabac7e 959 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN3 (1)
Kojto 120:7c328cabac7e 960 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 961 #define FSL_FEATURE_LLWU_PIN3_GPIO_IDX (GPIOA_IDX)
Kojto 120:7c328cabac7e 962 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 963 #define FSL_FEATURE_LLWU_PIN3_GPIO_PIN (4)
Kojto 120:7c328cabac7e 964 /* @brief Has external pin 4 connected to LLWU device. */
Kojto 120:7c328cabac7e 965 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN4 (1)
Kojto 120:7c328cabac7e 966 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 967 #define FSL_FEATURE_LLWU_PIN4_GPIO_IDX (GPIOA_IDX)
Kojto 120:7c328cabac7e 968 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 969 #define FSL_FEATURE_LLWU_PIN4_GPIO_PIN (13)
Kojto 120:7c328cabac7e 970 /* @brief Has external pin 5 connected to LLWU device. */
Kojto 120:7c328cabac7e 971 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN5 (1)
Kojto 120:7c328cabac7e 972 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 973 #define FSL_FEATURE_LLWU_PIN5_GPIO_IDX (GPIOB_IDX)
Kojto 120:7c328cabac7e 974 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 975 #define FSL_FEATURE_LLWU_PIN5_GPIO_PIN (0)
Kojto 120:7c328cabac7e 976 /* @brief Has external pin 6 connected to LLWU device. */
Kojto 120:7c328cabac7e 977 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN6 (1)
Kojto 120:7c328cabac7e 978 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 979 #define FSL_FEATURE_LLWU_PIN6_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 980 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 981 #define FSL_FEATURE_LLWU_PIN6_GPIO_PIN (1)
Kojto 120:7c328cabac7e 982 /* @brief Has external pin 7 connected to LLWU device. */
Kojto 120:7c328cabac7e 983 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN7 (1)
Kojto 120:7c328cabac7e 984 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 985 #define FSL_FEATURE_LLWU_PIN7_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 986 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 987 #define FSL_FEATURE_LLWU_PIN7_GPIO_PIN (3)
Kojto 120:7c328cabac7e 988 /* @brief Has external pin 8 connected to LLWU device. */
Kojto 120:7c328cabac7e 989 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN8 (1)
Kojto 120:7c328cabac7e 990 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 991 #define FSL_FEATURE_LLWU_PIN8_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 992 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 993 #define FSL_FEATURE_LLWU_PIN8_GPIO_PIN (4)
Kojto 120:7c328cabac7e 994 /* @brief Has external pin 9 connected to LLWU device. */
Kojto 120:7c328cabac7e 995 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN9 (1)
Kojto 120:7c328cabac7e 996 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 997 #define FSL_FEATURE_LLWU_PIN9_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 998 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 999 #define FSL_FEATURE_LLWU_PIN9_GPIO_PIN (5)
Kojto 120:7c328cabac7e 1000 /* @brief Has external pin 10 connected to LLWU device. */
Kojto 120:7c328cabac7e 1001 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN10 (1)
Kojto 120:7c328cabac7e 1002 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1003 #define FSL_FEATURE_LLWU_PIN10_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 1004 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1005 #define FSL_FEATURE_LLWU_PIN10_GPIO_PIN (6)
Kojto 120:7c328cabac7e 1006 /* @brief Has external pin 11 connected to LLWU device. */
Kojto 120:7c328cabac7e 1007 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN11 (1)
Kojto 120:7c328cabac7e 1008 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1009 #define FSL_FEATURE_LLWU_PIN11_GPIO_IDX (GPIOC_IDX)
Kojto 120:7c328cabac7e 1010 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1011 #define FSL_FEATURE_LLWU_PIN11_GPIO_PIN (11)
Kojto 120:7c328cabac7e 1012 /* @brief Has external pin 12 connected to LLWU device. */
Kojto 120:7c328cabac7e 1013 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN12 (1)
Kojto 120:7c328cabac7e 1014 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1015 #define FSL_FEATURE_LLWU_PIN12_GPIO_IDX (GPIOD_IDX)
Kojto 120:7c328cabac7e 1016 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1017 #define FSL_FEATURE_LLWU_PIN12_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1018 /* @brief Has external pin 13 connected to LLWU device. */
Kojto 120:7c328cabac7e 1019 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN13 (1)
Kojto 120:7c328cabac7e 1020 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1021 #define FSL_FEATURE_LLWU_PIN13_GPIO_IDX (GPIOD_IDX)
Kojto 120:7c328cabac7e 1022 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1023 #define FSL_FEATURE_LLWU_PIN13_GPIO_PIN (2)
Kojto 120:7c328cabac7e 1024 /* @brief Has external pin 14 connected to LLWU device. */
Kojto 120:7c328cabac7e 1025 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN14 (1)
Kojto 120:7c328cabac7e 1026 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1027 #define FSL_FEATURE_LLWU_PIN14_GPIO_IDX (GPIOD_IDX)
Kojto 120:7c328cabac7e 1028 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1029 #define FSL_FEATURE_LLWU_PIN14_GPIO_PIN (4)
Kojto 120:7c328cabac7e 1030 /* @brief Has external pin 15 connected to LLWU device. */
Kojto 120:7c328cabac7e 1031 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN15 (1)
Kojto 120:7c328cabac7e 1032 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1033 #define FSL_FEATURE_LLWU_PIN15_GPIO_IDX (GPIOD_IDX)
Kojto 120:7c328cabac7e 1034 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1035 #define FSL_FEATURE_LLWU_PIN15_GPIO_PIN (6)
Kojto 120:7c328cabac7e 1036 /* @brief Has external pin 16 connected to LLWU device. */
Kojto 120:7c328cabac7e 1037 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN16 (0)
Kojto 120:7c328cabac7e 1038 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1039 #define FSL_FEATURE_LLWU_PIN16_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1040 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1041 #define FSL_FEATURE_LLWU_PIN16_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1042 /* @brief Has external pin 17 connected to LLWU device. */
Kojto 120:7c328cabac7e 1043 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN17 (0)
Kojto 120:7c328cabac7e 1044 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1045 #define FSL_FEATURE_LLWU_PIN17_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1046 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1047 #define FSL_FEATURE_LLWU_PIN17_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1048 /* @brief Has external pin 18 connected to LLWU device. */
Kojto 120:7c328cabac7e 1049 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN18 (0)
Kojto 120:7c328cabac7e 1050 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1051 #define FSL_FEATURE_LLWU_PIN18_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1052 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1053 #define FSL_FEATURE_LLWU_PIN18_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1054 /* @brief Has external pin 19 connected to LLWU device. */
Kojto 120:7c328cabac7e 1055 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN19 (0)
Kojto 120:7c328cabac7e 1056 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1057 #define FSL_FEATURE_LLWU_PIN19_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1058 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1059 #define FSL_FEATURE_LLWU_PIN19_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1060 /* @brief Has external pin 20 connected to LLWU device. */
Kojto 120:7c328cabac7e 1061 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN20 (0)
Kojto 120:7c328cabac7e 1062 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1063 #define FSL_FEATURE_LLWU_PIN20_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1064 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1065 #define FSL_FEATURE_LLWU_PIN20_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1066 /* @brief Has external pin 21 connected to LLWU device. */
Kojto 120:7c328cabac7e 1067 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN21 (0)
Kojto 120:7c328cabac7e 1068 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1069 #define FSL_FEATURE_LLWU_PIN21_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1070 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1071 #define FSL_FEATURE_LLWU_PIN21_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1072 /* @brief Has external pin 22 connected to LLWU device. */
Kojto 120:7c328cabac7e 1073 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN22 (0)
Kojto 120:7c328cabac7e 1074 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1075 #define FSL_FEATURE_LLWU_PIN22_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1076 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1077 #define FSL_FEATURE_LLWU_PIN22_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1078 /* @brief Has external pin 23 connected to LLWU device. */
Kojto 120:7c328cabac7e 1079 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN23 (0)
Kojto 120:7c328cabac7e 1080 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1081 #define FSL_FEATURE_LLWU_PIN23_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1082 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1083 #define FSL_FEATURE_LLWU_PIN23_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1084 /* @brief Has external pin 24 connected to LLWU device. */
Kojto 120:7c328cabac7e 1085 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN24 (0)
Kojto 120:7c328cabac7e 1086 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1087 #define FSL_FEATURE_LLWU_PIN24_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1088 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1089 #define FSL_FEATURE_LLWU_PIN24_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1090 /* @brief Has external pin 25 connected to LLWU device. */
Kojto 120:7c328cabac7e 1091 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN25 (0)
Kojto 120:7c328cabac7e 1092 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1093 #define FSL_FEATURE_LLWU_PIN25_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1094 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1095 #define FSL_FEATURE_LLWU_PIN25_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1096 /* @brief Has external pin 26 connected to LLWU device. */
Kojto 120:7c328cabac7e 1097 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN26 (0)
Kojto 120:7c328cabac7e 1098 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1099 #define FSL_FEATURE_LLWU_PIN26_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1100 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1101 #define FSL_FEATURE_LLWU_PIN26_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1102 /* @brief Has external pin 27 connected to LLWU device. */
Kojto 120:7c328cabac7e 1103 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN27 (0)
Kojto 120:7c328cabac7e 1104 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1105 #define FSL_FEATURE_LLWU_PIN27_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1106 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1107 #define FSL_FEATURE_LLWU_PIN27_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1108 /* @brief Has external pin 28 connected to LLWU device. */
Kojto 120:7c328cabac7e 1109 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN28 (0)
Kojto 120:7c328cabac7e 1110 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1111 #define FSL_FEATURE_LLWU_PIN28_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1112 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1113 #define FSL_FEATURE_LLWU_PIN28_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1114 /* @brief Has external pin 29 connected to LLWU device. */
Kojto 120:7c328cabac7e 1115 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN29 (0)
Kojto 120:7c328cabac7e 1116 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1117 #define FSL_FEATURE_LLWU_PIN29_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1118 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1119 #define FSL_FEATURE_LLWU_PIN29_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1120 /* @brief Has external pin 30 connected to LLWU device. */
Kojto 120:7c328cabac7e 1121 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN30 (0)
Kojto 120:7c328cabac7e 1122 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1123 #define FSL_FEATURE_LLWU_PIN30_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1124 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1125 #define FSL_FEATURE_LLWU_PIN30_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1126 /* @brief Has external pin 31 connected to LLWU device. */
Kojto 120:7c328cabac7e 1127 #define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN31 (0)
Kojto 120:7c328cabac7e 1128 /* @brief Index of port of external pin. */
Kojto 120:7c328cabac7e 1129 #define FSL_FEATURE_LLWU_PIN31_GPIO_IDX (0)
Kojto 120:7c328cabac7e 1130 /* @brief Number of external pin port on specified port. */
Kojto 120:7c328cabac7e 1131 #define FSL_FEATURE_LLWU_PIN31_GPIO_PIN (0)
Kojto 120:7c328cabac7e 1132 /* @brief Has internal module 0 connected to LLWU device. */
Kojto 120:7c328cabac7e 1133 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE0 (1)
Kojto 120:7c328cabac7e 1134 /* @brief Has internal module 1 connected to LLWU device. */
Kojto 120:7c328cabac7e 1135 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE1 (1)
Kojto 120:7c328cabac7e 1136 /* @brief Has internal module 2 connected to LLWU device. */
Kojto 120:7c328cabac7e 1137 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE2 (1)
Kojto 120:7c328cabac7e 1138 /* @brief Has internal module 3 connected to LLWU device. */
Kojto 120:7c328cabac7e 1139 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE3 (0)
Kojto 120:7c328cabac7e 1140 /* @brief Has internal module 4 connected to LLWU device. */
Kojto 120:7c328cabac7e 1141 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE4 (0)
Kojto 120:7c328cabac7e 1142 /* @brief Has internal module 5 connected to LLWU device. */
Kojto 120:7c328cabac7e 1143 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE5 (1)
Kojto 120:7c328cabac7e 1144 /* @brief Has internal module 6 connected to LLWU device. */
Kojto 120:7c328cabac7e 1145 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE6 (0)
Kojto 120:7c328cabac7e 1146 /* @brief Has internal module 7 connected to LLWU device. */
Kojto 120:7c328cabac7e 1147 #define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE7 (1)
Kojto 120:7c328cabac7e 1148 /* @brief Has Version ID Register (LLWU_VERID). */
Kojto 120:7c328cabac7e 1149 #define FSL_FEATURE_LLWU_HAS_VERID (0)
Kojto 120:7c328cabac7e 1150 /* @brief Has Parameter Register (LLWU_PARAM). */
Kojto 120:7c328cabac7e 1151 #define FSL_FEATURE_LLWU_HAS_PARAM (0)
Kojto 120:7c328cabac7e 1152 /* @brief Width of registers of the LLWU. */
Kojto 120:7c328cabac7e 1153 #define FSL_FEATURE_LLWU_REG_BITWIDTH (8)
Kojto 120:7c328cabac7e 1154 /* @brief Has DMA Enable register (LLWU_DE). */
Kojto 120:7c328cabac7e 1155 #define FSL_FEATURE_LLWU_HAS_DMA_ENABLE_REG (0)
Kojto 120:7c328cabac7e 1156 #endif /* defined(CPU_MK22FN512CAP12) || defined(CPU_MK22FN512VDC12) || defined(CPU_MK22FN512VLL12) */
Kojto 120:7c328cabac7e 1157
Kojto 120:7c328cabac7e 1158 /* LPTMR module features */
Kojto 120:7c328cabac7e 1159
Kojto 120:7c328cabac7e 1160 /* @brief Has shared interrupt handler with another LPTMR module. */
Kojto 120:7c328cabac7e 1161 #define FSL_FEATURE_LPTMR_HAS_SHARED_IRQ_HANDLER (0)
Kojto 120:7c328cabac7e 1162
Kojto 120:7c328cabac7e 1163 /* LPUART module features */
Kojto 120:7c328cabac7e 1164
Kojto 120:7c328cabac7e 1165 /* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
Kojto 120:7c328cabac7e 1166 #define FSL_FEATURE_LPUART_HAS_IRQ_EXTENDED_FUNCTIONS (0)
Kojto 120:7c328cabac7e 1167 /* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1168 #define FSL_FEATURE_LPUART_HAS_LOW_POWER_UART_SUPPORT (1)
Kojto 120:7c328cabac7e 1169 /* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1170 #define FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
Kojto 120:7c328cabac7e 1171 /* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
Kojto 120:7c328cabac7e 1172 #define FSL_FEATURE_LPUART_HAS_FIFO (0)
Kojto 120:7c328cabac7e 1173 /* @brief Has 32-bit register MODIR */
Kojto 120:7c328cabac7e 1174 #define FSL_FEATURE_LPUART_HAS_MODIR (1)
Kojto 120:7c328cabac7e 1175 /* @brief Hardware flow control (RTS, CTS) is supported. */
Kojto 120:7c328cabac7e 1176 #define FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT (1)
Kojto 120:7c328cabac7e 1177 /* @brief Infrared (modulation) is supported. */
Kojto 120:7c328cabac7e 1178 #define FSL_FEATURE_LPUART_HAS_IR_SUPPORT (1)
Kojto 120:7c328cabac7e 1179 /* @brief 2 bits long stop bit is available. */
Kojto 120:7c328cabac7e 1180 #define FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT (1)
Kojto 120:7c328cabac7e 1181 /* @brief Maximal data width without parity bit. */
Kojto 120:7c328cabac7e 1182 #define FSL_FEATURE_LPUART_HAS_10BIT_DATA_SUPPORT (1)
Kojto 120:7c328cabac7e 1183 /* @brief Baud rate fine adjustment is available. */
Kojto 120:7c328cabac7e 1184 #define FSL_FEATURE_LPUART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (0)
Kojto 120:7c328cabac7e 1185 /* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1186 #define FSL_FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
Kojto 120:7c328cabac7e 1187 /* @brief Baud rate oversampling is available. */
Kojto 120:7c328cabac7e 1188 #define FSL_FEATURE_LPUART_HAS_RX_RESYNC_SUPPORT (1)
Kojto 120:7c328cabac7e 1189 /* @brief Baud rate oversampling is available. */
Kojto 120:7c328cabac7e 1190 #define FSL_FEATURE_LPUART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (1)
Kojto 120:7c328cabac7e 1191 /* @brief Peripheral type. */
Kojto 120:7c328cabac7e 1192 #define FSL_FEATURE_LPUART_IS_SCI (1)
Kojto 120:7c328cabac7e 1193 /* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
Kojto 120:7c328cabac7e 1194 #define FSL_FEATURE_LPUART_FIFO_SIZEn(x) (0)
Kojto 120:7c328cabac7e 1195 /* @brief Maximal data width without parity bit. */
Kojto 120:7c328cabac7e 1196 #define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_NO_PARITY (10)
Kojto 120:7c328cabac7e 1197 /* @brief Maximal data width with parity bit. */
Kojto 120:7c328cabac7e 1198 #define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_PARITY (9)
Kojto 120:7c328cabac7e 1199 /* @brief Supports two match addresses to filter incoming frames. */
Kojto 120:7c328cabac7e 1200 #define FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
Kojto 120:7c328cabac7e 1201 /* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1202 #define FSL_FEATURE_LPUART_HAS_DMA_ENABLE (1)
Kojto 120:7c328cabac7e 1203 /* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
Kojto 120:7c328cabac7e 1204 #define FSL_FEATURE_LPUART_HAS_DMA_SELECT (0)
Kojto 120:7c328cabac7e 1205 /* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1206 #define FSL_FEATURE_LPUART_HAS_BIT_ORDER_SELECT (1)
Kojto 120:7c328cabac7e 1207 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
Kojto 120:7c328cabac7e 1208 #define FSL_FEATURE_LPUART_HAS_SMART_CARD_SUPPORT (0)
Kojto 120:7c328cabac7e 1209 /* @brief Has improved smart card (ISO7816 protocol) support. */
Kojto 120:7c328cabac7e 1210 #define FSL_FEATURE_LPUART_HAS_IMPROVED_SMART_CARD_SUPPORT (0)
Kojto 120:7c328cabac7e 1211 /* @brief Has local operation network (CEA709.1-B protocol) support. */
Kojto 120:7c328cabac7e 1212 #define FSL_FEATURE_LPUART_HAS_LOCAL_OPERATION_NETWORK_SUPPORT (0)
Kojto 120:7c328cabac7e 1213 /* @brief Has 32-bit registers (BAUD, STAT, CTRL, DATA, MATCH, MODIR) instead of 8-bit (BDH, BDL, C1, S1, D, etc.). */
Kojto 120:7c328cabac7e 1214 #define FSL_FEATURE_LPUART_HAS_32BIT_REGISTERS (1)
Kojto 120:7c328cabac7e 1215 /* @brief Lin break detect available (has bit BDH[LBKDIE]). */
Kojto 120:7c328cabac7e 1216 #define FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT (0)
Kojto 120:7c328cabac7e 1217 /* @brief UART stops in Wait mode available (has bit C1[UARTSWAI]). */
Kojto 120:7c328cabac7e 1218 #define FSL_FEATURE_LPUART_HAS_WAIT_MODE_OPERATION (0)
Kojto 120:7c328cabac7e 1219 /* @brief Has separate DMA RX and TX requests. */
Kojto 120:7c328cabac7e 1220 #define FSL_FEATURE_LPUART_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1)
Kojto 120:7c328cabac7e 1221 /* @brief Has LPAURT_PARAM. */
Kojto 120:7c328cabac7e 1222 #define FSL_FEATURE_LPUART_HAS_PARAM (0)
Kojto 120:7c328cabac7e 1223 /* @brief Has LPUART_VERID. */
Kojto 120:7c328cabac7e 1224 #define FSL_FEATURE_LPUART_HAS_VERID (0)
Kojto 120:7c328cabac7e 1225 /* @brief Has LPUART_GLOBAL. */
Kojto 120:7c328cabac7e 1226 #define FSL_FEATURE_LPUART_HAS_GLOBAL (0)
Kojto 120:7c328cabac7e 1227 /* @brief Has LPUART_PINCFG. */
Kojto 120:7c328cabac7e 1228 #define FSL_FEATURE_LPUART_HAS_PINCFG (0)
Kojto 120:7c328cabac7e 1229
Kojto 120:7c328cabac7e 1230 /* MCG module features */
Kojto 120:7c328cabac7e 1231
Kojto 120:7c328cabac7e 1232 /* @brief PRDIV base value (divider of register bit field [PRDIV] zero value). */
Kojto 120:7c328cabac7e 1233 #define FSL_FEATURE_MCG_PLL_PRDIV_BASE (1)
Kojto 120:7c328cabac7e 1234 /* @brief Maximum PLL external reference divider value (max. value of register bit field C5[PRVDIV]). */
Kojto 120:7c328cabac7e 1235 #define FSL_FEATURE_MCG_PLL_PRDIV_MAX (24)
Kojto 120:7c328cabac7e 1236 /* @brief VCO divider base value (multiply factor of register bit field C6[VDIV] zero value). */
Kojto 120:7c328cabac7e 1237 #define FSL_FEATURE_MCG_PLL_VDIV_BASE (24)
Kojto 120:7c328cabac7e 1238 /* @brief PLL reference clock low range. OSCCLK/PLL_R. */
Kojto 120:7c328cabac7e 1239 #define FSL_FEATURE_MCG_PLL_REF_MIN (2000000)
Kojto 120:7c328cabac7e 1240 /* @brief PLL reference clock high range. OSCCLK/PLL_R. */
Kojto 120:7c328cabac7e 1241 #define FSL_FEATURE_MCG_PLL_REF_MAX (4000000)
Kojto 120:7c328cabac7e 1242 /* @brief The PLL clock is divided by 2 before VCO divider. */
Kojto 120:7c328cabac7e 1243 #define FSL_FEATURE_MCG_HAS_PLL_INTERNAL_DIV (0)
Kojto 120:7c328cabac7e 1244 /* @brief FRDIV supports 1280. */
Kojto 120:7c328cabac7e 1245 #define FSL_FEATURE_MCG_FRDIV_SUPPORT_1280 (1)
Kojto 120:7c328cabac7e 1246 /* @brief FRDIV supports 1536. */
Kojto 120:7c328cabac7e 1247 #define FSL_FEATURE_MCG_FRDIV_SUPPORT_1536 (1)
Kojto 120:7c328cabac7e 1248 /* @brief MCGFFCLK divider. */
Kojto 120:7c328cabac7e 1249 #define FSL_FEATURE_MCG_FFCLK_DIV (1)
Kojto 120:7c328cabac7e 1250 /* @brief Is PLL clock divided by 2 before MCG PLL/FLL clock selection in the SIM module. */
Kojto 120:7c328cabac7e 1251 #define FSL_FEATURE_MCG_HAS_PLL_EXTRA_DIV (0)
Kojto 120:7c328cabac7e 1252 /* @brief Has 32kHz RTC external reference clock (register bits C8[LOCS1], C8[CME1], C8[LOCRE1] and RTC module are present). */
Kojto 120:7c328cabac7e 1253 #define FSL_FEATURE_MCG_HAS_RTC_32K (1)
Kojto 120:7c328cabac7e 1254 /* @brief Has PLL1 external reference clock (registers C10, C11, C12, S2). */
Kojto 120:7c328cabac7e 1255 #define FSL_FEATURE_MCG_HAS_PLL1 (0)
Kojto 120:7c328cabac7e 1256 /* @brief Has 48MHz internal oscillator. */
Kojto 120:7c328cabac7e 1257 #define FSL_FEATURE_MCG_HAS_IRC_48M (1)
Kojto 120:7c328cabac7e 1258 /* @brief Has OSC1 external oscillator (registers C10, C11, C12, S2). */
Kojto 120:7c328cabac7e 1259 #define FSL_FEATURE_MCG_HAS_OSC1 (0)
Kojto 120:7c328cabac7e 1260 /* @brief Has fast internal reference clock fine trim (register bit C2[FCFTRIM]). */
Kojto 120:7c328cabac7e 1261 #define FSL_FEATURE_MCG_HAS_FCFTRIM (1)
Kojto 120:7c328cabac7e 1262 /* @brief Has PLL loss of lock reset (register bit C8[LOLRE]). */
Kojto 120:7c328cabac7e 1263 #define FSL_FEATURE_MCG_HAS_LOLRE (1)
Kojto 120:7c328cabac7e 1264 /* @brief Has MCG OSC clock selection (register bit C7[OSCSEL]). */
Kojto 120:7c328cabac7e 1265 #define FSL_FEATURE_MCG_USE_OSCSEL (1)
Kojto 120:7c328cabac7e 1266 /* @brief Has PLL external reference selection (register bits C5[PLLREFSEL0] and C11[PLLREFSEL1]). */
Kojto 120:7c328cabac7e 1267 #define FSL_FEATURE_MCG_USE_PLLREFSEL (0)
Kojto 120:7c328cabac7e 1268 /* @brief TBD */
Kojto 120:7c328cabac7e 1269 #define FSL_FEATURE_MCG_USE_SYSTEM_CLOCK (0)
Kojto 120:7c328cabac7e 1270 /* @brief Has phase-locked loop (PLL) (register C5 and bits C6[VDIV], C6[PLLS], C6[LOLIE0], S[PLLST], S[LOCK0], S[LOLS]). */
Kojto 120:7c328cabac7e 1271 #define FSL_FEATURE_MCG_HAS_PLL (1)
Kojto 120:7c328cabac7e 1272 /* @brief Has phase-locked loop (PLL) PRDIV (register C5[PRDIV]. */
Kojto 120:7c328cabac7e 1273 #define FSL_FEATURE_MCG_HAS_PLL_PRDIV (1)
Kojto 120:7c328cabac7e 1274 /* @brief Has phase-locked loop (PLL) VDIV (register C6[VDIV]. */
Kojto 120:7c328cabac7e 1275 #define FSL_FEATURE_MCG_HAS_PLL_VDIV (1)
Kojto 120:7c328cabac7e 1276 /* @brief PLL/OSC related register bit fields have PLL/OSC index in their name. */
Kojto 120:7c328cabac7e 1277 #define FSL_FEATURE_MCG_HAS_PLL_OSC_INDEX (0)
Kojto 120:7c328cabac7e 1278 /* @brief Has frequency-locked loop (FLL) (register ATCVH, ATCVL and bits C1[IREFS], C1[FRDIV]). */
Kojto 120:7c328cabac7e 1279 #define FSL_FEATURE_MCG_HAS_FLL (1)
Kojto 120:7c328cabac7e 1280 /* @brief Has PLL external to MCG (C9[PLL_CME], C9[PLL_LOCRE], C9[EXT_PLL_LOCS]). */
Kojto 120:7c328cabac7e 1281 #define FSL_FEATURE_MCG_HAS_EXTERNAL_PLL (0)
Kojto 120:7c328cabac7e 1282 /* @brief Has crystal oscillator or external reference clock low power controls (register bits C2[HGO], C2[RANGE]). */
Kojto 120:7c328cabac7e 1283 #define FSL_FEATURE_MCG_HAS_EXT_REF_LOW_POWER_CONTROL (1)
Kojto 120:7c328cabac7e 1284 /* @brief Has PLL/FLL selection as MCG output (register bit C6[PLLS]). */
Kojto 120:7c328cabac7e 1285 #define FSL_FEATURE_MCG_HAS_PLL_FLL_SELECTION (1)
Kojto 120:7c328cabac7e 1286 /* @brief Has PLL output selection (PLL0/PLL1, PLL/external PLL) (register bit C11[PLLCS]). */
Kojto 120:7c328cabac7e 1287 #define FSL_FEATURE_MCG_HAS_PLL_OUTPUT_SELECTION (0)
Kojto 120:7c328cabac7e 1288 /* @brief Has automatic trim machine (registers ATCVH, ATCVL and bits SC[ATMF], SC[ATMS], SC[ATME]). */
Kojto 120:7c328cabac7e 1289 #define FSL_FEATURE_MCG_HAS_AUTO_TRIM_MACHINE (1)
Kojto 120:7c328cabac7e 1290 /* @brief Has external clock monitor (register bit C6[CME]). */
Kojto 120:7c328cabac7e 1291 #define FSL_FEATURE_MCG_HAS_EXTERNAL_CLOCK_MONITOR (1)
Kojto 120:7c328cabac7e 1292 /* @brief Has low frequency internal reference clock (IRC) (registers LTRIMRNG, LFRIM, LSTRIM and bit MC[LIRC_DIV2]). */
Kojto 120:7c328cabac7e 1293 #define FSL_FEATURE_MCG_HAS_LOW_FREQ_IRC (0)
Kojto 120:7c328cabac7e 1294 /* @brief Has high frequency internal reference clock (IRC) (registers HCTRIM, HTTRIM, HFTRIM and bit MC[HIRCEN]). */
Kojto 120:7c328cabac7e 1295 #define FSL_FEATURE_MCG_HAS_HIGH_FREQ_IRC (0)
Kojto 120:7c328cabac7e 1296 /* @brief Has PEI mode or PBI mode. */
Kojto 120:7c328cabac7e 1297 #define FSL_FEATURE_MCG_HAS_PLL_INTERNAL_MODE (0)
Kojto 120:7c328cabac7e 1298 /* @brief Reset clock mode is BLPI. */
Kojto 120:7c328cabac7e 1299 #define FSL_FEATURE_MCG_RESET_IS_BLPI (0)
Kojto 120:7c328cabac7e 1300
Kojto 120:7c328cabac7e 1301 /* interrupt module features */
Kojto 120:7c328cabac7e 1302
Kojto 120:7c328cabac7e 1303 /* @brief Lowest interrupt request number. */
Kojto 120:7c328cabac7e 1304 #define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14)
Kojto 120:7c328cabac7e 1305 /* @brief Highest interrupt request number. */
Kojto 120:7c328cabac7e 1306 #define FSL_FEATURE_INTERRUPT_IRQ_MAX (85)
Kojto 120:7c328cabac7e 1307
Kojto 120:7c328cabac7e 1308 /* OSC module features */
Kojto 120:7c328cabac7e 1309
Kojto 120:7c328cabac7e 1310 /* @brief Has OSC1 external oscillator. */
Kojto 120:7c328cabac7e 1311 #define FSL_FEATURE_OSC_HAS_OSC1 (0)
Kojto 120:7c328cabac7e 1312 /* @brief Has OSC0 external oscillator. */
Kojto 120:7c328cabac7e 1313 #define FSL_FEATURE_OSC_HAS_OSC0 (0)
Kojto 120:7c328cabac7e 1314 /* @brief Has OSC external oscillator (without index). */
Kojto 120:7c328cabac7e 1315 #define FSL_FEATURE_OSC_HAS_OSC (1)
Kojto 120:7c328cabac7e 1316 /* @brief Number of OSC external oscillators. */
Kojto 120:7c328cabac7e 1317 #define FSL_FEATURE_OSC_OSC_COUNT (1)
Kojto 120:7c328cabac7e 1318 /* @brief Has external reference clock divider (register bit field DIV[ERPS]). */
Kojto 120:7c328cabac7e 1319 #define FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER (1)
Kojto 120:7c328cabac7e 1320
Kojto 120:7c328cabac7e 1321 /* PDB module features */
Kojto 120:7c328cabac7e 1322
Kojto 120:7c328cabac7e 1323 /* @brief Define the count of supporting ADC pre-trigger for each channel. */
Kojto 120:7c328cabac7e 1324 #define FSL_FEATURE_PDB_ADC_PRE_CHANNEL_COUNT (2)
Kojto 120:7c328cabac7e 1325 /* @brief Has DAC support. */
Kojto 120:7c328cabac7e 1326 #define FSL_FEATURE_PDB_HAS_DAC (1)
Kojto 120:7c328cabac7e 1327 /* @brief Has shared interrupt handler (has not individual interrupt handler for each channel). */
Kojto 120:7c328cabac7e 1328 #define FSL_FEATURE_PDB_HAS_SHARED_IRQ_HANDLER (0)
Kojto 120:7c328cabac7e 1329
Kojto 120:7c328cabac7e 1330 /* PIT module features */
Kojto 120:7c328cabac7e 1331
Kojto 120:7c328cabac7e 1332 /* @brief Number of channels (related to number of registers LDVALn, CVALn, TCTRLn, TFLGn). */
Kojto 120:7c328cabac7e 1333 #define FSL_FEATURE_PIT_TIMER_COUNT (4)
Kojto 120:7c328cabac7e 1334 /* @brief Has lifetime timer (related to existence of registers LTMR64L and LTMR64H). */
Kojto 120:7c328cabac7e 1335 #define FSL_FEATURE_PIT_HAS_LIFETIME_TIMER (0)
Kojto 120:7c328cabac7e 1336 /* @brief Has chain mode (related to existence of register bit field TCTRLn[CHN]). */
Kojto 120:7c328cabac7e 1337 #define FSL_FEATURE_PIT_HAS_CHAIN_MODE (1)
Kojto 120:7c328cabac7e 1338 /* @brief Has shared interrupt handler (has not individual interrupt handler for each channel). */
Kojto 120:7c328cabac7e 1339 #define FSL_FEATURE_PIT_HAS_SHARED_IRQ_HANDLER (0)
Kojto 120:7c328cabac7e 1340
Kojto 120:7c328cabac7e 1341 /* PMC module features */
Kojto 120:7c328cabac7e 1342
Kojto 120:7c328cabac7e 1343 /* @brief Has Bandgap Enable In VLPx Operation support. */
Kojto 120:7c328cabac7e 1344 #define FSL_FEATURE_PMC_HAS_BGEN (1)
Kojto 120:7c328cabac7e 1345 /* @brief Has Bandgap Buffer Enable. */
Kojto 120:7c328cabac7e 1346 #define FSL_FEATURE_PMC_HAS_BGBE (1)
Kojto 120:7c328cabac7e 1347 /* @brief Has Bandgap Buffer Drive Select. */
Kojto 120:7c328cabac7e 1348 #define FSL_FEATURE_PMC_HAS_BGBDS (0)
Kojto 120:7c328cabac7e 1349 /* @brief Has Low-Voltage Detect Voltage Select support. */
Kojto 120:7c328cabac7e 1350 #define FSL_FEATURE_PMC_HAS_LVDV (1)
Kojto 120:7c328cabac7e 1351 /* @brief Has Low-Voltage Warning Voltage Select support. */
Kojto 120:7c328cabac7e 1352 #define FSL_FEATURE_PMC_HAS_LVWV (1)
Kojto 120:7c328cabac7e 1353 /* @brief Has LPO. */
Kojto 120:7c328cabac7e 1354 #define FSL_FEATURE_PMC_HAS_LPO (0)
Kojto 120:7c328cabac7e 1355 /* @brief Has VLPx option PMC_REGSC[VLPO]. */
Kojto 120:7c328cabac7e 1356 #define FSL_FEATURE_PMC_HAS_VLPO (0)
Kojto 120:7c328cabac7e 1357 /* @brief Has acknowledge isolation support. */
Kojto 120:7c328cabac7e 1358 #define FSL_FEATURE_PMC_HAS_ACKISO (1)
Kojto 120:7c328cabac7e 1359 /* @brief Has Regulator In Full Performance Mode Status Bit PMC_REGSC[REGFPM]. */
Kojto 120:7c328cabac7e 1360 #define FSL_FEATURE_PMC_HAS_REGFPM (0)
Kojto 120:7c328cabac7e 1361 /* @brief Has Regulator In Run Regulation Status Bit PMC_REGSC[REGONS]. */
Kojto 120:7c328cabac7e 1362 #define FSL_FEATURE_PMC_HAS_REGONS (1)
Kojto 120:7c328cabac7e 1363 /* @brief Has PMC_HVDSC1. */
Kojto 120:7c328cabac7e 1364 #define FSL_FEATURE_PMC_HAS_HVDSC1 (0)
Kojto 120:7c328cabac7e 1365 /* @brief Has PMC_PARAM. */
Kojto 120:7c328cabac7e 1366 #define FSL_FEATURE_PMC_HAS_PARAM (0)
Kojto 120:7c328cabac7e 1367 /* @brief Has PMC_VERID. */
Kojto 120:7c328cabac7e 1368 #define FSL_FEATURE_PMC_HAS_VERID (0)
Kojto 120:7c328cabac7e 1369
Kojto 120:7c328cabac7e 1370 /* PORT module features */
Kojto 120:7c328cabac7e 1371
Kojto 120:7c328cabac7e 1372 /* @brief Has control lock (register bit PCR[LK]). */
Kojto 120:7c328cabac7e 1373 #define FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK (1)
Kojto 120:7c328cabac7e 1374 /* @brief Has open drain control (register bit PCR[ODE]). */
Kojto 120:7c328cabac7e 1375 #define FSL_FEATURE_PORT_HAS_OPEN_DRAIN (1)
Kojto 120:7c328cabac7e 1376 /* @brief Has digital filter (registers DFER, DFCR and DFWR). */
Kojto 120:7c328cabac7e 1377 #define FSL_FEATURE_PORT_HAS_DIGITAL_FILTER (1)
Kojto 120:7c328cabac7e 1378 /* @brief Has DMA request (register bit field PCR[IRQC] values). */
Kojto 120:7c328cabac7e 1379 #define FSL_FEATURE_PORT_HAS_DMA_REQUEST (1)
Kojto 120:7c328cabac7e 1380 /* @brief Has pull resistor selection available. */
Kojto 120:7c328cabac7e 1381 #define FSL_FEATURE_PORT_HAS_PULL_SELECTION (1)
Kojto 120:7c328cabac7e 1382 /* @brief Has pull resistor enable (register bit PCR[PE]). */
Kojto 120:7c328cabac7e 1383 #define FSL_FEATURE_PORT_HAS_PULL_ENABLE (1)
Kojto 120:7c328cabac7e 1384 /* @brief Has slew rate control (register bit PCR[SRE]). */
Kojto 120:7c328cabac7e 1385 #define FSL_FEATURE_PORT_HAS_SLEW_RATE (1)
Kojto 120:7c328cabac7e 1386 /* @brief Has passive filter (register bit field PCR[PFE]). */
Kojto 120:7c328cabac7e 1387 #define FSL_FEATURE_PORT_HAS_PASSIVE_FILTER (1)
Kojto 120:7c328cabac7e 1388 /* @brief Has drive strength control (register bit PCR[DSE]). */
Kojto 120:7c328cabac7e 1389 #define FSL_FEATURE_PORT_HAS_DRIVE_STRENGTH (1)
Kojto 120:7c328cabac7e 1390 /* @brief Has separate drive strength register (HDRVE). */
Kojto 120:7c328cabac7e 1391 #define FSL_FEATURE_PORT_HAS_DRIVE_STRENGTH_REGISTER (0)
Kojto 120:7c328cabac7e 1392 /* @brief Has glitch filter (register IOFLT). */
Kojto 120:7c328cabac7e 1393 #define FSL_FEATURE_PORT_HAS_GLITCH_FILTER (0)
Kojto 120:7c328cabac7e 1394 /* @brief Defines width of PCR[MUX] field. */
Kojto 120:7c328cabac7e 1395 #define FSL_FEATURE_PORT_PCR_MUX_WIDTH (3)
Kojto 120:7c328cabac7e 1396 /* @brief Has dedicated interrupt vector. */
Kojto 120:7c328cabac7e 1397 #define FSL_FEATURE_PORT_HAS_INTERRUPT_VECTOR (1)
Kojto 120:7c328cabac7e 1398 /* @brief Defines whether PCR[IRQC] bit-field has flag states. */
Kojto 120:7c328cabac7e 1399 #define FSL_FEATURE_PORT_HAS_IRQC_FLAG (0)
Kojto 120:7c328cabac7e 1400 /* @brief Defines whether PCR[IRQC] bit-field has trigger states. */
Kojto 120:7c328cabac7e 1401 #define FSL_FEATURE_PORT_HAS_IRQC_TRIGGER (0)
Kojto 120:7c328cabac7e 1402
Kojto 120:7c328cabac7e 1403 /* GPIO module features */
Kojto 120:7c328cabac7e 1404
Kojto 120:7c328cabac7e 1405 /* @brief Has fast (single cycle) access capability via a dedicated memory region. */
Kojto 120:7c328cabac7e 1406 #define FSL_FEATURE_GPIO_HAS_FAST_GPIO (0)
Kojto 120:7c328cabac7e 1407 /* @brief Has port input disable register (PIDR). */
Kojto 120:7c328cabac7e 1408 #define FSL_FEATURE_GPIO_HAS_INPUT_DISABLE (0)
Kojto 120:7c328cabac7e 1409 /* @brief Has dedicated interrupt vector. */
Kojto 120:7c328cabac7e 1410 #define FSL_FEATURE_GPIO_HAS_PORT_INTERRUPT_VECTOR (1)
Kojto 120:7c328cabac7e 1411
Kojto 120:7c328cabac7e 1412 /* RCM module features */
Kojto 120:7c328cabac7e 1413
Kojto 120:7c328cabac7e 1414 /* @brief Has Loss-of-Lock Reset support. */
Kojto 120:7c328cabac7e 1415 #define FSL_FEATURE_RCM_HAS_LOL (1)
Kojto 120:7c328cabac7e 1416 /* @brief Has Loss-of-Clock Reset support. */
Kojto 120:7c328cabac7e 1417 #define FSL_FEATURE_RCM_HAS_LOC (1)
Kojto 120:7c328cabac7e 1418 /* @brief Has JTAG generated Reset support. */
Kojto 120:7c328cabac7e 1419 #define FSL_FEATURE_RCM_HAS_JTAG (1)
Kojto 120:7c328cabac7e 1420 /* @brief Has EzPort generated Reset support. */
Kojto 120:7c328cabac7e 1421 #define FSL_FEATURE_RCM_HAS_EZPORT (1)
Kojto 120:7c328cabac7e 1422 /* @brief Has bit-field indicating EZP_MS_B pin state during last reset. */
Kojto 120:7c328cabac7e 1423 #define FSL_FEATURE_RCM_HAS_EZPMS (1)
Kojto 120:7c328cabac7e 1424 /* @brief Has boot ROM configuration, MR[BOOTROM], FM[FORCEROM] */
Kojto 120:7c328cabac7e 1425 #define FSL_FEATURE_RCM_HAS_BOOTROM (0)
Kojto 120:7c328cabac7e 1426 /* @brief Has sticky system reset status register RCM_SSRS0 and RCM_SSRS1. */
Kojto 120:7c328cabac7e 1427 #define FSL_FEATURE_RCM_HAS_SSRS (1)
Kojto 120:7c328cabac7e 1428 /* @brief Has Version ID Register (RCM_VERID). */
Kojto 120:7c328cabac7e 1429 #define FSL_FEATURE_RCM_HAS_VERID (0)
Kojto 120:7c328cabac7e 1430 /* @brief Has Parameter Register (RCM_PARAM). */
Kojto 120:7c328cabac7e 1431 #define FSL_FEATURE_RCM_HAS_PARAM (0)
Kojto 120:7c328cabac7e 1432 /* @brief Has Reset Interrupt Enable Register RCM_SRIE. */
Kojto 120:7c328cabac7e 1433 #define FSL_FEATURE_RCM_HAS_SRIE (0)
Kojto 120:7c328cabac7e 1434 /* @brief Width of registers of the RCM. */
Kojto 120:7c328cabac7e 1435 #define FSL_FEATURE_RCM_REG_WIDTH (8)
Kojto 120:7c328cabac7e 1436 /* @brief Has Core 1 generated Reset support RCM_SRS[CORE1] */
Kojto 120:7c328cabac7e 1437 #define FSL_FEATURE_RCM_HAS_CORE1 (0)
Kojto 120:7c328cabac7e 1438 /* @brief Has MDM-AP system reset support RCM_SRS1[MDM_AP] */
Kojto 120:7c328cabac7e 1439 #define FSL_FEATURE_RCM_HAS_MDM_AP (1)
Kojto 120:7c328cabac7e 1440 /* @brief Has wakeup reset feature. Register bit SRS[WAKEUP]. */
Kojto 120:7c328cabac7e 1441 #define FSL_FEATURE_RCM_HAS_WAKEUP (1)
Kojto 120:7c328cabac7e 1442
Kojto 120:7c328cabac7e 1443 /* RTC module features */
Kojto 120:7c328cabac7e 1444
Kojto 120:7c328cabac7e 1445 /* @brief Has wakeup pin. */
Kojto 120:7c328cabac7e 1446 #define FSL_FEATURE_RTC_HAS_WAKEUP_PIN (1)
Kojto 120:7c328cabac7e 1447 /* @brief Has wakeup pin selection (bit field CR[WPS]). */
Kojto 120:7c328cabac7e 1448 #define FSL_FEATURE_RTC_HAS_WAKEUP_PIN_SELECTION (1)
Kojto 120:7c328cabac7e 1449 /* @brief Has low power features (registers MER, MCLR and MCHR). */
Kojto 120:7c328cabac7e 1450 #define FSL_FEATURE_RTC_HAS_MONOTONIC (0)
Kojto 120:7c328cabac7e 1451 /* @brief Has read/write access control (registers WAR and RAR). */
Kojto 120:7c328cabac7e 1452 #define FSL_FEATURE_RTC_HAS_ACCESS_CONTROL (1)
Kojto 120:7c328cabac7e 1453 /* @brief Has security features (registers TTSR, MER, MCLR and MCHR). */
Kojto 120:7c328cabac7e 1454 #define FSL_FEATURE_RTC_HAS_SECURITY (1)
Kojto 120:7c328cabac7e 1455 /* @brief Has RTC_CLKIN available. */
Kojto 120:7c328cabac7e 1456 #define FSL_FEATURE_RTC_HAS_RTC_CLKIN (0)
Kojto 120:7c328cabac7e 1457 /* @brief Has prescaler adjust for LPO. */
Kojto 120:7c328cabac7e 1458 #define FSL_FEATURE_RTC_HAS_LPO_ADJUST (0)
Kojto 120:7c328cabac7e 1459 /* @brief Has Clock Pin Enable field. */
Kojto 120:7c328cabac7e 1460 #define FSL_FEATURE_RTC_HAS_CPE (0)
Kojto 120:7c328cabac7e 1461 /* @brief Has Timer Seconds Interrupt Configuration field. */
Kojto 120:7c328cabac7e 1462 #define FSL_FEATURE_RTC_HAS_TSIC (0)
Kojto 120:7c328cabac7e 1463 /* @brief Has OSC capacitor setting RTC_CR[SC2P ~ SC16P] */
Kojto 120:7c328cabac7e 1464 #define FSL_FEATURE_RTC_HAS_OSC_SCXP (1)
Kojto 120:7c328cabac7e 1465
Kojto 120:7c328cabac7e 1466 /* SIM module features */
Kojto 120:7c328cabac7e 1467
Kojto 120:7c328cabac7e 1468 /* @brief Has USB FS divider. */
Kojto 120:7c328cabac7e 1469 #define FSL_FEATURE_SIM_USBFS_USE_SPECIAL_DIVIDER (0)
Kojto 120:7c328cabac7e 1470 /* @brief Is PLL clock divided by 2 before MCG PLL/FLL clock selection. */
Kojto 120:7c328cabac7e 1471 #define FSL_FEATURE_SIM_PLLCLK_USE_SPECIAL_DIVIDER (0)
Kojto 120:7c328cabac7e 1472 /* @brief Has RAM size specification (register bit field SOPT1[RAMSIZE]). */
Kojto 120:7c328cabac7e 1473 #define FSL_FEATURE_SIM_OPT_HAS_RAMSIZE (1)
Kojto 120:7c328cabac7e 1474 /* @brief Has 32k oscillator clock output (register bit SOPT1[OSC32KOUT]). */
Kojto 120:7c328cabac7e 1475 #define FSL_FEATURE_SIM_OPT_HAS_OSC32K_OUT (1)
Kojto 120:7c328cabac7e 1476 /* @brief Has 32k oscillator clock selection (register bit field SOPT1[OSC32KSEL]). */
Kojto 120:7c328cabac7e 1477 #define FSL_FEATURE_SIM_OPT_HAS_OSC32K_SELECTION (1)
Kojto 120:7c328cabac7e 1478 /* @brief 32k oscillator clock selection width (width of register bit field SOPT1[OSC32KSEL]). */
Kojto 120:7c328cabac7e 1479 #define FSL_FEATURE_SIM_OPT_OSC32K_SELECTION_WIDTH (2)
Kojto 120:7c328cabac7e 1480 /* @brief Has RTC clock output selection (register bit SOPT2[RTCCLKOUTSEL]). */
Kojto 120:7c328cabac7e 1481 #define FSL_FEATURE_SIM_OPT_HAS_RTC_CLOCK_OUT_SELECTION (1)
Kojto 120:7c328cabac7e 1482 /* @brief Has USB voltage regulator (register bits SOPT1[USBVSTBY], SOPT1[USBSSTBY], SOPT1[USBREGEN], SOPT1CFG[URWE], SOPT1CFG[UVSWE], SOPT1CFG[USSWE]). */
Kojto 120:7c328cabac7e 1483 #define FSL_FEATURE_SIM_OPT_HAS_USB_VOLTAGE_REGULATOR (1)
Kojto 120:7c328cabac7e 1484 /* @brief USB has integrated PHY (register bits USBPHYCTL[USBVREGSEL], USBPHYCTL[USBVREGPD], USBPHYCTL[USB3VOUTTRG], USBPHYCTL[USBDISILIM], SOPT2[USBSLSRC], SOPT2[USBREGEN]). */
Kojto 120:7c328cabac7e 1485 #define FSL_FEATURE_SIM_OPT_HAS_USB_PHY (0)
Kojto 120:7c328cabac7e 1486 /* @brief Has PTD7 pad drive strength control (register bit SOPT2[PTD7PAD]). */
Kojto 120:7c328cabac7e 1487 #define FSL_FEATURE_SIM_OPT_HAS_PTD7PAD (0)
Kojto 120:7c328cabac7e 1488 /* @brief Has FlexBus security level selection (register bit SOPT2[FBSL]). */
Kojto 120:7c328cabac7e 1489 #define FSL_FEATURE_SIM_OPT_HAS_FBSL (1)
Kojto 120:7c328cabac7e 1490 /* @brief Has number of FlexBus hold cycle before FlexBus can release bus (register bit SOPT6[PCR]). */
Kojto 120:7c328cabac7e 1491 #define FSL_FEATURE_SIM_OPT_HAS_PCR (0)
Kojto 120:7c328cabac7e 1492 /* @brief Has number of NFC hold cycle in case of FlexBus request (register bit SOPT6[MCC]). */
Kojto 120:7c328cabac7e 1493 #define FSL_FEATURE_SIM_OPT_HAS_MCC (0)
Kojto 120:7c328cabac7e 1494 /* @brief Has UART open drain enable (register bits UARTnODE, where n is a number, in register SOPT5). */
Kojto 120:7c328cabac7e 1495 #define FSL_FEATURE_SIM_OPT_HAS_ODE (0)
Kojto 120:7c328cabac7e 1496 /* @brief Number of LPUART modules (number of register bits LPUARTn, where n is a number, in register SCGC5). */
Kojto 120:7c328cabac7e 1497 #define FSL_FEATURE_SIM_OPT_LPUART_COUNT (1)
Kojto 120:7c328cabac7e 1498 /* @brief Number of UART modules (number of register bits UARTn, where n is a number, in register SCGC4). */
Kojto 120:7c328cabac7e 1499 #define FSL_FEATURE_SIM_OPT_UART_COUNT (3)
Kojto 120:7c328cabac7e 1500 /* @brief Has UART0 open drain enable (register bit SOPT5[UART0ODE]). */
Kojto 120:7c328cabac7e 1501 #define FSL_FEATURE_SIM_OPT_HAS_UART0_ODE (0)
Kojto 120:7c328cabac7e 1502 /* @brief Has UART1 open drain enable (register bit SOPT5[UART1ODE]). */
Kojto 120:7c328cabac7e 1503 #define FSL_FEATURE_SIM_OPT_HAS_UART1_ODE (0)
Kojto 120:7c328cabac7e 1504 /* @brief Has UART2 open drain enable (register bit SOPT5[UART2ODE]). */
Kojto 120:7c328cabac7e 1505 #define FSL_FEATURE_SIM_OPT_HAS_UART2_ODE (0)
Kojto 120:7c328cabac7e 1506 /* @brief Has LPUART0 open drain enable (register bit SOPT5[LPUART0ODE]). */
Kojto 120:7c328cabac7e 1507 #define FSL_FEATURE_SIM_OPT_HAS_LPUART0_ODE (0)
Kojto 120:7c328cabac7e 1508 /* @brief Has LPUART1 open drain enable (register bit SOPT5[LPUART1ODE]). */
Kojto 120:7c328cabac7e 1509 #define FSL_FEATURE_SIM_OPT_HAS_LPUART1_ODE (0)
Kojto 120:7c328cabac7e 1510 /* @brief Has CMT/UART pad drive strength control (register bit SOPT2[CMTUARTPAD]). */
Kojto 120:7c328cabac7e 1511 #define FSL_FEATURE_SIM_OPT_HAS_CMTUARTPAD (0)
Kojto 120:7c328cabac7e 1512 /* @brief Has LPUART0 transmit data source selection (register bit SOPT5[LPUART0TXSRC]). */
Kojto 120:7c328cabac7e 1513 #define FSL_FEATURE_SIM_OPT_HAS_LPUART0_TX_SRC (0)
Kojto 120:7c328cabac7e 1514 /* @brief Has LPUART0 receive data source selection (register bit SOPT5[LPUART0RXSRC]). */
Kojto 120:7c328cabac7e 1515 #define FSL_FEATURE_SIM_OPT_HAS_LPUART0_RX_SRC (1)
Kojto 120:7c328cabac7e 1516 /* @brief Has LPUART1 transmit data source selection (register bit SOPT5[LPUART1TXSRC]). */
Kojto 120:7c328cabac7e 1517 #define FSL_FEATURE_SIM_OPT_HAS_LPUART1_TX_SRC (0)
Kojto 120:7c328cabac7e 1518 /* @brief Has LPUART1 receive data source selection (register bit SOPT5[LPUART1RXSRC]). */
Kojto 120:7c328cabac7e 1519 #define FSL_FEATURE_SIM_OPT_HAS_LPUART1_RX_SRC (0)
Kojto 120:7c328cabac7e 1520 /* @brief Has UART0 transmit data source selection (register bit SOPT5[UART0TXSRC]). */
Kojto 120:7c328cabac7e 1521 #define FSL_FEATURE_SIM_OPT_HAS_UART0_TX_SRC (1)
Kojto 120:7c328cabac7e 1522 /* @brief UART0 transmit data source selection width (width of register bit SOPT5[UART0TXSRC]). */
Kojto 120:7c328cabac7e 1523 #define FSL_FEATURE_SIM_OPT_UART0_TX_SRC_WIDTH (2)
Kojto 120:7c328cabac7e 1524 /* @brief Has UART0 receive data source selection (register bit SOPT5[UART0RXSRC]). */
Kojto 120:7c328cabac7e 1525 #define FSL_FEATURE_SIM_OPT_HAS_UART0_RX_SRC (1)
Kojto 120:7c328cabac7e 1526 /* @brief UART0 receive data source selection width (width of register bit SOPT5[UART0RXSRC]). */
Kojto 120:7c328cabac7e 1527 #define FSL_FEATURE_SIM_OPT_UART0_RX_SRC_WIDTH (2)
Kojto 120:7c328cabac7e 1528 /* @brief Has UART1 transmit data source selection (register bit SOPT5[UART1TXSRC]). */
Kojto 120:7c328cabac7e 1529 #define FSL_FEATURE_SIM_OPT_HAS_UART1_TX_SRC (1)
Kojto 120:7c328cabac7e 1530 /* @brief Has UART1 receive data source selection (register bit SOPT5[UART1RXSRC]). */
Kojto 120:7c328cabac7e 1531 #define FSL_FEATURE_SIM_OPT_HAS_UART1_RX_SRC (1)
Kojto 120:7c328cabac7e 1532 /* @brief UART1 receive data source selection width (width of register bit SOPT5[UART1RXSRC]). */
Kojto 120:7c328cabac7e 1533 #define FSL_FEATURE_SIM_OPT_UART1_RX_SRC_WIDTH (2)
Kojto 120:7c328cabac7e 1534 /* @brief Has FTM module(s) configuration. */
Kojto 120:7c328cabac7e 1535 #define FSL_FEATURE_SIM_OPT_HAS_FTM (1)
Kojto 120:7c328cabac7e 1536 /* @brief Number of FTM modules. */
Kojto 120:7c328cabac7e 1537 #define FSL_FEATURE_SIM_OPT_FTM_COUNT (4)
Kojto 120:7c328cabac7e 1538 /* @brief Number of FTM triggers with selectable source. */
Kojto 120:7c328cabac7e 1539 #define FSL_FEATURE_SIM_OPT_FTM_TRIGGER_COUNT (2)
Kojto 120:7c328cabac7e 1540 /* @brief Has FTM0 triggers source selection (register bits SOPT4[FTM0TRGnSRC], where n is a number). */
Kojto 120:7c328cabac7e 1541 #define FSL_FEATURE_SIM_OPT_HAS_FTM0_TRIGGER (1)
Kojto 120:7c328cabac7e 1542 /* @brief Has FTM3 triggers source selection (register bits SOPT4[FTM3TRGnSRC], where n is a number). */
Kojto 120:7c328cabac7e 1543 #define FSL_FEATURE_SIM_OPT_HAS_FTM3_TRIGGER (1)
Kojto 120:7c328cabac7e 1544 /* @brief Has FTM1 channel 0 input capture source selection (register bit SOPT4[FTM1CH0SRC]). */
Kojto 120:7c328cabac7e 1545 #define FSL_FEATURE_SIM_OPT_HAS_FTM1_CHANNELS (1)
Kojto 120:7c328cabac7e 1546 /* @brief Has FTM2 channel 0 input capture source selection (register bit SOPT4[FTM2CH0SRC]). */
Kojto 120:7c328cabac7e 1547 #define FSL_FEATURE_SIM_OPT_HAS_FTM2_CHANNELS (1)
Kojto 120:7c328cabac7e 1548 /* @brief Has FTM3 channel 0 input capture source selection (register bit SOPT4[FTM3CH0SRC]). */
Kojto 120:7c328cabac7e 1549 #define FSL_FEATURE_SIM_OPT_HAS_FTM3_CHANNELS (0)
Kojto 120:7c328cabac7e 1550 /* @brief Has FTM2 channel 1 input capture source selection (register bit SOPT4[FTM2CH1SRC]). */
Kojto 120:7c328cabac7e 1551 #define FSL_FEATURE_SIM_OPT_HAS_FTM2_CHANNEL1 (1)
Kojto 120:7c328cabac7e 1552 /* @brief Number of configurable FTM0 fault detection input (number of register bits SOPT4[FTM0FLTn], where n is a number starting from zero). */
Kojto 120:7c328cabac7e 1553 #define FSL_FEATURE_SIM_OPT_FTM0_FAULT_COUNT (2)
Kojto 120:7c328cabac7e 1554 /* @brief Number of configurable FTM1 fault detection input (number of register bits SOPT4[FTM1FLTn], where n is a number starting from zero). */
Kojto 120:7c328cabac7e 1555 #define FSL_FEATURE_SIM_OPT_FTM1_FAULT_COUNT (1)
Kojto 120:7c328cabac7e 1556 /* @brief Number of configurable FTM2 fault detection input (number of register bits SOPT4[FTM2FLTn], where n is a number starting from zero). */
Kojto 120:7c328cabac7e 1557 #define FSL_FEATURE_SIM_OPT_FTM2_FAULT_COUNT (1)
Kojto 120:7c328cabac7e 1558 /* @brief Number of configurable FTM3 fault detection input (number of register bits SOPT4[FTM3FLTn], where n is a number starting from zero). */
Kojto 120:7c328cabac7e 1559 #define FSL_FEATURE_SIM_OPT_FTM3_FAULT_COUNT (1)
Kojto 120:7c328cabac7e 1560 /* @brief Has FTM hardware trigger 0 software synchronization (register bit SOPT8[FTMnSYNCBIT], where n is a module instance index). */
Kojto 120:7c328cabac7e 1561 #define FSL_FEATURE_SIM_OPT_HAS_FTM_TRIGGER_SYNC (1)
Kojto 120:7c328cabac7e 1562 /* @brief Has FTM channels output source selection (register bit SOPT8[FTMxOCHnSRC], where x is a module instance index and n is a channel index). */
Kojto 120:7c328cabac7e 1563 #define FSL_FEATURE_SIM_OPT_HAS_FTM_CHANNELS_OUTPUT_SRC (1)
Kojto 120:7c328cabac7e 1564 /* @brief Has TPM module(s) configuration. */
Kojto 120:7c328cabac7e 1565 #define FSL_FEATURE_SIM_OPT_HAS_TPM (0)
Kojto 120:7c328cabac7e 1566 /* @brief The highest TPM module index. */
Kojto 120:7c328cabac7e 1567 #define FSL_FEATURE_SIM_OPT_MAX_TPM_INDEX (0)
Kojto 120:7c328cabac7e 1568 /* @brief Has TPM module with index 0. */
Kojto 120:7c328cabac7e 1569 #define FSL_FEATURE_SIM_OPT_HAS_TPM0 (0)
Kojto 120:7c328cabac7e 1570 /* @brief Has TPM0 clock selection (register bit field SOPT4[TPM0CLKSEL]). */
Kojto 120:7c328cabac7e 1571 #define FSL_FEATURE_SIM_OPT_HAS_TPM0_CLK_SEL (0)
Kojto 120:7c328cabac7e 1572 /* @brief Is TPM channels configuration in the SOPT4 (not SOPT9) register (register bits TPMnCH0SRC, TPMnCLKSEL, where n is a module instance index). */
Kojto 120:7c328cabac7e 1573 #define FSL_FEATURE_SIM_OPT_HAS_TPM_CHANNELS_CONFIG_IN_SOPT4_REG (0)
Kojto 120:7c328cabac7e 1574 /* @brief Has TPM1 channel 0 input capture source selection (register bit field SOPT4[TPM1CH0SRC] or SOPT9[TPM1CH0SRC]). */
Kojto 120:7c328cabac7e 1575 #define FSL_FEATURE_SIM_OPT_HAS_TPM1_CH0_SRC_SELECTION (0)
Kojto 120:7c328cabac7e 1576 /* @brief Has TPM1 clock selection (register bit field SOPT4[TPM1CLKSEL]). */
Kojto 120:7c328cabac7e 1577 #define FSL_FEATURE_SIM_OPT_HAS_TPM1_CLK_SEL (0)
Kojto 120:7c328cabac7e 1578 /* @brief TPM1 channel 0 input capture source selection width (width of register bit field SOPT4[TPM1CH0SRC] or SOPT9[TPM1CH0SRC]). */
Kojto 120:7c328cabac7e 1579 #define FSL_FEATURE_SIM_OPT_TPM1_CH0_SRC_SELECTION_WIDTH (0)
Kojto 120:7c328cabac7e 1580 /* @brief Has TPM2 channel 0 input capture source selection (register bit field SOPT4[TPM2CH0SRC]). */
Kojto 120:7c328cabac7e 1581 #define FSL_FEATURE_SIM_OPT_HAS_TPM2_CH0_SRC_SELECTION (0)
Kojto 120:7c328cabac7e 1582 /* @brief Has TPM2 clock selection (register bit field SOPT4[TPM2CLKSEL]). */
Kojto 120:7c328cabac7e 1583 #define FSL_FEATURE_SIM_OPT_HAS_TPM2_CLK_SEL (0)
Kojto 120:7c328cabac7e 1584 /* @brief Has PLL/FLL clock selection (register bit field SOPT2[PLLFLLSEL]). */
Kojto 120:7c328cabac7e 1585 #define FSL_FEATURE_SIM_OPT_HAS_PLL_FLL_SELECTION (1)
Kojto 120:7c328cabac7e 1586 /* @brief PLL/FLL clock selection width (width of register bit field SOPT2[PLLFLLSEL]). */
Kojto 120:7c328cabac7e 1587 #define FSL_FEATURE_SIM_OPT_PLL_FLL_SELECTION_WIDTH (1)
Kojto 120:7c328cabac7e 1588 /* @brief Has NFC clock source selection (register bit SOPT2[NFCSRC]). */
Kojto 120:7c328cabac7e 1589 #define FSL_FEATURE_SIM_OPT_HAS_NFCSRC (0)
Kojto 120:7c328cabac7e 1590 /* @brief Has eSDHC clock source selection (register bit SOPT2[ESDHCSRC]). */
Kojto 120:7c328cabac7e 1591 #define FSL_FEATURE_SIM_OPT_HAS_ESDHCSRC (0)
Kojto 120:7c328cabac7e 1592 /* @brief Has SDHC clock source selection (register bit SOPT2[SDHCSRC]). */
Kojto 120:7c328cabac7e 1593 #define FSL_FEATURE_SIM_OPT_HAS_SDHCSRC (0)
Kojto 120:7c328cabac7e 1594 /* @brief Has LCDC clock source selection (register bits SOPT2[LCDCSRC], SOPT2[LCDC_CLKSEL]). */
Kojto 120:7c328cabac7e 1595 #define FSL_FEATURE_SIM_OPT_HAS_LCDCSRC (0)
Kojto 120:7c328cabac7e 1596 /* @brief Has ENET timestamp clock source selection (register bit SOPT2[TIMESRC]). */
Kojto 120:7c328cabac7e 1597 #define FSL_FEATURE_SIM_OPT_HAS_TIMESRC (0)
Kojto 120:7c328cabac7e 1598 /* @brief Has ENET RMII clock source selection (register bit SOPT2[RMIISRC]). */
Kojto 120:7c328cabac7e 1599 #define FSL_FEATURE_SIM_OPT_HAS_RMIISRC (0)
Kojto 120:7c328cabac7e 1600 /* @brief Has USB clock source selection (register bit SOPT2[USBSRC]). */
Kojto 120:7c328cabac7e 1601 #define FSL_FEATURE_SIM_OPT_HAS_USBSRC (1)
Kojto 120:7c328cabac7e 1602 /* @brief Has USB FS clock source selection (register bit SOPT2[USBFSRC]). */
Kojto 120:7c328cabac7e 1603 #define FSL_FEATURE_SIM_OPT_HAS_USBFSRC (0)
Kojto 120:7c328cabac7e 1604 /* @brief Has USB HS clock source selection (register bit SOPT2[USBHSRC]). */
Kojto 120:7c328cabac7e 1605 #define FSL_FEATURE_SIM_OPT_HAS_USBHSRC (0)
Kojto 120:7c328cabac7e 1606 /* @brief Has LPUART clock source selection (register bit SOPT2[LPUARTSRC]). */
Kojto 120:7c328cabac7e 1607 #define FSL_FEATURE_SIM_OPT_HAS_LPUARTSRC (1)
Kojto 120:7c328cabac7e 1608 /* @brief Has LPUART0 clock source selection (register bit SOPT2[LPUART0SRC]). */
Kojto 120:7c328cabac7e 1609 #define FSL_FEATURE_SIM_OPT_HAS_LPUART0SRC (0)
Kojto 120:7c328cabac7e 1610 /* @brief Has LPUART1 clock source selection (register bit SOPT2[LPUART1SRC]). */
Kojto 120:7c328cabac7e 1611 #define FSL_FEATURE_SIM_OPT_HAS_LPUART1SRC (0)
Kojto 120:7c328cabac7e 1612 /* @brief Has FLEXIOSRC clock source selection (register bit SOPT2[FLEXIOSRC]). */
Kojto 120:7c328cabac7e 1613 #define FSL_FEATURE_SIM_OPT_HAS_FLEXIOSRC (0)
Kojto 120:7c328cabac7e 1614 /* @brief Has UART0 clock source selection (register bit SOPT2[UART0SRC]). */
Kojto 120:7c328cabac7e 1615 #define FSL_FEATURE_SIM_OPT_HAS_UART0SRC (0)
Kojto 120:7c328cabac7e 1616 /* @brief Has TPM clock source selection (register bit SOPT2[TPMSRC]). */
Kojto 120:7c328cabac7e 1617 #define FSL_FEATURE_SIM_OPT_HAS_TPMSRC (0)
Kojto 120:7c328cabac7e 1618 /* @brief Has debug trace clock selection (register bit SOPT2[TRACECLKSEL]). */
Kojto 120:7c328cabac7e 1619 #define FSL_FEATURE_SIM_OPT_HAS_TRACE_CLKSEL (1)
Kojto 120:7c328cabac7e 1620 /* @brief Number of ADC modules (register bits SOPT7[ADCnTRGSEL], SOPT7[ADCnPRETRGSEL], SOPT7[ADCnALTTRGSEL], where n is a module instance index). */
Kojto 120:7c328cabac7e 1621 #define FSL_FEATURE_SIM_OPT_ADC_COUNT (2)
Kojto 120:7c328cabac7e 1622 /* @brief ADC0 alternate trigger enable width (width of bit field ADC0ALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1623 #define FSL_FEATURE_SIM_OPT_ADC0ALTTRGEN_WIDTH (1)
Kojto 120:7c328cabac7e 1624 /* @brief ADC1 alternate trigger enable width (width of bit field ADC1ALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1625 #define FSL_FEATURE_SIM_OPT_ADC1ALTTRGEN_WIDTH (1)
Kojto 120:7c328cabac7e 1626 /* @brief ADC2 alternate trigger enable width (width of bit field ADC2ALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1627 #define FSL_FEATURE_SIM_OPT_ADC2ALTTRGEN_WIDTH (0)
Kojto 120:7c328cabac7e 1628 /* @brief ADC3 alternate trigger enable width (width of bit field ADC3ALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1629 #define FSL_FEATURE_SIM_OPT_ADC3ALTTRGEN_WIDTH (0)
Kojto 120:7c328cabac7e 1630 /* @brief HSADC0 converter A alternate trigger enable width (width of bit field HSADC0AALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1631 #define FSL_FEATURE_SIM_OPT_HSADC0AALTTRGEN_WIDTH (0)
Kojto 120:7c328cabac7e 1632 /* @brief HSADC1 converter A alternate trigger enable width (width of bit field HSADC1AALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1633 #define FSL_FEATURE_SIM_OPT_HSADC1AALTTRGEN_WIDTH (0)
Kojto 120:7c328cabac7e 1634 /* @brief ADC converter A alternate trigger enable width (width of bit field ADCAALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1635 #define FSL_FEATURE_SIM_OPT_ADCAALTTRGEN_WIDTH (0)
Kojto 120:7c328cabac7e 1636 /* @brief HSADC0 converter B alternate trigger enable width (width of bit field HSADC0BALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1637 #define FSL_FEATURE_SIM_OPT_HSADC0BALTTRGEN_WIDTH (0)
Kojto 120:7c328cabac7e 1638 /* @brief HSADC1 converter B alternate trigger enable width (width of bit field HSADC1BALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1639 #define FSL_FEATURE_SIM_OPT_HSADC1BALTTRGEN_WIDTH (0)
Kojto 120:7c328cabac7e 1640 /* @brief ADC converter B alternate trigger enable width (width of bit field ADCBALTTRGEN of register SOPT7). */
Kojto 120:7c328cabac7e 1641 #define FSL_FEATURE_SIM_OPT_ADCBALTTRGEN_WIDTH (0)
Kojto 120:7c328cabac7e 1642 /* @brief Has clock 2 output divider (register bit field CLKDIV1[OUTDIV2]). */
Kojto 120:7c328cabac7e 1643 #define FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV2 (1)
Kojto 120:7c328cabac7e 1644 /* @brief Has clock 3 output divider (register bit field CLKDIV1[OUTDIV3]). */
Kojto 120:7c328cabac7e 1645 #define FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV3 (1)
Kojto 120:7c328cabac7e 1646 /* @brief Has clock 4 output divider (register bit field CLKDIV1[OUTDIV4]). */
Kojto 120:7c328cabac7e 1647 #define FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV4 (1)
Kojto 120:7c328cabac7e 1648 /* @brief Clock 4 output divider width (width of register bit field CLKDIV1[OUTDIV4]). */
Kojto 120:7c328cabac7e 1649 #define FSL_FEATURE_SIM_DIVIDER_OUTDIV4_WIDTH (4)
Kojto 120:7c328cabac7e 1650 /* @brief Has clock 5 output divider (register bit field CLKDIV1[OUTDIV5]). */
Kojto 120:7c328cabac7e 1651 #define FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV5 (0)
Kojto 120:7c328cabac7e 1652 /* @brief Has USB clock divider (register bit field CLKDIV2[USBDIV] and CLKDIV2[USBFRAC]). */
Kojto 120:7c328cabac7e 1653 #define FSL_FEATURE_SIM_DIVIDER_HAS_USBDIV (1)
Kojto 120:7c328cabac7e 1654 /* @brief Has USB FS clock divider (register bit field CLKDIV2[USBFSDIV] and CLKDIV2[USBFSFRAC]). */
Kojto 120:7c328cabac7e 1655 #define FSL_FEATURE_SIM_DIVIDER_HAS_USBFSDIV (0)
Kojto 120:7c328cabac7e 1656 /* @brief Has USB HS clock divider (register bit field CLKDIV2[USBHSDIV] and CLKDIV2[USBHSFRAC]). */
Kojto 120:7c328cabac7e 1657 #define FSL_FEATURE_SIM_DIVIDER_HAS_USBHSDIV (0)
Kojto 120:7c328cabac7e 1658 /* @brief Has PLL/FLL clock divider (register bit field CLKDIV3[PLLFLLDIV] and CLKDIV3[PLLFLLFRAC]). */
Kojto 120:7c328cabac7e 1659 #define FSL_FEATURE_SIM_DIVIDER_HAS_PLLFLLDIV (0)
Kojto 120:7c328cabac7e 1660 /* @brief Has LCDC clock divider (register bit field CLKDIV3[LCDCDIV] and CLKDIV3[LCDCFRAC]). */
Kojto 120:7c328cabac7e 1661 #define FSL_FEATURE_SIM_DIVIDER_HAS_LCDCDIV (0)
Kojto 120:7c328cabac7e 1662 /* @brief Has trace clock divider (register bit field CLKDIV4[TRACEDIV] and CLKDIV4[TRACEFRAC]). */
Kojto 120:7c328cabac7e 1663 #define FSL_FEATURE_SIM_DIVIDER_HAS_TRACEDIV (0)
Kojto 120:7c328cabac7e 1664 /* @brief Has NFC clock divider (register bit field CLKDIV4[NFCDIV] and CLKDIV4[NFCFRAC]). */
Kojto 120:7c328cabac7e 1665 #define FSL_FEATURE_SIM_DIVIDER_HAS_NFCDIV (0)
Kojto 120:7c328cabac7e 1666 /* @brief Has Kinetis family ID (register bit field SDID[FAMILYID]). */
Kojto 120:7c328cabac7e 1667 #define FSL_FEATURE_SIM_SDID_HAS_FAMILYID (1)
Kojto 120:7c328cabac7e 1668 /* @brief Has Kinetis family ID (register bit field SDID[FAMID]). */
Kojto 120:7c328cabac7e 1669 #define FSL_FEATURE_SIM_SDID_HAS_FAMID (1)
Kojto 120:7c328cabac7e 1670 /* @brief Has Kinetis sub-family ID (register bit field SDID[SUBFAMID]). */
Kojto 120:7c328cabac7e 1671 #define FSL_FEATURE_SIM_SDID_HAS_SUBFAMID (1)
Kojto 120:7c328cabac7e 1672 /* @brief Has Kinetis series ID (register bit field SDID[SERIESID]). */
Kojto 120:7c328cabac7e 1673 #define FSL_FEATURE_SIM_SDID_HAS_SERIESID (1)
Kojto 120:7c328cabac7e 1674 /* @brief Has device die ID (register bit field SDID[DIEID]). */
Kojto 120:7c328cabac7e 1675 #define FSL_FEATURE_SIM_SDID_HAS_DIEID (1)
Kojto 120:7c328cabac7e 1676 /* @brief Has system SRAM size specifier (register bit field SDID[SRAMSIZE]). */
Kojto 120:7c328cabac7e 1677 #define FSL_FEATURE_SIM_SDID_HAS_SRAMSIZE (0)
Kojto 120:7c328cabac7e 1678 /* @brief Has flash mode (register bit FCFG1[FLASHDOZE]). */
Kojto 120:7c328cabac7e 1679 #define FSL_FEATURE_SIM_FCFG_HAS_FLASHDOZE (1)
Kojto 120:7c328cabac7e 1680 /* @brief Has flash disable (register bit FCFG1[FLASHDIS]). */
Kojto 120:7c328cabac7e 1681 #define FSL_FEATURE_SIM_FCFG_HAS_FLASHDIS (1)
Kojto 120:7c328cabac7e 1682 /* @brief Has FTFE disable (register bit FCFG1[FTFDIS]). */
Kojto 120:7c328cabac7e 1683 #define FSL_FEATURE_SIM_FCFG_HAS_FTFDIS (0)
Kojto 120:7c328cabac7e 1684 /* @brief Has FlexNVM size specifier (register bit field FCFG1[NVMSIZE]). */
Kojto 120:7c328cabac7e 1685 #define FSL_FEATURE_SIM_FCFG_HAS_NVMSIZE (0)
Kojto 120:7c328cabac7e 1686 /* @brief Has EEPROM size specifier (register bit field FCFG1[EESIZE]). */
Kojto 120:7c328cabac7e 1687 #define FSL_FEATURE_SIM_FCFG_HAS_EESIZE (0)
Kojto 120:7c328cabac7e 1688 /* @brief Has FlexNVM partition (register bit field FCFG1[DEPART]). */
Kojto 120:7c328cabac7e 1689 #define FSL_FEATURE_SIM_FCFG_HAS_DEPART (0)
Kojto 120:7c328cabac7e 1690 /* @brief Maximum flash address block 0 address specifier (register bit field FCFG2[MAXADDR0]). */
Kojto 120:7c328cabac7e 1691 #define FSL_FEATURE_SIM_FCFG_HAS_MAXADDR0 (1)
Kojto 120:7c328cabac7e 1692 /* @brief Maximum flash address block 1 address specifier (register bit field FCFG2[MAXADDR1]). */
Kojto 120:7c328cabac7e 1693 #define FSL_FEATURE_SIM_FCFG_HAS_MAXADDR1 (1)
Kojto 120:7c328cabac7e 1694 /* @brief Maximum flash address block 0 or 1 address specifier (register bit field FCFG2[MAXADDR01]). */
Kojto 120:7c328cabac7e 1695 #define FSL_FEATURE_SIM_FCFG_HAS_MAXADDR01 (0)
Kojto 120:7c328cabac7e 1696 /* @brief Maximum flash address block 2 or 3 address specifier (register bit field FCFG2[MAXADDR23]). */
Kojto 120:7c328cabac7e 1697 #define FSL_FEATURE_SIM_FCFG_HAS_MAXADDR23 (0)
Kojto 120:7c328cabac7e 1698 /* @brief Has program flash availability specifier (register bit FCFG2[PFLSH]). */
Kojto 120:7c328cabac7e 1699 #define FSL_FEATURE_SIM_FCFG_HAS_PFLSH (0)
Kojto 120:7c328cabac7e 1700 /* @brief Has program flash swapping (register bit FCFG2[SWAPPFLSH]). */
Kojto 120:7c328cabac7e 1701 #define FSL_FEATURE_SIM_FCFG_HAS_PFLSH_SWAP (0)
Kojto 120:7c328cabac7e 1702 /* @brief Has miscellanious control register (register MCR). */
Kojto 120:7c328cabac7e 1703 #define FSL_FEATURE_SIM_HAS_MISC_CONTROLS (0)
Kojto 120:7c328cabac7e 1704 /* @brief Has COP watchdog (registers COPC and SRVCOP). */
Kojto 120:7c328cabac7e 1705 #define FSL_FEATURE_SIM_HAS_COP_WATCHDOG (0)
Kojto 120:7c328cabac7e 1706 /* @brief Has COP watchdog stop (register bits COPC[COPSTPEN], COPC[COPDBGEN] and COPC[COPCLKSEL]). */
Kojto 120:7c328cabac7e 1707 #define FSL_FEATURE_SIM_HAS_COP_STOP (0)
Kojto 120:7c328cabac7e 1708 /* @brief Has LLWU clock gate bit (e.g SIM_SCGC4). */
Kojto 120:7c328cabac7e 1709 #define FSL_FEATURE_SIM_HAS_SCGC_LLWU (0)
Kojto 120:7c328cabac7e 1710
Kojto 120:7c328cabac7e 1711 /* SMC module features */
Kojto 120:7c328cabac7e 1712
Kojto 120:7c328cabac7e 1713 /* @brief Has partial stop option (register bit STOPCTRL[PSTOPO]). */
Kojto 120:7c328cabac7e 1714 #define FSL_FEATURE_SMC_HAS_PSTOPO (1)
Kojto 120:7c328cabac7e 1715 /* @brief Has LPO power option (register bit STOPCTRL[LPOPO]). */
Kojto 120:7c328cabac7e 1716 #define FSL_FEATURE_SMC_HAS_LPOPO (0)
Kojto 120:7c328cabac7e 1717 /* @brief Has POR power option (register bit STOPCTRL[PORPO] or VLLSCTRL[PORPO]). */
Kojto 120:7c328cabac7e 1718 #define FSL_FEATURE_SMC_HAS_PORPO (1)
Kojto 120:7c328cabac7e 1719 /* @brief Has low power wakeup on interrupt (register bit PMCTRL[LPWUI]). */
Kojto 120:7c328cabac7e 1720 #define FSL_FEATURE_SMC_HAS_LPWUI (0)
Kojto 120:7c328cabac7e 1721 /* @brief Has LLS or VLLS mode control (register bit STOPCTRL[LLSM]). */
Kojto 120:7c328cabac7e 1722 #define FSL_FEATURE_SMC_HAS_LLS_SUBMODE (1)
Kojto 120:7c328cabac7e 1723 /* @brief Has VLLS mode control (register bit VLLSCTRL[VLLSM]). */
Kojto 120:7c328cabac7e 1724 #define FSL_FEATURE_SMC_USE_VLLSCTRL_REG (0)
Kojto 120:7c328cabac7e 1725 /* @brief Has VLLS mode control (register bit STOPCTRL[VLLSM]). */
Kojto 120:7c328cabac7e 1726 #define FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM (0)
Kojto 120:7c328cabac7e 1727 /* @brief Has RAM partition 2 power option (register bit STOPCTRL[RAM2PO]). */
Kojto 120:7c328cabac7e 1728 #define FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION (0)
Kojto 120:7c328cabac7e 1729 /* @brief Has high speed run mode (register bit PMPROT[AHSRUN]). */
Kojto 120:7c328cabac7e 1730 #define FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE (1)
Kojto 120:7c328cabac7e 1731 /* @brief Has low leakage stop mode (register bit PMPROT[ALLS]). */
Kojto 120:7c328cabac7e 1732 #define FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE (1)
Kojto 120:7c328cabac7e 1733 /* @brief Has very low leakage stop mode (register bit PMPROT[AVLLS]). */
Kojto 120:7c328cabac7e 1734 #define FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE (1)
Kojto 120:7c328cabac7e 1735 /* @brief Has stop submode. */
Kojto 120:7c328cabac7e 1736 #define FSL_FEATURE_SMC_HAS_SUB_STOP_MODE (1)
Kojto 120:7c328cabac7e 1737 /* @brief Has stop submode 0(VLLS0). */
Kojto 120:7c328cabac7e 1738 #define FSL_FEATURE_SMC_HAS_STOP_SUBMODE0 (1)
Kojto 120:7c328cabac7e 1739 /* @brief Has stop submode 2(VLLS2). */
Kojto 120:7c328cabac7e 1740 #define FSL_FEATURE_SMC_HAS_STOP_SUBMODE2 (1)
Kojto 120:7c328cabac7e 1741 /* @brief Has SMC_PARAM. */
Kojto 120:7c328cabac7e 1742 #define FSL_FEATURE_SMC_HAS_PARAM (0)
Kojto 120:7c328cabac7e 1743 /* @brief Has SMC_VERID. */
Kojto 120:7c328cabac7e 1744 #define FSL_FEATURE_SMC_HAS_VERID (0)
Kojto 120:7c328cabac7e 1745
Kojto 120:7c328cabac7e 1746 /* DSPI module features */
Kojto 120:7c328cabac7e 1747
Kojto 120:7c328cabac7e 1748 #if defined(CPU_MK22FN512CAP12) || defined(CPU_MK22FN512VLH12) || defined(CPU_MK22FN512VMP12)
Kojto 120:7c328cabac7e 1749 /* @brief Receive/transmit FIFO size in number of items. */
Kojto 120:7c328cabac7e 1750 #define FSL_FEATURE_DSPI_FIFO_SIZEn(x) \
Kojto 120:7c328cabac7e 1751 ((x) == DSPI0 ? (4) : \
Kojto 120:7c328cabac7e 1752 ((x) == DSPI1 ? (1) : (-1)))
Kojto 120:7c328cabac7e 1753 /* @brief Maximum transfer data width in bits. */
Kojto 120:7c328cabac7e 1754 #define FSL_FEATURE_DSPI_MAX_DATA_WIDTH (16)
Kojto 120:7c328cabac7e 1755 /* @brief Maximum number of chip select pins. (Reflects the width of register bit field PUSHR[PCS].) */
Kojto 120:7c328cabac7e 1756 #define FSL_FEATURE_DSPI_MAX_CHIP_SELECT_COUNT (6)
Kojto 120:7c328cabac7e 1757 /* @brief Number of chip select pins. */
Kojto 120:7c328cabac7e 1758 #define FSL_FEATURE_DSPI_CHIP_SELECT_COUNT (5)
Kojto 120:7c328cabac7e 1759 /* @brief Has chip select strobe capability on the PCS5 pin. */
Kojto 120:7c328cabac7e 1760 #define FSL_FEATURE_DSPI_HAS_CHIP_SELECT_STROBE (1)
Kojto 120:7c328cabac7e 1761 /* @brief Has separated TXDATA and CMD FIFOs (register SREX). */
Kojto 120:7c328cabac7e 1762 #define FSL_FEATURE_DSPI_HAS_SEPARATE_TXDATA_CMD_FIFO (0)
Kojto 120:7c328cabac7e 1763 /* @brief Has 16-bit data transfer support. */
Kojto 120:7c328cabac7e 1764 #define FSL_FEATURE_DSPI_16BIT_TRANSFERS (1)
Kojto 120:7c328cabac7e 1765 /* @brief Has separate DMA RX and TX requests. */
Kojto 120:7c328cabac7e 1766 #define FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(x) \
Kojto 120:7c328cabac7e 1767 ((x) == DSPI0 ? (1) : \
Kojto 120:7c328cabac7e 1768 ((x) == DSPI1 ? (0) : (-1)))
Kojto 120:7c328cabac7e 1769 #elif defined(CPU_MK22FN512VDC12) || defined(CPU_MK22FN512VLL12)
Kojto 120:7c328cabac7e 1770 /* @brief Receive/transmit FIFO size in number of items. */
Kojto 120:7c328cabac7e 1771 #define FSL_FEATURE_DSPI_FIFO_SIZEn(x) \
Kojto 120:7c328cabac7e 1772 ((x) == DSPI0 ? (4) : \
Kojto 120:7c328cabac7e 1773 ((x) == DSPI1 ? (1) : (-1)))
Kojto 120:7c328cabac7e 1774 /* @brief Maximum transfer data width in bits. */
Kojto 120:7c328cabac7e 1775 #define FSL_FEATURE_DSPI_MAX_DATA_WIDTH (16)
Kojto 120:7c328cabac7e 1776 /* @brief Maximum number of chip select pins. (Reflects the width of register bit field PUSHR[PCS].) */
Kojto 120:7c328cabac7e 1777 #define FSL_FEATURE_DSPI_MAX_CHIP_SELECT_COUNT (6)
Kojto 120:7c328cabac7e 1778 /* @brief Number of chip select pins. */
Kojto 120:7c328cabac7e 1779 #define FSL_FEATURE_DSPI_CHIP_SELECT_COUNT (6)
Kojto 120:7c328cabac7e 1780 /* @brief Has chip select strobe capability on the PCS5 pin. */
Kojto 120:7c328cabac7e 1781 #define FSL_FEATURE_DSPI_HAS_CHIP_SELECT_STROBE (1)
Kojto 120:7c328cabac7e 1782 /* @brief Has separated TXDATA and CMD FIFOs (register SREX). */
Kojto 120:7c328cabac7e 1783 #define FSL_FEATURE_DSPI_HAS_SEPARATE_TXDATA_CMD_FIFO (0)
Kojto 120:7c328cabac7e 1784 /* @brief Has 16-bit data transfer support. */
Kojto 120:7c328cabac7e 1785 #define FSL_FEATURE_DSPI_16BIT_TRANSFERS (1)
Kojto 120:7c328cabac7e 1786 /* @brief Has separate DMA RX and TX requests. */
Kojto 120:7c328cabac7e 1787 #define FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(x) \
Kojto 120:7c328cabac7e 1788 ((x) == DSPI0 ? (1) : \
Kojto 120:7c328cabac7e 1789 ((x) == DSPI1 ? (0) : (-1)))
Kojto 120:7c328cabac7e 1790 #endif /* defined(CPU_MK22FN512CAP12) || defined(CPU_MK22FN512VLH12) || defined(CPU_MK22FN512VMP12) */
Kojto 120:7c328cabac7e 1791
Kojto 120:7c328cabac7e 1792 /* SysTick module features */
Kojto 120:7c328cabac7e 1793
Kojto 120:7c328cabac7e 1794 /* @brief Systick has external reference clock. */
Kojto 120:7c328cabac7e 1795 #define FSL_FEATURE_SYSTICK_HAS_EXT_REF (0)
Kojto 120:7c328cabac7e 1796 /* @brief Systick external reference clock is core clock divided by this value. */
Kojto 120:7c328cabac7e 1797 #define FSL_FEATURE_SYSTICK_EXT_REF_CORE_DIV (0)
Kojto 120:7c328cabac7e 1798
Kojto 120:7c328cabac7e 1799 /* UART module features */
Kojto 120:7c328cabac7e 1800
Kojto 120:7c328cabac7e 1801 /* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
Kojto 120:7c328cabac7e 1802 #define FSL_FEATURE_UART_HAS_IRQ_EXTENDED_FUNCTIONS (1)
Kojto 120:7c328cabac7e 1803 /* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1804 #define FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT (0)
Kojto 120:7c328cabac7e 1805 /* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1806 #define FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
Kojto 120:7c328cabac7e 1807 /* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
Kojto 120:7c328cabac7e 1808 #define FSL_FEATURE_UART_HAS_FIFO (1)
Kojto 120:7c328cabac7e 1809 /* @brief Hardware flow control (RTS, CTS) is supported. */
Kojto 120:7c328cabac7e 1810 #define FSL_FEATURE_UART_HAS_MODEM_SUPPORT (1)
Kojto 120:7c328cabac7e 1811 /* @brief Infrared (modulation) is supported. */
Kojto 120:7c328cabac7e 1812 #define FSL_FEATURE_UART_HAS_IR_SUPPORT (1)
Kojto 120:7c328cabac7e 1813 /* @brief 2 bits long stop bit is available. */
Kojto 120:7c328cabac7e 1814 #define FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT (0)
Kojto 120:7c328cabac7e 1815 /* @brief Maximal data width without parity bit. */
Kojto 120:7c328cabac7e 1816 #define FSL_FEATURE_UART_HAS_10BIT_DATA_SUPPORT (0)
Kojto 120:7c328cabac7e 1817 /* @brief Baud rate fine adjustment is available. */
Kojto 120:7c328cabac7e 1818 #define FSL_FEATURE_UART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (1)
Kojto 120:7c328cabac7e 1819 /* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1820 #define FSL_FEATURE_UART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (0)
Kojto 120:7c328cabac7e 1821 /* @brief Baud rate oversampling is available. */
Kojto 120:7c328cabac7e 1822 #define FSL_FEATURE_UART_HAS_RX_RESYNC_SUPPORT (0)
Kojto 120:7c328cabac7e 1823 /* @brief Baud rate oversampling is available. */
Kojto 120:7c328cabac7e 1824 #define FSL_FEATURE_UART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (0)
Kojto 120:7c328cabac7e 1825 /* @brief Peripheral type. */
Kojto 120:7c328cabac7e 1826 #define FSL_FEATURE_UART_IS_SCI (0)
Kojto 120:7c328cabac7e 1827 /* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
Kojto 120:7c328cabac7e 1828 #define FSL_FEATURE_UART_FIFO_SIZEn(x) \
Kojto 120:7c328cabac7e 1829 ((x) == UART0 ? (8) : \
Kojto 120:7c328cabac7e 1830 ((x) == UART1 ? (1) : \
Kojto 120:7c328cabac7e 1831 ((x) == UART2 ? (1) : (-1))))
Kojto 120:7c328cabac7e 1832 /* @brief Maximal data width without parity bit. */
Kojto 120:7c328cabac7e 1833 #define FSL_FEATURE_UART_MAX_DATA_WIDTH_WITH_NO_PARITY (9)
Kojto 120:7c328cabac7e 1834 /* @brief Maximal data width with parity bit. */
Kojto 120:7c328cabac7e 1835 #define FSL_FEATURE_UART_MAX_DATA_WIDTH_WITH_PARITY (10)
Kojto 120:7c328cabac7e 1836 /* @brief Supports two match addresses to filter incoming frames. */
Kojto 120:7c328cabac7e 1837 #define FSL_FEATURE_UART_HAS_ADDRESS_MATCHING (1)
Kojto 120:7c328cabac7e 1838 /* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1839 #define FSL_FEATURE_UART_HAS_DMA_ENABLE (0)
Kojto 120:7c328cabac7e 1840 /* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
Kojto 120:7c328cabac7e 1841 #define FSL_FEATURE_UART_HAS_DMA_SELECT (1)
Kojto 120:7c328cabac7e 1842 /* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
Kojto 120:7c328cabac7e 1843 #define FSL_FEATURE_UART_HAS_BIT_ORDER_SELECT (1)
Kojto 120:7c328cabac7e 1844 /* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
Kojto 120:7c328cabac7e 1845 #define FSL_FEATURE_UART_HAS_SMART_CARD_SUPPORT (1)
Kojto 120:7c328cabac7e 1846 /* @brief Has improved smart card (ISO7816 protocol) support. */
Kojto 120:7c328cabac7e 1847 #define FSL_FEATURE_UART_HAS_IMPROVED_SMART_CARD_SUPPORT (1)
Kojto 120:7c328cabac7e 1848 /* @brief Has local operation network (CEA709.1-B protocol) support. */
Kojto 120:7c328cabac7e 1849 #define FSL_FEATURE_UART_HAS_LOCAL_OPERATION_NETWORK_SUPPORT (0)
Kojto 120:7c328cabac7e 1850 /* @brief Has 32-bit registers (BAUD, STAT, CTRL, DATA, MATCH, MODIR) instead of 8-bit (BDH, BDL, C1, S1, D, etc.). */
Kojto 120:7c328cabac7e 1851 #define FSL_FEATURE_UART_HAS_32BIT_REGISTERS (0)
Kojto 120:7c328cabac7e 1852 /* @brief Lin break detect available (has bit BDH[LBKDIE]). */
Kojto 120:7c328cabac7e 1853 #define FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT (1)
Kojto 120:7c328cabac7e 1854 /* @brief UART stops in Wait mode available (has bit C1[UARTSWAI]). */
Kojto 120:7c328cabac7e 1855 #define FSL_FEATURE_UART_HAS_WAIT_MODE_OPERATION (1)
Kojto 120:7c328cabac7e 1856 /* @brief Has separate DMA RX and TX requests. */
Kojto 120:7c328cabac7e 1857 #define FSL_FEATURE_UART_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1)
Kojto 120:7c328cabac7e 1858
Kojto 120:7c328cabac7e 1859 /* USB module features */
Kojto 120:7c328cabac7e 1860
Kojto 120:7c328cabac7e 1861 /* @brief HOST mode enabled */
Kojto 120:7c328cabac7e 1862 #define FSL_FEATURE_USB_KHCI_HOST_ENABLED (1)
Kojto 120:7c328cabac7e 1863 /* @brief OTG mode enabled */
Kojto 120:7c328cabac7e 1864 #define FSL_FEATURE_USB_KHCI_OTG_ENABLED (1)
Kojto 120:7c328cabac7e 1865 /* @brief Size of the USB dedicated RAM */
Kojto 120:7c328cabac7e 1866 #define FSL_FEATURE_USB_KHCI_USB_RAM (0)
Kojto 120:7c328cabac7e 1867 /* @brief Has KEEP_ALIVE_CTRL register */
Kojto 120:7c328cabac7e 1868 #define FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED (0)
Kojto 120:7c328cabac7e 1869 /* @brief Has the Dynamic SOF threshold compare support */
Kojto 120:7c328cabac7e 1870 #define FSL_FEATURE_USB_KHCI_DYNAMIC_SOF_THRESHOLD_COMPARE_ENABLED (0)
Kojto 120:7c328cabac7e 1871 /* @brief Has the VBUS detect support */
Kojto 120:7c328cabac7e 1872 #define FSL_FEATURE_USB_KHCI_VBUS_DETECT_ENABLED (0)
Kojto 120:7c328cabac7e 1873 /* @brief Has the IRC48M module clock support */
Kojto 120:7c328cabac7e 1874 #define FSL_FEATURE_USB_KHCI_IRC48M_MODULE_CLOCK_ENABLED (1)
Kojto 120:7c328cabac7e 1875 /* @brief Number of endpoints supported */
Kojto 120:7c328cabac7e 1876 #define FSL_FEATURE_USB_ENDPT_COUNT (16)
Kojto 120:7c328cabac7e 1877
Kojto 120:7c328cabac7e 1878 /* VREF module features */
Kojto 120:7c328cabac7e 1879
Kojto 120:7c328cabac7e 1880 /* @brief Has chop oscillator (bit TRM[CHOPEN]) */
Kojto 120:7c328cabac7e 1881 #define FSL_FEATURE_VREF_HAS_CHOP_OSC (1)
Kojto 120:7c328cabac7e 1882 /* @brief Has second order curvature compensation (bit SC[ICOMPEN]) */
Kojto 120:7c328cabac7e 1883 #define FSL_FEATURE_VREF_HAS_COMPENSATION (1)
Kojto 120:7c328cabac7e 1884 /* @brief Describes the set of SC[MODE_LV] bitfield values */
Kojto 120:7c328cabac7e 1885 #define FSL_FEATURE_VREF_MODE_LV_TYPE (1)
Kojto 120:7c328cabac7e 1886 /* @brief Module has also low reference (registers VREFL/VREFH) */
Kojto 120:7c328cabac7e 1887 #define FSL_FEATURE_VREF_HAS_LOW_REFERENCE (0)
Kojto 120:7c328cabac7e 1888 /* @brief Has VREF_TRM4. */
Kojto 120:7c328cabac7e 1889 #define FSL_FEATURE_VREF_HAS_TRM4 (0)
Kojto 120:7c328cabac7e 1890
Kojto 120:7c328cabac7e 1891 /* WDOG module features */
Kojto 120:7c328cabac7e 1892
Kojto 120:7c328cabac7e 1893 /* @brief Watchdog is available. */
Kojto 120:7c328cabac7e 1894 #define FSL_FEATURE_WDOG_HAS_WATCHDOG (1)
Kojto 120:7c328cabac7e 1895 /* @brief Has Wait mode support. */
Kojto 120:7c328cabac7e 1896 #define FSL_FEATURE_WDOG_HAS_WAITEN (1)
Kojto 120:7c328cabac7e 1897
Kojto 120:7c328cabac7e 1898 #endif /* _MK22F51212_FEATURES_H_ */
Kojto 120:7c328cabac7e 1899