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TARGET_ARCH_MAX/stm32f4xx_hal_nor.h@89:552587b429a1, 2014-09-12 (annotated)
- Committer:
- bogdanm
- Date:
- Fri Sep 12 16:41:52 2014 +0100
- Revision:
- 89:552587b429a1
- Child:
- 92:4fc01daae5a5
Release 89 of the mbed library
Main changes:
- low power optimizations for Nordic targets
- code structure changes for Freescale K64F targets
- bug fixes in various backends
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 89:552587b429a1 | 1 | /** |
bogdanm | 89:552587b429a1 | 2 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 3 | * @file stm32f4xx_hal_nor.h |
bogdanm | 89:552587b429a1 | 4 | * @author MCD Application Team |
bogdanm | 89:552587b429a1 | 5 | * @version V1.1.0RC2 |
bogdanm | 89:552587b429a1 | 6 | * @date 14-May-2014 |
bogdanm | 89:552587b429a1 | 7 | * @brief Header file of NOR HAL module. |
bogdanm | 89:552587b429a1 | 8 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 9 | * @attention |
bogdanm | 89:552587b429a1 | 10 | * |
bogdanm | 89:552587b429a1 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 89:552587b429a1 | 12 | * |
bogdanm | 89:552587b429a1 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 89:552587b429a1 | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 89:552587b429a1 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 89:552587b429a1 | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 89:552587b429a1 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 89:552587b429a1 | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 89:552587b429a1 | 19 | * and/or other materials provided with the distribution. |
bogdanm | 89:552587b429a1 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 89:552587b429a1 | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 89:552587b429a1 | 22 | * without specific prior written permission. |
bogdanm | 89:552587b429a1 | 23 | * |
bogdanm | 89:552587b429a1 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 89:552587b429a1 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 89:552587b429a1 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 89:552587b429a1 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 89:552587b429a1 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 89:552587b429a1 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 89:552587b429a1 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 89:552587b429a1 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 89:552587b429a1 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 89:552587b429a1 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 89:552587b429a1 | 34 | * |
bogdanm | 89:552587b429a1 | 35 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 36 | */ |
bogdanm | 89:552587b429a1 | 37 | |
bogdanm | 89:552587b429a1 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 89:552587b429a1 | 39 | #ifndef __STM32F4xx_HAL_NOR_H |
bogdanm | 89:552587b429a1 | 40 | #define __STM32F4xx_HAL_NOR_H |
bogdanm | 89:552587b429a1 | 41 | |
bogdanm | 89:552587b429a1 | 42 | #ifdef __cplusplus |
bogdanm | 89:552587b429a1 | 43 | extern "C" { |
bogdanm | 89:552587b429a1 | 44 | #endif |
bogdanm | 89:552587b429a1 | 45 | |
bogdanm | 89:552587b429a1 | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 47 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) |
bogdanm | 89:552587b429a1 | 48 | #include "stm32f4xx_ll_fsmc.h" |
bogdanm | 89:552587b429a1 | 49 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
bogdanm | 89:552587b429a1 | 50 | |
bogdanm | 89:552587b429a1 | 51 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
bogdanm | 89:552587b429a1 | 52 | #include "stm32f4xx_ll_fmc.h" |
bogdanm | 89:552587b429a1 | 53 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
bogdanm | 89:552587b429a1 | 54 | |
bogdanm | 89:552587b429a1 | 55 | /** @addtogroup STM32F4xx_HAL_Driver |
bogdanm | 89:552587b429a1 | 56 | * @{ |
bogdanm | 89:552587b429a1 | 57 | */ |
bogdanm | 89:552587b429a1 | 58 | |
bogdanm | 89:552587b429a1 | 59 | /** @addtogroup NOR |
bogdanm | 89:552587b429a1 | 60 | * @{ |
bogdanm | 89:552587b429a1 | 61 | */ |
bogdanm | 89:552587b429a1 | 62 | |
bogdanm | 89:552587b429a1 | 63 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
bogdanm | 89:552587b429a1 | 64 | |
bogdanm | 89:552587b429a1 | 65 | /* Exported typedef ----------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 66 | /** |
bogdanm | 89:552587b429a1 | 67 | * @brief HAL SRAM State structures definition |
bogdanm | 89:552587b429a1 | 68 | */ |
bogdanm | 89:552587b429a1 | 69 | typedef enum |
bogdanm | 89:552587b429a1 | 70 | { |
bogdanm | 89:552587b429a1 | 71 | HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */ |
bogdanm | 89:552587b429a1 | 72 | HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */ |
bogdanm | 89:552587b429a1 | 73 | HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */ |
bogdanm | 89:552587b429a1 | 74 | HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */ |
bogdanm | 89:552587b429a1 | 75 | HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */ |
bogdanm | 89:552587b429a1 | 76 | }HAL_NOR_StateTypeDef; |
bogdanm | 89:552587b429a1 | 77 | |
bogdanm | 89:552587b429a1 | 78 | /** |
bogdanm | 89:552587b429a1 | 79 | * @brief FMC NOR Status typedef |
bogdanm | 89:552587b429a1 | 80 | */ |
bogdanm | 89:552587b429a1 | 81 | typedef enum |
bogdanm | 89:552587b429a1 | 82 | { |
bogdanm | 89:552587b429a1 | 83 | NOR_SUCCESS = 0, |
bogdanm | 89:552587b429a1 | 84 | NOR_ONGOING, |
bogdanm | 89:552587b429a1 | 85 | NOR_ERROR, |
bogdanm | 89:552587b429a1 | 86 | NOR_TIMEOUT |
bogdanm | 89:552587b429a1 | 87 | }NOR_StatusTypedef; |
bogdanm | 89:552587b429a1 | 88 | |
bogdanm | 89:552587b429a1 | 89 | /** |
bogdanm | 89:552587b429a1 | 90 | * @brief FMC NOR ID typedef |
bogdanm | 89:552587b429a1 | 91 | */ |
bogdanm | 89:552587b429a1 | 92 | typedef struct |
bogdanm | 89:552587b429a1 | 93 | { |
bogdanm | 89:552587b429a1 | 94 | uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ |
bogdanm | 89:552587b429a1 | 95 | |
bogdanm | 89:552587b429a1 | 96 | uint16_t Device_Code1; |
bogdanm | 89:552587b429a1 | 97 | |
bogdanm | 89:552587b429a1 | 98 | uint16_t Device_Code2; |
bogdanm | 89:552587b429a1 | 99 | |
bogdanm | 89:552587b429a1 | 100 | uint16_t Device_Code3; /*!< Defines the devices' codes used to identify the memory. |
bogdanm | 89:552587b429a1 | 101 | These codes can be accessed by performing read operations with specific |
bogdanm | 89:552587b429a1 | 102 | control signals and addresses set.They can also be accessed by issuing |
bogdanm | 89:552587b429a1 | 103 | an Auto Select command */ |
bogdanm | 89:552587b429a1 | 104 | }NOR_IDTypeDef; |
bogdanm | 89:552587b429a1 | 105 | |
bogdanm | 89:552587b429a1 | 106 | /** |
bogdanm | 89:552587b429a1 | 107 | * @brief FMC NOR CFI typedef |
bogdanm | 89:552587b429a1 | 108 | */ |
bogdanm | 89:552587b429a1 | 109 | typedef struct |
bogdanm | 89:552587b429a1 | 110 | { |
bogdanm | 89:552587b429a1 | 111 | /*!< Defines the information stored in the memory's Common flash interface |
bogdanm | 89:552587b429a1 | 112 | which contains a description of various electrical and timing parameters, |
bogdanm | 89:552587b429a1 | 113 | density information and functions supported by the memory */ |
bogdanm | 89:552587b429a1 | 114 | |
bogdanm | 89:552587b429a1 | 115 | uint16_t CFI_1; |
bogdanm | 89:552587b429a1 | 116 | |
bogdanm | 89:552587b429a1 | 117 | uint16_t CFI_2; |
bogdanm | 89:552587b429a1 | 118 | |
bogdanm | 89:552587b429a1 | 119 | uint16_t CFI_3; |
bogdanm | 89:552587b429a1 | 120 | |
bogdanm | 89:552587b429a1 | 121 | uint16_t CFI_4; |
bogdanm | 89:552587b429a1 | 122 | }NOR_CFITypeDef; |
bogdanm | 89:552587b429a1 | 123 | |
bogdanm | 89:552587b429a1 | 124 | /** |
bogdanm | 89:552587b429a1 | 125 | * @brief NOR handle Structure definition |
bogdanm | 89:552587b429a1 | 126 | */ |
bogdanm | 89:552587b429a1 | 127 | typedef struct |
bogdanm | 89:552587b429a1 | 128 | { |
bogdanm | 89:552587b429a1 | 129 | FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ |
bogdanm | 89:552587b429a1 | 130 | |
bogdanm | 89:552587b429a1 | 131 | FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ |
bogdanm | 89:552587b429a1 | 132 | |
bogdanm | 89:552587b429a1 | 133 | FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ |
bogdanm | 89:552587b429a1 | 134 | |
bogdanm | 89:552587b429a1 | 135 | HAL_LockTypeDef Lock; /*!< NOR locking object */ |
bogdanm | 89:552587b429a1 | 136 | |
bogdanm | 89:552587b429a1 | 137 | __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ |
bogdanm | 89:552587b429a1 | 138 | |
bogdanm | 89:552587b429a1 | 139 | }NOR_HandleTypeDef; |
bogdanm | 89:552587b429a1 | 140 | |
bogdanm | 89:552587b429a1 | 141 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 142 | /** @defgroup NOR_Exported_Constants |
bogdanm | 89:552587b429a1 | 143 | * @{ |
bogdanm | 89:552587b429a1 | 144 | */ |
bogdanm | 89:552587b429a1 | 145 | /* NOR device IDs addresses */ |
bogdanm | 89:552587b429a1 | 146 | #define MC_ADDRESS ((uint16_t)0x0000) |
bogdanm | 89:552587b429a1 | 147 | #define DEVICE_CODE1_ADDR ((uint16_t)0x0001) |
bogdanm | 89:552587b429a1 | 148 | #define DEVICE_CODE2_ADDR ((uint16_t)0x000E) |
bogdanm | 89:552587b429a1 | 149 | #define DEVICE_CODE3_ADDR ((uint16_t)0x000F) |
bogdanm | 89:552587b429a1 | 150 | |
bogdanm | 89:552587b429a1 | 151 | /* NOR CFI IDs addresses */ |
bogdanm | 89:552587b429a1 | 152 | #define CFI1_ADDRESS ((uint16_t)0x61) |
bogdanm | 89:552587b429a1 | 153 | #define CFI2_ADDRESS ((uint16_t)0x62) |
bogdanm | 89:552587b429a1 | 154 | #define CFI3_ADDRESS ((uint16_t)0x63) |
bogdanm | 89:552587b429a1 | 155 | #define CFI4_ADDRESS ((uint16_t)0x64) |
bogdanm | 89:552587b429a1 | 156 | |
bogdanm | 89:552587b429a1 | 157 | /* NOR operation wait timeout */ |
bogdanm | 89:552587b429a1 | 158 | #define NOR_TMEOUT ((uint16_t)0xFFFF) |
bogdanm | 89:552587b429a1 | 159 | |
bogdanm | 89:552587b429a1 | 160 | /* #define NOR_MEMORY_16B */ |
bogdanm | 89:552587b429a1 | 161 | #define NOR_MEMORY_8B |
bogdanm | 89:552587b429a1 | 162 | |
bogdanm | 89:552587b429a1 | 163 | /* NOR memory device read/write start address */ |
bogdanm | 89:552587b429a1 | 164 | #define NOR_MEMORY_ADRESS ((uint32_t)0x60000000) |
bogdanm | 89:552587b429a1 | 165 | |
bogdanm | 89:552587b429a1 | 166 | /** |
bogdanm | 89:552587b429a1 | 167 | * @} |
bogdanm | 89:552587b429a1 | 168 | */ |
bogdanm | 89:552587b429a1 | 169 | |
bogdanm | 89:552587b429a1 | 170 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 171 | |
bogdanm | 89:552587b429a1 | 172 | /** @brief Reset NOR handle state |
bogdanm | 89:552587b429a1 | 173 | * @param __HANDLE__: specifies the NOR handle. |
bogdanm | 89:552587b429a1 | 174 | * @retval None |
bogdanm | 89:552587b429a1 | 175 | */ |
bogdanm | 89:552587b429a1 | 176 | #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) |
bogdanm | 89:552587b429a1 | 177 | |
bogdanm | 89:552587b429a1 | 178 | /** |
bogdanm | 89:552587b429a1 | 179 | * @brief NOR memory address shifting. |
bogdanm | 89:552587b429a1 | 180 | * @param __ADDRESS__: NOR memory address |
bogdanm | 89:552587b429a1 | 181 | * @retval NOR shifted address value |
bogdanm | 89:552587b429a1 | 182 | */ |
bogdanm | 89:552587b429a1 | 183 | #ifdef NOR_MEMORY_8B |
bogdanm | 89:552587b429a1 | 184 | #define __NOR_ADDR_SHIFT(__ADDRESS__) (uint32_t)(NOR_MEMORY_ADRESS + (2 * (__ADDRESS__))) |
bogdanm | 89:552587b429a1 | 185 | #else /* NOR_MEMORY_16B */ |
bogdanm | 89:552587b429a1 | 186 | #define __NOR_ADDR_SHIFT(__ADDRESS__) (uint32_t)(NOR_MEMORY_ADRESS + (__ADDRESS__)) |
bogdanm | 89:552587b429a1 | 187 | #endif /* NOR_MEMORY_8B */ |
bogdanm | 89:552587b429a1 | 188 | |
bogdanm | 89:552587b429a1 | 189 | /** |
bogdanm | 89:552587b429a1 | 190 | * @brief NOR memory write data to specified address. |
bogdanm | 89:552587b429a1 | 191 | * @param __ADDRESS__: NOR memory address |
bogdanm | 89:552587b429a1 | 192 | * @param __DATA__: Data to write |
bogdanm | 89:552587b429a1 | 193 | * @retval None |
bogdanm | 89:552587b429a1 | 194 | */ |
bogdanm | 89:552587b429a1 | 195 | #define __NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)) |
bogdanm | 89:552587b429a1 | 196 | |
bogdanm | 89:552587b429a1 | 197 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 198 | |
bogdanm | 89:552587b429a1 | 199 | /* Initialization/de-initialization functions ********************************/ |
bogdanm | 89:552587b429a1 | 200 | HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming); |
bogdanm | 89:552587b429a1 | 201 | HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); |
bogdanm | 89:552587b429a1 | 202 | void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); |
bogdanm | 89:552587b429a1 | 203 | void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); |
bogdanm | 89:552587b429a1 | 204 | void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); |
bogdanm | 89:552587b429a1 | 205 | |
bogdanm | 89:552587b429a1 | 206 | /* I/O operation functions ***************************************************/ |
bogdanm | 89:552587b429a1 | 207 | HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); |
bogdanm | 89:552587b429a1 | 208 | HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); |
bogdanm | 89:552587b429a1 | 209 | HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); |
bogdanm | 89:552587b429a1 | 210 | HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); |
bogdanm | 89:552587b429a1 | 211 | |
bogdanm | 89:552587b429a1 | 212 | HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); |
bogdanm | 89:552587b429a1 | 213 | HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); |
bogdanm | 89:552587b429a1 | 214 | |
bogdanm | 89:552587b429a1 | 215 | HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); |
bogdanm | 89:552587b429a1 | 216 | HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); |
bogdanm | 89:552587b429a1 | 217 | HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); |
bogdanm | 89:552587b429a1 | 218 | |
bogdanm | 89:552587b429a1 | 219 | /* NOR Control functions *****************************************************/ |
bogdanm | 89:552587b429a1 | 220 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); |
bogdanm | 89:552587b429a1 | 221 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); |
bogdanm | 89:552587b429a1 | 222 | |
bogdanm | 89:552587b429a1 | 223 | /* NOR State functions ********************************************************/ |
bogdanm | 89:552587b429a1 | 224 | HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor); |
bogdanm | 89:552587b429a1 | 225 | NOR_StatusTypedef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); |
bogdanm | 89:552587b429a1 | 226 | |
bogdanm | 89:552587b429a1 | 227 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
bogdanm | 89:552587b429a1 | 228 | /** |
bogdanm | 89:552587b429a1 | 229 | * @} |
bogdanm | 89:552587b429a1 | 230 | */ |
bogdanm | 89:552587b429a1 | 231 | |
bogdanm | 89:552587b429a1 | 232 | /** |
bogdanm | 89:552587b429a1 | 233 | * @} |
bogdanm | 89:552587b429a1 | 234 | */ |
bogdanm | 89:552587b429a1 | 235 | |
bogdanm | 89:552587b429a1 | 236 | #ifdef __cplusplus |
bogdanm | 89:552587b429a1 | 237 | } |
bogdanm | 89:552587b429a1 | 238 | #endif |
bogdanm | 89:552587b429a1 | 239 | |
bogdanm | 89:552587b429a1 | 240 | #endif /* __STM32F4xx_HAL_NOR_H */ |
bogdanm | 89:552587b429a1 | 241 | |
bogdanm | 89:552587b429a1 | 242 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |