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TARGET_ARCH_MAX/stm32f4xx_hal_flash_ex.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:: bogdanm
Date:: Fri Sep 12 16:41:52 2014 +0100
Revision:: 89:552587b429a1
Child:: 92:4fc01daae5a5

Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	89:552587b429a1	1	/**
bogdanm	89:552587b429a1	2	******************************************************************************
bogdanm	89:552587b429a1	3	* @file stm32f4xx_hal_flash_ex.h
bogdanm	89:552587b429a1	4	* @author MCD Application Team
bogdanm	89:552587b429a1	5	* @version V1.1.0RC2
bogdanm	89:552587b429a1	6	* @date 14-May-2014
bogdanm	89:552587b429a1	7	* @brief Header file of FLASH HAL Extension module.
bogdanm	89:552587b429a1	8	******************************************************************************
bogdanm	89:552587b429a1	9	* @attention
bogdanm	89:552587b429a1	10	*
bogdanm	89:552587b429a1	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm	89:552587b429a1	12	*
bogdanm	89:552587b429a1	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	89:552587b429a1	14	* are permitted provided that the following conditions are met:
bogdanm	89:552587b429a1	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	89:552587b429a1	16	* this list of conditions and the following disclaimer.
bogdanm	89:552587b429a1	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	89:552587b429a1	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	89:552587b429a1	19	* and/or other materials provided with the distribution.
bogdanm	89:552587b429a1	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	89:552587b429a1	21	* may be used to endorse or promote products derived from this software
bogdanm	89:552587b429a1	22	* without specific prior written permission.
bogdanm	89:552587b429a1	23	*
bogdanm	89:552587b429a1	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	89:552587b429a1	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	89:552587b429a1	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	89:552587b429a1	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	89:552587b429a1	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	89:552587b429a1	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	89:552587b429a1	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	89:552587b429a1	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	89:552587b429a1	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	89:552587b429a1	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	89:552587b429a1	34	*
bogdanm	89:552587b429a1	35	******************************************************************************
bogdanm	89:552587b429a1	36	*/
bogdanm	89:552587b429a1	37
bogdanm	89:552587b429a1	38	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	89:552587b429a1	39	#ifndef __STM32F4xx_HAL_FLASH_EX_H
bogdanm	89:552587b429a1	40	#define __STM32F4xx_HAL_FLASH_EX_H
bogdanm	89:552587b429a1	41
bogdanm	89:552587b429a1	42	#ifdef __cplusplus
bogdanm	89:552587b429a1	43	extern "C" {
bogdanm	89:552587b429a1	44	#endif
bogdanm	89:552587b429a1	45
bogdanm	89:552587b429a1	46	/* Includes ------------------------------------------------------------------*/
bogdanm	89:552587b429a1	47	#include "stm32f4xx_hal_def.h"
bogdanm	89:552587b429a1	48
bogdanm	89:552587b429a1	49	/** @addtogroup STM32F4xx_HAL_Driver
bogdanm	89:552587b429a1	50	* @{
bogdanm	89:552587b429a1	51	*/
bogdanm	89:552587b429a1	52
bogdanm	89:552587b429a1	53	/** @addtogroup FLASHEx
bogdanm	89:552587b429a1	54	* @{
bogdanm	89:552587b429a1	55	*/
bogdanm	89:552587b429a1	56
bogdanm	89:552587b429a1	57	/* Exported types ------------------------------------------------------------*/
bogdanm	89:552587b429a1	58
bogdanm	89:552587b429a1	59	/**
bogdanm	89:552587b429a1	60	* @brief FLASH Erase structure definition
bogdanm	89:552587b429a1	61	*/
bogdanm	89:552587b429a1	62	typedef struct
bogdanm	89:552587b429a1	63	{
bogdanm	89:552587b429a1	64	uint32_t TypeErase; /*!< Mass erase or sector Erase.
bogdanm	89:552587b429a1	65	This parameter can be a value of @ref FLASHEx_Type_Erase */
bogdanm	89:552587b429a1	66
bogdanm	89:552587b429a1	67	uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
bogdanm	89:552587b429a1	68	This parameter must be a value of @ref FLASHEx_Banks */
bogdanm	89:552587b429a1	69
bogdanm	89:552587b429a1	70	uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
bogdanm	89:552587b429a1	71	This parameter must be a value of @ref FLASHEx_Sectors */
bogdanm	89:552587b429a1	72
bogdanm	89:552587b429a1	73	uint32_t NbSectors; /*!< Number of sectors to be erased.
bogdanm	89:552587b429a1	74	This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
bogdanm	89:552587b429a1	75
bogdanm	89:552587b429a1	76	uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
bogdanm	89:552587b429a1	77	This parameter must be a value of @ref FLASHEx_Voltage_Range */
bogdanm	89:552587b429a1	78
bogdanm	89:552587b429a1	79	} FLASH_EraseInitTypeDef;
bogdanm	89:552587b429a1	80
bogdanm	89:552587b429a1	81	/**
bogdanm	89:552587b429a1	82	* @brief FLASH Option Bytes Program structure definition
bogdanm	89:552587b429a1	83	*/
bogdanm	89:552587b429a1	84	typedef struct
bogdanm	89:552587b429a1	85	{
bogdanm	89:552587b429a1	86	uint32_t OptionType; /*!< Option byte to be configured.
bogdanm	89:552587b429a1	87	This parameter can be a value of @ref FLASHEx_Option_Type */
bogdanm	89:552587b429a1	88
bogdanm	89:552587b429a1	89	uint32_t WRPState; /*!< Write protection activation or deactivation.
bogdanm	89:552587b429a1	90	This parameter can be a value of @ref FLASHEx_WRP_State */
bogdanm	89:552587b429a1	91
bogdanm	89:552587b429a1	92	uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
bogdanm	89:552587b429a1	93	The value of this parameter depend on device used within the same series */
bogdanm	89:552587b429a1	94
bogdanm	89:552587b429a1	95	uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
bogdanm	89:552587b429a1	96	This parameter must be a value of @ref FLASHEx_Banks */
bogdanm	89:552587b429a1	97
bogdanm	89:552587b429a1	98	uint32_t RDPLevel; /*!< Set the read protection level.
bogdanm	89:552587b429a1	99	This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
bogdanm	89:552587b429a1	100
bogdanm	89:552587b429a1	101	uint32_t BORLevel; /*!< Set the BOR Level.
bogdanm	89:552587b429a1	102	This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
bogdanm	89:552587b429a1	103
bogdanm	89:552587b429a1	104	uint8_t USERConfig; /!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. /
bogdanm	89:552587b429a1	105
bogdanm	89:552587b429a1	106	} FLASH_OBProgramInitTypeDef;
bogdanm	89:552587b429a1	107
bogdanm	89:552587b429a1	108	/**
bogdanm	89:552587b429a1	109	* @brief FLASH Advanced Option Bytes Program structure definition
bogdanm	89:552587b429a1	110	*/
bogdanm	89:552587b429a1	111	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F401xC) \|\| defined(STM32F401xE)
bogdanm	89:552587b429a1	112	typedef struct
bogdanm	89:552587b429a1	113	{
bogdanm	89:552587b429a1	114	uint32_t OptionType; /*!< Option byte to be configured for extension.
bogdanm	89:552587b429a1	115	This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */
bogdanm	89:552587b429a1	116
bogdanm	89:552587b429a1	117	uint32_t PCROPState; /*!< PCROP activation or deactivation.
bogdanm	89:552587b429a1	118	This parameter can be a value of @ref FLASHEx_PCROP_State */
bogdanm	89:552587b429a1	119
bogdanm	89:552587b429a1	120	#if defined (STM32F401xC) \|\| defined (STM32F401xE)
bogdanm	89:552587b429a1	121	uint16_t Sectors; /*!< specifies the sector(s) set for PCROP.
bogdanm	89:552587b429a1	122	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
bogdanm	89:552587b429a1	123	#endif /* STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	124	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	125	uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors.
bogdanm	89:552587b429a1	126	This parameter must be a value of @ref FLASHEx_Banks */
bogdanm	89:552587b429a1	127
bogdanm	89:552587b429a1	128	uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1.
bogdanm	89:552587b429a1	129	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
bogdanm	89:552587b429a1	130
bogdanm	89:552587b429a1	131	uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2.
bogdanm	89:552587b429a1	132	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
bogdanm	89:552587b429a1	133
bogdanm	89:552587b429a1	134	uint8_t BootConfig; /*!< Specifies Option bytes for boot config.
bogdanm	89:552587b429a1	135	This parameter can be a value of @ref FLASHEx_Dual_Boot */
bogdanm	89:552587b429a1	136
bogdanm	89:552587b429a1	137	#endif /STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx /
bogdanm	89:552587b429a1	138	} FLASH_AdvOBProgramInitTypeDef;
bogdanm	89:552587b429a1	139	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	140
bogdanm	89:552587b429a1	141	/* Exported constants --------------------------------------------------------*/
bogdanm	89:552587b429a1	142
bogdanm	89:552587b429a1	143	/** @defgroup FLASH_Exported_Constants FLASH Exported Constants
bogdanm	89:552587b429a1	144	* @{
bogdanm	89:552587b429a1	145	*/
bogdanm	89:552587b429a1	146
bogdanm	89:552587b429a1	147	/** @defgroup FLASHEx_Type_Erase FLASH Type Erase
bogdanm	89:552587b429a1	148	* @{
bogdanm	89:552587b429a1	149	*/
bogdanm	89:552587b429a1	150	#define TYPEERASE_SECTORS ((uint32_t)0x00) /!< Sectors erase only /
bogdanm	89:552587b429a1	151	#define TYPEERASE_MASSERASE ((uint32_t)0x01) /!< Flash Mass erase activation /
bogdanm	89:552587b429a1	152
bogdanm	89:552587b429a1	153	#define IS_TYPEERASE(VALUE)(((VALUE) == TYPEERASE_SECTORS) \|\| \
bogdanm	89:552587b429a1	154	((VALUE) == TYPEERASE_MASSERASE))
bogdanm	89:552587b429a1	155
bogdanm	89:552587b429a1	156	/**
bogdanm	89:552587b429a1	157	* @}
bogdanm	89:552587b429a1	158	*/
bogdanm	89:552587b429a1	159
bogdanm	89:552587b429a1	160	/** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
bogdanm	89:552587b429a1	161	* @{
bogdanm	89:552587b429a1	162	*/
bogdanm	89:552587b429a1	163	#define VOLTAGE_RANGE_1 ((uint32_t)0x00) /!< Device operating range: 1.8V to 2.1V /
bogdanm	89:552587b429a1	164	#define VOLTAGE_RANGE_2 ((uint32_t)0x01) /!< Device operating range: 2.1V to 2.7V /
bogdanm	89:552587b429a1	165	#define VOLTAGE_RANGE_3 ((uint32_t)0x02) /!< Device operating range: 2.7V to 3.6V /
bogdanm	89:552587b429a1	166	#define VOLTAGE_RANGE_4 ((uint32_t)0x03) /!< Device operating range: 2.7V to 3.6V + External Vpp /
bogdanm	89:552587b429a1	167
bogdanm	89:552587b429a1	168	#define IS_VOLTAGERANGE(RANGE)(((RANGE) == VOLTAGE_RANGE_1) \|\| \
bogdanm	89:552587b429a1	169	((RANGE) == VOLTAGE_RANGE_2) \|\| \
bogdanm	89:552587b429a1	170	((RANGE) == VOLTAGE_RANGE_3) \|\| \
bogdanm	89:552587b429a1	171	((RANGE) == VOLTAGE_RANGE_4))
bogdanm	89:552587b429a1	172
bogdanm	89:552587b429a1	173	/**
bogdanm	89:552587b429a1	174	* @}
bogdanm	89:552587b429a1	175	*/
bogdanm	89:552587b429a1	176
bogdanm	89:552587b429a1	177	/** @defgroup FLASHEx_WRP_State FLASH WRP State
bogdanm	89:552587b429a1	178	* @{
bogdanm	89:552587b429a1	179	*/
bogdanm	89:552587b429a1	180	#define WRPSTATE_DISABLE ((uint32_t)0x00) /!< Disable the write protection of the desired bank 1 sectors /
bogdanm	89:552587b429a1	181	#define WRPSTATE_ENABLE ((uint32_t)0x01) /!< Enable the write protection of the desired bank 1 sectors /
bogdanm	89:552587b429a1	182
bogdanm	89:552587b429a1	183	#define IS_WRPSTATE(VALUE)(((VALUE) == WRPSTATE_DISABLE) \|\| \
bogdanm	89:552587b429a1	184	((VALUE) == WRPSTATE_ENABLE))
bogdanm	89:552587b429a1	185
bogdanm	89:552587b429a1	186	/**
bogdanm	89:552587b429a1	187	* @}
bogdanm	89:552587b429a1	188	*/
bogdanm	89:552587b429a1	189
bogdanm	89:552587b429a1	190	/** @defgroup FLASHEx_Option_Type FLASH Option Type
bogdanm	89:552587b429a1	191	* @{
bogdanm	89:552587b429a1	192	*/
bogdanm	89:552587b429a1	193	#define OPTIONBYTE_WRP ((uint32_t)0x01) /!< WRP option byte configuration /
bogdanm	89:552587b429a1	194	#define OPTIONBYTE_RDP ((uint32_t)0x02) /!< RDP option byte configuration /
bogdanm	89:552587b429a1	195	#define OPTIONBYTE_USER ((uint32_t)0x04) /!< USER option byte configuration /
bogdanm	89:552587b429a1	196	#define OPTIONBYTE_BOR ((uint32_t)0x08) /!< BOR option byte configuration /
bogdanm	89:552587b429a1	197
bogdanm	89:552587b429a1	198	#define IS_OPTIONBYTE(VALUE)(((VALUE) < (OPTIONBYTE_WRP\|OPTIONBYTE_RDP\|OPTIONBYTE_USER\|OPTIONBYTE_BOR)))
bogdanm	89:552587b429a1	199
bogdanm	89:552587b429a1	200	/**
bogdanm	89:552587b429a1	201	* @}
bogdanm	89:552587b429a1	202	*/
bogdanm	89:552587b429a1	203
bogdanm	89:552587b429a1	204	/** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
bogdanm	89:552587b429a1	205	* @{
bogdanm	89:552587b429a1	206	*/
bogdanm	89:552587b429a1	207	#define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
bogdanm	89:552587b429a1	208	#define OB_RDP_LEVEL_1 ((uint8_t)0x55)
bogdanm	89:552587b429a1	209	/#define OB_RDP_LEVEL_2 ((uint8_t)0xCC)/ /*!< Warning: When enabling read protection level 2
bogdanm	89:552587b429a1	210	it s no more possible to go back to level 1 or 0 */
bogdanm	89:552587b429a1	211	#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) \|\|\
bogdanm	89:552587b429a1	212	((LEVEL) == OB_RDP_LEVEL_1))/*\|\|\
bogdanm	89:552587b429a1	213	((LEVEL) == OB_RDP_LEVEL_2))*/
bogdanm	89:552587b429a1	214	/**
bogdanm	89:552587b429a1	215	* @}
bogdanm	89:552587b429a1	216	*/
bogdanm	89:552587b429a1	217
bogdanm	89:552587b429a1	218	/** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
bogdanm	89:552587b429a1	219	* @{
bogdanm	89:552587b429a1	220	*/
bogdanm	89:552587b429a1	221	#define OB_IWDG_SW ((uint8_t)0x20) /!< Software IWDG selected /
bogdanm	89:552587b429a1	222	#define OB_IWDG_HW ((uint8_t)0x00) /!< Hardware IWDG selected /
bogdanm	89:552587b429a1	223	#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) \|\| ((SOURCE) == OB_IWDG_HW))
bogdanm	89:552587b429a1	224	/**
bogdanm	89:552587b429a1	225	* @}
bogdanm	89:552587b429a1	226	*/
bogdanm	89:552587b429a1	227
bogdanm	89:552587b429a1	228	/** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
bogdanm	89:552587b429a1	229	* @{
bogdanm	89:552587b429a1	230	*/
bogdanm	89:552587b429a1	231	#define OB_STOP_NO_RST ((uint8_t)0x40) /!< No reset generated when entering in STOP /
bogdanm	89:552587b429a1	232	#define OB_STOP_RST ((uint8_t)0x00) /!< Reset generated when entering in STOP /
bogdanm	89:552587b429a1	233	#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) \|\| ((SOURCE) == OB_STOP_RST))
bogdanm	89:552587b429a1	234	/**
bogdanm	89:552587b429a1	235	* @}
bogdanm	89:552587b429a1	236	*/
bogdanm	89:552587b429a1	237
bogdanm	89:552587b429a1	238
bogdanm	89:552587b429a1	239	/** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
bogdanm	89:552587b429a1	240	* @{
bogdanm	89:552587b429a1	241	*/
bogdanm	89:552587b429a1	242	#define OB_STDBY_NO_RST ((uint8_t)0x80) /!< No reset generated when entering in STANDBY /
bogdanm	89:552587b429a1	243	#define OB_STDBY_RST ((uint8_t)0x00) /!< Reset generated when entering in STANDBY /
bogdanm	89:552587b429a1	244	#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) \|\| ((SOURCE) == OB_STDBY_RST))
bogdanm	89:552587b429a1	245	/**
bogdanm	89:552587b429a1	246	* @}
bogdanm	89:552587b429a1	247	*/
bogdanm	89:552587b429a1	248
bogdanm	89:552587b429a1	249	/** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
bogdanm	89:552587b429a1	250	* @{
bogdanm	89:552587b429a1	251	*/
bogdanm	89:552587b429a1	252	#define OB_BOR_LEVEL3 ((uint8_t)0x00) /!< Supply voltage ranges from 2.70 to 3.60 V /
bogdanm	89:552587b429a1	253	#define OB_BOR_LEVEL2 ((uint8_t)0x04) /!< Supply voltage ranges from 2.40 to 2.70 V /
bogdanm	89:552587b429a1	254	#define OB_BOR_LEVEL1 ((uint8_t)0x08) /!< Supply voltage ranges from 2.10 to 2.40 V /
bogdanm	89:552587b429a1	255	#define OB_BOR_OFF ((uint8_t)0x0C) /!< Supply voltage ranges from 1.62 to 2.10 V /
bogdanm	89:552587b429a1	256	#define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) \|\| ((LEVEL) == OB_BOR_LEVEL2) \|\|\
bogdanm	89:552587b429a1	257	((LEVEL) == OB_BOR_LEVEL3) \|\| ((LEVEL) == OB_BOR_OFF))
bogdanm	89:552587b429a1	258	/**
bogdanm	89:552587b429a1	259	* @}
bogdanm	89:552587b429a1	260	*/
bogdanm	89:552587b429a1	261
bogdanm	89:552587b429a1	262	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F401xC) \|\| defined(STM32F401xE)
bogdanm	89:552587b429a1	263	/** @defgroup FLASHEx_PCROP_State FLASH PCROP State
bogdanm	89:552587b429a1	264	* @{
bogdanm	89:552587b429a1	265	*/
bogdanm	89:552587b429a1	266	#define PCROPSTATE_DISABLE ((uint32_t)0x00) /!< Disable PCROP /
bogdanm	89:552587b429a1	267	#define PCROPSTATE_ENABLE ((uint32_t)0x01) /!< Enable PCROP /
bogdanm	89:552587b429a1	268
bogdanm	89:552587b429a1	269	#define IS_PCROPSTATE(VALUE)(((VALUE) == PCROPSTATE_DISABLE) \|\| \
bogdanm	89:552587b429a1	270	((VALUE) == PCROPSTATE_ENABLE))
bogdanm	89:552587b429a1	271
bogdanm	89:552587b429a1	272	/**
bogdanm	89:552587b429a1	273	* @}
bogdanm	89:552587b429a1	274	*/
bogdanm	89:552587b429a1	275	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	276
bogdanm	89:552587b429a1	277	/** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type
bogdanm	89:552587b429a1	278	* @{
bogdanm	89:552587b429a1	279	*/
bogdanm	89:552587b429a1	280	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	281	#define OBEX_PCROP ((uint32_t)0x01) /!< PCROP option byte configuration /
bogdanm	89:552587b429a1	282	#define OBEX_BOOTCONFIG ((uint32_t)0x02) /!< BOOTConfig option byte configuration /
bogdanm	89:552587b429a1	283
bogdanm	89:552587b429a1	284	#define IS_OBEX(VALUE)(((VALUE) == OBEX_PCROP) \|\| \
bogdanm	89:552587b429a1	285	((VALUE) == OBEX_BOOTCONFIG))
bogdanm	89:552587b429a1	286
bogdanm	89:552587b429a1	287	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx */
bogdanm	89:552587b429a1	288
bogdanm	89:552587b429a1	289	#if defined(STM32F401xC) \|\| defined(STM32F401xE)
bogdanm	89:552587b429a1	290	#define OBEX_PCROP ((uint32_t)0x01) /!<PCROP option byte configuration /
bogdanm	89:552587b429a1	291
bogdanm	89:552587b429a1	292	#define IS_OBEX(VALUE)(((VALUE) == OBEX_PCROP))
bogdanm	89:552587b429a1	293
bogdanm	89:552587b429a1	294	#endif /* STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	295	/**
bogdanm	89:552587b429a1	296	* @}
bogdanm	89:552587b429a1	297	*/
bogdanm	89:552587b429a1	298
bogdanm	89:552587b429a1	299	/** @defgroup FLASH_Latency FLASH Latency
bogdanm	89:552587b429a1	300	* @{
bogdanm	89:552587b429a1	301	*/
bogdanm	89:552587b429a1	302	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	303	#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /!< FLASH Zero Latency cycle /
bogdanm	89:552587b429a1	304	#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /!< FLASH One Latency cycle /
bogdanm	89:552587b429a1	305	#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /!< FLASH Two Latency cycles /
bogdanm	89:552587b429a1	306	#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /!< FLASH Three Latency cycles /
bogdanm	89:552587b429a1	307	#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /!< FLASH Four Latency cycles /
bogdanm	89:552587b429a1	308	#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /!< FLASH Five Latency cycles /
bogdanm	89:552587b429a1	309	#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /!< FLASH Six Latency cycles /
bogdanm	89:552587b429a1	310	#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /!< FLASH Seven Latency cycles /
bogdanm	89:552587b429a1	311	#define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /!< FLASH Eight Latency cycles /
bogdanm	89:552587b429a1	312	#define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /!< FLASH Nine Latency cycles /
bogdanm	89:552587b429a1	313	#define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /!< FLASH Ten Latency cycles /
bogdanm	89:552587b429a1	314	#define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /!< FLASH Eleven Latency cycles /
bogdanm	89:552587b429a1	315	#define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /!< FLASH Twelve Latency cycles /
bogdanm	89:552587b429a1	316	#define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /!< FLASH Thirteen Latency cycles /
bogdanm	89:552587b429a1	317	#define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /!< FLASH Fourteen Latency cycles /
bogdanm	89:552587b429a1	318	#define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /!< FLASH Fifteen Latency cycles /
bogdanm	89:552587b429a1	319
bogdanm	89:552587b429a1	320
bogdanm	89:552587b429a1	321	#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) \|\| \
bogdanm	89:552587b429a1	322	((LATENCY) == FLASH_LATENCY_1) \|\| \
bogdanm	89:552587b429a1	323	((LATENCY) == FLASH_LATENCY_2) \|\| \
bogdanm	89:552587b429a1	324	((LATENCY) == FLASH_LATENCY_3) \|\| \
bogdanm	89:552587b429a1	325	((LATENCY) == FLASH_LATENCY_4) \|\| \
bogdanm	89:552587b429a1	326	((LATENCY) == FLASH_LATENCY_5) \|\| \
bogdanm	89:552587b429a1	327	((LATENCY) == FLASH_LATENCY_6) \|\| \
bogdanm	89:552587b429a1	328	((LATENCY) == FLASH_LATENCY_7) \|\| \
bogdanm	89:552587b429a1	329	((LATENCY) == FLASH_LATENCY_8) \|\| \
bogdanm	89:552587b429a1	330	((LATENCY) == FLASH_LATENCY_9) \|\| \
bogdanm	89:552587b429a1	331	((LATENCY) == FLASH_LATENCY_10) \|\| \
bogdanm	89:552587b429a1	332	((LATENCY) == FLASH_LATENCY_11) \|\| \
bogdanm	89:552587b429a1	333	((LATENCY) == FLASH_LATENCY_12) \|\| \
bogdanm	89:552587b429a1	334	((LATENCY) == FLASH_LATENCY_13) \|\| \
bogdanm	89:552587b429a1	335	((LATENCY) == FLASH_LATENCY_14) \|\| \
bogdanm	89:552587b429a1	336	((LATENCY) == FLASH_LATENCY_15))
bogdanm	89:552587b429a1	337	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	338
bogdanm	89:552587b429a1	339	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| defined(STM32F401xC) \|\| defined(STM32F401xE)
bogdanm	89:552587b429a1	340	#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /!< FLASH Zero Latency cycle /
bogdanm	89:552587b429a1	341	#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /!< FLASH One Latency cycle /
bogdanm	89:552587b429a1	342	#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /!< FLASH Two Latency cycles /
bogdanm	89:552587b429a1	343	#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /!< FLASH Three Latency cycles /
bogdanm	89:552587b429a1	344	#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /!< FLASH Four Latency cycles /
bogdanm	89:552587b429a1	345	#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /!< FLASH Five Latency cycles /
bogdanm	89:552587b429a1	346	#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /!< FLASH Six Latency cycles /
bogdanm	89:552587b429a1	347	#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /!< FLASH Seven Latency cycles /
bogdanm	89:552587b429a1	348
bogdanm	89:552587b429a1	349
bogdanm	89:552587b429a1	350	#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) \|\| \
bogdanm	89:552587b429a1	351	((LATENCY) == FLASH_LATENCY_1) \|\| \
bogdanm	89:552587b429a1	352	((LATENCY) == FLASH_LATENCY_2) \|\| \
bogdanm	89:552587b429a1	353	((LATENCY) == FLASH_LATENCY_3) \|\| \
bogdanm	89:552587b429a1	354	((LATENCY) == FLASH_LATENCY_4) \|\| \
bogdanm	89:552587b429a1	355	((LATENCY) == FLASH_LATENCY_5) \|\| \
bogdanm	89:552587b429a1	356	((LATENCY) == FLASH_LATENCY_6) \|\| \
bogdanm	89:552587b429a1	357	((LATENCY) == FLASH_LATENCY_7))
bogdanm	89:552587b429a1	358	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	359
bogdanm	89:552587b429a1	360	/**
bogdanm	89:552587b429a1	361	* @}
bogdanm	89:552587b429a1	362	*/
bogdanm	89:552587b429a1	363
bogdanm	89:552587b429a1	364
bogdanm	89:552587b429a1	365	/** @defgroup FLASHEx_Banks FLASH Banks
bogdanm	89:552587b429a1	366	* @{
bogdanm	89:552587b429a1	367	*/
bogdanm	89:552587b429a1	368	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	369	#define FLASH_BANK_1 ((uint32_t)1) /!< Bank 1 /
bogdanm	89:552587b429a1	370	#define FLASH_BANK_2 ((uint32_t)2) /!< Bank 2 /
bogdanm	89:552587b429a1	371	#define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 \| FLASH_BANK_2) /!< Bank1 and Bank2 /
bogdanm	89:552587b429a1	372
bogdanm	89:552587b429a1	373	#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) \|\| \
bogdanm	89:552587b429a1	374	((BANK) == FLASH_BANK_2) \|\| \
bogdanm	89:552587b429a1	375	((BANK) == FLASH_BANK_BOTH))
bogdanm	89:552587b429a1	376	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	377
bogdanm	89:552587b429a1	378	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| defined(STM32F401xC) \|\| defined(STM32F401xE)
bogdanm	89:552587b429a1	379	#define FLASH_BANK_1 ((uint32_t)1) /!< Bank 1 /
bogdanm	89:552587b429a1	380
bogdanm	89:552587b429a1	381	#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
bogdanm	89:552587b429a1	382	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	383	/**
bogdanm	89:552587b429a1	384	* @}
bogdanm	89:552587b429a1	385	*/
bogdanm	89:552587b429a1	386
bogdanm	89:552587b429a1	387	/** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
bogdanm	89:552587b429a1	388	* @{
bogdanm	89:552587b429a1	389	*/
bogdanm	89:552587b429a1	390	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	391	#define FLASH_MER_BIT (FLASH_CR_MER1 \| FLASH_CR_MER2) /!< 2 MER bits here to clear /
bogdanm	89:552587b429a1	392	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	393
bogdanm	89:552587b429a1	394	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| defined(STM32F401xC) \|\| defined(STM32F401xE)
bogdanm	89:552587b429a1	395	#define FLASH_MER_BIT (FLASH_CR_MER) /!< only 1 MER Bit /
bogdanm	89:552587b429a1	396	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	397	/**
bogdanm	89:552587b429a1	398	* @}
bogdanm	89:552587b429a1	399	*/
bogdanm	89:552587b429a1	400
bogdanm	89:552587b429a1	401	/** @defgroup FLASHEx_Sectors FLASH Sectors
bogdanm	89:552587b429a1	402	* @{
bogdanm	89:552587b429a1	403	*/
bogdanm	89:552587b429a1	404	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	405	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
bogdanm	89:552587b429a1	406	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
bogdanm	89:552587b429a1	407	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
bogdanm	89:552587b429a1	408	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
bogdanm	89:552587b429a1	409	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
bogdanm	89:552587b429a1	410	#define FLASH_SECTOR_5 ((uint32_t)5) /!< Sector Number 5 /
bogdanm	89:552587b429a1	411	#define FLASH_SECTOR_6 ((uint32_t)6) /!< Sector Number 6 /
bogdanm	89:552587b429a1	412	#define FLASH_SECTOR_7 ((uint32_t)7) /!< Sector Number 7 /
bogdanm	89:552587b429a1	413	#define FLASH_SECTOR_8 ((uint32_t)8) /!< Sector Number 8 /
bogdanm	89:552587b429a1	414	#define FLASH_SECTOR_9 ((uint32_t)9) /!< Sector Number 9 /
bogdanm	89:552587b429a1	415	#define FLASH_SECTOR_10 ((uint32_t)10) /!< Sector Number 10 /
bogdanm	89:552587b429a1	416	#define FLASH_SECTOR_11 ((uint32_t)11) /!< Sector Number 11 /
bogdanm	89:552587b429a1	417	#define FLASH_SECTOR_12 ((uint32_t)12) /!< Sector Number 12 /
bogdanm	89:552587b429a1	418	#define FLASH_SECTOR_13 ((uint32_t)13) /!< Sector Number 13 /
bogdanm	89:552587b429a1	419	#define FLASH_SECTOR_14 ((uint32_t)14) /!< Sector Number 14 /
bogdanm	89:552587b429a1	420	#define FLASH_SECTOR_15 ((uint32_t)15) /!< Sector Number 15 /
bogdanm	89:552587b429a1	421	#define FLASH_SECTOR_16 ((uint32_t)16) /!< Sector Number 16 /
bogdanm	89:552587b429a1	422	#define FLASH_SECTOR_17 ((uint32_t)17) /!< Sector Number 17 /
bogdanm	89:552587b429a1	423	#define FLASH_SECTOR_18 ((uint32_t)18) /!< Sector Number 18 /
bogdanm	89:552587b429a1	424	#define FLASH_SECTOR_19 ((uint32_t)19) /!< Sector Number 19 /
bogdanm	89:552587b429a1	425	#define FLASH_SECTOR_20 ((uint32_t)20) /!< Sector Number 20 /
bogdanm	89:552587b429a1	426	#define FLASH_SECTOR_21 ((uint32_t)21) /!< Sector Number 21 /
bogdanm	89:552587b429a1	427	#define FLASH_SECTOR_22 ((uint32_t)22) /!< Sector Number 22 /
bogdanm	89:552587b429a1	428	#define FLASH_SECTOR_23 ((uint32_t)23) /!< Sector Number 23 /
bogdanm	89:552587b429a1	429
bogdanm	89:552587b429a1	430	#define FLASH_SECTOR_TOTAL 24
bogdanm	89:552587b429a1	431
bogdanm	89:552587b429a1	432	#define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
bogdanm	89:552587b429a1	433	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
bogdanm	89:552587b429a1	434	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
bogdanm	89:552587b429a1	435	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7) \|\|\
bogdanm	89:552587b429a1	436	((SECTOR) == FLASH_SECTOR_8) \|\| ((SECTOR) == FLASH_SECTOR_9) \|\|\
bogdanm	89:552587b429a1	437	((SECTOR) == FLASH_SECTOR_10) \|\| ((SECTOR) == FLASH_SECTOR_11) \|\|\
bogdanm	89:552587b429a1	438	((SECTOR) == FLASH_SECTOR_12) \|\| ((SECTOR) == FLASH_SECTOR_13) \|\|\
bogdanm	89:552587b429a1	439	((SECTOR) == FLASH_SECTOR_14) \|\| ((SECTOR) == FLASH_SECTOR_15) \|\|\
bogdanm	89:552587b429a1	440	((SECTOR) == FLASH_SECTOR_16) \|\| ((SECTOR) == FLASH_SECTOR_17) \|\|\
bogdanm	89:552587b429a1	441	((SECTOR) == FLASH_SECTOR_18) \|\| ((SECTOR) == FLASH_SECTOR_19) \|\|\
bogdanm	89:552587b429a1	442	((SECTOR) == FLASH_SECTOR_20) \|\| ((SECTOR) == FLASH_SECTOR_21) \|\|\
bogdanm	89:552587b429a1	443	((SECTOR) == FLASH_SECTOR_22) \|\| ((SECTOR) == FLASH_SECTOR_23))
bogdanm	89:552587b429a1	444
bogdanm	89:552587b429a1	445	#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x081FFFFF)) \|\|\
bogdanm	89:552587b429a1	446	(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F)))
bogdanm	89:552587b429a1	447	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	448
bogdanm	89:552587b429a1	449	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx)
bogdanm	89:552587b429a1	450	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
bogdanm	89:552587b429a1	451	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
bogdanm	89:552587b429a1	452	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
bogdanm	89:552587b429a1	453	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
bogdanm	89:552587b429a1	454	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
bogdanm	89:552587b429a1	455	#define FLASH_SECTOR_5 ((uint32_t)5) /!< Sector Number 5 /
bogdanm	89:552587b429a1	456	#define FLASH_SECTOR_6 ((uint32_t)6) /!< Sector Number 6 /
bogdanm	89:552587b429a1	457	#define FLASH_SECTOR_7 ((uint32_t)7) /!< Sector Number 7 /
bogdanm	89:552587b429a1	458	#define FLASH_SECTOR_8 ((uint32_t)8) /!< Sector Number 8 /
bogdanm	89:552587b429a1	459	#define FLASH_SECTOR_9 ((uint32_t)9) /!< Sector Number 9 /
bogdanm	89:552587b429a1	460	#define FLASH_SECTOR_10 ((uint32_t)10) /!< Sector Number 10 /
bogdanm	89:552587b429a1	461	#define FLASH_SECTOR_11 ((uint32_t)11) /!< Sector Number 11 /
bogdanm	89:552587b429a1	462
bogdanm	89:552587b429a1	463	#define FLASH_SECTOR_TOTAL 12
bogdanm	89:552587b429a1	464
bogdanm	89:552587b429a1	465	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
bogdanm	89:552587b429a1	466	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
bogdanm	89:552587b429a1	467	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
bogdanm	89:552587b429a1	468	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7) \|\|\
bogdanm	89:552587b429a1	469	((SECTOR) == FLASH_SECTOR_8) \|\| ((SECTOR) == FLASH_SECTOR_9) \|\|\
bogdanm	89:552587b429a1	470	((SECTOR) == FLASH_SECTOR_10) \|\| ((SECTOR) == FLASH_SECTOR_11))
bogdanm	89:552587b429a1	471
bogdanm	89:552587b429a1	472	#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF)) \|\|\
bogdanm	89:552587b429a1	473	(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F)))
bogdanm	89:552587b429a1	474	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx */
bogdanm	89:552587b429a1	475
bogdanm	89:552587b429a1	476	#if defined(STM32F401xC)
bogdanm	89:552587b429a1	477	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
bogdanm	89:552587b429a1	478	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
bogdanm	89:552587b429a1	479	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
bogdanm	89:552587b429a1	480	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
bogdanm	89:552587b429a1	481	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
bogdanm	89:552587b429a1	482	#define FLASH_SECTOR_5 ((uint32_t)5) /!< Sector Number 5 /
bogdanm	89:552587b429a1	483
bogdanm	89:552587b429a1	484	#define FLASH_SECTOR_TOTAL 6
bogdanm	89:552587b429a1	485
bogdanm	89:552587b429a1	486	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
bogdanm	89:552587b429a1	487	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
bogdanm	89:552587b429a1	488	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5))
bogdanm	89:552587b429a1	489
bogdanm	89:552587b429a1	490	#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0803FFFF)) \|\|\
bogdanm	89:552587b429a1	491	(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F)))
bogdanm	89:552587b429a1	492	#endif /* STM32F401xC */
bogdanm	89:552587b429a1	493
bogdanm	89:552587b429a1	494	#if defined(STM32F401xE)
bogdanm	89:552587b429a1	495	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
bogdanm	89:552587b429a1	496	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
bogdanm	89:552587b429a1	497	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
bogdanm	89:552587b429a1	498	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
bogdanm	89:552587b429a1	499	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
bogdanm	89:552587b429a1	500	#define FLASH_SECTOR_5 ((uint32_t)5) /!< Sector Number 5 /
bogdanm	89:552587b429a1	501	#define FLASH_SECTOR_6 ((uint32_t)6) /!< Sector Number 6 /
bogdanm	89:552587b429a1	502	#define FLASH_SECTOR_7 ((uint32_t)7) /!< Sector Number 7 /
bogdanm	89:552587b429a1	503
bogdanm	89:552587b429a1	504	#define FLASH_SECTOR_TOTAL 8
bogdanm	89:552587b429a1	505
bogdanm	89:552587b429a1	506	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
bogdanm	89:552587b429a1	507	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
bogdanm	89:552587b429a1	508	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
bogdanm	89:552587b429a1	509	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7))
bogdanm	89:552587b429a1	510
bogdanm	89:552587b429a1	511	#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF)) \|\|\
bogdanm	89:552587b429a1	512	(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F)))
bogdanm	89:552587b429a1	513	#endif /* STM32F401xE */
bogdanm	89:552587b429a1	514
bogdanm	89:552587b429a1	515	#define IS_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
bogdanm	89:552587b429a1	516
bogdanm	89:552587b429a1	517	/**
bogdanm	89:552587b429a1	518	* @}
bogdanm	89:552587b429a1	519	*/
bogdanm	89:552587b429a1	520
bogdanm	89:552587b429a1	521	/** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
bogdanm	89:552587b429a1	522	* @{
bogdanm	89:552587b429a1	523	*/
bogdanm	89:552587b429a1	524	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	525	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
bogdanm	89:552587b429a1	526	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
bogdanm	89:552587b429a1	527	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
bogdanm	89:552587b429a1	528	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
bogdanm	89:552587b429a1	529	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
bogdanm	89:552587b429a1	530	#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /!< Write protection of Sector5 /
bogdanm	89:552587b429a1	531	#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /!< Write protection of Sector6 /
bogdanm	89:552587b429a1	532	#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /!< Write protection of Sector7 /
bogdanm	89:552587b429a1	533	#define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /!< Write protection of Sector8 /
bogdanm	89:552587b429a1	534	#define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /!< Write protection of Sector9 /
bogdanm	89:552587b429a1	535	#define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /!< Write protection of Sector10 /
bogdanm	89:552587b429a1	536	#define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /!< Write protection of Sector11 /
bogdanm	89:552587b429a1	537	#define OB_WRP_SECTOR_12 ((uint32_t)0x00000001 << 12) /!< Write protection of Sector12 /
bogdanm	89:552587b429a1	538	#define OB_WRP_SECTOR_13 ((uint32_t)0x00000002 << 12) /!< Write protection of Sector13 /
bogdanm	89:552587b429a1	539	#define OB_WRP_SECTOR_14 ((uint32_t)0x00000004 << 12) /!< Write protection of Sector14 /
bogdanm	89:552587b429a1	540	#define OB_WRP_SECTOR_15 ((uint32_t)0x00000008 << 12) /!< Write protection of Sector15 /
bogdanm	89:552587b429a1	541	#define OB_WRP_SECTOR_16 ((uint32_t)0x00000010 << 12) /!< Write protection of Sector16 /
bogdanm	89:552587b429a1	542	#define OB_WRP_SECTOR_17 ((uint32_t)0x00000020 << 12) /!< Write protection of Sector17 /
bogdanm	89:552587b429a1	543	#define OB_WRP_SECTOR_18 ((uint32_t)0x00000040 << 12) /!< Write protection of Sector18 /
bogdanm	89:552587b429a1	544	#define OB_WRP_SECTOR_19 ((uint32_t)0x00000080 << 12) /!< Write protection of Sector19 /
bogdanm	89:552587b429a1	545	#define OB_WRP_SECTOR_20 ((uint32_t)0x00000100 << 12) /!< Write protection of Sector20 /
bogdanm	89:552587b429a1	546	#define OB_WRP_SECTOR_21 ((uint32_t)0x00000200 << 12) /!< Write protection of Sector21 /
bogdanm	89:552587b429a1	547	#define OB_WRP_SECTOR_22 ((uint32_t)0x00000400 << 12) /!< Write protection of Sector22 /
bogdanm	89:552587b429a1	548	#define OB_WRP_SECTOR_23 ((uint32_t)0x00000800 << 12) /!< Write protection of Sector23 /
bogdanm	89:552587b429a1	549	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF << 12) /!< Write protection of all Sectors /
bogdanm	89:552587b429a1	550
bogdanm	89:552587b429a1	551	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFF000000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	89:552587b429a1	552	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	553
bogdanm	89:552587b429a1	554	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx)
bogdanm	89:552587b429a1	555	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
bogdanm	89:552587b429a1	556	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
bogdanm	89:552587b429a1	557	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
bogdanm	89:552587b429a1	558	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
bogdanm	89:552587b429a1	559	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
bogdanm	89:552587b429a1	560	#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /!< Write protection of Sector5 /
bogdanm	89:552587b429a1	561	#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /!< Write protection of Sector6 /
bogdanm	89:552587b429a1	562	#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /!< Write protection of Sector7 /
bogdanm	89:552587b429a1	563	#define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /!< Write protection of Sector8 /
bogdanm	89:552587b429a1	564	#define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /!< Write protection of Sector9 /
bogdanm	89:552587b429a1	565	#define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /!< Write protection of Sector10 /
bogdanm	89:552587b429a1	566	#define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /!< Write protection of Sector11 /
bogdanm	89:552587b429a1	567	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /!< Write protection of all Sectors /
bogdanm	89:552587b429a1	568
bogdanm	89:552587b429a1	569	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	89:552587b429a1	570	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx */
bogdanm	89:552587b429a1	571
bogdanm	89:552587b429a1	572	#if defined(STM32F401xC)
bogdanm	89:552587b429a1	573	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
bogdanm	89:552587b429a1	574	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
bogdanm	89:552587b429a1	575	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
bogdanm	89:552587b429a1	576	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
bogdanm	89:552587b429a1	577	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
bogdanm	89:552587b429a1	578	#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /!< Write protection of Sector5 /
bogdanm	89:552587b429a1	579	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /!< Write protection of all Sectors /
bogdanm	89:552587b429a1	580
bogdanm	89:552587b429a1	581	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	89:552587b429a1	582	#endif /* STM32F401xC */
bogdanm	89:552587b429a1	583
bogdanm	89:552587b429a1	584	#if defined(STM32F401xE)
bogdanm	89:552587b429a1	585	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
bogdanm	89:552587b429a1	586	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
bogdanm	89:552587b429a1	587	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
bogdanm	89:552587b429a1	588	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
bogdanm	89:552587b429a1	589	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
bogdanm	89:552587b429a1	590	#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /!< Write protection of Sector5 /
bogdanm	89:552587b429a1	591	#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /!< Write protection of Sector6 /
bogdanm	89:552587b429a1	592	#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /!< Write protection of Sector7 /
bogdanm	89:552587b429a1	593	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /!< Write protection of all Sectors /
bogdanm	89:552587b429a1	594
bogdanm	89:552587b429a1	595	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	89:552587b429a1	596	#endif /* STM32F401xE */
bogdanm	89:552587b429a1	597	/**
bogdanm	89:552587b429a1	598	* @}
bogdanm	89:552587b429a1	599	*/
bogdanm	89:552587b429a1	600
bogdanm	89:552587b429a1	601	/** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection
bogdanm	89:552587b429a1	602	* @{
bogdanm	89:552587b429a1	603	*/
bogdanm	89:552587b429a1	604	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	605	#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector0 /
bogdanm	89:552587b429a1	606	#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector1 /
bogdanm	89:552587b429a1	607	#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector2 /
bogdanm	89:552587b429a1	608	#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector3 /
bogdanm	89:552587b429a1	609	#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector4 /
bogdanm	89:552587b429a1	610	#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /!< PC Read/Write protection of Sector5 /
bogdanm	89:552587b429a1	611	#define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /!< PC Read/Write protection of Sector6 /
bogdanm	89:552587b429a1	612	#define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /!< PC Read/Write protection of Sector7 /
bogdanm	89:552587b429a1	613	#define OB_PCROP_SECTOR_8 ((uint32_t)0x00000100) /!< PC Read/Write protection of Sector8 /
bogdanm	89:552587b429a1	614	#define OB_PCROP_SECTOR_9 ((uint32_t)0x00000200) /!< PC Read/Write protection of Sector9 /
bogdanm	89:552587b429a1	615	#define OB_PCROP_SECTOR_10 ((uint32_t)0x00000400) /!< PC Read/Write protection of Sector10 /
bogdanm	89:552587b429a1	616	#define OB_PCROP_SECTOR_11 ((uint32_t)0x00000800) /!< PC Read/Write protection of Sector11 /
bogdanm	89:552587b429a1	617	#define OB_PCROP_SECTOR_12 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector12 /
bogdanm	89:552587b429a1	618	#define OB_PCROP_SECTOR_13 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector13 /
bogdanm	89:552587b429a1	619	#define OB_PCROP_SECTOR_14 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector14 /
bogdanm	89:552587b429a1	620	#define OB_PCROP_SECTOR_15 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector15 /
bogdanm	89:552587b429a1	621	#define OB_PCROP_SECTOR_16 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector16 /
bogdanm	89:552587b429a1	622	#define OB_PCROP_SECTOR_17 ((uint32_t)0x00000020) /!< PC Read/Write protection of Sector17 /
bogdanm	89:552587b429a1	623	#define OB_PCROP_SECTOR_18 ((uint32_t)0x00000040) /!< PC Read/Write protection of Sector18 /
bogdanm	89:552587b429a1	624	#define OB_PCROP_SECTOR_19 ((uint32_t)0x00000080) /!< PC Read/Write protection of Sector19 /
bogdanm	89:552587b429a1	625	#define OB_PCROP_SECTOR_20 ((uint32_t)0x00000100) /!< PC Read/Write protection of Sector20 /
bogdanm	89:552587b429a1	626	#define OB_PCROP_SECTOR_21 ((uint32_t)0x00000200) /!< PC Read/Write protection of Sector21 /
bogdanm	89:552587b429a1	627	#define OB_PCROP_SECTOR_22 ((uint32_t)0x00000400) /!< PC Read/Write protection of Sector22 /
bogdanm	89:552587b429a1	628	#define OB_PCROP_SECTOR_23 ((uint32_t)0x00000800) /!< PC Read/Write protection of Sector23 /
bogdanm	89:552587b429a1	629	#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /!< PC Read/Write protection of all Sectors /
bogdanm	89:552587b429a1	630
bogdanm	89:552587b429a1	631	#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	89:552587b429a1	632	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	633
bogdanm	89:552587b429a1	634	#if defined(STM32F401xC)
bogdanm	89:552587b429a1	635	#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector0 /
bogdanm	89:552587b429a1	636	#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector1 /
bogdanm	89:552587b429a1	637	#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector2 /
bogdanm	89:552587b429a1	638	#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector3 /
bogdanm	89:552587b429a1	639	#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector4 /
bogdanm	89:552587b429a1	640	#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /!< PC Read/Write protection of Sector5 /
bogdanm	89:552587b429a1	641	#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /!< PC Read/Write protection of all Sectors /
bogdanm	89:552587b429a1	642
bogdanm	89:552587b429a1	643	#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	89:552587b429a1	644	#endif /* STM32F401xC */
bogdanm	89:552587b429a1	645
bogdanm	89:552587b429a1	646	#if defined(STM32F401xE)
bogdanm	89:552587b429a1	647	#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector0 /
bogdanm	89:552587b429a1	648	#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector1 /
bogdanm	89:552587b429a1	649	#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector2 /
bogdanm	89:552587b429a1	650	#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector3 /
bogdanm	89:552587b429a1	651	#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector4 /
bogdanm	89:552587b429a1	652	#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /!< PC Read/Write protection of Sector5 /
bogdanm	89:552587b429a1	653	#define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /!< PC Read/Write protection of Sector6 /
bogdanm	89:552587b429a1	654	#define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /!< PC Read/Write protection of Sector7 /
bogdanm	89:552587b429a1	655	#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /!< PC Read/Write protection of all Sectors /
bogdanm	89:552587b429a1	656
bogdanm	89:552587b429a1	657	#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	89:552587b429a1	658	#endif /* STM32F401xE */
bogdanm	89:552587b429a1	659
bogdanm	89:552587b429a1	660	/**
bogdanm	89:552587b429a1	661	* @}
bogdanm	89:552587b429a1	662	*/
bogdanm	89:552587b429a1	663
bogdanm	89:552587b429a1	664	/** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot
bogdanm	89:552587b429a1	665	* @{
bogdanm	89:552587b429a1	666	*/
bogdanm	89:552587b429a1	667	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	668	#define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /!< Dual Bank Boot Enable /
bogdanm	89:552587b429a1	669	#define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /!< Dual Bank Boot Disable, always boot on User Flash /
bogdanm	89:552587b429a1	670	#define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) \|\| ((BOOT) == OB_DUAL_BOOT_DISABLE))
bogdanm	89:552587b429a1	671	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	672	/**
bogdanm	89:552587b429a1	673	* @}
bogdanm	89:552587b429a1	674	*/
bogdanm	89:552587b429a1	675
bogdanm	89:552587b429a1	676	/** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode
bogdanm	89:552587b429a1	677	* @{
bogdanm	89:552587b429a1	678	*/
bogdanm	89:552587b429a1	679	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F401xC) \|\| defined(STM32F401xE)
bogdanm	89:552587b429a1	680	#define OB_PCROP_DESELECTED ((uint8_t)0x00) /!< Disabled PcROP, nWPRi bits used for Write Protection on sector i /
bogdanm	89:552587b429a1	681	#define OB_PCROP_SELECTED ((uint8_t)0x80) /!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i /
bogdanm	89:552587b429a1	682	#define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) \|\| ((PCROP) == OB_PCROP_DESELECTED))
bogdanm	89:552587b429a1	683	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	684	/**
bogdanm	89:552587b429a1	685	* @}
bogdanm	89:552587b429a1	686	*/
bogdanm	89:552587b429a1	687
bogdanm	89:552587b429a1	688	/**
bogdanm	89:552587b429a1	689	* @brief OPTCR1 register byte 2 (Bits[23:16]) base address
bogdanm	89:552587b429a1	690	*/
bogdanm	89:552587b429a1	691	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	692	#define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
bogdanm	89:552587b429a1	693	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	694
bogdanm	89:552587b429a1	695	/**
bogdanm	89:552587b429a1	696	* @}
bogdanm	89:552587b429a1	697	*/
bogdanm	89:552587b429a1	698
bogdanm	89:552587b429a1	699	/* Exported macro ------------------------------------------------------------*/
bogdanm	89:552587b429a1	700
bogdanm	89:552587b429a1	701	/* Exported functions --------------------------------------------------------*/
bogdanm	89:552587b429a1	702
bogdanm	89:552587b429a1	703	/* Extension Program operation functions *************************************/
bogdanm	89:552587b429a1	704	HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef pEraseInit, uint32_t SectorError);
bogdanm	89:552587b429a1	705	HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
bogdanm	89:552587b429a1	706	HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
bogdanm	89:552587b429a1	707	void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
bogdanm	89:552587b429a1	708	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F401xC) \|\| defined(STM32F401xE)
bogdanm	89:552587b429a1	709	HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
bogdanm	89:552587b429a1	710	void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
bogdanm	89:552587b429a1	711	HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
bogdanm	89:552587b429a1	712	HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
bogdanm	89:552587b429a1	713	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE */
bogdanm	89:552587b429a1	714
bogdanm	89:552587b429a1	715	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx)
bogdanm	89:552587b429a1	716	uint16_t HAL_FLASHEx_OB_GetBank2WRP(void);
bogdanm	89:552587b429a1	717	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx */
bogdanm	89:552587b429a1	718
bogdanm	89:552587b429a1	719	void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
bogdanm	89:552587b429a1	720
bogdanm	89:552587b429a1	721	/**
bogdanm	89:552587b429a1	722	* @}
bogdanm	89:552587b429a1	723	*/
bogdanm	89:552587b429a1	724
bogdanm	89:552587b429a1	725	/**
bogdanm	89:552587b429a1	726	* @}
bogdanm	89:552587b429a1	727	*/
bogdanm	89:552587b429a1	728
bogdanm	89:552587b429a1	729	#ifdef __cplusplus
bogdanm	89:552587b429a1	730	}
bogdanm	89:552587b429a1	731	#endif
bogdanm	89:552587b429a1	732
bogdanm	89:552587b429a1	733	#endif /* __STM32F4xx_HAL_FLASH_EX_H */
bogdanm	89:552587b429a1	734
bogdanm	89:552587b429a1	735	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	17 Jan 2017
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TARGET_ARCH_MAX/stm32f4xx_hal_flash_ex.h@89:552587b429a1, 2014-09-12 (annotated)

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