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TARGET_LPC1549/gpio_object.h@79:0c05e21ae27e, 2014-02-21 (annotated)
- Committer:
- emilmont
- Date:
- Fri Feb 21 10:26:12 2014 +0000
- Revision:
- 79:0c05e21ae27e
Add LPC1549 Target
Change "us_ticker" implementation to 32-bit timer for NUCLEO_L152RE and NUCLEO_F401RE
Update KL05Z CMSIS-CORE
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 79:0c05e21ae27e | 1 | /* mbed Microcontroller Library |
| emilmont | 79:0c05e21ae27e | 2 | * Copyright (c) 2006-2013 ARM Limited |
| emilmont | 79:0c05e21ae27e | 3 | * |
| emilmont | 79:0c05e21ae27e | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| emilmont | 79:0c05e21ae27e | 5 | * you may not use this file except in compliance with the License. |
| emilmont | 79:0c05e21ae27e | 6 | * You may obtain a copy of the License at |
| emilmont | 79:0c05e21ae27e | 7 | * |
| emilmont | 79:0c05e21ae27e | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| emilmont | 79:0c05e21ae27e | 9 | * |
| emilmont | 79:0c05e21ae27e | 10 | * Unless required by applicable law or agreed to in writing, software |
| emilmont | 79:0c05e21ae27e | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| emilmont | 79:0c05e21ae27e | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| emilmont | 79:0c05e21ae27e | 13 | * See the License for the specific language governing permissions and |
| emilmont | 79:0c05e21ae27e | 14 | * limitations under the License. |
| emilmont | 79:0c05e21ae27e | 15 | */ |
| emilmont | 79:0c05e21ae27e | 16 | #ifndef MBED_GPIO_OBJECT_H |
| emilmont | 79:0c05e21ae27e | 17 | #define MBED_GPIO_OBJECT_H |
| emilmont | 79:0c05e21ae27e | 18 | |
| emilmont | 79:0c05e21ae27e | 19 | #ifdef __cplusplus |
| emilmont | 79:0c05e21ae27e | 20 | extern "C" { |
| emilmont | 79:0c05e21ae27e | 21 | #endif |
| emilmont | 79:0c05e21ae27e | 22 | |
| emilmont | 79:0c05e21ae27e | 23 | typedef struct { |
| emilmont | 79:0c05e21ae27e | 24 | PinName pin; |
| emilmont | 79:0c05e21ae27e | 25 | uint32_t mask; |
| emilmont | 79:0c05e21ae27e | 26 | |
| emilmont | 79:0c05e21ae27e | 27 | __IO uint32_t *reg_dir; |
| emilmont | 79:0c05e21ae27e | 28 | __IO uint32_t *reg_set; |
| emilmont | 79:0c05e21ae27e | 29 | __IO uint32_t *reg_clr; |
| emilmont | 79:0c05e21ae27e | 30 | __I uint32_t *reg_in; |
| emilmont | 79:0c05e21ae27e | 31 | } gpio_t; |
| emilmont | 79:0c05e21ae27e | 32 | |
| emilmont | 79:0c05e21ae27e | 33 | static inline void gpio_write(gpio_t *obj, int value) { |
| emilmont | 79:0c05e21ae27e | 34 | if (value) |
| emilmont | 79:0c05e21ae27e | 35 | *obj->reg_set = obj->mask; |
| emilmont | 79:0c05e21ae27e | 36 | else |
| emilmont | 79:0c05e21ae27e | 37 | *obj->reg_clr = obj->mask; |
| emilmont | 79:0c05e21ae27e | 38 | } |
| emilmont | 79:0c05e21ae27e | 39 | |
| emilmont | 79:0c05e21ae27e | 40 | static inline int gpio_read(gpio_t *obj) { |
| emilmont | 79:0c05e21ae27e | 41 | return ((*obj->reg_in & obj->mask) ? 1 : 0); |
| emilmont | 79:0c05e21ae27e | 42 | } |
| emilmont | 79:0c05e21ae27e | 43 | |
| emilmont | 79:0c05e21ae27e | 44 | #ifdef __cplusplus |
| emilmont | 79:0c05e21ae27e | 45 | } |
| emilmont | 79:0c05e21ae27e | 46 | #endif |
| emilmont | 79:0c05e21ae27e | 47 | |
| emilmont | 79:0c05e21ae27e | 48 | #endif |