Kazuhiro Ouchi / Mbed 2 deprecated VFD_bmp_mbed

Sample program for Futaba GP1059A01 240x36dot VFD

Dependencies:   mbed SDFileSystem FatFileSystem

vfd_gp1059.h@0:cd32c44c16f8, 2019-10-05 (annotated)

Committer:
kanpapa
Date:
Sat Oct 05 22:56:59 2019 +0000
Revision:
0:cd32c44c16f8
Update SDFileSystem

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kanpapa 0:cd32c44c16f8 1 /*
kanpapa 0:cd32c44c16f8 2
kanpapa 0:cd32c44c16f8 3 VFD Control class for GP1059A01
kanpapa 0:cd32c44c16f8 4
kanpapa 0:cd32c44c16f8 5 ===============
kanpapa 0:cd32c44c16f8 6 GP1059A01 INTERFACE CONNECTION
kanpapa 0:cd32c44c16f8 7 ---------------
kanpapa 0:cd32c44c16f8 8 1 D0 2 D1
kanpapa 0:cd32c44c16f8 9 3 D2 4 D3
kanpapa 0:cd32c44c16f8 10 5 D4 6 D5
kanpapa 0:cd32c44c16f8 11 7 D6 8 D7
kanpapa 0:cd32c44c16f8 12 9 GND 10 INT
kanpapa 0:cd32c44c16f8 13 11 WR 12 RD
kanpapa 0:cd32c44c16f8 14 13 CS 14 C/D
kanpapa 0:cd32c44c16f8 15 15 5V 16 5V
kanpapa 0:cd32c44c16f8 16 17 5V 18 GND
kanpapa 0:cd32c44c16f8 17 19 GND 20 ebb(+70V)
kanpapa 0:cd32c44c16f8 18
kanpapa 0:cd32c44c16f8 19 =====================
kanpapa 0:cd32c44c16f8 20 mbed CONNECTION
kanpapa 0:cd32c44c16f8 21 ---------------------
kanpapa 0:cd32c44c16f8 22 mbed GP1059A01(I/O)
kanpapa 0:cd32c44c16f8 23 ---------------------
kanpapa 0:cd32c44c16f8 24 p5 1 (D0) I/O
kanpapa 0:cd32c44c16f8 25 p6 2 (D1) I/O
kanpapa 0:cd32c44c16f8 26 p7 3 (D2) I/O
kanpapa 0:cd32c44c16f8 27 p8 4 (D3) I/O
kanpapa 0:cd32c44c16f8 28 p9 5 (D4) I/O
kanpapa 0:cd32c44c16f8 29 p10 6 (D5) I/O
kanpapa 0:cd32c44c16f8 30 p11 7 (D6) I/O
kanpapa 0:cd32c44c16f8 31 p12 8 (D7) I/O
kanpapa 0:cd32c44c16f8 32 p13 10 (INT) O
kanpapa 0:cd32c44c16f8 33 p14 11 (WR) I
kanpapa 0:cd32c44c16f8 34 p15 12 (RD) I
kanpapa 0:cd32c44c16f8 35 p16 13 (CS) I
kanpapa 0:cd32c44c16f8 36 p17 14 (C/D) I
kanpapa 0:cd32c44c16f8 37 GND 9,18,19 (GND)
kanpapa 0:cd32c44c16f8 38 =====================
kanpapa 0:cd32c44c16f8 39
kanpapa 0:cd32c44c16f8 40 */
kanpapa 0:cd32c44c16f8 41
kanpapa 0:cd32c44c16f8 42 #ifndef __VFD_GP1059_H__
kanpapa 0:cd32c44c16f8 43 #define __VFD_GP1059_H__
kanpapa 0:cd32c44c16f8 44
kanpapa 0:cd32c44c16f8 45 #include "mbed.h"
kanpapa 0:cd32c44c16f8 46
kanpapa 0:cd32c44c16f8 47 class VFD_GP1059 {
kanpapa 0:cd32c44c16f8 48 private:
kanpapa 0:cd32c44c16f8 49 BusOut data;
kanpapa 0:cd32c44c16f8 50 DigitalOut wr,rd,cs,cd;
kanpapa 0:cd32c44c16f8 51 DigitalIn intr;
kanpapa 0:cd32c44c16f8 52
kanpapa 0:cd32c44c16f8 53 void init(){
kanpapa 0:cd32c44c16f8 54 cs = 1;
kanpapa 0:cd32c44c16f8 55 wr = 1;
kanpapa 0:cd32c44c16f8 56 rd = 1;
kanpapa 0:cd32c44c16f8 57 cd = 1;
kanpapa 0:cd32c44c16f8 58 }
kanpapa 0:cd32c44c16f8 59
kanpapa 0:cd32c44c16f8 60 public:
kanpapa 0:cd32c44c16f8 61 // constructor
kanpapa 0:cd32c44c16f8 62 VFD_GP1059(PinName d0_pin,
kanpapa 0:cd32c44c16f8 63 PinName d1_pin,
kanpapa 0:cd32c44c16f8 64 PinName d2_pin,
kanpapa 0:cd32c44c16f8 65 PinName d3_pin,
kanpapa 0:cd32c44c16f8 66 PinName d4_pin,
kanpapa 0:cd32c44c16f8 67 PinName d5_pin,
kanpapa 0:cd32c44c16f8 68 PinName d6_pin,
kanpapa 0:cd32c44c16f8 69 PinName d7_pin,
kanpapa 0:cd32c44c16f8 70 PinName intr_pin,
kanpapa 0:cd32c44c16f8 71 PinName wr_pin,
kanpapa 0:cd32c44c16f8 72 PinName rd_pin,
kanpapa 0:cd32c44c16f8 73 PinName cs_pin,
kanpapa 0:cd32c44c16f8 74 PinName cd_pin) :
kanpapa 0:cd32c44c16f8 75 data(d0_pin, d1_pin, d2_pin, d3_pin, d4_pin, d5_pin, d6_pin, d7_pin),
kanpapa 0:cd32c44c16f8 76 intr(intr_pin),
kanpapa 0:cd32c44c16f8 77 wr(wr_pin),
kanpapa 0:cd32c44c16f8 78 rd(rd_pin),
kanpapa 0:cd32c44c16f8 79 cs(cs_pin),
kanpapa 0:cd32c44c16f8 80 cd(cd_pin) {
kanpapa 0:cd32c44c16f8 81 init();
kanpapa 0:cd32c44c16f8 82 cls();
kanpapa 0:cd32c44c16f8 83 }
kanpapa 0:cd32c44c16f8 84
kanpapa 0:cd32c44c16f8 85 void send_cmd(uint8_t cmd){
kanpapa 0:cd32c44c16f8 86 cd = 1; // C/D SET HIGH
kanpapa 0:cd32c44c16f8 87 data = cmd; // COMMAND SET
kanpapa 0:cd32c44c16f8 88 cs = 0; // CS SET LOW
kanpapa 0:cd32c44c16f8 89 wr = 0; // WR SET LOW
kanpapa 0:cd32c44c16f8 90 wait_us(2); // wait 2us
kanpapa 0:cd32c44c16f8 91 wr = 1; // WR SET HIGH
kanpapa 0:cd32c44c16f8 92 cs = 1; // CS SET HIGH
kanpapa 0:cd32c44c16f8 93 wait_us(4); // wait 4us
kanpapa 0:cd32c44c16f8 94
kanpapa 0:cd32c44c16f8 95 return;
kanpapa 0:cd32c44c16f8 96 }
kanpapa 0:cd32c44c16f8 97
kanpapa 0:cd32c44c16f8 98 void send_data(uint8_t data_value){
kanpapa 0:cd32c44c16f8 99 cd = 0; // C/D SET HIGH
kanpapa 0:cd32c44c16f8 100 data = data_value; // DATA SET
kanpapa 0:cd32c44c16f8 101 cs = 0; // CS SET LOW
kanpapa 0:cd32c44c16f8 102 wr = 0; // WR SET LOW
kanpapa 0:cd32c44c16f8 103 wait_us(2); // wait 2us
kanpapa 0:cd32c44c16f8 104 wr = 1; // WR SET HIGH
kanpapa 0:cd32c44c16f8 105 cs = 1; // CS SET HIGH
kanpapa 0:cd32c44c16f8 106 wait_us(4); // wait 4us
kanpapa 0:cd32c44c16f8 107
kanpapa 0:cd32c44c16f8 108 return;
kanpapa 0:cd32c44c16f8 109 }
kanpapa 0:cd32c44c16f8 110
kanpapa 0:cd32c44c16f8 111 // Luminance Adjustment (06H)
kanpapa 0:cd32c44c16f8 112 void luminance_adjustment(uint8_t data){
kanpapa 0:cd32c44c16f8 113 send_cmd(6);
kanpapa 0:cd32c44c16f8 114 send_data(data);
kanpapa 0:cd32c44c16f8 115
kanpapa 0:cd32c44c16f8 116 return;
kanpapa 0:cd32c44c16f8 117 }
kanpapa 0:cd32c44c16f8 118
kanpapa 0:cd32c44c16f8 119 // 04H,05H,02H: Setting address of Write
kanpapa 0:cd32c44c16f8 120 void set_write_read_address(uint16_t address){
kanpapa 0:cd32c44c16f8 121 send_cmd(4); // 04H: Setting lower address of Write-Read
kanpapa 0:cd32c44c16f8 122 send_data((uint8_t)(address & 0x0ff)); // mask upper address
kanpapa 0:cd32c44c16f8 123
kanpapa 0:cd32c44c16f8 124 send_cmd(5); // 05H: Setting upper address of Write-Read
kanpapa 0:cd32c44c16f8 125 send_data((uint8_t)(address >> 8)); // 8bit shift
kanpapa 0:cd32c44c16f8 126
kanpapa 0:cd32c44c16f8 127 send_cmd(2); // 02H: Data Write
kanpapa 0:cd32c44c16f8 128
kanpapa 0:cd32c44c16f8 129 return;
kanpapa 0:cd32c44c16f8 130 }
kanpapa 0:cd32c44c16f8 131
kanpapa 0:cd32c44c16f8 132 // 07H,08H: Setting address display started
kanpapa 0:cd32c44c16f8 133 void set_disp_start_address(uint16_t address){
kanpapa 0:cd32c44c16f8 134 send_cmd(7); // 07H: Setting lower address display started
kanpapa 0:cd32c44c16f8 135 send_data((uint8_t)(address & 0x0ff));
kanpapa 0:cd32c44c16f8 136
kanpapa 0:cd32c44c16f8 137 send_cmd(8); // 08H: Setting upper address display started
kanpapa 0:cd32c44c16f8 138 send_data((uint8_t)(address >> 8));
kanpapa 0:cd32c44c16f8 139
kanpapa 0:cd32c44c16f8 140 return;
kanpapa 0:cd32c44c16f8 141 }
kanpapa 0:cd32c44c16f8 142
kanpapa 0:cd32c44c16f8 143 // Clear display memory
kanpapa 0:cd32c44c16f8 144 void cls(){
kanpapa 0:cd32c44c16f8 145 set_disp_start_address(0);
kanpapa 0:cd32c44c16f8 146 set_write_read_address(0);
kanpapa 0:cd32c44c16f8 147 for (int i = 0; i < 0x1fff; i++){
kanpapa 0:cd32c44c16f8 148 send_data(0);
kanpapa 0:cd32c44c16f8 149 }
kanpapa 0:cd32c44c16f8 150 return;
kanpapa 0:cd32c44c16f8 151 }
kanpapa 0:cd32c44c16f8 152
kanpapa 0:cd32c44c16f8 153 };
kanpapa 0:cd32c44c16f8 154
kanpapa 0:cd32c44c16f8 155 #endif