NanostackRfPhyAtmel.cpp

00001 /*
00002  * Copyright (c) 2014-2015 ARM Limited. All rights reserved.
00003  * SPDX-License-Identifier: Apache-2.0
00004  * Licensed under the Apache License, Version 2.0 (the License); you may
00005  * not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  * http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00012  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 #include <string.h>
00017 
00018 #if defined(MBED_CONF_NANOSTACK_CONFIGURATION) && DEVICE_SPI && DEVICE_I2C
00019 
00020 #include "platform/arm_hal_interrupt.h"
00021 #include "nanostack/platform/arm_hal_phy.h"
00022 #include "ns_types.h"
00023 #include "NanostackRfPhyAtmel.h"
00024 #include "randLIB.h"
00025 #include "AT86RFReg.h"
00026 #include "nanostack/platform/arm_hal_phy.h"
00027 #include "mbed_trace.h"
00028 #include "mbed_toolchain.h"
00029 
00030 #define TRACE_GROUP "AtRF"
00031 
00032 /*Worst case sensitivity*/
00033 #define RF_DEFAULT_SENSITIVITY -88
00034 /*Run calibration every 5 minutes*/
00035 #define RF_CALIBRATION_INTERVAL 6000000
00036 /*Wait ACK for 2.5ms*/
00037 #define RF_ACK_WAIT_DEFAULT_TIMEOUT 50
00038 /*Base CCA backoff (50us units) - substitutes for Inter-Frame Spacing*/
00039 #define RF_CCA_BASE_BACKOFF 13 /* 650us */
00040 /*CCA random backoff (50us units)*/
00041 #define RF_CCA_RANDOM_BACKOFF 51 /* 2550us */
00042 
00043 #define RF_MTU 127
00044 
00045 #define RF_PHY_MODE OQPSK_SIN_250
00046 
00047 /*Radio RX and TX state definitions*/
00048 #define RFF_ON 0x01
00049 #define RFF_RX 0x02
00050 #define RFF_TX 0x04
00051 #define RFF_CCA 0x08
00052 
00053 typedef enum
00054 {
00055     RF_MODE_NORMAL = 0,
00056     RF_MODE_SNIFFER = 1,
00057     RF_MODE_ED = 2
00058 }rf_mode_t;
00059 
00060 /*Atmel RF Part Type*/
00061 typedef enum
00062 {
00063     ATMEL_UNKNOW_DEV = 0,
00064     ATMEL_AT86RF212,
00065     ATMEL_AT86RF231, // No longer supported (doesn't give ED+status on frame read)
00066     ATMEL_AT86RF233
00067 }rf_trx_part_e;
00068 
00069 /*Atmel RF states*/
00070 typedef enum
00071 {
00072     NOP = 0x00,
00073     BUSY_RX = 0x01,
00074     BUSY_TX = 0x02,
00075     RF_TX_START = 0x02,
00076     FORCE_TRX_OFF = 0x03,
00077     FORCE_PLL_ON = 0x04,
00078     RX_ON = 0x06,
00079     TRX_OFF = 0x08,
00080     PLL_ON = 0x09,
00081     BUSY_RX_AACK = 0x11,
00082     SLEEP = 0x0F,
00083     RX_AACK_ON = 0x16,
00084     TX_ARET_ON = 0x19,
00085     STATE_TRANSITION_IN_PROGRESS = 0x1F
00086 }rf_trx_states_t;
00087 
00088 static const uint8_t *rf_tx_data; // Points to Nanostack's buffer
00089 static uint8_t rf_tx_length;
00090 /*ACK wait duration changes depending on data rate*/
00091 static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_DEFAULT_TIMEOUT;
00092 
00093 static int8_t rf_sensitivity = RF_DEFAULT_SENSITIVITY;
00094 static rf_mode_t rf_mode = RF_MODE_NORMAL;
00095 static uint8_t radio_tx_power = 0x00;   // Default to +4dBm
00096 static uint8_t rf_phy_channel = 12;
00097 static uint8_t rf_tuned = 1;
00098 static uint8_t rf_use_antenna_diversity = 0;
00099 static int16_t expected_ack_sequence = -1;
00100 static uint8_t rf_rx_mode = 0;
00101 static uint8_t rf_flags = 0;
00102 static int8_t rf_radio_driver_id = -1;
00103 static phy_device_driver_s device_driver;
00104 static uint8_t mac_tx_handle = 0;
00105 static uint8_t xah_ctrl_1;
00106 
00107 /* Channel configurations for 2.4 and sub-GHz */
00108 static const phy_rf_channel_configuration_s phy_24ghz = {2405000000U, 5000000U, 250000U, 16U, M_OQPSK};
00109 static const phy_rf_channel_configuration_s phy_subghz = {868300000U, 2000000U, 250000U, 11U, M_OQPSK};
00110 
00111 static const phy_device_channel_page_s phy_channel_pages[] = {
00112         { CHANNEL_PAGE_0, &phy_24ghz},
00113         { CHANNEL_PAGE_2, &phy_subghz},
00114         { CHANNEL_PAGE_0, NULL}
00115 };
00116 
00117 /**
00118  *  RF output power write
00119  *
00120  * \brief TX power has to be set before network start.
00121  *
00122  * \param power
00123  *              AT86RF233
00124  *              0 = 4 dBm
00125  *              1 = 3.7 dBm
00126  *              2 = 3.4 dBm
00127  *              3 = 3 dBm
00128  *              4 = 2.5 dBm
00129  *              5 = 2 dBm
00130  *              6 = 1 dBm
00131  *              7 = 0 dBm
00132  *              8 = -1 dBm
00133  *              9 = -2 dBm
00134  *              10 = -3 dBm
00135  *              11 = -4 dBm
00136  *              12 = -6 dBm
00137  *              13 = -8 dBm
00138  *              14 = -12 dBm
00139  *              15 = -17 dBm
00140  *
00141  *              AT86RF212B
00142  *              See datasheet for TX power settings
00143  *
00144  * \return 0, Supported Value
00145  * \return -1, Not Supported Value
00146  */
00147 static rf_trx_part_e rf_radio_type_read(void);
00148 static void rf_ack_wait_timer_start(uint16_t slots);
00149 static void rf_handle_cca_ed_done(uint8_t full_trx_status);
00150 static void rf_handle_tx_end(rf_trx_states_t trx_status);
00151 static void rf_handle_rx_end(rf_trx_states_t trx_status);
00152 static void rf_on(void);
00153 static void rf_give_up_on_ack(void);
00154 static void rf_receive(rf_trx_states_t trx_status = STATE_TRANSITION_IN_PROGRESS);
00155 static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state);
00156 static void rf_init(void);
00157 static int8_t rf_device_register(const uint8_t *mac_addr);
00158 static void rf_device_unregister(void);
00159 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol );
00160 static void rf_cca_abort(void);
00161 static void rf_calibration_cb(void);
00162 static void rf_init_phy_mode(void);
00163 static void rf_ack_wait_timer_interrupt(void);
00164 static void rf_calibration_timer_interrupt(void);
00165 static void rf_calibration_timer_start(uint32_t slots);
00166 static void rf_cca_timer_interrupt(void);
00167 static void rf_cca_timer_start(uint32_t slots);
00168 static uint8_t rf_scale_lqi(int8_t rssi);
00169 
00170 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
00171 static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
00172 static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
00173 
00174 static void rf_if_cca_timer_start(uint32_t slots);
00175 static void rf_if_enable_promiscuous_mode(void);
00176 static void rf_if_lock(void);
00177 static void rf_if_unlock(void);
00178 static uint8_t rf_if_read_rnd(void);
00179 static void rf_if_calibration_timer_start(uint32_t slots);
00180 static void rf_if_interrupt_handler(void);
00181 static void rf_if_ack_wait_timer_start(uint16_t slots);
00182 static void rf_if_ack_wait_timer_stop(void);
00183 static void rf_if_ack_pending_ctrl(uint8_t state);
00184 static void rf_if_calibration(void);
00185 static uint8_t rf_if_read_register(uint8_t addr);
00186 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask);
00187 static void rf_if_clear_bit(uint8_t addr, uint8_t bit);
00188 static void rf_if_write_register(uint8_t addr, uint8_t data);
00189 static void rf_if_reset_radio(void);
00190 static void rf_if_enable_ant_div(void);
00191 static void rf_if_disable_ant_div(void);
00192 static void rf_if_enable_slptr(void);
00193 static void rf_if_disable_slptr(void);
00194 static void rf_if_write_antenna_diversity_settings(void);
00195 static void rf_if_write_set_tx_power_register(uint8_t value);
00196 static void rf_if_write_rf_settings(void);
00197 static rf_trx_states_t rf_if_read_trx_state(void);
00198 static uint16_t rf_if_read_packet(uint8_t data[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good);
00199 static void rf_if_write_short_addr_registers(uint8_t *short_address);
00200 static uint8_t rf_if_last_acked_pending(void);
00201 static void rf_if_write_pan_id_registers(uint8_t *pan_id);
00202 static void rf_if_write_ieee_addr_registers(uint8_t *address);
00203 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length);
00204 static rf_trx_states_t rf_if_change_trx_state(rf_trx_states_t trx_state);
00205 static void rf_if_start_cca_process(void);
00206 static int8_t rf_if_scale_rssi(uint8_t ed_level);
00207 static void rf_if_set_channel_register(uint8_t channel);
00208 static void rf_if_enable_promiscuous_mode(void);
00209 static void rf_if_disable_promiscuous_mode(void);
00210 static uint8_t rf_if_read_part_num(void);
00211 static void rf_if_enable_irq(void);
00212 static void rf_if_disable_irq(void);
00213 static void rf_if_spi_exchange_n(const void *tx, size_t tx_len, void *rx, size_t rx_len);
00214 
00215 static inline rf_trx_states_t rf_if_trx_status_from_full(uint8_t full_trx_status)
00216 {
00217     return (rf_trx_states_t) (full_trx_status & 0x1F);
00218 }
00219 
00220 #ifdef MBED_CONF_RTOS_PRESENT
00221 #include "mbed.h"
00222 #include "rtos.h"
00223 
00224 static void rf_if_irq_task_process_irq();
00225 
00226 #define SIG_RADIO       1
00227 #define SIG_TIMER_ACK   2
00228 #define SIG_TIMER_CAL   4
00229 #define SIG_TIMER_CCA   8
00230 
00231 #define SIG_TIMERS (SIG_TIMER_ACK|SIG_TIMER_CAL|SIG_TIMER_CCA)
00232 #define SIG_ALL (SIG_RADIO|SIG_TIMERS)
00233 #endif
00234 
00235 // HW pins to RF chip
00236 
00237 class UnlockedSPI : public SPI {
00238 public:
00239     UnlockedSPI(PinName mosi, PinName miso, PinName sclk) :
00240         SPI(mosi, miso, sclk) { }
00241     virtual void lock() { }
00242     virtual void unlock() { }
00243 };
00244 
00245 class RFBits {
00246 public:
00247     RFBits(PinName spi_mosi, PinName spi_miso,
00248            PinName spi_sclk, PinName spi_cs,
00249            PinName spi_rst, PinName spi_slp, PinName spi_irq);
00250     UnlockedSPI spi;
00251     DigitalOut CS;
00252     DigitalOut RST;
00253     DigitalOut SLP_TR;
00254     InterruptIn IRQ;
00255     Timeout ack_timer;
00256     Timeout cal_timer;
00257     Timeout cca_timer;
00258 #ifdef MBED_CONF_RTOS_PRESENT
00259     Thread irq_thread;
00260     Mutex mutex;
00261     void rf_if_irq_task();
00262 #endif
00263 };
00264 
00265 RFBits::RFBits(PinName spi_mosi, PinName spi_miso,
00266                PinName spi_sclk, PinName spi_cs,
00267                PinName spi_rst, PinName spi_slp, PinName spi_irq)
00268     :   spi(spi_mosi, spi_miso, spi_sclk),
00269         CS(spi_cs),
00270         RST(spi_rst),
00271         SLP_TR(spi_slp),
00272         IRQ(spi_irq)
00273 #ifdef MBED_CONF_RTOS_PRESENT
00274 ,irq_thread(osPriorityRealtime, 1024)
00275 #endif
00276 {
00277 #ifdef MBED_CONF_RTOS_PRESENT
00278     irq_thread.start(mbed::callback(this, &RFBits::rf_if_irq_task));
00279 #endif
00280 }
00281 
00282 static RFBits *rf;
00283 static uint8_t rf_part_num = 0;
00284 /*TODO: RSSI Base value setting*/
00285 static int8_t rf_rssi_base_val = -91;
00286 
00287 static void rf_if_lock(void)
00288 {
00289     platform_enter_critical();
00290 }
00291 
00292 static void rf_if_unlock(void)
00293 {
00294     platform_exit_critical();
00295 }
00296 
00297 #ifdef MBED_CONF_RTOS_PRESENT
00298 static void rf_if_cca_timer_signal(void)
00299 {
00300     rf->irq_thread.signal_set(SIG_TIMER_CCA);
00301 }
00302 
00303 static void rf_if_cal_timer_signal(void)
00304 {
00305     rf->irq_thread.signal_set(SIG_TIMER_CAL);
00306 }
00307 
00308 static void rf_if_ack_timer_signal(void)
00309 {
00310     rf->irq_thread.signal_set(SIG_TIMER_ACK);
00311 }
00312 #endif
00313 
00314 
00315 /* Delay functions for RF Chip SPI access */
00316 #ifdef __CC_ARM
00317 __asm static void delay_loop(uint32_t count)
00318 {
00319 1
00320   SUBS a1, a1, #1
00321   BCS  %BT1
00322   BX   lr
00323 }
00324 #elif defined (__ARMCC_VERSION) /* ARMC6 */
00325 void delay_loop(uint32_t count)
00326 {
00327     // TODO: This needs implementation
00328     while(count--)
00329         ;;
00330 }
00331 #elif defined (__ICCARM__)
00332 static void delay_loop(uint32_t count)
00333 {
00334   __asm volatile(
00335     "loop: \n"
00336     " SUBS %0, %0, #1 \n"
00337     " BCS.n  loop\n"
00338     : "+r" (count)
00339     :
00340     : "cc"
00341   );
00342 }
00343 #else // GCC
00344 static void delay_loop(uint32_t count)
00345 {
00346   __asm__ volatile (
00347     "%=:\n\t"
00348 #if defined(__thumb__) && !defined(__thumb2__)
00349     "SUB  %0, #1\n\t"
00350 #else
00351     "SUBS %0, %0, #1\n\t"
00352 #endif
00353     "BCS  %=b\n\t"
00354     : "+l" (count)
00355     :
00356     : "cc"
00357   );
00358 }
00359 #endif
00360 
00361 static void delay_ns(uint32_t ns)
00362 {
00363   uint32_t cycles_per_us = SystemCoreClock / 1000000;
00364   // Cortex-M0 takes 4 cycles per loop (SUB=1, BCS=3)
00365   // Cortex-M3 and M4 takes 3 cycles per loop (SUB=1, BCS=2)
00366   // Cortex-M7 - who knows?
00367   // Cortex M3-M7 have "CYCCNT" - would be better than a software loop, but M0 doesn't
00368   // Assume 3 cycles per loop for now - will be 33% slow on M0. No biggie,
00369   // as original version of code was 300% slow on M4.
00370   // [Note that this very calculation, plus call overhead, will take multiple
00371   // cycles. Could well be 100ns on its own... So round down here, startup is
00372   // worth at least one loop iteration.]
00373   uint32_t count = (cycles_per_us * ns) / 3000;
00374 
00375   delay_loop(count);
00376 }
00377 
00378 // t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay]
00379 #define CS_SELECT()  {rf->CS = 0; /* delay_ns(180); */}
00380  // t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access
00381 #define CS_RELEASE() {delay_ns(250); rf->CS = 1; delay_ns(250);}
00382 
00383 /*
00384  * \brief Read connected radio part.
00385  *
00386  * This function only return valid information when rf_init() is called
00387  *
00388  * \return
00389  */
00390 static rf_trx_part_e rf_radio_type_read(void)
00391 {
00392   rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV;
00393 
00394   switch (rf_part_num)
00395   {
00396     case PART_AT86RF212:
00397       ret_val = ATMEL_AT86RF212;
00398       break;
00399     case PART_AT86RF233:
00400       ret_val = ATMEL_AT86RF233;
00401       break;
00402     default:
00403       break;
00404   }
00405 
00406   return ret_val;
00407 }
00408 
00409 
00410 /*
00411  * \brief Function starts the ACK wait timeout.
00412  *
00413  * \param slots Given slots, resolution 50us
00414  *
00415  * \return none
00416  */
00417 static void rf_if_ack_wait_timer_start(uint16_t slots)
00418 {
00419 #ifdef MBED_CONF_RTOS_PRESENT
00420   rf->ack_timer.attach_us(rf_if_ack_timer_signal, slots*50);
00421 #else
00422   rf->ack_timer.attach_us(rf_ack_wait_timer_interrupt, slots*50);
00423 #endif
00424 }
00425 
00426 /*
00427  * \brief Function starts the calibration interval.
00428  *
00429  * \param slots Given slots, resolution 50us
00430  *
00431  * \return none
00432  */
00433 static void rf_if_calibration_timer_start(uint32_t slots)
00434 {
00435 #ifdef MBED_CONF_RTOS_PRESENT
00436   rf->cal_timer.attach_us(rf_if_cal_timer_signal, slots*50);
00437 #else
00438   rf->cal_timer.attach_us(rf_calibration_timer_interrupt, slots*50);
00439 #endif
00440 }
00441 
00442 /*
00443  * \brief Function starts the CCA interval.
00444  *
00445  * \param slots Given slots, resolution 50us
00446  *
00447  * \return none
00448  */
00449 static void rf_if_cca_timer_start(uint32_t slots)
00450 {
00451 #ifdef MBED_CONF_RTOS_PRESENT
00452   rf->cca_timer.attach_us(rf_if_cca_timer_signal, slots*50);
00453 #else
00454   rf->cca_timer.attach_us(rf_cca_timer_interrupt, slots*50);
00455 #endif
00456 }
00457 
00458 /*
00459  * \brief Function stops the CCA interval.
00460  *
00461  * \return none
00462  */
00463 static void rf_if_cca_timer_stop(void)
00464 {
00465   rf->cca_timer.detach();
00466 }
00467 
00468 /*
00469  * \brief Function stops the ACK wait timeout.
00470  *
00471  * \param none
00472  *
00473  * \return none
00474  */
00475 static void rf_if_ack_wait_timer_stop(void)
00476 {
00477   rf->ack_timer.detach();
00478 }
00479 
00480 /*
00481  * \brief Function sets bit(s) in given RF register.
00482  *
00483  * \param addr Address of the register to set
00484  * \param bit Bit(s) to set
00485  * \param bit_mask Masks the field inside the register
00486  *
00487  * \return none
00488  */
00489 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask)
00490 {
00491   uint8_t reg = rf_if_read_register(addr);
00492   reg &= ~bit_mask;
00493   reg |= bit;
00494   rf_if_write_register(addr, reg);
00495 }
00496 
00497 /*
00498  * \brief Function clears bit(s) in given RF register.
00499  *
00500  * \param addr Address of the register to clear
00501  * \param bit Bit(s) to clear
00502  *
00503  * \return none
00504  */
00505 static void rf_if_clear_bit(uint8_t addr, uint8_t bit)
00506 {
00507   rf_if_set_bit(addr, 0, bit);
00508 }
00509 
00510 /*
00511  * \brief Function writes register in RF.
00512  *
00513  * \param addr Address on the RF
00514  * \param data Written data
00515  *
00516  * \return none
00517  */
00518 static void rf_if_write_register(uint8_t addr, uint8_t data)
00519 {
00520   const uint8_t tx[2] = { static_cast<uint8_t>(0xC0 | addr), data };
00521   uint8_t rx[2];
00522   CS_SELECT();
00523   rf_if_spi_exchange_n(tx, 2, rx, 2);
00524   CS_RELEASE();
00525 }
00526 
00527 /*
00528  * \brief Function reads RF register, and also outputs PHY_STATUS
00529  *
00530  * \param addr Address on the RF
00531  * \param[out] status_out Pointer to store PHY_STATUS
00532  *
00533  * \return Read register data
00534  */
00535 static uint8_t rf_if_read_register_with_status(uint8_t addr, uint8_t *status_out)
00536 {
00537   const uint8_t tx[1] = { static_cast<uint8_t>(0x80 | addr) };
00538   uint8_t rx[2];
00539   CS_SELECT();
00540   rf_if_spi_exchange_n(tx, 1, rx, 2);
00541   CS_RELEASE();
00542   if (status_out) {
00543       *status_out = rx[0];
00544   }
00545   return rx[1];
00546 }
00547 
00548 /*
00549  * \brief Function reads RF register.
00550  *
00551  * \param addr Address on the RF
00552  *
00553  * \return Read register data
00554  */
00555 static uint8_t rf_if_read_register(uint8_t addr)
00556 {
00557   return rf_if_read_register_with_status(addr, NULL);
00558 }
00559 
00560 /*
00561  * \brief Function resets the RF.
00562  *
00563  * \param none
00564  *
00565  * \return none
00566  */
00567 static void rf_if_reset_radio(void)
00568 {
00569 #if MBED_CONF_ATMEL_RF_USE_SPI_SPACING_API
00570   rf->spi.frequency(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED);
00571   int spacing = rf->spi.write_spacing(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED_BYTE_SPACING);
00572   if (spacing < MBED_CONF_ATMEL_RF_FULL_SPI_SPEED_BYTE_SPACING) {
00573       rf->spi.frequency(MBED_CONF_ATMEL_RF_LOW_SPI_SPEED);
00574       rf->spi.write_spacing(0);
00575   }
00576 #elif MBED_CONF_ATMEL_RF_ASSUME_SPACED_SPI
00577   rf->spi.frequency(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED);
00578 #else
00579   rf->spi.frequency(MBED_CONF_ATMEL_RF_LOW_SPI_SPEED);
00580 #endif
00581   rf->IRQ.rise(0);
00582   rf->RST = 1;
00583   wait_ms(1);
00584   rf->RST = 0;
00585   wait_ms(10);
00586   CS_RELEASE();
00587   rf->SLP_TR = 0;
00588   wait_ms(10);
00589   rf->RST = 1;
00590   wait_ms(10);
00591 
00592   rf->IRQ.rise(&rf_if_interrupt_handler);
00593 }
00594 
00595 /*
00596  * \brief Function enables the promiscuous mode.
00597  *
00598  * \param none
00599  *
00600  * \return none
00601  */
00602 static void rf_if_enable_promiscuous_mode(void)
00603 {
00604   if (!(xah_ctrl_1 & AACK_PROM_MODE)) {
00605     /*Set AACK_PROM_MODE to enable the promiscuous mode*/
00606     rf_if_write_register(XAH_CTRL_1, xah_ctrl_1 |= AACK_PROM_MODE);
00607   }
00608 }
00609 
00610 /*
00611  * \brief Function disable the promiscuous mode.
00612  *
00613  * \param none
00614  *
00615  * \return none
00616  */
00617 static void rf_if_disable_promiscuous_mode(void)
00618 {
00619   if (xah_ctrl_1 & AACK_PROM_MODE) {
00620     /*Clear AACK_PROM_MODE to disable the promiscuous mode*/
00621     rf_if_write_register(XAH_CTRL_1, xah_ctrl_1 &= ~AACK_PROM_MODE);
00622   }
00623 }
00624 
00625 /*
00626  * \brief Function enables the Antenna diversity usage.
00627  *
00628  * \param none
00629  *
00630  * \return none
00631  */
00632 static void rf_if_enable_ant_div(void)
00633 {
00634   /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
00635   rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN);
00636 }
00637 
00638 /*
00639  * \brief Function disables the Antenna diversity usage.
00640  *
00641  * \param none
00642  *
00643  * \return none
00644  */
00645 static void rf_if_disable_ant_div(void)
00646 {
00647   rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN);
00648 }
00649 
00650 /*
00651  * \brief Function sets the SLP TR pin.
00652  *
00653  * \param none
00654  *
00655  * \return none
00656  */
00657 static void rf_if_enable_slptr(void)
00658 {
00659   rf->SLP_TR = 1;
00660 }
00661 
00662 /*
00663  * \brief Function clears the SLP TR pin.
00664  *
00665  * \param none
00666  *
00667  * \return none
00668  */
00669 static void rf_if_disable_slptr(void)
00670 {
00671   rf->SLP_TR = 0;
00672 }
00673 
00674 /*
00675  * \brief Function writes the antenna diversity settings.
00676  *
00677  * \param none
00678  *
00679  * \return none
00680  */
00681 static void rf_if_write_antenna_diversity_settings(void)
00682 {
00683   /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/
00684   rf_if_set_bit(RX_CTRL, 0x03, 0x0f);
00685   rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT);
00686 }
00687 
00688 /*
00689  * \brief Function writes the TX output power register.
00690  *
00691  * \param value Given register value
00692  *
00693  * \return none
00694  */
00695 static void rf_if_write_set_tx_power_register(uint8_t value)
00696 {
00697   rf_if_write_register(PHY_TX_PWR, value);
00698 }
00699 
00700 /*
00701  * \brief Function returns the RF part number.
00702  *
00703  * \param none
00704  *
00705  * \return part number
00706  */
00707 static uint8_t rf_if_read_part_num(void)
00708 {
00709   return rf_if_read_register(PART_NUM);
00710 }
00711 
00712 /*
00713  * \brief Function writes the RF settings and initialises SPI interface.
00714  *
00715  * \param none
00716  *
00717  * \return none
00718  */
00719 static void rf_if_write_rf_settings(void)
00720 {
00721   /*Reset RF module*/
00722   rf_if_reset_radio();
00723 
00724   rf_part_num = rf_if_read_part_num();
00725 
00726   rf_if_write_register(XAH_CTRL_0,0);
00727 
00728   /* Auto CRC on, IRQ status shows unmasked only, TRX_STATUS output on all accesses */
00729   rf_if_write_register(TRX_CTRL_1, TX_AUTO_CRC_ON | SPI_CMD_MODE_TRX_STATUS);
00730 
00731   rf_if_write_register(IRQ_MASK, CCA_ED_DONE | TRX_END | TRX_UR);
00732 
00733   xah_ctrl_1 = rf_if_read_register(XAH_CTRL_1);
00734 
00735   /*Read transceiver PART_NUM*/
00736   rf_part_num = rf_if_read_register(PART_NUM);
00737 
00738   /*Sub-GHz RF settings*/
00739   if(rf_part_num == PART_AT86RF212)
00740   {
00741     /*GC_TX_OFFS mode-dependent setting - OQPSK*/
00742     rf_if_write_register(RF_CTRL_0, 0x32);
00743 
00744     if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B)
00745     {
00746       /*TX Output Power setting - 0 dBm North American Band*/
00747       rf_if_write_register(PHY_TX_PWR, 0x03);
00748     }
00749     else
00750     {
00751       /*TX Output Power setting - 0 dBm North American Band*/
00752       rf_if_write_register(PHY_TX_PWR, 0x24);
00753     }
00754 
00755     /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/
00756     rf_if_write_register(TRX_CTRL_2, RX_SAFE_MODE | RF_PHY_MODE);
00757     /*Based on receiver Characteristics. See AT86RF212B Datasheet where RSSI BASE VALUE in range -97 - -100 dBm*/
00758     rf_rssi_base_val = -98;
00759   }
00760   /*2.4GHz RF settings*/
00761   else
00762   {
00763 #if 0
00764     /* Disable power saving functions for now - can only impact reliability,
00765      * and don't have any users demanding it. */
00766     /*Set RPC register*/
00767     rf_if_write_register(TRX_RPC, RX_RPC_CTRL|RX_RPC_EN|PLL_RPC_EN|XAH_TX_RPC_EN|IPAN_RPC_EN|TRX_RPC_RSVD_1);
00768 #endif
00769     /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/
00770     rf_if_write_register(TRX_CTRL_2, RX_SAFE_MODE);
00771     rf_rssi_base_val = -91;
00772   }
00773 }
00774 
00775 /*
00776  * \brief Function returns the RF state
00777  *
00778  * \param none
00779  *
00780  * \return RF state
00781  */
00782 static rf_trx_states_t rf_if_read_trx_state(void)
00783 {
00784   return rf_if_trx_status_from_full(rf_if_read_register(TRX_STATUS));
00785 }
00786 
00787 /*
00788  * \brief Function reads packet buffer.
00789  *
00790  * \param data_out Output buffer
00791  * \param lqi_out LQI output
00792  * \param ed_out ED output
00793  * \param crc_good CRC good indication
00794  *
00795  * \return PSDU length [0..RF_MTU]
00796  */
00797 static uint16_t rf_if_read_packet(uint8_t data_out[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good)
00798 {
00799   CS_SELECT();
00800   const uint8_t tx[1] = { 0x20 };
00801   uint8_t rx[3];
00802   rf_if_spi_exchange_n(tx, 1, rx, 2);
00803   uint8_t len = rx[1] & 0x7F;
00804   rf_if_spi_exchange_n(NULL, 0, data_out, len);
00805   rf_if_spi_exchange_n(NULL, 0, rx, 3);
00806   *lqi_out = rx[0];
00807   *ed_out = rx[1];
00808   *crc_good = rx[2] & 0x80;
00809   CS_RELEASE();
00810 
00811   return len;
00812 }
00813 
00814 /*
00815  * \brief Function writes RF short address registers
00816  *
00817  * \param short_address Given short address
00818  *
00819  * \return none
00820  */
00821 static void rf_if_write_short_addr_registers(uint8_t *short_address)
00822 {
00823   rf_if_write_register(SHORT_ADDR_1, *short_address++);
00824   rf_if_write_register(SHORT_ADDR_0, *short_address);
00825 }
00826 
00827 /*
00828  * \brief Function sets the frame pending in ACK message
00829  *
00830  * \param state Given frame pending state
00831  *
00832  * \return none
00833  */
00834 static void rf_if_ack_pending_ctrl(uint8_t state)
00835 {
00836   rf_if_lock();
00837   if(state)
00838   {
00839     rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD));
00840   }
00841   else
00842   {
00843     rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD));
00844   }
00845   rf_if_unlock();
00846 }
00847 
00848 /*
00849  * \brief Function returns the state of frame pending control
00850  *
00851  * \param none
00852  *
00853  * \return Frame pending state
00854  */
00855 static uint8_t rf_if_last_acked_pending(void)
00856 {
00857   uint8_t last_acked_data_pending;
00858 
00859   rf_if_lock();
00860   if(rf_if_read_register(CSMA_SEED_1) & (1 << AACK_SET_PD))
00861     last_acked_data_pending = 1;
00862   else
00863     last_acked_data_pending = 0;
00864   rf_if_unlock();
00865 
00866   return last_acked_data_pending;
00867 }
00868 
00869 /*
00870  * \brief Function calibrates the RF part.
00871  *
00872  * \param none
00873  *
00874  * \return none
00875  */
00876 static void rf_if_calibration(void)
00877 {
00878   rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START);
00879   /*Wait while calibration is running*/
00880   while(rf_if_read_register(FTN_CTRL) & FTN_START);
00881 }
00882 
00883 /*
00884  * \brief Function writes RF PAN Id registers
00885  *
00886  * \param pan_id Given PAN Id
00887  *
00888  * \return none
00889  */
00890 static void rf_if_write_pan_id_registers(uint8_t *pan_id)
00891 {
00892   rf_if_write_register(PAN_ID_1, *pan_id++);
00893   rf_if_write_register(PAN_ID_0, *pan_id);
00894 }
00895 
00896 /*
00897  * \brief Function writes RF IEEE Address registers
00898  *
00899  * \param address Given IEEE Address
00900  *
00901  * \return none
00902  */
00903 static void rf_if_write_ieee_addr_registers(uint8_t *address)
00904 {
00905   uint8_t i;
00906   uint8_t temp = IEEE_ADDR_0;
00907 
00908   for(i=0; i<8; i++)
00909     rf_if_write_register(temp++, address[7-i]);
00910 }
00911 
00912 /*
00913  * \brief Function writes data in RF frame buffer.
00914  *
00915  * \param ptr Pointer to data (PSDU, except FCS)
00916  * \param length Pointer to length (PSDU length, minus 2 for FCS)
00917  *
00918  * \return none
00919  */
00920 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length)
00921 {
00922   const uint8_t cmd[2] = { 0x60, static_cast<uint8_t>(length + 2) };
00923 
00924   CS_SELECT();
00925   rf_if_spi_exchange_n(cmd, 2, NULL, 0);
00926   rf_if_spi_exchange_n(ptr, length, NULL, 0);
00927   CS_RELEASE();
00928 }
00929 
00930 /*
00931  * \brief Function returns 8-bit random value.
00932  *
00933  * \param none
00934  *
00935  * \return random value
00936  */
00937 static uint8_t rf_if_read_rnd(void)
00938 {
00939   uint8_t temp;
00940   uint8_t tmp_rpc_val = 0;
00941   /*RPC must be disabled while reading the random number*/
00942   if(rf_part_num == PART_AT86RF233)
00943   {
00944     tmp_rpc_val = rf_if_read_register(TRX_RPC);
00945     rf_if_write_register(TRX_RPC, RX_RPC_CTRL|TRX_RPC_RSVD_1);
00946   }
00947 
00948   wait_ms(1);
00949   temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6);
00950   wait_ms(1);
00951   temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 4);
00952   wait_ms(1);
00953   temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 2);
00954   wait_ms(1);
00955   temp |= ((rf_if_read_register(PHY_RSSI)>>5));
00956   wait_ms(1);
00957   if(rf_part_num == PART_AT86RF233)
00958     rf_if_write_register(TRX_RPC, tmp_rpc_val);
00959   return temp;
00960 }
00961 
00962 /*
00963  * \brief Function changes the state of the RF.
00964  *
00965  * \param trx_state Given RF state
00966  *
00967  * \return none
00968  */
00969 static rf_trx_states_t rf_if_change_trx_state(rf_trx_states_t trx_state)
00970 {
00971   rf_if_write_register(TRX_STATE, trx_state);
00972   /*Wait while not in desired state*/
00973   return rf_poll_trx_state_change(trx_state);
00974 }
00975 
00976 /*
00977  * \brief Function starts the CCA process
00978  *
00979  * \param none
00980  *
00981  * \return none
00982  */
00983 static void rf_if_start_cca_process(void)
00984 {
00985   rf_if_write_register(PHY_CC_CCA, CCA_REQUEST | CCA_MODE_3A | rf_phy_channel);
00986 }
00987 
00988 /*
00989  * \brief Function scales RSSI
00990  *
00991  * \param ed_level ED level read from chip
00992  *
00993  * \return appropriately scaled RSSI dBm
00994  */
00995 static int8_t rf_if_scale_rssi(uint8_t ed_level)
00996 {
00997   if (rf_part_num == PART_AT86RF212) {
00998     /* Data sheet says to multiply by 1.03 - this is 1.03125, rounding down */
00999     ed_level += ed_level >> 5;
01000   }
01001   return rf_rssi_base_val + ed_level;
01002 }
01003 
01004 /*
01005  * \brief Function sets the RF channel field
01006  *
01007  * \param Given channel
01008  *
01009  * \return none
01010  */
01011 static void rf_if_set_channel_register(uint8_t channel)
01012 {
01013   rf_if_set_bit(PHY_CC_CCA, channel, CCA_CHANNEL_MASK);
01014 }
01015 
01016 /*
01017  * \brief Function enables RF irq pin interrupts in RF interface.
01018  *
01019  * \param none
01020  *
01021  * \return none
01022  */
01023 static void rf_if_enable_irq(void)
01024 {
01025   rf->IRQ.enable_irq();
01026 }
01027 
01028 /*
01029  * \brief Function disables RF irq pin interrupts in RF interface.
01030  *
01031  * \param none
01032  *
01033  * \return none
01034  */
01035 static void rf_if_disable_irq(void)
01036 {
01037   rf->IRQ.disable_irq();
01038 }
01039 
01040 #ifdef MBED_CONF_RTOS_PRESENT
01041 static void rf_if_interrupt_handler(void)
01042 {
01043     rf->irq_thread.signal_set(SIG_RADIO);
01044 }
01045 
01046 // Started during construction of rf, so variable
01047 // rf isn't set at the start. Uses 'this' instead.
01048 void RFBits::rf_if_irq_task(void)
01049 {
01050     for (;;) {
01051         osEvent event = irq_thread.signal_wait(0);
01052         if (event.status != osEventSignal) {
01053             continue;
01054         }
01055         rf_if_lock();
01056         if (event.value.signals & SIG_RADIO) {
01057             rf_if_irq_task_process_irq();
01058         }
01059         if (event.value.signals & SIG_TIMER_ACK) {
01060             rf_ack_wait_timer_interrupt();
01061         }
01062         if (event.value.signals & SIG_TIMER_CCA) {
01063             rf_cca_timer_interrupt();
01064         }
01065         if (event.value.signals & SIG_TIMER_CAL) {
01066             rf_calibration_timer_interrupt();
01067         }
01068         rf_if_unlock();
01069     }
01070 }
01071 
01072 static void rf_if_irq_task_process_irq(void)
01073 #else
01074 /*
01075  * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt.
01076  *
01077  * \param none
01078  *
01079  * \return none
01080  */
01081 static void rf_if_interrupt_handler(void)
01082 #endif
01083 {
01084   static uint8_t last_is, last_ts;
01085   uint8_t irq_status, full_trx_status;
01086   uint8_t orig_xah_ctrl_1 = xah_ctrl_1;
01087 
01088   /*Read and clear interrupt flag, and pick up trx_status*/
01089   irq_status = rf_if_read_register_with_status(IRQ_STATUS, &full_trx_status);
01090   uint8_t orig_flags = rf_flags;
01091 
01092   /*Frame end interrupt (RX and TX)*/
01093   if(irq_status & TRX_END)
01094   {
01095     /*TX done interrupt*/
01096     rf_trx_states_t trx_status = rf_if_trx_status_from_full(full_trx_status);
01097     if(trx_status == PLL_ON || trx_status == TX_ARET_ON)
01098     {
01099       rf_handle_tx_end(trx_status);
01100     }
01101     /*Frame received interrupt*/
01102     else
01103     {
01104       rf_handle_rx_end(trx_status);
01105     }
01106   }
01107   if(irq_status & CCA_ED_DONE)
01108   {
01109     rf_handle_cca_ed_done(full_trx_status);
01110   }
01111   if (irq_status & TRX_UR)
01112   {
01113     tr_error("Radio underrun is %x->%x ts %x->%x fl %x->%x x1 %x", last_is, irq_status, last_ts, full_trx_status, orig_flags, rf_flags, orig_xah_ctrl_1);
01114   }
01115   last_is = irq_status;
01116   last_ts = full_trx_status;
01117 }
01118 
01119 /*
01120  * \brief Function writes/read data in SPI interface
01121  */
01122 static void rf_if_spi_exchange_n(const void *tx, size_t tx_len, void *rx, size_t rx_len)
01123 {
01124 #if 1
01125   rf->spi.write(static_cast<const char *>(tx), tx_len,
01126                 static_cast<char *>(rx), rx_len);
01127 #else
01128   const uint8_t *txb = static_cast<const uint8_t *>(tx);
01129   uint8_t *rxb = static_cast<uint8_t *>(rx);
01130   while (tx_len > 0 || rx_len > 0) {
01131       uint8_t b;
01132       if (tx_len) {
01133           tx_len--;
01134           b = *txb++;
01135       } else {
01136           b = 0xFF;
01137       }
01138       b = rf->spi.write(b);
01139       if (rx_len) {
01140           rx_len--;
01141           *rxb++ = b;
01142       }
01143   }
01144 #endif
01145 }
01146 
01147 /*
01148  * \brief Function sets given RF flag on.
01149  *
01150  * \param x Given RF flag
01151  *
01152  * \return none
01153  */
01154 static void rf_flags_set(uint8_t x)
01155 {
01156     rf_flags |= x;
01157 }
01158 
01159 /*
01160  * \brief Function clears given RF flag on.
01161  *
01162  * \param x Given RF flag
01163  *
01164  * \return none
01165  */
01166 static void rf_flags_clear(uint8_t x)
01167 {
01168     rf_flags &= ~x;
01169 }
01170 
01171 /*
01172  * \brief Function checks if given RF flag is on.
01173  *
01174  * \param x Given RF flag
01175  *
01176  * \return states of the given flags
01177  */
01178 static uint8_t rf_flags_check(uint8_t x)
01179 {
01180     return (rf_flags & x);
01181 }
01182 
01183 /*
01184  * \brief Function clears all RF flags.
01185  *
01186  * \param none
01187  *
01188  * \return none
01189  */
01190 static void rf_flags_reset(void)
01191 {
01192     rf_flags = 0;
01193 }
01194 
01195 /*
01196  * \brief Function initialises and registers the RF driver.
01197  *
01198  * \param none
01199  *
01200  * \return rf_radio_driver_id Driver ID given by NET library
01201  */
01202 static int8_t rf_device_register(const uint8_t *mac_addr)
01203 {
01204     rf_trx_part_e radio_type;
01205 
01206     rf_init();
01207 
01208     radio_type = rf_radio_type_read();
01209     if(radio_type != ATMEL_UNKNOW_DEV)
01210     {
01211         /*Set pointer to MAC address*/
01212         device_driver.PHY_MAC = (uint8_t *)mac_addr;
01213         device_driver.driver_description = (char*)"ATMEL_MAC";
01214         //Create setup Used Radio chips
01215         if(radio_type == ATMEL_AT86RF212)
01216         {
01217             device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
01218         }
01219         else
01220         {
01221             device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
01222         }
01223         device_driver.phy_channel_pages = phy_channel_pages;
01224         /*Maximum size of payload is 127*/
01225         device_driver.phy_MTU = 127;
01226         /*No header in PHY*/
01227         device_driver.phy_header_length = 0;
01228         /*No tail in PHY*/
01229         device_driver.phy_tail_length = 0;
01230         /*Set address write function*/
01231         device_driver.address_write = &rf_address_write;
01232         /*Set RF extension function*/
01233         device_driver.extension = &rf_extension;
01234         /*Set RF state control function*/
01235         device_driver.state_control = &rf_interface_state_control;
01236         /*Set transmit function*/
01237         device_driver.tx = &rf_start_cca;
01238         /*NULLIFY rx and tx_done callbacks*/
01239         device_driver.phy_rx_cb = NULL;
01240         device_driver.phy_tx_done_cb = NULL;
01241         /*Register device driver*/
01242         rf_radio_driver_id = arm_net_phy_register(&device_driver);
01243     } else {
01244         rf_if_disable_irq();
01245     }
01246     return rf_radio_driver_id;
01247 }
01248 
01249 /*
01250  * \brief Function unregisters the RF driver.
01251  *
01252  * \param none
01253  *
01254  * \return none
01255  */
01256 static void rf_device_unregister()
01257 {
01258     if (rf_radio_driver_id >= 0) {
01259         arm_net_phy_unregister(rf_radio_driver_id);
01260         rf_radio_driver_id = -1;
01261     }
01262 }
01263 
01264 
01265 /*
01266  * \brief Function is a call back for ACK wait timeout.
01267  *
01268  * \param none
01269  *
01270  * \return none
01271  */
01272 static void rf_ack_wait_timer_interrupt(void)
01273 {
01274     rf_if_lock();
01275     rf_give_up_on_ack();
01276     rf_if_unlock();
01277 }
01278 
01279 /*
01280  * \brief Function is a call back for calibration interval timer.
01281  *
01282  * \param none
01283  *
01284  * \return none
01285  */
01286 static void rf_calibration_timer_interrupt(void)
01287 {
01288     /*Calibrate RF*/
01289     rf_calibration_cb();
01290     /*Start new calibration timeout*/
01291     rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
01292 }
01293 
01294 /*
01295  * \brief Function is a call back for cca interval timer.
01296  *
01297  * \param none
01298  *
01299  * \return none
01300  */
01301 static void rf_cca_timer_interrupt(void)
01302 {
01303     rf_flags_set(RFF_CCA);
01304     /*Start CCA process*/
01305     rf_if_start_cca_process();
01306 }
01307 
01308 /*
01309  * \brief Function starts the ACK wait timeout.
01310  *
01311  * \param slots Given slots, resolution 50us
01312  *
01313  * \return none
01314  */
01315 static void rf_ack_wait_timer_start(uint16_t slots)
01316 {
01317     rf_if_ack_wait_timer_start(slots);
01318 }
01319 
01320 /*
01321  * \brief Function starts the calibration interval.
01322  *
01323  * \param slots Given slots, resolution 50us
01324  *
01325  * \return none
01326  */
01327 static void rf_calibration_timer_start(uint32_t slots)
01328 {
01329     rf_if_calibration_timer_start(slots);
01330 }
01331 
01332 /*
01333  * \brief Function starts the CCA backoff.
01334  *
01335  * \param slots Given slots, resolution 50us
01336  *
01337  * \return none
01338  */
01339 static void rf_cca_timer_start(uint32_t slots)
01340 {
01341     rf_if_cca_timer_start(slots);
01342 }
01343 
01344 /*
01345  * \brief Function stops the CCA backoff.
01346  *
01347  * \return none
01348  */
01349 static void rf_cca_timer_stop(void)
01350 {
01351     rf_if_cca_timer_stop();
01352 }
01353 
01354 /*
01355  * \brief Function writes various RF settings in startup.
01356  *
01357  * \param none
01358  *
01359  * \return none
01360  */
01361 static void rf_write_settings(void)
01362 {
01363     rf_if_lock();
01364     rf_if_write_rf_settings();
01365     /*Set output power*/
01366     rf_if_write_set_tx_power_register(radio_tx_power);
01367     /*Initialise Antenna Diversity*/
01368     if(rf_use_antenna_diversity)
01369         rf_if_write_antenna_diversity_settings();
01370     rf_if_unlock();
01371 }
01372 
01373 /*
01374  * \brief Function writes 16-bit address in RF address filter.
01375  *
01376  * \param short_address Given short address
01377  *
01378  * \return none
01379  */
01380 static void rf_set_short_adr(uint8_t * short_address)
01381 {
01382     rf_if_lock();
01383     /*Wake up RF if sleeping*/
01384     if(rf_flags_check(RFF_ON) == 0)
01385     {
01386         rf_if_disable_slptr();
01387         rf_poll_trx_state_change(TRX_OFF);
01388     }
01389     /*Write address filter registers*/
01390     rf_if_write_short_addr_registers(short_address);
01391     /*RF back to sleep*/
01392     if(rf_flags_check(RFF_ON) == 0)
01393     {
01394         rf_if_enable_slptr();
01395     }
01396     rf_if_unlock();
01397 }
01398 
01399 /*
01400  * \brief Function writes PAN Id in RF PAN Id filter.
01401  *
01402  * \param pan_id Given PAN Id
01403  *
01404  * \return none
01405  */
01406 static void rf_set_pan_id(uint8_t *pan_id)
01407 {
01408     rf_if_lock();
01409     /*Wake up RF if sleeping*/
01410     if(rf_flags_check(RFF_ON) == 0)
01411     {
01412         rf_if_disable_slptr();
01413         rf_poll_trx_state_change(TRX_OFF);
01414     }
01415     /*Write address filter registers*/
01416     rf_if_write_pan_id_registers(pan_id);
01417     /*RF back to sleep*/
01418     if(rf_flags_check(RFF_ON) == 0)
01419     {
01420         rf_if_enable_slptr();
01421     }
01422     rf_if_unlock();
01423 }
01424 
01425 /*
01426  * \brief Function writes 64-bit address in RF address filter.
01427  *
01428  * \param address Given 64-bit address
01429  *
01430  * \return none
01431  */
01432 static void rf_set_address(uint8_t *address)
01433 {
01434     rf_if_lock();
01435     /*Wake up RF if sleeping*/
01436     if(rf_flags_check(RFF_ON) == 0)
01437     {
01438         rf_if_disable_slptr();
01439         rf_poll_trx_state_change(TRX_OFF);
01440     }
01441     /*Write address filter registers*/
01442     rf_if_write_ieee_addr_registers(address);
01443     /*RF back to sleep*/
01444     if(rf_flags_check(RFF_ON) == 0)
01445     {
01446         rf_if_enable_slptr();
01447     }
01448     rf_if_unlock();
01449 }
01450 
01451 /*
01452  * \brief Function sets the RF channel.
01453  *
01454  * \param ch New channel
01455  *
01456  * \return none
01457  */
01458 static void rf_channel_set(uint8_t ch)
01459 {
01460     rf_if_lock();
01461     rf_phy_channel = ch;
01462     if(ch < 0x1f)
01463         rf_if_set_channel_register(ch);
01464     rf_if_unlock();
01465 }
01466 
01467 
01468 /*
01469  * \brief Function initialises the radio driver and resets the radio.
01470  *
01471  * \param none
01472  *
01473  * \return none
01474  */
01475 static void rf_init(void)
01476 {
01477     rf_if_lock();
01478 
01479     /*Write RF settings*/
01480     rf_write_settings();
01481     /*Initialise PHY mode*/
01482     rf_init_phy_mode();
01483     /*Clear RF flags*/
01484     rf_flags_reset();
01485     /*Set RF in TRX OFF state*/
01486     rf_if_change_trx_state(TRX_OFF);
01487     /*Set RF in PLL_ON state*/
01488     rf_trx_states_t trx_status = rf_if_change_trx_state(PLL_ON);
01489     /*Start receiver*/
01490     rf_receive(trx_status);
01491     /*Read randomness, and add to seed*/
01492     randLIB_add_seed(rf_if_read_rnd());
01493     /*Start RF calibration timer*/
01494     rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
01495 
01496     rf_if_unlock();
01497 }
01498 
01499 /**
01500  * \brief Function gets called when MAC is setting radio off.
01501  *
01502  * \param none
01503  *
01504  * \return none
01505  */
01506 static void rf_off(void)
01507 {
01508     if(rf_flags_check(RFF_ON))
01509     {
01510         rf_if_lock();
01511         rf_cca_abort();
01512         uint16_t while_counter = 0;
01513         /*Wait while receiving*/
01514         while(rf_if_read_trx_state() == BUSY_RX_AACK)
01515         {
01516             while_counter++;
01517             if(while_counter == 0xffff)
01518                 break;
01519         }
01520         /*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/
01521         if(rf_if_read_trx_state() == RX_AACK_ON)
01522         {
01523             rf_if_change_trx_state(PLL_ON);
01524         }
01525         rf_if_change_trx_state(TRX_OFF);
01526         rf_if_enable_slptr();
01527 
01528         /*Disable Antenna Diversity*/
01529         if(rf_use_antenna_diversity)
01530             rf_if_disable_ant_div();
01531         rf_if_unlock();
01532     }
01533 
01534     /*Clears all flags*/
01535     rf_flags_reset();
01536 }
01537 
01538 /*
01539  * \brief Function polls the RF state until it has changed to desired state.
01540  *
01541  * \param trx_state RF state
01542  *
01543  * \return none
01544  */
01545 static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state)
01546 {
01547     uint16_t while_counter = 0;
01548 
01549     if(trx_state == FORCE_PLL_ON)
01550         trx_state = PLL_ON;
01551     else if(trx_state == FORCE_TRX_OFF)
01552         trx_state = TRX_OFF;
01553 
01554     rf_trx_states_t state_out;
01555     while((state_out = rf_if_read_trx_state()) != trx_state)
01556     {
01557         while_counter++;
01558         if(while_counter == 0x1ff)
01559             break;
01560     }
01561 
01562     return state_out;
01563 }
01564 
01565 /*
01566  * \brief Function polls the RF state until it is no longer transitioning.
01567  *
01568  * \param trx_state RF state
01569  *
01570  * \return none
01571  */
01572 static rf_trx_states_t rf_poll_for_state(void)
01573 {
01574     rf_trx_states_t state_out;
01575     while((state_out = rf_if_read_trx_state()) == STATE_TRANSITION_IN_PROGRESS)
01576     {
01577     }
01578 
01579     return state_out;
01580 }
01581 
01582 /*
01583  * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
01584  *
01585  * \param data_ptr Pointer to TX data (excluding FCS)
01586  * \param data_length Length of the TX data (excluding FCS)
01587  * \param tx_handle Handle to transmission
01588  * \return 0 Success
01589  * \return -1 Busy
01590  */
01591 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol )
01592 {
01593     (void)data_protocol;
01594     rf_if_lock();
01595     /*Check if transmitter is busy*/
01596     rf_trx_states_t trx_state = rf_if_read_trx_state();
01597     if(trx_state == BUSY_RX || trx_state == BUSY_RX_AACK || data_length > RF_MTU - 2)
01598     {
01599         rf_if_unlock();
01600         /*Return busy*/
01601         return -1;
01602     }
01603     else
01604     {
01605         rf_give_up_on_ack();
01606 
01607         /*Nanostack has a static TX buffer, which will remain valid until we*/
01608         /*generate a callback, so we just note the pointer for reading later.*/
01609         rf_tx_data = data_ptr;
01610         rf_tx_length = data_length;
01611         /*Start CCA timeout*/
01612         rf_cca_timer_start(RF_CCA_BASE_BACKOFF + randLIB_get_random_in_range(0, RF_CCA_RANDOM_BACKOFF));
01613         /*Store TX handle*/
01614         mac_tx_handle = tx_handle;
01615         rf_if_unlock();
01616     }
01617 
01618     /*Return success*/
01619     return 0;
01620 }
01621 
01622 /*
01623  * \brief Function aborts CCA process.
01624  *
01625  * \param none
01626  *
01627  * \return none
01628  */
01629 static void rf_cca_abort(void)
01630 {
01631     rf_cca_timer_stop();
01632     rf_flags_clear(RFF_CCA);
01633 }
01634 
01635 /*
01636  * \brief Function starts the transmission of the frame.
01637  *
01638  * \param none
01639  *
01640  * \return none
01641  */
01642 static bool rf_start_tx()
01643 {
01644     /* Attempt change to PLL_ON */
01645     rf_if_write_register(TRX_STATE, PLL_ON);
01646 
01647     // It appears that if radio is busy, rather than ignoring the state change,
01648     // the state change happens when it stops being busy - eg
01649     // after address match fail or finishing reception. If this happens, we do
01650     // not want to transmit - our channel clear check is stale (either someone is
01651     // still transmitting, or it's a long time since we checked). So wait for the
01652     // PLL_ON change and then go to receive mode without trying to transmit.
01653     rf_trx_states_t state = rf_poll_for_state();
01654     int poll_count = 0;
01655     while (state != PLL_ON) {
01656         /* Change didn't work (yet) - must be busy - assume it will eventually change */
01657         state = rf_poll_for_state();
01658         poll_count++;
01659     }
01660 
01661     rf_flags_clear(RFF_RX);
01662     // Check whether we saw any delay in the PLL_ON transition.
01663     if (poll_count > 0) {
01664         tr_warning("PLL_ON delayed, retry count: %d", poll_count);
01665         // let's get back to the receiving state.
01666         rf_receive(state);
01667         return false;
01668     }
01669 
01670     rf_flags_set(RFF_TX);
01671     /*RF state change: SLP_TR pulse triggers PLL_ON->BUSY_TX*/
01672     rf_if_enable_slptr();
01673     /*Chip permits us to write frame buffer while it is transmitting*/
01674     /*As long as first byte of data is in within 176us of TX start, we're good */
01675     rf_if_write_frame_buffer(rf_tx_data, rf_tx_length);
01676     rf_if_disable_slptr();
01677     return true;
01678 }
01679 
01680 /*
01681  * \brief Function sets the RF in RX state.
01682  *
01683  * \param none
01684  *
01685  * \return none
01686  */
01687 static void rf_receive(rf_trx_states_t trx_status)
01688 {
01689     uint16_t while_counter = 0;
01690     if(rf_flags_check(RFF_ON) == 0)
01691     {
01692         rf_on();
01693         rf_channel_set(rf_phy_channel);
01694         trx_status = TRX_OFF;
01695     }
01696     /*If not yet in RX state set it*/
01697     if(rf_flags_check(RFF_RX) == 0)
01698     {
01699         /*Wait while receiving data. Just making sure, usually this shouldn't happen. */
01700         while(trx_status == BUSY_RX || trx_status == BUSY_RX_AACK || trx_status == STATE_TRANSITION_IN_PROGRESS)
01701         {
01702             while_counter++;
01703             if(while_counter == 0xffff)
01704             {
01705                 break;
01706             }
01707             trx_status = rf_if_read_trx_state();
01708         }
01709 
01710         if((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED))
01711         {
01712             if (trx_status != RX_ON) {
01713                 trx_status = rf_if_change_trx_state(RX_ON);
01714             }
01715         }
01716         else
01717         {
01718             /*ACK is always received in promiscuous mode to bypass address filters*/
01719             if(rf_rx_mode)
01720             {
01721                 rf_rx_mode = 0;
01722                 rf_if_enable_promiscuous_mode();
01723             }
01724             else
01725             {
01726                 rf_if_disable_promiscuous_mode();
01727             }
01728             if (trx_status != RX_AACK_ON) {
01729                 trx_status = rf_if_change_trx_state(RX_AACK_ON);
01730             }
01731         }
01732         /*If calibration timer was unable to calibrate the RF, run calibration now*/
01733         if(!rf_tuned)
01734         {
01735             /*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/
01736             rf_if_calibration();
01737             /*RF is tuned now*/
01738             rf_tuned = 1;
01739         }
01740 
01741         rf_flags_set(RFF_RX);
01742     }
01743 }
01744 
01745 /*
01746  * \brief Function calibrates the radio.
01747  *
01748  * \param none
01749  *
01750  * \return none
01751  */
01752 static void rf_calibration_cb(void)
01753 {
01754     /*clear tuned flag to start tuning in rf_receive*/
01755     rf_tuned = 0;
01756     /*If RF is in default receive state, start calibration*/
01757     if(rf_if_read_trx_state() == RX_AACK_ON)
01758     {
01759         rf_if_lock();
01760         /*Set RF in PLL_ON state*/
01761         rf_if_change_trx_state(PLL_ON);
01762         /*Set RF in TRX_OFF state to start PLL tuning*/
01763         rf_if_change_trx_state(TRX_OFF);
01764         /*Set RF in RX_ON state to calibrate*/
01765         rf_trx_states_t trx_status = rf_if_change_trx_state(RX_ON);
01766         /*Calibrate FTN*/
01767         rf_if_calibration();
01768         /*RF is tuned now*/
01769         rf_tuned = 1;
01770         /*Back to default receive state*/
01771         rf_flags_clear(RFF_RX);
01772         rf_receive(trx_status);
01773         rf_if_unlock();
01774     }
01775 }
01776 
01777 /*
01778  * \brief Function sets RF_ON flag when radio is powered.
01779  *
01780  * \param none
01781  *
01782  * \return none
01783  */
01784 static void rf_on(void)
01785 {
01786     /*Set RFF_ON flag*/
01787     if(rf_flags_check(RFF_ON) == 0)
01788     {
01789         rf_if_lock();
01790         rf_flags_set(RFF_ON);
01791         /*Enable Antenna diversity*/
01792         if(rf_use_antenna_diversity)
01793             /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
01794             rf_if_enable_ant_div();
01795 
01796         /*Wake up from sleep state*/
01797         rf_if_disable_slptr();
01798         rf_poll_trx_state_change(TRX_OFF);
01799         rf_if_unlock();
01800     }
01801 }
01802 
01803 /*
01804  * \brief Abandon waiting for an ack frame
01805 
01806  * \return none
01807  */
01808 static void rf_give_up_on_ack(void)
01809 {
01810     if (expected_ack_sequence == -1) {
01811         return;
01812     }
01813 
01814     rf_if_disable_promiscuous_mode();
01815     rf_if_ack_wait_timer_stop();
01816     expected_ack_sequence = -1;
01817 
01818     if(device_driver.phy_tx_done_cb){
01819         device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_FAIL, 0, 0);
01820     }
01821 }
01822 
01823 /*
01824  * \brief Function handles the received ACK frame.
01825  *
01826  * \param seq_number Sequence number of received ACK
01827  * \param data_pending Pending bit state in received ACK
01828  *
01829  * \return none
01830  */
01831 static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending)
01832 {
01833     phy_link_tx_status_e phy_status;
01834     /*Received ACK sequence must be equal with transmitted packet sequence*/
01835     if(expected_ack_sequence == seq_number)
01836     {
01837         rf_if_disable_promiscuous_mode();
01838         rf_if_ack_wait_timer_stop();
01839         expected_ack_sequence = -1;
01840 
01841         /*When data pending bit in ACK frame is set, inform NET library*/
01842         if(data_pending)
01843             phy_status = PHY_LINK_TX_DONE_PENDING;
01844         else
01845             phy_status = PHY_LINK_TX_DONE;
01846         /*Call PHY TX Done API*/
01847         if(device_driver.phy_tx_done_cb){
01848             device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle,phy_status, 0, 0);
01849         }
01850     } else {
01851         rf_give_up_on_ack();
01852     }
01853 }
01854 
01855 /*
01856  * \brief Function is a call back for RX end interrupt.
01857  *
01858  * \param none
01859  *
01860  * \return none
01861  */
01862 static void rf_handle_rx_end(rf_trx_states_t trx_status)
01863 {
01864     /*Frame received interrupt*/
01865     if(!rf_flags_check(RFF_RX)) {
01866         return;
01867     }
01868 
01869     static uint8_t rf_buffer[RF_MTU];
01870     uint8_t rf_lqi, rf_ed;
01871     int8_t rf_rssi;
01872     bool crc_good;
01873 
01874     /*Read received packet*/
01875     uint8_t len = rf_if_read_packet(rf_buffer, &rf_lqi, &rf_ed, &crc_good);
01876 
01877     if (len < 5 || !crc_good) {
01878         rf_give_up_on_ack();
01879         return;
01880     }
01881 
01882     /* Convert raw ED to dBm value (chip-dependent) */
01883     rf_rssi = rf_if_scale_rssi(rf_ed);
01884 
01885     /* Create a virtual LQI using received RSSI, forgetting actual HW LQI */
01886     /* (should be done through PHY_EXTENSION_CONVERT_SIGNAL_INFO) */
01887     rf_lqi = rf_scale_lqi(rf_rssi);
01888 
01889     /*Handle received ACK*/
01890     if((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER)
01891     {
01892         /*Check if data is pending*/
01893         bool pending = (rf_buffer[0] & 0x10);
01894 
01895         /*Send sequence number in ACK handler*/
01896         rf_handle_ack(rf_buffer[2], pending);
01897     } else {
01898         rf_give_up_on_ack();
01899         if( device_driver.phy_rx_cb ){
01900             device_driver.phy_rx_cb(rf_buffer, len - 2, rf_lqi, rf_rssi, rf_radio_driver_id);
01901         }
01902     }
01903 }
01904 
01905 /*
01906  * \brief Function is called when MAC is shutting down the radio.
01907  *
01908  * \param none
01909  *
01910  * \return none
01911  */
01912 static void rf_shutdown(void)
01913 {
01914     /*Call RF OFF*/
01915     rf_off();
01916 }
01917 
01918 /*
01919  * \brief Function is a call back for TX end interrupt.
01920  *
01921  * \param none
01922  *
01923  * \return none
01924  */
01925 static void rf_handle_tx_end(rf_trx_states_t trx_status)
01926 {
01927     rf_rx_mode = 0;
01928     /*If ACK is needed for this transmission*/
01929     if((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX))
01930     {
01931         expected_ack_sequence = rf_tx_data[2];
01932         rf_ack_wait_timer_start(rf_ack_wait_duration);
01933         rf_rx_mode = 1;
01934     }
01935     rf_flags_clear(RFF_TX);
01936     /*Start receiver*/
01937     rf_receive(trx_status);
01938 
01939     /*Call PHY TX Done API*/
01940     if(device_driver.phy_tx_done_cb){
01941         device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0);
01942     }
01943 }
01944 
01945 /*
01946  * \brief Function is a call back for CCA ED done interrupt.
01947  *
01948  * \param none
01949  *
01950  * \return none
01951  */
01952 static void rf_handle_cca_ed_done(uint8_t full_trx_status)
01953 {
01954     if (!rf_flags_check(RFF_CCA)) {
01955         return;
01956     }
01957     rf_flags_clear(RFF_CCA);
01958 
01959     bool success = false;
01960 
01961     /*Check the result of CCA process*/
01962     if((full_trx_status & CCA_STATUS) && rf_if_trx_status_from_full(full_trx_status) == RX_AACK_ON)
01963     {
01964         success = rf_start_tx();
01965     }
01966 
01967     if (!success)
01968     {
01969         /*Send CCA fail notification*/
01970         if(device_driver.phy_tx_done_cb){
01971             device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
01972         }
01973     }
01974 }
01975 
01976 /*
01977  * \brief Function gives the control of RF states to MAC.
01978  *
01979  * \param new_state RF state
01980  * \param rf_channel RF channel
01981  *
01982  * \return 0 Success
01983  */
01984 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
01985 {
01986     int8_t ret_val = 0;
01987     switch (new_state)
01988     {
01989         /*Reset PHY driver and set to idle*/
01990         case PHY_INTERFACE_RESET:
01991             break;
01992         /*Disable PHY Interface driver*/
01993         case PHY_INTERFACE_DOWN:
01994             rf_shutdown();
01995             break;
01996         /*Enable PHY Interface driver*/
01997         case PHY_INTERFACE_UP:
01998             rf_if_lock();
01999             rf_mode = RF_MODE_NORMAL;
02000             rf_channel_set(rf_channel);
02001             rf_receive();
02002             rf_if_enable_irq();
02003             rf_if_unlock();
02004             break;
02005         /*Enable wireless interface ED scan mode*/
02006         case PHY_INTERFACE_RX_ENERGY_STATE:
02007             rf_mode = RF_MODE_ED;
02008             rf_channel_set(rf_channel);
02009             rf_receive();
02010             rf_if_disable_irq();
02011             // Read status to clear pending flags.
02012             rf_if_read_register(IRQ_STATUS);
02013             // ED can be initiated by writing arbitrary value to PHY_ED_LEVEL
02014             rf_if_write_register(PHY_ED_LEVEL, 0xff);
02015             break;
02016         case PHY_INTERFACE_SNIFFER_STATE:             /**< Enable Sniffer state */
02017             rf_mode = RF_MODE_SNIFFER;
02018             rf_channel_set(rf_channel);
02019             rf_flags_clear(RFF_RX);
02020             rf_receive();
02021             rf_if_enable_irq();
02022             break;
02023     }
02024     return ret_val;
02025 }
02026 
02027 /*
02028  * \brief Function controls the ACK pending, channel setting and energy detection.
02029  *
02030  * \param extension_type Type of control
02031  * \param data_ptr Data from NET library
02032  *
02033  * \return 0 Success
02034  */
02035 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
02036 {
02037     switch (extension_type)
02038     {
02039         /*Control MAC pending bit for Indirect data transmission*/
02040         case PHY_EXTENSION_CTRL_PENDING_BIT:
02041             if(*data_ptr)
02042             {
02043                 rf_if_ack_pending_ctrl(1);
02044             }
02045             else
02046             {
02047                 rf_if_ack_pending_ctrl(0);
02048             }
02049             break;
02050         /*Return frame pending status*/
02051         case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
02052             *data_ptr = rf_if_last_acked_pending();
02053             break;
02054         /*Set channel*/
02055         case PHY_EXTENSION_SET_CHANNEL:
02056             break;
02057         /*Read energy on the channel*/
02058         case PHY_EXTENSION_READ_CHANNEL_ENERGY:
02059             // End of the ED measurement is indicated by CCA_ED_DONE
02060             while (!(rf_if_read_register(IRQ_STATUS) & CCA_ED_DONE));
02061             // RF input power: RSSI base level + 1[db] * PHY_ED_LEVEL
02062             *data_ptr = rf_sensitivity + rf_if_read_register(PHY_ED_LEVEL);
02063             // Read status to clear pending flags.
02064             rf_if_read_register(IRQ_STATUS);
02065             // Next ED measurement is started, next PHY_EXTENSION_READ_CHANNEL_ENERGY call will return the result.
02066             rf_if_write_register(PHY_ED_LEVEL, 0xff);
02067             break;
02068         /*Read status of the link*/
02069         case PHY_EXTENSION_READ_LINK_STATUS:
02070             break;
02071         default:
02072             break;
02073     }
02074     return 0;
02075 }
02076 
02077 /*
02078  * \brief Function sets the addresses to RF address filters.
02079  *
02080  * \param address_type Type of address
02081  * \param address_ptr Pointer to given address
02082  *
02083  * \return 0 Success
02084  */
02085 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
02086 {
02087     int8_t ret_val = 0;
02088     switch (address_type)
02089     {
02090         /*Set 48-bit address*/
02091         case PHY_MAC_48BIT:
02092             break;
02093             /*Set 64-bit address*/
02094         case PHY_MAC_64BIT:
02095             rf_set_address(address_ptr);
02096             break;
02097         /*Set 16-bit address*/
02098         case PHY_MAC_16BIT:
02099             rf_set_short_adr(address_ptr);
02100             break;
02101         /*Set PAN Id*/
02102         case PHY_MAC_PANID:
02103             rf_set_pan_id(address_ptr);
02104             break;
02105     }
02106     return ret_val;
02107 }
02108 
02109 /*
02110  * \brief Function initialises the ACK wait time and returns the used PHY mode.
02111  *
02112  * \param none
02113  *
02114  * \return tmp Used PHY mode
02115  */
02116 static void rf_init_phy_mode(void)
02117 {
02118     uint8_t tmp = 0;
02119     uint8_t part = rf_if_read_part_num();
02120     /*Read used PHY Mode*/
02121     tmp = rf_if_read_register(TRX_CTRL_2);
02122     /*Set ACK wait time for used data rate*/
02123     if(part == PART_AT86RF212)
02124     {
02125         if((tmp & 0x1f) == 0x00)
02126         {
02127             rf_sensitivity = -110;
02128             rf_ack_wait_duration = 938;
02129             tmp = BPSK_20;
02130         }
02131         else if((tmp & 0x1f) == 0x04)
02132         {
02133             rf_sensitivity = -108;
02134             rf_ack_wait_duration = 469;
02135             tmp = BPSK_40;
02136         }
02137         else if((tmp & 0x1f) == 0x14)
02138         {
02139             rf_sensitivity = -108;
02140             rf_ack_wait_duration = 469;
02141             tmp = BPSK_40_ALT;
02142         }
02143         else if((tmp & 0x1f) == 0x08)
02144         {
02145             rf_sensitivity = -101;
02146             rf_ack_wait_duration = 50;
02147             tmp = OQPSK_SIN_RC_100;
02148         }
02149         else if((tmp & 0x1f) == 0x09)
02150         {
02151             rf_sensitivity = -99;
02152             rf_ack_wait_duration = 30;
02153             tmp = OQPSK_SIN_RC_200;
02154         }
02155         else if((tmp & 0x1f) == 0x18)
02156         {
02157             rf_sensitivity = -102;
02158             rf_ack_wait_duration = 50;
02159             tmp = OQPSK_RC_100;
02160         }
02161         else if((tmp & 0x1f) == 0x19)
02162         {
02163             rf_sensitivity = -100;
02164             rf_ack_wait_duration = 30;
02165             tmp = OQPSK_RC_200;
02166         }
02167         else if((tmp & 0x1f) == 0x0c)
02168         {
02169             rf_sensitivity = -100;
02170             rf_ack_wait_duration = 20;
02171             tmp = OQPSK_SIN_250;
02172         }
02173         else if((tmp & 0x1f) == 0x0d)
02174         {
02175             rf_sensitivity = -98;
02176             rf_ack_wait_duration = 25;
02177             tmp = OQPSK_SIN_500;
02178         }
02179         else if((tmp & 0x1f) == 0x0f)
02180         {
02181             rf_sensitivity = -98;
02182             rf_ack_wait_duration = 25;
02183             tmp = OQPSK_SIN_500_ALT;
02184         }
02185         else if((tmp & 0x1f) == 0x1c)
02186         {
02187             rf_sensitivity = -101;
02188             rf_ack_wait_duration = 20;
02189             tmp = OQPSK_RC_250;
02190         }
02191         else if((tmp & 0x1f) == 0x1d)
02192         {
02193             rf_sensitivity = -99;
02194             rf_ack_wait_duration = 25;
02195             tmp = OQPSK_RC_500;
02196         }
02197         else if((tmp & 0x1f) == 0x1f)
02198         {
02199             rf_sensitivity = -99;
02200             rf_ack_wait_duration = 25;
02201             tmp = OQPSK_RC_500_ALT;
02202         }
02203         else if((tmp & 0x3f) == 0x2A)
02204         {
02205             rf_sensitivity = -91;
02206             rf_ack_wait_duration = 25;
02207             tmp = OQPSK_SIN_RC_400_SCR_ON;
02208         }
02209         else if((tmp & 0x3f) == 0x0A)
02210         {
02211             rf_sensitivity = -91;
02212             rf_ack_wait_duration = 25;
02213             tmp = OQPSK_SIN_RC_400_SCR_OFF;
02214         }
02215         else if((tmp & 0x3f) == 0x3A)
02216         {
02217             rf_sensitivity = -97;
02218             rf_ack_wait_duration = 25;
02219             tmp = OQPSK_RC_400_SCR_ON;
02220         }
02221         else if((tmp & 0x3f) == 0x1A)
02222         {
02223             rf_sensitivity = -97;
02224             rf_ack_wait_duration = 25;
02225             tmp = OQPSK_RC_400_SCR_OFF;
02226         }
02227         else if((tmp & 0x3f) == 0x2E)
02228         {
02229             rf_sensitivity = -93;
02230             rf_ack_wait_duration = 13;
02231             tmp = OQPSK_SIN_1000_SCR_ON;
02232         }
02233         else if((tmp & 0x3f) == 0x0E)
02234         {
02235             rf_sensitivity = -93;
02236             rf_ack_wait_duration = 13;
02237             tmp = OQPSK_SIN_1000_SCR_OFF;
02238         }
02239         else if((tmp & 0x3f) == 0x3E)
02240         {
02241             rf_sensitivity = -95;
02242             rf_ack_wait_duration = 13;
02243             tmp = OQPSK_RC_1000_SCR_ON;
02244         }
02245         else if((tmp & 0x3f) == 0x1E)
02246         {
02247             rf_sensitivity = -95;
02248             rf_ack_wait_duration = 13;
02249             tmp = OQPSK_RC_1000_SCR_OFF;
02250         }
02251     }
02252     else
02253     {
02254         rf_sensitivity = -101;
02255         rf_ack_wait_duration = 20;
02256     }
02257     /*Board design might reduces the sensitivity*/
02258     //rf_sensitivity += RF_SENSITIVITY_CALIBRATION;
02259 }
02260 
02261 
02262 static uint8_t rf_scale_lqi(int8_t rssi)
02263 {
02264     uint8_t scaled_lqi;
02265 
02266     /*rssi < RF sensitivity*/
02267     if(rssi < rf_sensitivity)
02268         scaled_lqi=0;
02269     /*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/
02270     /*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/
02271     else if(rssi < (rf_sensitivity + 10))
02272         scaled_lqi=31;
02273     /*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/
02274     /*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/
02275     else if(rssi < (rf_sensitivity + 20))
02276         scaled_lqi=207;
02277     /*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/
02278     /*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/
02279     else if(rssi < (rf_sensitivity + 30))
02280         scaled_lqi=255;
02281     /*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/
02282     /*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/
02283     else if(rssi < (rf_sensitivity + 40))
02284         scaled_lqi=255;
02285     /*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/
02286     /*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/
02287     else if(rssi < (rf_sensitivity + 50))
02288         scaled_lqi=255;
02289     /*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/
02290     /*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/
02291     else if(rssi < (rf_sensitivity + 60))
02292         scaled_lqi=255;
02293     /*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/
02294     /*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/
02295     else if(rssi < (rf_sensitivity + 70))
02296         scaled_lqi=255;
02297     /*rssi > RF saturation*/
02298     else if(rssi > (rf_sensitivity + 80))
02299         scaled_lqi=111;
02300     /*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/
02301     /*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/
02302     else
02303         scaled_lqi=255;
02304 
02305     return scaled_lqi;
02306 }
02307 
02308 NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso,
02309         PinName spi_sclk, PinName spi_cs,  PinName spi_rst, PinName spi_slp, PinName spi_irq,
02310         PinName i2c_sda, PinName i2c_scl)
02311     : _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _mac_set(false),
02312       _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk),
02313       _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq)
02314 {
02315     _rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq);
02316 }
02317 
02318 NanostackRfPhyAtmel::~NanostackRfPhyAtmel()
02319 {
02320     delete _rf;
02321 }
02322 
02323 int8_t NanostackRfPhyAtmel::rf_register()
02324 {
02325     if (NULL == _rf) {
02326         return -1;
02327     }
02328 
02329     rf_if_lock();
02330 
02331     if (rf != NULL) {
02332         rf_if_unlock();
02333         error("Multiple registrations of NanostackRfPhyAtmel not supported");
02334         return -1;
02335     }
02336 
02337     // Read the mac address if it hasn't been set by a user
02338     rf = _rf;
02339     if (!_mac_set) {
02340         int ret = _mac.read_eui64((void*)_mac_addr);
02341         if (ret < 0) {
02342             rf = NULL;
02343             rf_if_unlock();
02344             return -1;
02345         }
02346     }
02347 
02348     int8_t radio_id = rf_device_register(_mac_addr);
02349     if (radio_id < 0) {
02350         rf = NULL;
02351     }
02352 
02353     rf_if_unlock();
02354     return radio_id;
02355 }
02356 
02357 void NanostackRfPhyAtmel::rf_unregister()
02358 {
02359     rf_if_lock();
02360 
02361     if (NULL == rf) {
02362         rf_if_unlock();
02363         return;
02364     }
02365 
02366     rf_device_unregister();
02367     rf = NULL;
02368 
02369     rf_if_unlock();
02370 }
02371 
02372 void NanostackRfPhyAtmel::get_mac_address(uint8_t *mac)
02373 {
02374     rf_if_lock();
02375 
02376     if (NULL == rf) {
02377         error("NanostackRfPhyAtmel Must be registered to read mac address");
02378         rf_if_unlock();
02379         return;
02380     }
02381     memcpy((void*)mac, (void*)_mac_addr, sizeof(_mac_addr));
02382 
02383     rf_if_unlock();
02384 }
02385 
02386 void NanostackRfPhyAtmel::set_mac_address(uint8_t *mac)
02387 {
02388     rf_if_lock();
02389 
02390     if (NULL != rf) {
02391         error("NanostackRfPhyAtmel cannot change mac address when running");
02392         rf_if_unlock();
02393         return;
02394     }
02395     memcpy((void*)_mac_addr, (void*)mac, sizeof(_mac_addr));
02396     _mac_set = true;
02397 
02398     rf_if_unlock();
02399 }
02400 
02401 #if MBED_CONF_ATMEL_RF_PROVIDE_DEFAULT
02402 
02403 NanostackRfPhy &NanostackRfPhy::get_default_instance()
02404 {
02405   static NanostackRfPhyAtmel rf_phy(ATMEL_SPI_MOSI, ATMEL_SPI_MISO, ATMEL_SPI_SCLK, ATMEL_SPI_CS,
02406                            ATMEL_SPI_RST, ATMEL_SPI_SLP, ATMEL_SPI_IRQ, ATMEL_I2C_SDA, ATMEL_I2C_SCL);
02407   return rf_phy;
02408 }
02409 
02410 #endif // MBED_CONF_ATMEL_RF_PROVIDE_DEFAULT
02411 
02412 #endif // MBED_CONF_NANOSTACK_CONFIGURATION