takashi kadono / Mbed OS Nucleo_446

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/drivers/I2C.cpp@0:8fdf9a60065b, 2018-10-10 (annotated)

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /* mbed Microcontroller Library
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2006-2015 ARM Limited
kadonotakashi 0:8fdf9a60065b 3 *
kadonotakashi 0:8fdf9a60065b 4 * Licensed under the Apache License, Version 2.0 (the "License");
kadonotakashi 0:8fdf9a60065b 5 * you may not use this file except in compliance with the License.
kadonotakashi 0:8fdf9a60065b 6 * You may obtain a copy of the License at
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * http://www.apache.org/licenses/LICENSE-2.0
kadonotakashi 0:8fdf9a60065b 9 *
kadonotakashi 0:8fdf9a60065b 10 * Unless required by applicable law or agreed to in writing, software
kadonotakashi 0:8fdf9a60065b 11 * distributed under the License is distributed on an "AS IS" BASIS,
kadonotakashi 0:8fdf9a60065b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kadonotakashi 0:8fdf9a60065b 13 * See the License for the specific language governing permissions and
kadonotakashi 0:8fdf9a60065b 14 * limitations under the License.
kadonotakashi 0:8fdf9a60065b 15 */
kadonotakashi 0:8fdf9a60065b 16
kadonotakashi 0:8fdf9a60065b 17 #include "drivers/I2C.h"
kadonotakashi 0:8fdf9a60065b 18 #include "drivers/DigitalInOut.h"
kadonotakashi 0:8fdf9a60065b 19 #include "platform/mbed_wait_api.h"
kadonotakashi 0:8fdf9a60065b 20
kadonotakashi 0:8fdf9a60065b 21 #if DEVICE_I2C
kadonotakashi 0:8fdf9a60065b 22
kadonotakashi 0:8fdf9a60065b 23 #if DEVICE_I2C_ASYNCH
kadonotakashi 0:8fdf9a60065b 24 #include "platform/mbed_power_mgmt.h"
kadonotakashi 0:8fdf9a60065b 25 #endif
kadonotakashi 0:8fdf9a60065b 26
kadonotakashi 0:8fdf9a60065b 27 namespace mbed {
kadonotakashi 0:8fdf9a60065b 28
kadonotakashi 0:8fdf9a60065b 29 I2C *I2C::_owner = NULL;
kadonotakashi 0:8fdf9a60065b 30 SingletonPtr<PlatformMutex> I2C::_mutex;
kadonotakashi 0:8fdf9a60065b 31
kadonotakashi 0:8fdf9a60065b 32 I2C::I2C(PinName sda, PinName scl) :
kadonotakashi 0:8fdf9a60065b 33 #if DEVICE_I2C_ASYNCH
kadonotakashi 0:8fdf9a60065b 34 _irq(this), _usage(DMA_USAGE_NEVER), _deep_sleep_locked(false),
kadonotakashi 0:8fdf9a60065b 35 #endif
kadonotakashi 0:8fdf9a60065b 36 _i2c(), _hz(100000)
kadonotakashi 0:8fdf9a60065b 37 {
kadonotakashi 0:8fdf9a60065b 38 lock();
kadonotakashi 0:8fdf9a60065b 39 // The init function also set the frequency to 100000
kadonotakashi 0:8fdf9a60065b 40 _sda = sda;
kadonotakashi 0:8fdf9a60065b 41 _scl = scl;
kadonotakashi 0:8fdf9a60065b 42 recover(sda, scl);
kadonotakashi 0:8fdf9a60065b 43 i2c_init(&_i2c, _sda, _scl);
kadonotakashi 0:8fdf9a60065b 44 // Used to avoid unnecessary frequency updates
kadonotakashi 0:8fdf9a60065b 45 _owner = this;
kadonotakashi 0:8fdf9a60065b 46 unlock();
kadonotakashi 0:8fdf9a60065b 47 }
kadonotakashi 0:8fdf9a60065b 48
kadonotakashi 0:8fdf9a60065b 49 void I2C::frequency(int hz)
kadonotakashi 0:8fdf9a60065b 50 {
kadonotakashi 0:8fdf9a60065b 51 lock();
kadonotakashi 0:8fdf9a60065b 52 _hz = hz;
kadonotakashi 0:8fdf9a60065b 53
kadonotakashi 0:8fdf9a60065b 54 // We want to update the frequency even if we are already the bus owners
kadonotakashi 0:8fdf9a60065b 55 i2c_frequency(&_i2c, _hz);
kadonotakashi 0:8fdf9a60065b 56
kadonotakashi 0:8fdf9a60065b 57 // Updating the frequency of the bus we become the owners of it
kadonotakashi 0:8fdf9a60065b 58 _owner = this;
kadonotakashi 0:8fdf9a60065b 59 unlock();
kadonotakashi 0:8fdf9a60065b 60 }
kadonotakashi 0:8fdf9a60065b 61
kadonotakashi 0:8fdf9a60065b 62 void I2C::aquire()
kadonotakashi 0:8fdf9a60065b 63 {
kadonotakashi 0:8fdf9a60065b 64 lock();
kadonotakashi 0:8fdf9a60065b 65 if (_owner != this) {
kadonotakashi 0:8fdf9a60065b 66 i2c_frequency(&_i2c, _hz);
kadonotakashi 0:8fdf9a60065b 67 _owner = this;
kadonotakashi 0:8fdf9a60065b 68 }
kadonotakashi 0:8fdf9a60065b 69 unlock();
kadonotakashi 0:8fdf9a60065b 70 }
kadonotakashi 0:8fdf9a60065b 71
kadonotakashi 0:8fdf9a60065b 72 // write - Master Transmitter Mode
kadonotakashi 0:8fdf9a60065b 73 int I2C::write(int address, const char *data, int length, bool repeated)
kadonotakashi 0:8fdf9a60065b 74 {
kadonotakashi 0:8fdf9a60065b 75 lock();
kadonotakashi 0:8fdf9a60065b 76 aquire();
kadonotakashi 0:8fdf9a60065b 77
kadonotakashi 0:8fdf9a60065b 78 int stop = (repeated) ? 0 : 1;
kadonotakashi 0:8fdf9a60065b 79 int written = i2c_write(&_i2c, address, data, length, stop);
kadonotakashi 0:8fdf9a60065b 80
kadonotakashi 0:8fdf9a60065b 81 unlock();
kadonotakashi 0:8fdf9a60065b 82 return length != written;
kadonotakashi 0:8fdf9a60065b 83 }
kadonotakashi 0:8fdf9a60065b 84
kadonotakashi 0:8fdf9a60065b 85 int I2C::write(int data)
kadonotakashi 0:8fdf9a60065b 86 {
kadonotakashi 0:8fdf9a60065b 87 lock();
kadonotakashi 0:8fdf9a60065b 88 int ret = i2c_byte_write(&_i2c, data);
kadonotakashi 0:8fdf9a60065b 89 unlock();
kadonotakashi 0:8fdf9a60065b 90 return ret;
kadonotakashi 0:8fdf9a60065b 91 }
kadonotakashi 0:8fdf9a60065b 92
kadonotakashi 0:8fdf9a60065b 93 // read - Master Receiver Mode
kadonotakashi 0:8fdf9a60065b 94 int I2C::read(int address, char *data, int length, bool repeated)
kadonotakashi 0:8fdf9a60065b 95 {
kadonotakashi 0:8fdf9a60065b 96 lock();
kadonotakashi 0:8fdf9a60065b 97 aquire();
kadonotakashi 0:8fdf9a60065b 98
kadonotakashi 0:8fdf9a60065b 99 int stop = (repeated) ? 0 : 1;
kadonotakashi 0:8fdf9a60065b 100 int read = i2c_read(&_i2c, address, data, length, stop);
kadonotakashi 0:8fdf9a60065b 101
kadonotakashi 0:8fdf9a60065b 102 unlock();
kadonotakashi 0:8fdf9a60065b 103 return length != read;
kadonotakashi 0:8fdf9a60065b 104 }
kadonotakashi 0:8fdf9a60065b 105
kadonotakashi 0:8fdf9a60065b 106 int I2C::read(int ack)
kadonotakashi 0:8fdf9a60065b 107 {
kadonotakashi 0:8fdf9a60065b 108 lock();
kadonotakashi 0:8fdf9a60065b 109 int ret;
kadonotakashi 0:8fdf9a60065b 110 if (ack) {
kadonotakashi 0:8fdf9a60065b 111 ret = i2c_byte_read(&_i2c, 0);
kadonotakashi 0:8fdf9a60065b 112 } else {
kadonotakashi 0:8fdf9a60065b 113 ret = i2c_byte_read(&_i2c, 1);
kadonotakashi 0:8fdf9a60065b 114 }
kadonotakashi 0:8fdf9a60065b 115 unlock();
kadonotakashi 0:8fdf9a60065b 116 return ret;
kadonotakashi 0:8fdf9a60065b 117 }
kadonotakashi 0:8fdf9a60065b 118
kadonotakashi 0:8fdf9a60065b 119 void I2C::start(void)
kadonotakashi 0:8fdf9a60065b 120 {
kadonotakashi 0:8fdf9a60065b 121 lock();
kadonotakashi 0:8fdf9a60065b 122 i2c_start(&_i2c);
kadonotakashi 0:8fdf9a60065b 123 unlock();
kadonotakashi 0:8fdf9a60065b 124 }
kadonotakashi 0:8fdf9a60065b 125
kadonotakashi 0:8fdf9a60065b 126 void I2C::stop(void)
kadonotakashi 0:8fdf9a60065b 127 {
kadonotakashi 0:8fdf9a60065b 128 lock();
kadonotakashi 0:8fdf9a60065b 129 i2c_stop(&_i2c);
kadonotakashi 0:8fdf9a60065b 130 unlock();
kadonotakashi 0:8fdf9a60065b 131 }
kadonotakashi 0:8fdf9a60065b 132
kadonotakashi 0:8fdf9a60065b 133 void I2C::lock()
kadonotakashi 0:8fdf9a60065b 134 {
kadonotakashi 0:8fdf9a60065b 135 _mutex->lock();
kadonotakashi 0:8fdf9a60065b 136 }
kadonotakashi 0:8fdf9a60065b 137
kadonotakashi 0:8fdf9a60065b 138 void I2C::unlock()
kadonotakashi 0:8fdf9a60065b 139 {
kadonotakashi 0:8fdf9a60065b 140 _mutex->unlock();
kadonotakashi 0:8fdf9a60065b 141 }
kadonotakashi 0:8fdf9a60065b 142
kadonotakashi 0:8fdf9a60065b 143 int I2C::recover(PinName sda, PinName scl)
kadonotakashi 0:8fdf9a60065b 144 {
kadonotakashi 0:8fdf9a60065b 145 DigitalInOut pin_sda(sda, PIN_INPUT, PullNone, 1);
kadonotakashi 0:8fdf9a60065b 146 DigitalInOut pin_scl(scl, PIN_INPUT, PullNone, 1);
kadonotakashi 0:8fdf9a60065b 147
kadonotakashi 0:8fdf9a60065b 148 // Return as SCL is low and no access to become master.
kadonotakashi 0:8fdf9a60065b 149 if (pin_scl == 0) {
kadonotakashi 0:8fdf9a60065b 150 return I2C_ERROR_BUS_BUSY;
kadonotakashi 0:8fdf9a60065b 151 }
kadonotakashi 0:8fdf9a60065b 152
kadonotakashi 0:8fdf9a60065b 153 // Return successfully as SDA and SCL is high
kadonotakashi 0:8fdf9a60065b 154 if (pin_sda == 1) {
kadonotakashi 0:8fdf9a60065b 155 return 0;
kadonotakashi 0:8fdf9a60065b 156 }
kadonotakashi 0:8fdf9a60065b 157
kadonotakashi 0:8fdf9a60065b 158 // Send clock pulses, for device to recover 9
kadonotakashi 0:8fdf9a60065b 159 pin_scl.mode(PullNone);
kadonotakashi 0:8fdf9a60065b 160 pin_scl.output();
kadonotakashi 0:8fdf9a60065b 161 for (int count = 0; count < 10; count++) {
kadonotakashi 0:8fdf9a60065b 162 pin_scl.mode(PullNone);
kadonotakashi 0:8fdf9a60065b 163 pin_scl = 0;
kadonotakashi 0:8fdf9a60065b 164 wait_us(5);
kadonotakashi 0:8fdf9a60065b 165 pin_scl.mode(PullUp);
kadonotakashi 0:8fdf9a60065b 166 pin_scl = 1;
kadonotakashi 0:8fdf9a60065b 167 wait_us(5);
kadonotakashi 0:8fdf9a60065b 168 }
kadonotakashi 0:8fdf9a60065b 169
kadonotakashi 0:8fdf9a60065b 170 // Send Stop
kadonotakashi 0:8fdf9a60065b 171 pin_sda.output();
kadonotakashi 0:8fdf9a60065b 172 pin_sda = 0;
kadonotakashi 0:8fdf9a60065b 173 wait_us(5);
kadonotakashi 0:8fdf9a60065b 174 pin_scl = 1;
kadonotakashi 0:8fdf9a60065b 175 wait_us(5);
kadonotakashi 0:8fdf9a60065b 176 pin_sda = 1;
kadonotakashi 0:8fdf9a60065b 177 wait_us(5);
kadonotakashi 0:8fdf9a60065b 178
kadonotakashi 0:8fdf9a60065b 179 pin_sda.input();
kadonotakashi 0:8fdf9a60065b 180 pin_scl.input();
kadonotakashi 0:8fdf9a60065b 181 if ((pin_scl == 0) || (pin_sda == 0)) {
kadonotakashi 0:8fdf9a60065b 182 // Return as SCL is low and no access to become master.
kadonotakashi 0:8fdf9a60065b 183 return I2C_ERROR_BUS_BUSY;
kadonotakashi 0:8fdf9a60065b 184 }
kadonotakashi 0:8fdf9a60065b 185
kadonotakashi 0:8fdf9a60065b 186 return 0;
kadonotakashi 0:8fdf9a60065b 187 }
kadonotakashi 0:8fdf9a60065b 188
kadonotakashi 0:8fdf9a60065b 189 #if DEVICE_I2C_ASYNCH
kadonotakashi 0:8fdf9a60065b 190
kadonotakashi 0:8fdf9a60065b 191 int I2C::transfer(int address, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, const event_callback_t &callback, int event, bool repeated)
kadonotakashi 0:8fdf9a60065b 192 {
kadonotakashi 0:8fdf9a60065b 193 lock();
kadonotakashi 0:8fdf9a60065b 194 if (i2c_active(&_i2c)) {
kadonotakashi 0:8fdf9a60065b 195 unlock();
kadonotakashi 0:8fdf9a60065b 196 return -1; // transaction ongoing
kadonotakashi 0:8fdf9a60065b 197 }
kadonotakashi 0:8fdf9a60065b 198 lock_deep_sleep();
kadonotakashi 0:8fdf9a60065b 199 aquire();
kadonotakashi 0:8fdf9a60065b 200
kadonotakashi 0:8fdf9a60065b 201 _callback = callback;
kadonotakashi 0:8fdf9a60065b 202 int stop = (repeated) ? 0 : 1;
kadonotakashi 0:8fdf9a60065b 203 _irq.callback(&I2C::irq_handler_asynch);
kadonotakashi 0:8fdf9a60065b 204 i2c_transfer_asynch(&_i2c, (void *)tx_buffer, tx_length, (void *)rx_buffer, rx_length, address, stop, _irq.entry(), event, _usage);
kadonotakashi 0:8fdf9a60065b 205 unlock();
kadonotakashi 0:8fdf9a60065b 206 return 0;
kadonotakashi 0:8fdf9a60065b 207 }
kadonotakashi 0:8fdf9a60065b 208
kadonotakashi 0:8fdf9a60065b 209 void I2C::abort_transfer(void)
kadonotakashi 0:8fdf9a60065b 210 {
kadonotakashi 0:8fdf9a60065b 211 lock();
kadonotakashi 0:8fdf9a60065b 212 i2c_abort_asynch(&_i2c);
kadonotakashi 0:8fdf9a60065b 213 unlock_deep_sleep();
kadonotakashi 0:8fdf9a60065b 214 unlock();
kadonotakashi 0:8fdf9a60065b 215 }
kadonotakashi 0:8fdf9a60065b 216
kadonotakashi 0:8fdf9a60065b 217 void I2C::irq_handler_asynch(void)
kadonotakashi 0:8fdf9a60065b 218 {
kadonotakashi 0:8fdf9a60065b 219 int event = i2c_irq_handler_asynch(&_i2c);
kadonotakashi 0:8fdf9a60065b 220 if (_callback && event) {
kadonotakashi 0:8fdf9a60065b 221 _callback.call(event);
kadonotakashi 0:8fdf9a60065b 222 }
kadonotakashi 0:8fdf9a60065b 223
kadonotakashi 0:8fdf9a60065b 224 if (event) {
kadonotakashi 0:8fdf9a60065b 225 unlock_deep_sleep();
kadonotakashi 0:8fdf9a60065b 226 }
kadonotakashi 0:8fdf9a60065b 227 }
kadonotakashi 0:8fdf9a60065b 228
kadonotakashi 0:8fdf9a60065b 229 void I2C::lock_deep_sleep()
kadonotakashi 0:8fdf9a60065b 230 {
kadonotakashi 0:8fdf9a60065b 231 if (_deep_sleep_locked == false) {
kadonotakashi 0:8fdf9a60065b 232 sleep_manager_lock_deep_sleep();
kadonotakashi 0:8fdf9a60065b 233 _deep_sleep_locked = true;
kadonotakashi 0:8fdf9a60065b 234 }
kadonotakashi 0:8fdf9a60065b 235 }
kadonotakashi 0:8fdf9a60065b 236
kadonotakashi 0:8fdf9a60065b 237 void I2C::unlock_deep_sleep()
kadonotakashi 0:8fdf9a60065b 238 {
kadonotakashi 0:8fdf9a60065b 239 if (_deep_sleep_locked == true) {
kadonotakashi 0:8fdf9a60065b 240 sleep_manager_unlock_deep_sleep();
kadonotakashi 0:8fdf9a60065b 241 _deep_sleep_locked = false;
kadonotakashi 0:8fdf9a60065b 242 }
kadonotakashi 0:8fdf9a60065b 243 }
kadonotakashi 0:8fdf9a60065b 244
kadonotakashi 0:8fdf9a60065b 245 #endif
kadonotakashi 0:8fdf9a60065b 246
kadonotakashi 0:8fdf9a60065b 247 } // namespace mbed
kadonotakashi 0:8fdf9a60065b 248
kadonotakashi 0:8fdf9a60065b 249 #endif