takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_NUVOTON/TARGET_NUC472/pinmap.c@0:8fdf9a60065b, 2018-10-10 (annotated)

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /* mbed Microcontroller Library
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2015-2016 Nuvoton
kadonotakashi 0:8fdf9a60065b 3 *
kadonotakashi 0:8fdf9a60065b 4 * Licensed under the Apache License, Version 2.0 (the "License");
kadonotakashi 0:8fdf9a60065b 5 * you may not use this file except in compliance with the License.
kadonotakashi 0:8fdf9a60065b 6 * You may obtain a copy of the License at
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * http://www.apache.org/licenses/LICENSE-2.0
kadonotakashi 0:8fdf9a60065b 9 *
kadonotakashi 0:8fdf9a60065b 10 * Unless required by applicable law or agreed to in writing, software
kadonotakashi 0:8fdf9a60065b 11 * distributed under the License is distributed on an "AS IS" BASIS,
kadonotakashi 0:8fdf9a60065b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kadonotakashi 0:8fdf9a60065b 13 * See the License for the specific language governing permissions and
kadonotakashi 0:8fdf9a60065b 14 * limitations under the License.
kadonotakashi 0:8fdf9a60065b 15 */
kadonotakashi 0:8fdf9a60065b 16
kadonotakashi 0:8fdf9a60065b 17 #include "mbed_assert.h"
kadonotakashi 0:8fdf9a60065b 18 #include "pinmap.h"
kadonotakashi 0:8fdf9a60065b 19 #include "PortNames.h"
kadonotakashi 0:8fdf9a60065b 20 #include "mbed_error.h"
kadonotakashi 0:8fdf9a60065b 21
kadonotakashi 0:8fdf9a60065b 22 /**
kadonotakashi 0:8fdf9a60065b 23 * Configure pin multi-function
kadonotakashi 0:8fdf9a60065b 24 */
kadonotakashi 0:8fdf9a60065b 25 void pin_function(PinName pin, int data)
kadonotakashi 0:8fdf9a60065b 26 {
kadonotakashi 0:8fdf9a60065b 27 MBED_ASSERT(pin != (PinName)NC);
kadonotakashi 0:8fdf9a60065b 28 uint32_t pin_index = NU_PINNAME_TO_PIN(pin);
kadonotakashi 0:8fdf9a60065b 29 uint32_t port_index = NU_PINNAME_TO_PORT(pin);
kadonotakashi 0:8fdf9a60065b 30 __IO uint32_t *GPx_MFPx = ((__IO uint32_t *) &SYS->GPA_MFPL) + port_index * 2 + (pin_index / 8);
kadonotakashi 0:8fdf9a60065b 31 //uint32_t MFP_Pos = NU_MFP_POS(pin_index);
kadonotakashi 0:8fdf9a60065b 32 uint32_t MFP_Msk = NU_MFP_MSK(pin_index);
kadonotakashi 0:8fdf9a60065b 33
kadonotakashi 0:8fdf9a60065b 34 // E.g.: SYS->GPA_MFPL = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA0MFP_Msk) ) | SYS_GPA_MFPL_PA0MFP_SC0_CD ;
kadonotakashi 0:8fdf9a60065b 35 *GPx_MFPx = (*GPx_MFPx & (~MFP_Msk)) | data;
kadonotakashi 0:8fdf9a60065b 36
kadonotakashi 0:8fdf9a60065b 37 // [TODO] Disconnect JTAG-DP + SW-DP signals.
kadonotakashi 0:8fdf9a60065b 38 // Warning: Need to reconnect under reset
kadonotakashi 0:8fdf9a60065b 39 //if ((pin == PA_13) || (pin == PA_14)) {
kadonotakashi 0:8fdf9a60065b 40 //
kadonotakashi 0:8fdf9a60065b 41 //}
kadonotakashi 0:8fdf9a60065b 42 //if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
kadonotakashi 0:8fdf9a60065b 43 //
kadonotakashi 0:8fdf9a60065b 44 //}
kadonotakashi 0:8fdf9a60065b 45 }
kadonotakashi 0:8fdf9a60065b 46
kadonotakashi 0:8fdf9a60065b 47 /**
kadonotakashi 0:8fdf9a60065b 48 * Configure pin pull-up/pull-down
kadonotakashi 0:8fdf9a60065b 49 */
kadonotakashi 0:8fdf9a60065b 50 void pin_mode(PinName pin, PinMode mode)
kadonotakashi 0:8fdf9a60065b 51 {
kadonotakashi 0:8fdf9a60065b 52 MBED_ASSERT(pin != (PinName)NC);
kadonotakashi 0:8fdf9a60065b 53 uint32_t pin_index = NU_PINNAME_TO_PIN(pin);
kadonotakashi 0:8fdf9a60065b 54 uint32_t port_index = NU_PINNAME_TO_PORT(pin);
kadonotakashi 0:8fdf9a60065b 55 GPIO_T *gpio_base = NU_PORT_BASE(port_index);
kadonotakashi 0:8fdf9a60065b 56
kadonotakashi 0:8fdf9a60065b 57 uint32_t mode_intern;
kadonotakashi 0:8fdf9a60065b 58
kadonotakashi 0:8fdf9a60065b 59 switch (mode) {
kadonotakashi 0:8fdf9a60065b 60 case InputOnly:
kadonotakashi 0:8fdf9a60065b 61 mode_intern = GPIO_MODE_INPUT;
kadonotakashi 0:8fdf9a60065b 62 break;
kadonotakashi 0:8fdf9a60065b 63
kadonotakashi 0:8fdf9a60065b 64 case PushPullOutput:
kadonotakashi 0:8fdf9a60065b 65 mode_intern = GPIO_MODE_OUTPUT;
kadonotakashi 0:8fdf9a60065b 66 break;
kadonotakashi 0:8fdf9a60065b 67
kadonotakashi 0:8fdf9a60065b 68 case OpenDrain:
kadonotakashi 0:8fdf9a60065b 69 mode_intern = GPIO_MODE_OPEN_DRAIN;
kadonotakashi 0:8fdf9a60065b 70 break;
kadonotakashi 0:8fdf9a60065b 71
kadonotakashi 0:8fdf9a60065b 72 case QuasiBidirectional:
kadonotakashi 0:8fdf9a60065b 73 mode_intern = GPIO_MODE_QUASI;
kadonotakashi 0:8fdf9a60065b 74 break;
kadonotakashi 0:8fdf9a60065b 75
kadonotakashi 0:8fdf9a60065b 76 default:
kadonotakashi 0:8fdf9a60065b 77 /* H/W doesn't support separate configuration for input pull mode/direction.
kadonotakashi 0:8fdf9a60065b 78 * We expect upper layer would have translated input pull mode/direction
kadonotakashi 0:8fdf9a60065b 79 * to I/O mode */
kadonotakashi 0:8fdf9a60065b 80 return;
kadonotakashi 0:8fdf9a60065b 81 }
kadonotakashi 0:8fdf9a60065b 82
kadonotakashi 0:8fdf9a60065b 83 GPIO_SetMode(gpio_base, 1 << pin_index, mode_intern);
kadonotakashi 0:8fdf9a60065b 84
kadonotakashi 0:8fdf9a60065b 85 /* Invalid combinations of PinMode/PinDirection
kadonotakashi 0:8fdf9a60065b 86 *
kadonotakashi 0:8fdf9a60065b 87 * We assume developer would avoid the following combinations of PinMode/PinDirection
kadonotakashi 0:8fdf9a60065b 88 * which are invalid:
kadonotakashi 0:8fdf9a60065b 89 * 1. InputOnly/PIN_OUTPUT
kadonotakashi 0:8fdf9a60065b 90 * 2. PushPullOutput/PIN_INPUT
kadonotakashi 0:8fdf9a60065b 91 */
kadonotakashi 0:8fdf9a60065b 92 }