takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_NUVOTON/TARGET_M451/pwmout_api.c@0:8fdf9a60065b, 2018-10-10 (annotated)

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /* mbed Microcontroller Library
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2015-2016 Nuvoton
kadonotakashi 0:8fdf9a60065b 3 *
kadonotakashi 0:8fdf9a60065b 4 * Licensed under the Apache License, Version 2.0 (the "License");
kadonotakashi 0:8fdf9a60065b 5 * you may not use this file except in compliance with the License.
kadonotakashi 0:8fdf9a60065b 6 * You may obtain a copy of the License at
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * http://www.apache.org/licenses/LICENSE-2.0
kadonotakashi 0:8fdf9a60065b 9 *
kadonotakashi 0:8fdf9a60065b 10 * Unless required by applicable law or agreed to in writing, software
kadonotakashi 0:8fdf9a60065b 11 * distributed under the License is distributed on an "AS IS" BASIS,
kadonotakashi 0:8fdf9a60065b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kadonotakashi 0:8fdf9a60065b 13 * See the License for the specific language governing permissions and
kadonotakashi 0:8fdf9a60065b 14 * limitations under the License.
kadonotakashi 0:8fdf9a60065b 15 */
kadonotakashi 0:8fdf9a60065b 16
kadonotakashi 0:8fdf9a60065b 17 #include "pwmout_api.h"
kadonotakashi 0:8fdf9a60065b 18
kadonotakashi 0:8fdf9a60065b 19 #if DEVICE_PWMOUT
kadonotakashi 0:8fdf9a60065b 20
kadonotakashi 0:8fdf9a60065b 21 #include "cmsis.h"
kadonotakashi 0:8fdf9a60065b 22 #include "pinmap.h"
kadonotakashi 0:8fdf9a60065b 23 #include "PeripheralPins.h"
kadonotakashi 0:8fdf9a60065b 24 #include "nu_modutil.h"
kadonotakashi 0:8fdf9a60065b 25 #include "nu_miscutil.h"
kadonotakashi 0:8fdf9a60065b 26 #include "nu_bitutil.h"
kadonotakashi 0:8fdf9a60065b 27
kadonotakashi 0:8fdf9a60065b 28 struct nu_pwm_var {
kadonotakashi 0:8fdf9a60065b 29 uint32_t en_msk;
kadonotakashi 0:8fdf9a60065b 30 };
kadonotakashi 0:8fdf9a60065b 31
kadonotakashi 0:8fdf9a60065b 32 static struct nu_pwm_var pwm0_var = {
kadonotakashi 0:8fdf9a60065b 33 .en_msk = 0
kadonotakashi 0:8fdf9a60065b 34 };
kadonotakashi 0:8fdf9a60065b 35
kadonotakashi 0:8fdf9a60065b 36 static struct nu_pwm_var pwm1_var = {
kadonotakashi 0:8fdf9a60065b 37 .en_msk = 0
kadonotakashi 0:8fdf9a60065b 38 };
kadonotakashi 0:8fdf9a60065b 39
kadonotakashi 0:8fdf9a60065b 40 static uint32_t pwm_modinit_mask = 0;
kadonotakashi 0:8fdf9a60065b 41
kadonotakashi 0:8fdf9a60065b 42 static const struct nu_modinit_s pwm_modinit_tab[] = {
kadonotakashi 0:8fdf9a60065b 43 {PWM_0_0, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P0_IRQn, &pwm0_var},
kadonotakashi 0:8fdf9a60065b 44 {PWM_0_1, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P0_IRQn, &pwm0_var},
kadonotakashi 0:8fdf9a60065b 45 {PWM_0_2, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P1_IRQn, &pwm0_var},
kadonotakashi 0:8fdf9a60065b 46 {PWM_0_3, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P1_IRQn, &pwm0_var},
kadonotakashi 0:8fdf9a60065b 47 {PWM_0_4, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P2_IRQn, &pwm0_var},
kadonotakashi 0:8fdf9a60065b 48 {PWM_0_5, PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, 0, PWM0_RST, PWM0P2_IRQn, &pwm0_var},
kadonotakashi 0:8fdf9a60065b 49
kadonotakashi 0:8fdf9a60065b 50 {PWM_1_0, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P0_IRQn, &pwm1_var},
kadonotakashi 0:8fdf9a60065b 51 {PWM_1_1, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P0_IRQn, &pwm1_var},
kadonotakashi 0:8fdf9a60065b 52 {PWM_1_2, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P1_IRQn, &pwm1_var},
kadonotakashi 0:8fdf9a60065b 53 {PWM_1_3, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P1_IRQn, &pwm1_var},
kadonotakashi 0:8fdf9a60065b 54 {PWM_1_4, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P2_IRQn, &pwm1_var},
kadonotakashi 0:8fdf9a60065b 55 {PWM_1_5, PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, 0, PWM1_RST, PWM1P2_IRQn, &pwm1_var},
kadonotakashi 0:8fdf9a60065b 56
kadonotakashi 0:8fdf9a60065b 57 {NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
kadonotakashi 0:8fdf9a60065b 58 };
kadonotakashi 0:8fdf9a60065b 59
kadonotakashi 0:8fdf9a60065b 60 static void pwmout_config(pwmout_t* obj);
kadonotakashi 0:8fdf9a60065b 61
kadonotakashi 0:8fdf9a60065b 62 void pwmout_init(pwmout_t* obj, PinName pin)
kadonotakashi 0:8fdf9a60065b 63 {
kadonotakashi 0:8fdf9a60065b 64 obj->pwm = (PWMName) pinmap_peripheral(pin, PinMap_PWM);
kadonotakashi 0:8fdf9a60065b 65 MBED_ASSERT((int) obj->pwm != NC);
kadonotakashi 0:8fdf9a60065b 66
kadonotakashi 0:8fdf9a60065b 67 const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
kadonotakashi 0:8fdf9a60065b 68 MBED_ASSERT(modinit != NULL);
kadonotakashi 0:8fdf9a60065b 69 MBED_ASSERT(modinit->modname == obj->pwm);
kadonotakashi 0:8fdf9a60065b 70
kadonotakashi 0:8fdf9a60065b 71 // NOTE: All channels (identified by PWMName) share a PWM module. This reset will also affect other channels of the same PWM module.
kadonotakashi 0:8fdf9a60065b 72 if (! ((struct nu_pwm_var *) modinit->var)->en_msk) {
kadonotakashi 0:8fdf9a60065b 73 // Reset this module if no channel enabled
kadonotakashi 0:8fdf9a60065b 74 SYS_ResetModule(modinit->rsetidx);
kadonotakashi 0:8fdf9a60065b 75 }
kadonotakashi 0:8fdf9a60065b 76
kadonotakashi 0:8fdf9a60065b 77 PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
kadonotakashi 0:8fdf9a60065b 78 uint32_t chn = NU_MODSUBINDEX(obj->pwm);
kadonotakashi 0:8fdf9a60065b 79
kadonotakashi 0:8fdf9a60065b 80 // NOTE: Channels 0/1/2/3/4/5 share a clock source.
kadonotakashi 0:8fdf9a60065b 81 if ((((struct nu_pwm_var *) modinit->var)->en_msk & 0x3F) == 0) {
kadonotakashi 0:8fdf9a60065b 82 // Select clock source of paired channels
kadonotakashi 0:8fdf9a60065b 83 CLK_SetModuleClock(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
kadonotakashi 0:8fdf9a60065b 84 // Enable clock of paired channels
kadonotakashi 0:8fdf9a60065b 85 CLK_EnableModuleClock(modinit->clkidx);
kadonotakashi 0:8fdf9a60065b 86 }
kadonotakashi 0:8fdf9a60065b 87
kadonotakashi 0:8fdf9a60065b 88 // Wire pinout
kadonotakashi 0:8fdf9a60065b 89 pinmap_pinout(pin, PinMap_PWM);
kadonotakashi 0:8fdf9a60065b 90
kadonotakashi 0:8fdf9a60065b 91 // Default: period = 10 ms, pulse width = 0 ms
kadonotakashi 0:8fdf9a60065b 92 obj->period_us = 1000 * 10;
kadonotakashi 0:8fdf9a60065b 93 obj->pulsewidth_us = 0;
kadonotakashi 0:8fdf9a60065b 94 pwmout_config(obj);
kadonotakashi 0:8fdf9a60065b 95
kadonotakashi 0:8fdf9a60065b 96 // Enable output of the specified PWM channel
kadonotakashi 0:8fdf9a60065b 97 PWM_EnableOutput(pwm_base, 1 << chn);
kadonotakashi 0:8fdf9a60065b 98 PWM_Start(pwm_base, 1 << chn);
kadonotakashi 0:8fdf9a60065b 99
kadonotakashi 0:8fdf9a60065b 100 ((struct nu_pwm_var *) modinit->var)->en_msk |= 1 << chn;
kadonotakashi 0:8fdf9a60065b 101
kadonotakashi 0:8fdf9a60065b 102 // Mark this module to be inited.
kadonotakashi 0:8fdf9a60065b 103 int i = modinit - pwm_modinit_tab;
kadonotakashi 0:8fdf9a60065b 104 pwm_modinit_mask |= 1 << i;
kadonotakashi 0:8fdf9a60065b 105 }
kadonotakashi 0:8fdf9a60065b 106
kadonotakashi 0:8fdf9a60065b 107 void pwmout_free(pwmout_t* obj)
kadonotakashi 0:8fdf9a60065b 108 {
kadonotakashi 0:8fdf9a60065b 109 PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
kadonotakashi 0:8fdf9a60065b 110 uint32_t chn = NU_MODSUBINDEX(obj->pwm);
kadonotakashi 0:8fdf9a60065b 111 PWM_ForceStop(pwm_base, 1 << chn);
kadonotakashi 0:8fdf9a60065b 112
kadonotakashi 0:8fdf9a60065b 113 const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
kadonotakashi 0:8fdf9a60065b 114 MBED_ASSERT(modinit != NULL);
kadonotakashi 0:8fdf9a60065b 115 MBED_ASSERT(modinit->modname == obj->pwm);
kadonotakashi 0:8fdf9a60065b 116 ((struct nu_pwm_var *) modinit->var)->en_msk &= ~(1 << chn);
kadonotakashi 0:8fdf9a60065b 117
kadonotakashi 0:8fdf9a60065b 118
kadonotakashi 0:8fdf9a60065b 119 if ((((struct nu_pwm_var *) modinit->var)->en_msk & 0x3F) == 0) {
kadonotakashi 0:8fdf9a60065b 120 CLK_DisableModuleClock(modinit->clkidx);
kadonotakashi 0:8fdf9a60065b 121 }
kadonotakashi 0:8fdf9a60065b 122
kadonotakashi 0:8fdf9a60065b 123 // Mark this module to be deinited.
kadonotakashi 0:8fdf9a60065b 124 int i = modinit - pwm_modinit_tab;
kadonotakashi 0:8fdf9a60065b 125 pwm_modinit_mask &= ~(1 << i);
kadonotakashi 0:8fdf9a60065b 126 }
kadonotakashi 0:8fdf9a60065b 127
kadonotakashi 0:8fdf9a60065b 128 void pwmout_write(pwmout_t* obj, float value)
kadonotakashi 0:8fdf9a60065b 129 {
kadonotakashi 0:8fdf9a60065b 130 obj->pulsewidth_us = NU_CLAMP((uint32_t) (value * obj->period_us), 0, obj->period_us);
kadonotakashi 0:8fdf9a60065b 131 pwmout_config(obj);
kadonotakashi 0:8fdf9a60065b 132 }
kadonotakashi 0:8fdf9a60065b 133
kadonotakashi 0:8fdf9a60065b 134 float pwmout_read(pwmout_t* obj)
kadonotakashi 0:8fdf9a60065b 135 {
kadonotakashi 0:8fdf9a60065b 136 return NU_CLAMP((((float) obj->pulsewidth_us) / obj->period_us), 0.0f, 1.0f);
kadonotakashi 0:8fdf9a60065b 137 }
kadonotakashi 0:8fdf9a60065b 138
kadonotakashi 0:8fdf9a60065b 139 void pwmout_period(pwmout_t* obj, float seconds)
kadonotakashi 0:8fdf9a60065b 140 {
kadonotakashi 0:8fdf9a60065b 141 pwmout_period_us(obj, seconds * 1000000.0f);
kadonotakashi 0:8fdf9a60065b 142 }
kadonotakashi 0:8fdf9a60065b 143
kadonotakashi 0:8fdf9a60065b 144 void pwmout_period_ms(pwmout_t* obj, int ms)
kadonotakashi 0:8fdf9a60065b 145 {
kadonotakashi 0:8fdf9a60065b 146 pwmout_period_us(obj, ms * 1000);
kadonotakashi 0:8fdf9a60065b 147 }
kadonotakashi 0:8fdf9a60065b 148
kadonotakashi 0:8fdf9a60065b 149 // Set the PWM period, keeping the duty cycle the same.
kadonotakashi 0:8fdf9a60065b 150 void pwmout_period_us(pwmout_t* obj, int us)
kadonotakashi 0:8fdf9a60065b 151 {
kadonotakashi 0:8fdf9a60065b 152 uint32_t period_us_old = obj->period_us;
kadonotakashi 0:8fdf9a60065b 153 uint32_t pulsewidth_us_old = obj->pulsewidth_us;
kadonotakashi 0:8fdf9a60065b 154 obj->period_us = us;
kadonotakashi 0:8fdf9a60065b 155 obj->pulsewidth_us = NU_CLAMP(obj->period_us * pulsewidth_us_old / period_us_old, 0, obj->period_us);
kadonotakashi 0:8fdf9a60065b 156 pwmout_config(obj);
kadonotakashi 0:8fdf9a60065b 157 }
kadonotakashi 0:8fdf9a60065b 158
kadonotakashi 0:8fdf9a60065b 159 void pwmout_pulsewidth(pwmout_t* obj, float seconds)
kadonotakashi 0:8fdf9a60065b 160 {
kadonotakashi 0:8fdf9a60065b 161 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
kadonotakashi 0:8fdf9a60065b 162 }
kadonotakashi 0:8fdf9a60065b 163
kadonotakashi 0:8fdf9a60065b 164 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
kadonotakashi 0:8fdf9a60065b 165 {
kadonotakashi 0:8fdf9a60065b 166 pwmout_pulsewidth_us(obj, ms * 1000);
kadonotakashi 0:8fdf9a60065b 167 }
kadonotakashi 0:8fdf9a60065b 168
kadonotakashi 0:8fdf9a60065b 169 void pwmout_pulsewidth_us(pwmout_t* obj, int us)
kadonotakashi 0:8fdf9a60065b 170 {
kadonotakashi 0:8fdf9a60065b 171 obj->pulsewidth_us = NU_CLAMP(us, 0, obj->period_us);
kadonotakashi 0:8fdf9a60065b 172 pwmout_config(obj);
kadonotakashi 0:8fdf9a60065b 173 }
kadonotakashi 0:8fdf9a60065b 174
kadonotakashi 0:8fdf9a60065b 175 static void pwmout_config(pwmout_t* obj)
kadonotakashi 0:8fdf9a60065b 176 {
kadonotakashi 0:8fdf9a60065b 177 PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
kadonotakashi 0:8fdf9a60065b 178 uint32_t chn = NU_MODSUBINDEX(obj->pwm);
kadonotakashi 0:8fdf9a60065b 179 // NOTE: Support period < 1s
kadonotakashi 0:8fdf9a60065b 180 //PWM_ConfigOutputChannel(pwm_base, chn, 1000 * 1000 / obj->period_us, obj->pulsewidth_us * 100 / obj->period_us);
kadonotakashi 0:8fdf9a60065b 181 PWM_ConfigOutputChannel2(pwm_base, chn, 1000 * 1000, obj->pulsewidth_us * 100 / obj->period_us, obj->period_us);
kadonotakashi 0:8fdf9a60065b 182 }
kadonotakashi 0:8fdf9a60065b 183
kadonotakashi 0:8fdf9a60065b 184 #endif