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mbed-os/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_lptmr.h@0:8fdf9a60065b, 2018-10-10 (annotated)
- Committer:
- kadonotakashi
- Date:
- Wed Oct 10 00:33:53 2018 +0000
- Revision:
- 0:8fdf9a60065b
how to make mbed librry
Who changed what in which revision?
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kadonotakashi | 0:8fdf9a60065b | 1 | /* |
kadonotakashi | 0:8fdf9a60065b | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
kadonotakashi | 0:8fdf9a60065b | 3 | * All rights reserved. |
kadonotakashi | 0:8fdf9a60065b | 4 | * |
kadonotakashi | 0:8fdf9a60065b | 5 | * Redistribution and use in source and binary forms, with or without modification, |
kadonotakashi | 0:8fdf9a60065b | 6 | * are permitted provided that the following conditions are met: |
kadonotakashi | 0:8fdf9a60065b | 7 | * |
kadonotakashi | 0:8fdf9a60065b | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
kadonotakashi | 0:8fdf9a60065b | 9 | * of conditions and the following disclaimer. |
kadonotakashi | 0:8fdf9a60065b | 10 | * |
kadonotakashi | 0:8fdf9a60065b | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
kadonotakashi | 0:8fdf9a60065b | 12 | * list of conditions and the following disclaimer in the documentation and/or |
kadonotakashi | 0:8fdf9a60065b | 13 | * other materials provided with the distribution. |
kadonotakashi | 0:8fdf9a60065b | 14 | * |
kadonotakashi | 0:8fdf9a60065b | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
kadonotakashi | 0:8fdf9a60065b | 16 | * contributors may be used to endorse or promote products derived from this |
kadonotakashi | 0:8fdf9a60065b | 17 | * software without specific prior written permission. |
kadonotakashi | 0:8fdf9a60065b | 18 | * |
kadonotakashi | 0:8fdf9a60065b | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
kadonotakashi | 0:8fdf9a60065b | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
kadonotakashi | 0:8fdf9a60065b | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
kadonotakashi | 0:8fdf9a60065b | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
kadonotakashi | 0:8fdf9a60065b | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
kadonotakashi | 0:8fdf9a60065b | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
kadonotakashi | 0:8fdf9a60065b | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
kadonotakashi | 0:8fdf9a60065b | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
kadonotakashi | 0:8fdf9a60065b | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
kadonotakashi | 0:8fdf9a60065b | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
kadonotakashi | 0:8fdf9a60065b | 29 | */ |
kadonotakashi | 0:8fdf9a60065b | 30 | #ifndef _FSL_LPTMR_H_ |
kadonotakashi | 0:8fdf9a60065b | 31 | #define _FSL_LPTMR_H_ |
kadonotakashi | 0:8fdf9a60065b | 32 | |
kadonotakashi | 0:8fdf9a60065b | 33 | #include "fsl_common.h" |
kadonotakashi | 0:8fdf9a60065b | 34 | |
kadonotakashi | 0:8fdf9a60065b | 35 | /*! |
kadonotakashi | 0:8fdf9a60065b | 36 | * @addtogroup lptmr |
kadonotakashi | 0:8fdf9a60065b | 37 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 38 | */ |
kadonotakashi | 0:8fdf9a60065b | 39 | |
kadonotakashi | 0:8fdf9a60065b | 40 | /******************************************************************************* |
kadonotakashi | 0:8fdf9a60065b | 41 | * Definitions |
kadonotakashi | 0:8fdf9a60065b | 42 | ******************************************************************************/ |
kadonotakashi | 0:8fdf9a60065b | 43 | |
kadonotakashi | 0:8fdf9a60065b | 44 | /*! @name Driver version */ |
kadonotakashi | 0:8fdf9a60065b | 45 | /*@{*/ |
kadonotakashi | 0:8fdf9a60065b | 46 | #define FSL_LPTMR_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0 */ |
kadonotakashi | 0:8fdf9a60065b | 47 | /*@}*/ |
kadonotakashi | 0:8fdf9a60065b | 48 | |
kadonotakashi | 0:8fdf9a60065b | 49 | /*! @brief LPTMR pin selection used in pulse counter mode.*/ |
kadonotakashi | 0:8fdf9a60065b | 50 | typedef enum _lptmr_pin_select |
kadonotakashi | 0:8fdf9a60065b | 51 | { |
kadonotakashi | 0:8fdf9a60065b | 52 | kLPTMR_PinSelectInput_0 = 0x0U, /*!< Pulse counter input 0 is selected */ |
kadonotakashi | 0:8fdf9a60065b | 53 | kLPTMR_PinSelectInput_1 = 0x1U, /*!< Pulse counter input 1 is selected */ |
kadonotakashi | 0:8fdf9a60065b | 54 | kLPTMR_PinSelectInput_2 = 0x2U, /*!< Pulse counter input 2 is selected */ |
kadonotakashi | 0:8fdf9a60065b | 55 | kLPTMR_PinSelectInput_3 = 0x3U /*!< Pulse counter input 3 is selected */ |
kadonotakashi | 0:8fdf9a60065b | 56 | } lptmr_pin_select_t; |
kadonotakashi | 0:8fdf9a60065b | 57 | |
kadonotakashi | 0:8fdf9a60065b | 58 | /*! @brief LPTMR pin polarity used in pulse counter mode.*/ |
kadonotakashi | 0:8fdf9a60065b | 59 | typedef enum _lptmr_pin_polarity |
kadonotakashi | 0:8fdf9a60065b | 60 | { |
kadonotakashi | 0:8fdf9a60065b | 61 | kLPTMR_PinPolarityActiveHigh = 0x0U, /*!< Pulse Counter input source is active-high */ |
kadonotakashi | 0:8fdf9a60065b | 62 | kLPTMR_PinPolarityActiveLow = 0x1U /*!< Pulse Counter input source is active-low */ |
kadonotakashi | 0:8fdf9a60065b | 63 | } lptmr_pin_polarity_t; |
kadonotakashi | 0:8fdf9a60065b | 64 | |
kadonotakashi | 0:8fdf9a60065b | 65 | /*! @brief LPTMR timer mode selection.*/ |
kadonotakashi | 0:8fdf9a60065b | 66 | typedef enum _lptmr_timer_mode |
kadonotakashi | 0:8fdf9a60065b | 67 | { |
kadonotakashi | 0:8fdf9a60065b | 68 | kLPTMR_TimerModeTimeCounter = 0x0U, /*!< Time Counter mode */ |
kadonotakashi | 0:8fdf9a60065b | 69 | kLPTMR_TimerModePulseCounter = 0x1U /*!< Pulse Counter mode */ |
kadonotakashi | 0:8fdf9a60065b | 70 | } lptmr_timer_mode_t; |
kadonotakashi | 0:8fdf9a60065b | 71 | |
kadonotakashi | 0:8fdf9a60065b | 72 | /*! @brief LPTMR prescaler/glitch filter values*/ |
kadonotakashi | 0:8fdf9a60065b | 73 | typedef enum _lptmr_prescaler_glitch_value |
kadonotakashi | 0:8fdf9a60065b | 74 | { |
kadonotakashi | 0:8fdf9a60065b | 75 | kLPTMR_Prescale_Glitch_0 = 0x0U, /*!< Prescaler divide 2, glitch filter does not support this setting */ |
kadonotakashi | 0:8fdf9a60065b | 76 | kLPTMR_Prescale_Glitch_1 = 0x1U, /*!< Prescaler divide 4, glitch filter 2 */ |
kadonotakashi | 0:8fdf9a60065b | 77 | kLPTMR_Prescale_Glitch_2 = 0x2U, /*!< Prescaler divide 8, glitch filter 4 */ |
kadonotakashi | 0:8fdf9a60065b | 78 | kLPTMR_Prescale_Glitch_3 = 0x3U, /*!< Prescaler divide 16, glitch filter 8 */ |
kadonotakashi | 0:8fdf9a60065b | 79 | kLPTMR_Prescale_Glitch_4 = 0x4U, /*!< Prescaler divide 32, glitch filter 16 */ |
kadonotakashi | 0:8fdf9a60065b | 80 | kLPTMR_Prescale_Glitch_5 = 0x5U, /*!< Prescaler divide 64, glitch filter 32 */ |
kadonotakashi | 0:8fdf9a60065b | 81 | kLPTMR_Prescale_Glitch_6 = 0x6U, /*!< Prescaler divide 128, glitch filter 64 */ |
kadonotakashi | 0:8fdf9a60065b | 82 | kLPTMR_Prescale_Glitch_7 = 0x7U, /*!< Prescaler divide 256, glitch filter 128 */ |
kadonotakashi | 0:8fdf9a60065b | 83 | kLPTMR_Prescale_Glitch_8 = 0x8U, /*!< Prescaler divide 512, glitch filter 256 */ |
kadonotakashi | 0:8fdf9a60065b | 84 | kLPTMR_Prescale_Glitch_9 = 0x9U, /*!< Prescaler divide 1024, glitch filter 512*/ |
kadonotakashi | 0:8fdf9a60065b | 85 | kLPTMR_Prescale_Glitch_10 = 0xAU, /*!< Prescaler divide 2048 glitch filter 1024 */ |
kadonotakashi | 0:8fdf9a60065b | 86 | kLPTMR_Prescale_Glitch_11 = 0xBU, /*!< Prescaler divide 4096, glitch filter 2048 */ |
kadonotakashi | 0:8fdf9a60065b | 87 | kLPTMR_Prescale_Glitch_12 = 0xCU, /*!< Prescaler divide 8192, glitch filter 4096 */ |
kadonotakashi | 0:8fdf9a60065b | 88 | kLPTMR_Prescale_Glitch_13 = 0xDU, /*!< Prescaler divide 16384, glitch filter 8192 */ |
kadonotakashi | 0:8fdf9a60065b | 89 | kLPTMR_Prescale_Glitch_14 = 0xEU, /*!< Prescaler divide 32768, glitch filter 16384 */ |
kadonotakashi | 0:8fdf9a60065b | 90 | kLPTMR_Prescale_Glitch_15 = 0xFU /*!< Prescaler divide 65536, glitch filter 32768 */ |
kadonotakashi | 0:8fdf9a60065b | 91 | } lptmr_prescaler_glitch_value_t; |
kadonotakashi | 0:8fdf9a60065b | 92 | |
kadonotakashi | 0:8fdf9a60065b | 93 | /*! |
kadonotakashi | 0:8fdf9a60065b | 94 | * @brief LPTMR prescaler/glitch filter clock select. |
kadonotakashi | 0:8fdf9a60065b | 95 | * @note Clock connections are SoC-specific |
kadonotakashi | 0:8fdf9a60065b | 96 | */ |
kadonotakashi | 0:8fdf9a60065b | 97 | typedef enum _lptmr_prescaler_clock_select |
kadonotakashi | 0:8fdf9a60065b | 98 | { |
kadonotakashi | 0:8fdf9a60065b | 99 | kLPTMR_PrescalerClock_0 = 0x0U, /*!< Prescaler/glitch filter clock 0 selected. */ |
kadonotakashi | 0:8fdf9a60065b | 100 | kLPTMR_PrescalerClock_1 = 0x1U, /*!< Prescaler/glitch filter clock 1 selected. */ |
kadonotakashi | 0:8fdf9a60065b | 101 | kLPTMR_PrescalerClock_2 = 0x2U, /*!< Prescaler/glitch filter clock 2 selected. */ |
kadonotakashi | 0:8fdf9a60065b | 102 | kLPTMR_PrescalerClock_3 = 0x3U, /*!< Prescaler/glitch filter clock 3 selected. */ |
kadonotakashi | 0:8fdf9a60065b | 103 | } lptmr_prescaler_clock_select_t; |
kadonotakashi | 0:8fdf9a60065b | 104 | |
kadonotakashi | 0:8fdf9a60065b | 105 | /*! @brief List of the LPTMR interrupts */ |
kadonotakashi | 0:8fdf9a60065b | 106 | typedef enum _lptmr_interrupt_enable |
kadonotakashi | 0:8fdf9a60065b | 107 | { |
kadonotakashi | 0:8fdf9a60065b | 108 | kLPTMR_TimerInterruptEnable = LPTMR_CSR_TIE_MASK, /*!< Timer interrupt enable */ |
kadonotakashi | 0:8fdf9a60065b | 109 | } lptmr_interrupt_enable_t; |
kadonotakashi | 0:8fdf9a60065b | 110 | |
kadonotakashi | 0:8fdf9a60065b | 111 | /*! @brief List of the LPTMR status flags */ |
kadonotakashi | 0:8fdf9a60065b | 112 | typedef enum _lptmr_status_flags |
kadonotakashi | 0:8fdf9a60065b | 113 | { |
kadonotakashi | 0:8fdf9a60065b | 114 | kLPTMR_TimerCompareFlag = LPTMR_CSR_TCF_MASK, /*!< Timer compare flag */ |
kadonotakashi | 0:8fdf9a60065b | 115 | } lptmr_status_flags_t; |
kadonotakashi | 0:8fdf9a60065b | 116 | |
kadonotakashi | 0:8fdf9a60065b | 117 | /*! |
kadonotakashi | 0:8fdf9a60065b | 118 | * @brief LPTMR config structure |
kadonotakashi | 0:8fdf9a60065b | 119 | * |
kadonotakashi | 0:8fdf9a60065b | 120 | * This structure holds the configuration settings for the LPTMR peripheral. To initialize this |
kadonotakashi | 0:8fdf9a60065b | 121 | * structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a |
kadonotakashi | 0:8fdf9a60065b | 122 | * pointer to your configuration structure instance. |
kadonotakashi | 0:8fdf9a60065b | 123 | * |
kadonotakashi | 0:8fdf9a60065b | 124 | * The configuration struct can be made constant so it resides in flash. |
kadonotakashi | 0:8fdf9a60065b | 125 | */ |
kadonotakashi | 0:8fdf9a60065b | 126 | typedef struct _lptmr_config |
kadonotakashi | 0:8fdf9a60065b | 127 | { |
kadonotakashi | 0:8fdf9a60065b | 128 | lptmr_timer_mode_t timerMode; /*!< Time counter mode or pulse counter mode */ |
kadonotakashi | 0:8fdf9a60065b | 129 | lptmr_pin_select_t pinSelect; /*!< LPTMR pulse input pin select; used only in pulse counter mode */ |
kadonotakashi | 0:8fdf9a60065b | 130 | lptmr_pin_polarity_t pinPolarity; /*!< LPTMR pulse input pin polarity; used only in pulse counter mode */ |
kadonotakashi | 0:8fdf9a60065b | 131 | bool enableFreeRunning; /*!< True: enable free running, counter is reset on overflow |
kadonotakashi | 0:8fdf9a60065b | 132 | False: counter is reset when the compare flag is set */ |
kadonotakashi | 0:8fdf9a60065b | 133 | bool bypassPrescaler; /*!< True: bypass prescaler; false: use clock from prescaler */ |
kadonotakashi | 0:8fdf9a60065b | 134 | lptmr_prescaler_clock_select_t prescalerClockSource; /*!< LPTMR clock source */ |
kadonotakashi | 0:8fdf9a60065b | 135 | lptmr_prescaler_glitch_value_t value; /*!< Prescaler or glitch filter value */ |
kadonotakashi | 0:8fdf9a60065b | 136 | } lptmr_config_t; |
kadonotakashi | 0:8fdf9a60065b | 137 | |
kadonotakashi | 0:8fdf9a60065b | 138 | /******************************************************************************* |
kadonotakashi | 0:8fdf9a60065b | 139 | * API |
kadonotakashi | 0:8fdf9a60065b | 140 | ******************************************************************************/ |
kadonotakashi | 0:8fdf9a60065b | 141 | |
kadonotakashi | 0:8fdf9a60065b | 142 | #if defined(__cplusplus) |
kadonotakashi | 0:8fdf9a60065b | 143 | extern "C" { |
kadonotakashi | 0:8fdf9a60065b | 144 | #endif |
kadonotakashi | 0:8fdf9a60065b | 145 | |
kadonotakashi | 0:8fdf9a60065b | 146 | /*! |
kadonotakashi | 0:8fdf9a60065b | 147 | * @name Initialization and deinitialization |
kadonotakashi | 0:8fdf9a60065b | 148 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 149 | */ |
kadonotakashi | 0:8fdf9a60065b | 150 | |
kadonotakashi | 0:8fdf9a60065b | 151 | /*! |
kadonotakashi | 0:8fdf9a60065b | 152 | * @brief Ungates the LPTMR clock and configures the peripheral for a basic operation. |
kadonotakashi | 0:8fdf9a60065b | 153 | * |
kadonotakashi | 0:8fdf9a60065b | 154 | * @note This API should be called at the beginning of the application using the LPTMR driver. |
kadonotakashi | 0:8fdf9a60065b | 155 | * |
kadonotakashi | 0:8fdf9a60065b | 156 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 157 | * @param config A pointer to the LPTMR configuration structure. |
kadonotakashi | 0:8fdf9a60065b | 158 | */ |
kadonotakashi | 0:8fdf9a60065b | 159 | void LPTMR_Init(LPTMR_Type* base, const lptmr_config_t* config); |
kadonotakashi | 0:8fdf9a60065b | 160 | |
kadonotakashi | 0:8fdf9a60065b | 161 | /*! |
kadonotakashi | 0:8fdf9a60065b | 162 | * @brief Gates the LPTMR clock. |
kadonotakashi | 0:8fdf9a60065b | 163 | * |
kadonotakashi | 0:8fdf9a60065b | 164 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 165 | */ |
kadonotakashi | 0:8fdf9a60065b | 166 | void LPTMR_Deinit(LPTMR_Type* base); |
kadonotakashi | 0:8fdf9a60065b | 167 | |
kadonotakashi | 0:8fdf9a60065b | 168 | /*! |
kadonotakashi | 0:8fdf9a60065b | 169 | * @brief Fills in the LPTMR configuration structure with default settings. |
kadonotakashi | 0:8fdf9a60065b | 170 | * |
kadonotakashi | 0:8fdf9a60065b | 171 | * The default values are as follows. |
kadonotakashi | 0:8fdf9a60065b | 172 | * @code |
kadonotakashi | 0:8fdf9a60065b | 173 | * config->timerMode = kLPTMR_TimerModeTimeCounter; |
kadonotakashi | 0:8fdf9a60065b | 174 | * config->pinSelect = kLPTMR_PinSelectInput_0; |
kadonotakashi | 0:8fdf9a60065b | 175 | * config->pinPolarity = kLPTMR_PinPolarityActiveHigh; |
kadonotakashi | 0:8fdf9a60065b | 176 | * config->enableFreeRunning = false; |
kadonotakashi | 0:8fdf9a60065b | 177 | * config->bypassPrescaler = true; |
kadonotakashi | 0:8fdf9a60065b | 178 | * config->prescalerClockSource = kLPTMR_PrescalerClock_1; |
kadonotakashi | 0:8fdf9a60065b | 179 | * config->value = kLPTMR_Prescale_Glitch_0; |
kadonotakashi | 0:8fdf9a60065b | 180 | * @endcode |
kadonotakashi | 0:8fdf9a60065b | 181 | * @param config A pointer to the LPTMR configuration structure. |
kadonotakashi | 0:8fdf9a60065b | 182 | */ |
kadonotakashi | 0:8fdf9a60065b | 183 | void LPTMR_GetDefaultConfig(lptmr_config_t* config); |
kadonotakashi | 0:8fdf9a60065b | 184 | |
kadonotakashi | 0:8fdf9a60065b | 185 | /*! @}*/ |
kadonotakashi | 0:8fdf9a60065b | 186 | |
kadonotakashi | 0:8fdf9a60065b | 187 | /*! |
kadonotakashi | 0:8fdf9a60065b | 188 | * @name Interrupt Interface |
kadonotakashi | 0:8fdf9a60065b | 189 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 190 | */ |
kadonotakashi | 0:8fdf9a60065b | 191 | |
kadonotakashi | 0:8fdf9a60065b | 192 | /*! |
kadonotakashi | 0:8fdf9a60065b | 193 | * @brief Enables the selected LPTMR interrupts. |
kadonotakashi | 0:8fdf9a60065b | 194 | * |
kadonotakashi | 0:8fdf9a60065b | 195 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 196 | * @param mask The interrupts to enable. This is a logical OR of members of the |
kadonotakashi | 0:8fdf9a60065b | 197 | * enumeration ::lptmr_interrupt_enable_t |
kadonotakashi | 0:8fdf9a60065b | 198 | */ |
kadonotakashi | 0:8fdf9a60065b | 199 | static inline void LPTMR_EnableInterrupts(LPTMR_Type* base, uint32_t mask) |
kadonotakashi | 0:8fdf9a60065b | 200 | { |
kadonotakashi | 0:8fdf9a60065b | 201 | uint32_t reg = base->CSR; |
kadonotakashi | 0:8fdf9a60065b | 202 | |
kadonotakashi | 0:8fdf9a60065b | 203 | /* Clear the TCF bit so that we don't clear this w1c bit when writing back */ |
kadonotakashi | 0:8fdf9a60065b | 204 | reg &= ~(LPTMR_CSR_TCF_MASK); |
kadonotakashi | 0:8fdf9a60065b | 205 | reg |= mask; |
kadonotakashi | 0:8fdf9a60065b | 206 | base->CSR = reg; |
kadonotakashi | 0:8fdf9a60065b | 207 | } |
kadonotakashi | 0:8fdf9a60065b | 208 | |
kadonotakashi | 0:8fdf9a60065b | 209 | /*! |
kadonotakashi | 0:8fdf9a60065b | 210 | * @brief Disables the selected LPTMR interrupts. |
kadonotakashi | 0:8fdf9a60065b | 211 | * |
kadonotakashi | 0:8fdf9a60065b | 212 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 213 | * @param mask The interrupts to disable. This is a logical OR of members of the |
kadonotakashi | 0:8fdf9a60065b | 214 | * enumeration ::lptmr_interrupt_enable_t. |
kadonotakashi | 0:8fdf9a60065b | 215 | */ |
kadonotakashi | 0:8fdf9a60065b | 216 | static inline void LPTMR_DisableInterrupts(LPTMR_Type* base, uint32_t mask) |
kadonotakashi | 0:8fdf9a60065b | 217 | { |
kadonotakashi | 0:8fdf9a60065b | 218 | uint32_t reg = base->CSR; |
kadonotakashi | 0:8fdf9a60065b | 219 | |
kadonotakashi | 0:8fdf9a60065b | 220 | /* Clear the TCF bit so that we don't clear this w1c bit when writing back */ |
kadonotakashi | 0:8fdf9a60065b | 221 | reg &= ~(LPTMR_CSR_TCF_MASK); |
kadonotakashi | 0:8fdf9a60065b | 222 | reg &= ~mask; |
kadonotakashi | 0:8fdf9a60065b | 223 | base->CSR = reg; |
kadonotakashi | 0:8fdf9a60065b | 224 | } |
kadonotakashi | 0:8fdf9a60065b | 225 | |
kadonotakashi | 0:8fdf9a60065b | 226 | /*! |
kadonotakashi | 0:8fdf9a60065b | 227 | * @brief Gets the enabled LPTMR interrupts. |
kadonotakashi | 0:8fdf9a60065b | 228 | * |
kadonotakashi | 0:8fdf9a60065b | 229 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 230 | * |
kadonotakashi | 0:8fdf9a60065b | 231 | * @return The enabled interrupts. This is the logical OR of members of the |
kadonotakashi | 0:8fdf9a60065b | 232 | * enumeration ::lptmr_interrupt_enable_t |
kadonotakashi | 0:8fdf9a60065b | 233 | */ |
kadonotakashi | 0:8fdf9a60065b | 234 | static inline uint32_t LPTMR_GetEnabledInterrupts(LPTMR_Type* base) |
kadonotakashi | 0:8fdf9a60065b | 235 | { |
kadonotakashi | 0:8fdf9a60065b | 236 | return (base->CSR & LPTMR_CSR_TIE_MASK); |
kadonotakashi | 0:8fdf9a60065b | 237 | } |
kadonotakashi | 0:8fdf9a60065b | 238 | |
kadonotakashi | 0:8fdf9a60065b | 239 | /*! @}*/ |
kadonotakashi | 0:8fdf9a60065b | 240 | |
kadonotakashi | 0:8fdf9a60065b | 241 | /*! |
kadonotakashi | 0:8fdf9a60065b | 242 | * @name Status Interface |
kadonotakashi | 0:8fdf9a60065b | 243 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 244 | */ |
kadonotakashi | 0:8fdf9a60065b | 245 | |
kadonotakashi | 0:8fdf9a60065b | 246 | /*! |
kadonotakashi | 0:8fdf9a60065b | 247 | * @brief Gets the LPTMR status flags. |
kadonotakashi | 0:8fdf9a60065b | 248 | * |
kadonotakashi | 0:8fdf9a60065b | 249 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 250 | * |
kadonotakashi | 0:8fdf9a60065b | 251 | * @return The status flags. This is the logical OR of members of the |
kadonotakashi | 0:8fdf9a60065b | 252 | * enumeration ::lptmr_status_flags_t |
kadonotakashi | 0:8fdf9a60065b | 253 | */ |
kadonotakashi | 0:8fdf9a60065b | 254 | static inline uint32_t LPTMR_GetStatusFlags(LPTMR_Type* base) |
kadonotakashi | 0:8fdf9a60065b | 255 | { |
kadonotakashi | 0:8fdf9a60065b | 256 | return (base->CSR & LPTMR_CSR_TCF_MASK); |
kadonotakashi | 0:8fdf9a60065b | 257 | } |
kadonotakashi | 0:8fdf9a60065b | 258 | |
kadonotakashi | 0:8fdf9a60065b | 259 | /*! |
kadonotakashi | 0:8fdf9a60065b | 260 | * @brief Clears the LPTMR status flags. |
kadonotakashi | 0:8fdf9a60065b | 261 | * |
kadonotakashi | 0:8fdf9a60065b | 262 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 263 | * @param mask The status flags to clear. This is a logical OR of members of the |
kadonotakashi | 0:8fdf9a60065b | 264 | * enumeration ::lptmr_status_flags_t. |
kadonotakashi | 0:8fdf9a60065b | 265 | */ |
kadonotakashi | 0:8fdf9a60065b | 266 | static inline void LPTMR_ClearStatusFlags(LPTMR_Type* base, uint32_t mask) |
kadonotakashi | 0:8fdf9a60065b | 267 | { |
kadonotakashi | 0:8fdf9a60065b | 268 | base->CSR |= mask; |
kadonotakashi | 0:8fdf9a60065b | 269 | } |
kadonotakashi | 0:8fdf9a60065b | 270 | |
kadonotakashi | 0:8fdf9a60065b | 271 | /*! @}*/ |
kadonotakashi | 0:8fdf9a60065b | 272 | |
kadonotakashi | 0:8fdf9a60065b | 273 | /*! |
kadonotakashi | 0:8fdf9a60065b | 274 | * @name Read and write the timer period |
kadonotakashi | 0:8fdf9a60065b | 275 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 276 | */ |
kadonotakashi | 0:8fdf9a60065b | 277 | |
kadonotakashi | 0:8fdf9a60065b | 278 | /*! |
kadonotakashi | 0:8fdf9a60065b | 279 | * @brief Sets the timer period in units of count. |
kadonotakashi | 0:8fdf9a60065b | 280 | * |
kadonotakashi | 0:8fdf9a60065b | 281 | * Timers counts from 0 until it equals the count value set here. The count value is written to |
kadonotakashi | 0:8fdf9a60065b | 282 | * the CMR register. |
kadonotakashi | 0:8fdf9a60065b | 283 | * |
kadonotakashi | 0:8fdf9a60065b | 284 | * @note |
kadonotakashi | 0:8fdf9a60065b | 285 | * 1. The TCF flag is set with the CNR equals the count provided here and then increments. |
kadonotakashi | 0:8fdf9a60065b | 286 | * 2. Call the utility macros provided in the fsl_common.h to convert to ticks. |
kadonotakashi | 0:8fdf9a60065b | 287 | * |
kadonotakashi | 0:8fdf9a60065b | 288 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 289 | * @param ticks A timer period in units of ticks, which should be equal or greater than 1. |
kadonotakashi | 0:8fdf9a60065b | 290 | */ |
kadonotakashi | 0:8fdf9a60065b | 291 | static inline void LPTMR_SetTimerPeriod(LPTMR_Type* base, uint16_t ticks) |
kadonotakashi | 0:8fdf9a60065b | 292 | { |
kadonotakashi | 0:8fdf9a60065b | 293 | base->CMR = ticks - 1; |
kadonotakashi | 0:8fdf9a60065b | 294 | } |
kadonotakashi | 0:8fdf9a60065b | 295 | |
kadonotakashi | 0:8fdf9a60065b | 296 | /*! |
kadonotakashi | 0:8fdf9a60065b | 297 | * @brief Reads the current timer counting value. |
kadonotakashi | 0:8fdf9a60065b | 298 | * |
kadonotakashi | 0:8fdf9a60065b | 299 | * This function returns the real-time timer counting value in a range from 0 to a |
kadonotakashi | 0:8fdf9a60065b | 300 | * timer period. |
kadonotakashi | 0:8fdf9a60065b | 301 | * |
kadonotakashi | 0:8fdf9a60065b | 302 | * @note Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec. |
kadonotakashi | 0:8fdf9a60065b | 303 | * |
kadonotakashi | 0:8fdf9a60065b | 304 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 305 | * |
kadonotakashi | 0:8fdf9a60065b | 306 | * @return The current counter value in ticks |
kadonotakashi | 0:8fdf9a60065b | 307 | */ |
kadonotakashi | 0:8fdf9a60065b | 308 | static inline uint16_t LPTMR_GetCurrentTimerCount(LPTMR_Type* base) |
kadonotakashi | 0:8fdf9a60065b | 309 | { |
kadonotakashi | 0:8fdf9a60065b | 310 | /* Must first write any value to the CNR. This synchronizes and registers the current value |
kadonotakashi | 0:8fdf9a60065b | 311 | * of the CNR into a temporary register which can then be read |
kadonotakashi | 0:8fdf9a60065b | 312 | */ |
kadonotakashi | 0:8fdf9a60065b | 313 | base->CNR = 0U; |
kadonotakashi | 0:8fdf9a60065b | 314 | return (uint16_t)base->CNR; |
kadonotakashi | 0:8fdf9a60065b | 315 | } |
kadonotakashi | 0:8fdf9a60065b | 316 | |
kadonotakashi | 0:8fdf9a60065b | 317 | /*! @}*/ |
kadonotakashi | 0:8fdf9a60065b | 318 | |
kadonotakashi | 0:8fdf9a60065b | 319 | /*! |
kadonotakashi | 0:8fdf9a60065b | 320 | * @name Timer Start and Stop |
kadonotakashi | 0:8fdf9a60065b | 321 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 322 | */ |
kadonotakashi | 0:8fdf9a60065b | 323 | |
kadonotakashi | 0:8fdf9a60065b | 324 | /*! |
kadonotakashi | 0:8fdf9a60065b | 325 | * @brief Starts the timer. |
kadonotakashi | 0:8fdf9a60065b | 326 | * |
kadonotakashi | 0:8fdf9a60065b | 327 | * After calling this function, the timer counts up to the CMR register value. |
kadonotakashi | 0:8fdf9a60065b | 328 | * Each time the timer reaches the CMR value and then increments, it generates a |
kadonotakashi | 0:8fdf9a60065b | 329 | * trigger pulse and sets the timeout interrupt flag. An interrupt is also |
kadonotakashi | 0:8fdf9a60065b | 330 | * triggered if the timer interrupt is enabled. |
kadonotakashi | 0:8fdf9a60065b | 331 | * |
kadonotakashi | 0:8fdf9a60065b | 332 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 333 | */ |
kadonotakashi | 0:8fdf9a60065b | 334 | static inline void LPTMR_StartTimer(LPTMR_Type* base) |
kadonotakashi | 0:8fdf9a60065b | 335 | { |
kadonotakashi | 0:8fdf9a60065b | 336 | uint32_t reg = base->CSR; |
kadonotakashi | 0:8fdf9a60065b | 337 | |
kadonotakashi | 0:8fdf9a60065b | 338 | /* Clear the TCF bit to avoid clearing the w1c bit when writing back. */ |
kadonotakashi | 0:8fdf9a60065b | 339 | reg &= ~(LPTMR_CSR_TCF_MASK); |
kadonotakashi | 0:8fdf9a60065b | 340 | reg |= LPTMR_CSR_TEN_MASK; |
kadonotakashi | 0:8fdf9a60065b | 341 | base->CSR = reg; |
kadonotakashi | 0:8fdf9a60065b | 342 | } |
kadonotakashi | 0:8fdf9a60065b | 343 | |
kadonotakashi | 0:8fdf9a60065b | 344 | /*! |
kadonotakashi | 0:8fdf9a60065b | 345 | * @brief Stops the timer. |
kadonotakashi | 0:8fdf9a60065b | 346 | * |
kadonotakashi | 0:8fdf9a60065b | 347 | * This function stops the timer and resets the timer's counter register. |
kadonotakashi | 0:8fdf9a60065b | 348 | * |
kadonotakashi | 0:8fdf9a60065b | 349 | * @param base LPTMR peripheral base address |
kadonotakashi | 0:8fdf9a60065b | 350 | */ |
kadonotakashi | 0:8fdf9a60065b | 351 | static inline void LPTMR_StopTimer(LPTMR_Type* base) |
kadonotakashi | 0:8fdf9a60065b | 352 | { |
kadonotakashi | 0:8fdf9a60065b | 353 | uint32_t reg = base->CSR; |
kadonotakashi | 0:8fdf9a60065b | 354 | |
kadonotakashi | 0:8fdf9a60065b | 355 | /* Clear the TCF bit to avoid clearing the w1c bit when writing back. */ |
kadonotakashi | 0:8fdf9a60065b | 356 | reg &= ~(LPTMR_CSR_TCF_MASK); |
kadonotakashi | 0:8fdf9a60065b | 357 | reg &= ~LPTMR_CSR_TEN_MASK; |
kadonotakashi | 0:8fdf9a60065b | 358 | base->CSR = reg; |
kadonotakashi | 0:8fdf9a60065b | 359 | } |
kadonotakashi | 0:8fdf9a60065b | 360 | |
kadonotakashi | 0:8fdf9a60065b | 361 | /*! @}*/ |
kadonotakashi | 0:8fdf9a60065b | 362 | |
kadonotakashi | 0:8fdf9a60065b | 363 | #if defined(__cplusplus) |
kadonotakashi | 0:8fdf9a60065b | 364 | } |
kadonotakashi | 0:8fdf9a60065b | 365 | #endif |
kadonotakashi | 0:8fdf9a60065b | 366 | |
kadonotakashi | 0:8fdf9a60065b | 367 | /*! @}*/ |
kadonotakashi | 0:8fdf9a60065b | 368 | |
kadonotakashi | 0:8fdf9a60065b | 369 | #endif /* _FSL_LPTMR_H_ */ |