takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_Freescale/TARGET_K20XX/serial_api.c@0:8fdf9a60065b, 2018-10-10 (annotated)

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /* mbed Microcontroller Library
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2006-2015 ARM Limited
kadonotakashi 0:8fdf9a60065b 3 *
kadonotakashi 0:8fdf9a60065b 4 * Licensed under the Apache License, Version 2.0 (the "License");
kadonotakashi 0:8fdf9a60065b 5 * you may not use this file except in compliance with the License.
kadonotakashi 0:8fdf9a60065b 6 * You may obtain a copy of the License at
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * http://www.apache.org/licenses/LICENSE-2.0
kadonotakashi 0:8fdf9a60065b 9 *
kadonotakashi 0:8fdf9a60065b 10 * Unless required by applicable law or agreed to in writing, software
kadonotakashi 0:8fdf9a60065b 11 * distributed under the License is distributed on an "AS IS" BASIS,
kadonotakashi 0:8fdf9a60065b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kadonotakashi 0:8fdf9a60065b 13 * See the License for the specific language governing permissions and
kadonotakashi 0:8fdf9a60065b 14 * limitations under the License.
kadonotakashi 0:8fdf9a60065b 15 */
kadonotakashi 0:8fdf9a60065b 16 #include "mbed_assert.h"
kadonotakashi 0:8fdf9a60065b 17 #include "serial_api.h"
kadonotakashi 0:8fdf9a60065b 18
kadonotakashi 0:8fdf9a60065b 19 #include <string.h>
kadonotakashi 0:8fdf9a60065b 20
kadonotakashi 0:8fdf9a60065b 21 #include "cmsis.h"
kadonotakashi 0:8fdf9a60065b 22 #include "pinmap.h"
kadonotakashi 0:8fdf9a60065b 23 #include "clk_freqs.h"
kadonotakashi 0:8fdf9a60065b 24 #include "PeripheralPins.h"
kadonotakashi 0:8fdf9a60065b 25
kadonotakashi 0:8fdf9a60065b 26 #define UART_NUM 3
kadonotakashi 0:8fdf9a60065b 27
kadonotakashi 0:8fdf9a60065b 28 static uint32_t serial_irq_ids[UART_NUM] = {0};
kadonotakashi 0:8fdf9a60065b 29 static uart_irq_handler irq_handler;
kadonotakashi 0:8fdf9a60065b 30
kadonotakashi 0:8fdf9a60065b 31 int stdio_uart_inited = 0;
kadonotakashi 0:8fdf9a60065b 32 serial_t stdio_uart;
kadonotakashi 0:8fdf9a60065b 33
kadonotakashi 0:8fdf9a60065b 34 void serial_init(serial_t *obj, PinName tx, PinName rx) {
kadonotakashi 0:8fdf9a60065b 35 // determine the UART to use
kadonotakashi 0:8fdf9a60065b 36 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
kadonotakashi 0:8fdf9a60065b 37 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
kadonotakashi 0:8fdf9a60065b 38 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
kadonotakashi 0:8fdf9a60065b 39 MBED_ASSERT((int)uart != NC);
kadonotakashi 0:8fdf9a60065b 40
kadonotakashi 0:8fdf9a60065b 41 obj->uart = (UART_Type *)uart;
kadonotakashi 0:8fdf9a60065b 42 // enable clk
kadonotakashi 0:8fdf9a60065b 43 switch (uart) {
kadonotakashi 0:8fdf9a60065b 44 case UART_0:
kadonotakashi 0:8fdf9a60065b 45 mcgpllfll_frequency();
kadonotakashi 0:8fdf9a60065b 46 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
kadonotakashi 0:8fdf9a60065b 47 break;
kadonotakashi 0:8fdf9a60065b 48 case UART_1:
kadonotakashi 0:8fdf9a60065b 49 mcgpllfll_frequency();
kadonotakashi 0:8fdf9a60065b 50 SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
kadonotakashi 0:8fdf9a60065b 51 break;
kadonotakashi 0:8fdf9a60065b 52 case UART_2:
kadonotakashi 0:8fdf9a60065b 53 SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
kadonotakashi 0:8fdf9a60065b 54 break;
kadonotakashi 0:8fdf9a60065b 55 }
kadonotakashi 0:8fdf9a60065b 56 // Disable UART before changing registers
kadonotakashi 0:8fdf9a60065b 57 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
kadonotakashi 0:8fdf9a60065b 58
kadonotakashi 0:8fdf9a60065b 59 switch (uart) {
kadonotakashi 0:8fdf9a60065b 60 case UART_0:
kadonotakashi 0:8fdf9a60065b 61 obj->index = 0;
kadonotakashi 0:8fdf9a60065b 62 break;
kadonotakashi 0:8fdf9a60065b 63 case UART_1:
kadonotakashi 0:8fdf9a60065b 64 obj->index = 1;
kadonotakashi 0:8fdf9a60065b 65 break;
kadonotakashi 0:8fdf9a60065b 66 case UART_2:
kadonotakashi 0:8fdf9a60065b 67 obj->index = 2;
kadonotakashi 0:8fdf9a60065b 68 break;
kadonotakashi 0:8fdf9a60065b 69 }
kadonotakashi 0:8fdf9a60065b 70
kadonotakashi 0:8fdf9a60065b 71 // set default baud rate and format
kadonotakashi 0:8fdf9a60065b 72 serial_baud (obj, 9600);
kadonotakashi 0:8fdf9a60065b 73 serial_format(obj, 8, ParityNone, 1);
kadonotakashi 0:8fdf9a60065b 74
kadonotakashi 0:8fdf9a60065b 75 // pinout the chosen uart
kadonotakashi 0:8fdf9a60065b 76 pinmap_pinout(tx, PinMap_UART_TX);
kadonotakashi 0:8fdf9a60065b 77 pinmap_pinout(rx, PinMap_UART_RX);
kadonotakashi 0:8fdf9a60065b 78
kadonotakashi 0:8fdf9a60065b 79 // set rx/tx pins in PullUp mode
kadonotakashi 0:8fdf9a60065b 80 if (tx != NC) {
kadonotakashi 0:8fdf9a60065b 81 pin_mode(tx, PullUp);
kadonotakashi 0:8fdf9a60065b 82 }
kadonotakashi 0:8fdf9a60065b 83 if (rx != NC) {
kadonotakashi 0:8fdf9a60065b 84 pin_mode(rx, PullUp);
kadonotakashi 0:8fdf9a60065b 85 }
kadonotakashi 0:8fdf9a60065b 86
kadonotakashi 0:8fdf9a60065b 87 obj->uart->C2 |= (UART_C2_RE_MASK | UART_C2_TE_MASK);
kadonotakashi 0:8fdf9a60065b 88
kadonotakashi 0:8fdf9a60065b 89 if (uart == STDIO_UART) {
kadonotakashi 0:8fdf9a60065b 90 stdio_uart_inited = 1;
kadonotakashi 0:8fdf9a60065b 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
kadonotakashi 0:8fdf9a60065b 92 }
kadonotakashi 0:8fdf9a60065b 93 }
kadonotakashi 0:8fdf9a60065b 94
kadonotakashi 0:8fdf9a60065b 95 void serial_free(serial_t *obj) {
kadonotakashi 0:8fdf9a60065b 96 serial_irq_ids[obj->index] = 0;
kadonotakashi 0:8fdf9a60065b 97 }
kadonotakashi 0:8fdf9a60065b 98
kadonotakashi 0:8fdf9a60065b 99 void serial_baud(serial_t *obj, int baudrate) {
kadonotakashi 0:8fdf9a60065b 100 // save C2 state
kadonotakashi 0:8fdf9a60065b 101 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
kadonotakashi 0:8fdf9a60065b 102
kadonotakashi 0:8fdf9a60065b 103 // Disable UART before changing registers
kadonotakashi 0:8fdf9a60065b 104 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
kadonotakashi 0:8fdf9a60065b 105
kadonotakashi 0:8fdf9a60065b 106 uint32_t PCLK;
kadonotakashi 0:8fdf9a60065b 107 if (obj->uart != UART2) {
kadonotakashi 0:8fdf9a60065b 108 PCLK = mcgpllfll_frequency();
kadonotakashi 0:8fdf9a60065b 109 }
kadonotakashi 0:8fdf9a60065b 110 else {
kadonotakashi 0:8fdf9a60065b 111 PCLK = bus_frequency();
kadonotakashi 0:8fdf9a60065b 112 }
kadonotakashi 0:8fdf9a60065b 113
kadonotakashi 0:8fdf9a60065b 114 uint16_t DL = PCLK / (16 * baudrate);
kadonotakashi 0:8fdf9a60065b 115 uint32_t BRFA = (2 * PCLK) / baudrate - 32 * DL;
kadonotakashi 0:8fdf9a60065b 116
kadonotakashi 0:8fdf9a60065b 117 // set BDH and BDL
kadonotakashi 0:8fdf9a60065b 118 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
kadonotakashi 0:8fdf9a60065b 119 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
kadonotakashi 0:8fdf9a60065b 120
kadonotakashi 0:8fdf9a60065b 121 obj->uart->C4 &= ~0x1F;
kadonotakashi 0:8fdf9a60065b 122 obj->uart->C4 |= BRFA & 0x1F;
kadonotakashi 0:8fdf9a60065b 123
kadonotakashi 0:8fdf9a60065b 124 // restore C2 state
kadonotakashi 0:8fdf9a60065b 125 obj->uart->C2 |= c2_state;
kadonotakashi 0:8fdf9a60065b 126 }
kadonotakashi 0:8fdf9a60065b 127
kadonotakashi 0:8fdf9a60065b 128 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
kadonotakashi 0:8fdf9a60065b 129 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
kadonotakashi 0:8fdf9a60065b 130 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
kadonotakashi 0:8fdf9a60065b 131 MBED_ASSERT((data_bits == 8) || (data_bits == 9));
kadonotakashi 0:8fdf9a60065b 132
kadonotakashi 0:8fdf9a60065b 133 // save C2 state
kadonotakashi 0:8fdf9a60065b 134 uint32_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
kadonotakashi 0:8fdf9a60065b 135
kadonotakashi 0:8fdf9a60065b 136 // Disable UART before changing registers
kadonotakashi 0:8fdf9a60065b 137 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
kadonotakashi 0:8fdf9a60065b 138
kadonotakashi 0:8fdf9a60065b 139 // 8 data bits = 0 ... 9 data bits = 1
kadonotakashi 0:8fdf9a60065b 140 data_bits -= 8;
kadonotakashi 0:8fdf9a60065b 141
kadonotakashi 0:8fdf9a60065b 142 uint32_t parity_enable, parity_select;
kadonotakashi 0:8fdf9a60065b 143 switch (parity) {
kadonotakashi 0:8fdf9a60065b 144 case ParityNone:
kadonotakashi 0:8fdf9a60065b 145 parity_enable = 0;
kadonotakashi 0:8fdf9a60065b 146 parity_select = 0;
kadonotakashi 0:8fdf9a60065b 147 break;
kadonotakashi 0:8fdf9a60065b 148 case ParityOdd :
kadonotakashi 0:8fdf9a60065b 149 parity_enable = 1;
kadonotakashi 0:8fdf9a60065b 150 parity_select = 1;
kadonotakashi 0:8fdf9a60065b 151 data_bits++;
kadonotakashi 0:8fdf9a60065b 152 break;
kadonotakashi 0:8fdf9a60065b 153 case ParityEven:
kadonotakashi 0:8fdf9a60065b 154 parity_enable = 1;
kadonotakashi 0:8fdf9a60065b 155 parity_select = 0;
kadonotakashi 0:8fdf9a60065b 156 data_bits++;
kadonotakashi 0:8fdf9a60065b 157 break;
kadonotakashi 0:8fdf9a60065b 158 default:
kadonotakashi 0:8fdf9a60065b 159 break;
kadonotakashi 0:8fdf9a60065b 160 }
kadonotakashi 0:8fdf9a60065b 161
kadonotakashi 0:8fdf9a60065b 162 stop_bits -= 1;
kadonotakashi 0:8fdf9a60065b 163
kadonotakashi 0:8fdf9a60065b 164 uint32_t m10 = 0;
kadonotakashi 0:8fdf9a60065b 165
kadonotakashi 0:8fdf9a60065b 166 // 9 data bits + parity - only uart0 support
kadonotakashi 0:8fdf9a60065b 167 if (data_bits == 2) {
kadonotakashi 0:8fdf9a60065b 168 MBED_ASSERT(obj->index == 0);
kadonotakashi 0:8fdf9a60065b 169 data_bits = 0;
kadonotakashi 0:8fdf9a60065b 170 m10 = 1;
kadonotakashi 0:8fdf9a60065b 171 }
kadonotakashi 0:8fdf9a60065b 172
kadonotakashi 0:8fdf9a60065b 173 // data bits, parity and parity mode
kadonotakashi 0:8fdf9a60065b 174 obj->uart->C1 = ((data_bits << 4)
kadonotakashi 0:8fdf9a60065b 175 | (parity_enable << 1)
kadonotakashi 0:8fdf9a60065b 176 | (parity_select << 0));
kadonotakashi 0:8fdf9a60065b 177
kadonotakashi 0:8fdf9a60065b 178 //enable 10bit mode if needed
kadonotakashi 0:8fdf9a60065b 179 if (obj->index == 0) {
kadonotakashi 0:8fdf9a60065b 180 obj->uart->C4 &= ~UART_C4_M10_MASK;
kadonotakashi 0:8fdf9a60065b 181 obj->uart->C4 |= (m10 << UART_C4_M10_SHIFT);
kadonotakashi 0:8fdf9a60065b 182 }
kadonotakashi 0:8fdf9a60065b 183
kadonotakashi 0:8fdf9a60065b 184 // stop bits
kadonotakashi 0:8fdf9a60065b 185 obj->uart->BDH &= ~UART_BDH_SBR_MASK;
kadonotakashi 0:8fdf9a60065b 186 obj->uart->BDH |= (stop_bits << UART_BDH_SBR_SHIFT);
kadonotakashi 0:8fdf9a60065b 187
kadonotakashi 0:8fdf9a60065b 188 // restore C2 state
kadonotakashi 0:8fdf9a60065b 189 obj->uart->C2 |= c2_state;
kadonotakashi 0:8fdf9a60065b 190 }
kadonotakashi 0:8fdf9a60065b 191
kadonotakashi 0:8fdf9a60065b 192 /******************************************************************************
kadonotakashi 0:8fdf9a60065b 193 * INTERRUPTS HANDLING
kadonotakashi 0:8fdf9a60065b 194 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 195 static inline void uart_irq(uint8_t status, uint32_t index) {
kadonotakashi 0:8fdf9a60065b 196 if (serial_irq_ids[index] != 0) {
kadonotakashi 0:8fdf9a60065b 197 if (status & UART_S1_TDRE_MASK)
kadonotakashi 0:8fdf9a60065b 198 irq_handler(serial_irq_ids[index], TxIrq);
kadonotakashi 0:8fdf9a60065b 199
kadonotakashi 0:8fdf9a60065b 200 if (status & UART_S1_RDRF_MASK)
kadonotakashi 0:8fdf9a60065b 201 irq_handler(serial_irq_ids[index], RxIrq);
kadonotakashi 0:8fdf9a60065b 202 }
kadonotakashi 0:8fdf9a60065b 203 }
kadonotakashi 0:8fdf9a60065b 204
kadonotakashi 0:8fdf9a60065b 205 void uart0_irq() {uart_irq(UART0->S1, 0);}
kadonotakashi 0:8fdf9a60065b 206 void uart1_irq() {uart_irq(UART1->S1, 1);}
kadonotakashi 0:8fdf9a60065b 207 void uart2_irq() {uart_irq(UART2->S1, 2);}
kadonotakashi 0:8fdf9a60065b 208
kadonotakashi 0:8fdf9a60065b 209 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
kadonotakashi 0:8fdf9a60065b 210 irq_handler = handler;
kadonotakashi 0:8fdf9a60065b 211 serial_irq_ids[obj->index] = id;
kadonotakashi 0:8fdf9a60065b 212 }
kadonotakashi 0:8fdf9a60065b 213
kadonotakashi 0:8fdf9a60065b 214 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
kadonotakashi 0:8fdf9a60065b 215 IRQn_Type irq_n = (IRQn_Type)0;
kadonotakashi 0:8fdf9a60065b 216 uint32_t vector = 0;
kadonotakashi 0:8fdf9a60065b 217 switch ((int)obj->uart) {
kadonotakashi 0:8fdf9a60065b 218 case UART_0:
kadonotakashi 0:8fdf9a60065b 219 irq_n=UART0_RX_TX_IRQn;
kadonotakashi 0:8fdf9a60065b 220 vector = (uint32_t)&uart0_irq;
kadonotakashi 0:8fdf9a60065b 221 break;
kadonotakashi 0:8fdf9a60065b 222 case UART_1:
kadonotakashi 0:8fdf9a60065b 223 irq_n=UART1_RX_TX_IRQn;
kadonotakashi 0:8fdf9a60065b 224 vector = (uint32_t)&uart1_irq;
kadonotakashi 0:8fdf9a60065b 225 break;
kadonotakashi 0:8fdf9a60065b 226 case UART_2:
kadonotakashi 0:8fdf9a60065b 227 irq_n=UART2_RX_TX_IRQn;
kadonotakashi 0:8fdf9a60065b 228 vector = (uint32_t)&uart2_irq;
kadonotakashi 0:8fdf9a60065b 229 break;
kadonotakashi 0:8fdf9a60065b 230 }
kadonotakashi 0:8fdf9a60065b 231
kadonotakashi 0:8fdf9a60065b 232 if (enable) {
kadonotakashi 0:8fdf9a60065b 233 switch (irq) {
kadonotakashi 0:8fdf9a60065b 234 case RxIrq:
kadonotakashi 0:8fdf9a60065b 235 obj->uart->C2 |= (UART_C2_RIE_MASK);
kadonotakashi 0:8fdf9a60065b 236 break;
kadonotakashi 0:8fdf9a60065b 237 case TxIrq:
kadonotakashi 0:8fdf9a60065b 238 obj->uart->C2 |= (UART_C2_TIE_MASK);
kadonotakashi 0:8fdf9a60065b 239 break;
kadonotakashi 0:8fdf9a60065b 240 }
kadonotakashi 0:8fdf9a60065b 241 NVIC_SetVector(irq_n, vector);
kadonotakashi 0:8fdf9a60065b 242 NVIC_EnableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 243
kadonotakashi 0:8fdf9a60065b 244 } else { // disable
kadonotakashi 0:8fdf9a60065b 245 int all_disabled = 0;
kadonotakashi 0:8fdf9a60065b 246 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
kadonotakashi 0:8fdf9a60065b 247 switch (irq) {
kadonotakashi 0:8fdf9a60065b 248 case RxIrq:
kadonotakashi 0:8fdf9a60065b 249 obj->uart->C2 &= ~(UART_C2_RIE_MASK);
kadonotakashi 0:8fdf9a60065b 250 break;
kadonotakashi 0:8fdf9a60065b 251 case TxIrq:
kadonotakashi 0:8fdf9a60065b 252 obj->uart->C2 &= ~(UART_C2_TIE_MASK);
kadonotakashi 0:8fdf9a60065b 253 break;
kadonotakashi 0:8fdf9a60065b 254 }
kadonotakashi 0:8fdf9a60065b 255 switch (other_irq) {
kadonotakashi 0:8fdf9a60065b 256 case RxIrq:
kadonotakashi 0:8fdf9a60065b 257 all_disabled = (obj->uart->C2 & (UART_C2_RIE_MASK)) == 0;
kadonotakashi 0:8fdf9a60065b 258 break;
kadonotakashi 0:8fdf9a60065b 259 case TxIrq:
kadonotakashi 0:8fdf9a60065b 260 all_disabled = (obj->uart->C2 & (UART_C2_TIE_MASK)) == 0;
kadonotakashi 0:8fdf9a60065b 261 break;
kadonotakashi 0:8fdf9a60065b 262 }
kadonotakashi 0:8fdf9a60065b 263 if (all_disabled)
kadonotakashi 0:8fdf9a60065b 264 NVIC_DisableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 265 }
kadonotakashi 0:8fdf9a60065b 266 }
kadonotakashi 0:8fdf9a60065b 267
kadonotakashi 0:8fdf9a60065b 268 int serial_getc(serial_t *obj) {
kadonotakashi 0:8fdf9a60065b 269 while (!serial_readable(obj));
kadonotakashi 0:8fdf9a60065b 270 return obj->uart->D;
kadonotakashi 0:8fdf9a60065b 271 }
kadonotakashi 0:8fdf9a60065b 272
kadonotakashi 0:8fdf9a60065b 273 void serial_putc(serial_t *obj, int c) {
kadonotakashi 0:8fdf9a60065b 274 while (!serial_writable(obj));
kadonotakashi 0:8fdf9a60065b 275 obj->uart->D = c;
kadonotakashi 0:8fdf9a60065b 276 }
kadonotakashi 0:8fdf9a60065b 277
kadonotakashi 0:8fdf9a60065b 278 int serial_readable(serial_t *obj) {
kadonotakashi 0:8fdf9a60065b 279
kadonotakashi 0:8fdf9a60065b 280 return (obj->uart->S1 & UART_S1_RDRF_MASK);
kadonotakashi 0:8fdf9a60065b 281 }
kadonotakashi 0:8fdf9a60065b 282
kadonotakashi 0:8fdf9a60065b 283 int serial_writable(serial_t *obj) {
kadonotakashi 0:8fdf9a60065b 284
kadonotakashi 0:8fdf9a60065b 285 return (obj->uart->S1 & UART_S1_TDRE_MASK);
kadonotakashi 0:8fdf9a60065b 286 }
kadonotakashi 0:8fdf9a60065b 287
kadonotakashi 0:8fdf9a60065b 288 void serial_clear(serial_t *obj) {
kadonotakashi 0:8fdf9a60065b 289 }
kadonotakashi 0:8fdf9a60065b 290
kadonotakashi 0:8fdf9a60065b 291 void serial_pinout_tx(PinName tx) {
kadonotakashi 0:8fdf9a60065b 292 pinmap_pinout(tx, PinMap_UART_TX);
kadonotakashi 0:8fdf9a60065b 293 }
kadonotakashi 0:8fdf9a60065b 294
kadonotakashi 0:8fdf9a60065b 295 void serial_break_set(serial_t *obj) {
kadonotakashi 0:8fdf9a60065b 296 obj->uart->C2 |= UART_C2_SBK_MASK;
kadonotakashi 0:8fdf9a60065b 297 }
kadonotakashi 0:8fdf9a60065b 298
kadonotakashi 0:8fdf9a60065b 299 void serial_break_clear(serial_t *obj) {
kadonotakashi 0:8fdf9a60065b 300 obj->uart->C2 &= ~UART_C2_SBK_MASK;
kadonotakashi 0:8fdf9a60065b 301 }