takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_Atmel/TARGET_SAM_CortexM4/serial_api.c@0:8fdf9a60065b, 2018-10-10 (annotated)

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /* mbed Microcontroller Library
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2006-2015 ARM Limited
kadonotakashi 0:8fdf9a60065b 3 *
kadonotakashi 0:8fdf9a60065b 4 * Licensed under the Apache License, Version 2.0 (the "License");
kadonotakashi 0:8fdf9a60065b 5 * you may not use this file except in compliance with the License.
kadonotakashi 0:8fdf9a60065b 6 * You may obtain a copy of the License at
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * http://www.apache.org/licenses/LICENSE-2.0
kadonotakashi 0:8fdf9a60065b 9 *
kadonotakashi 0:8fdf9a60065b 10 * Unless required by applicable law or agreed to in writing, software
kadonotakashi 0:8fdf9a60065b 11 * distributed under the License is distributed on an "AS IS" BASIS,
kadonotakashi 0:8fdf9a60065b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kadonotakashi 0:8fdf9a60065b 13 * See the License for the specific language governing permissions and
kadonotakashi 0:8fdf9a60065b 14 * limitations under the License.
kadonotakashi 0:8fdf9a60065b 15 */
kadonotakashi 0:8fdf9a60065b 16 #include <string.h>
kadonotakashi 0:8fdf9a60065b 17 #include "mbed_assert.h"
kadonotakashi 0:8fdf9a60065b 18 #include "cmsis.h"
kadonotakashi 0:8fdf9a60065b 19 #include "serial_api.h"
kadonotakashi 0:8fdf9a60065b 20 #include "sysclk.h"
kadonotakashi 0:8fdf9a60065b 21 #include "serial_platform.h"
kadonotakashi 0:8fdf9a60065b 22 #include "ioport.h"
kadonotakashi 0:8fdf9a60065b 23 #include "pinmap.h"
kadonotakashi 0:8fdf9a60065b 24 #include "PeripheralPins.h"
kadonotakashi 0:8fdf9a60065b 25 #include "pdc.h"
kadonotakashi 0:8fdf9a60065b 26
kadonotakashi 0:8fdf9a60065b 27 #if DEVICE_SERIAL_ASYNCH
kadonotakashi 0:8fdf9a60065b 28 #define pUSART_S(obj) obj->serial.uart
kadonotakashi 0:8fdf9a60065b 29 #define pSERIAL_S(obj) ((struct serial_s*)&(obj->serial))
kadonotakashi 0:8fdf9a60065b 30 #else
kadonotakashi 0:8fdf9a60065b 31 #define pUSART_S(obj) obj->uart
kadonotakashi 0:8fdf9a60065b 32 #define pSERIAL_S(obj) ((struct serial_s*)obj)
kadonotakashi 0:8fdf9a60065b 33 #endif
kadonotakashi 0:8fdf9a60065b 34 #define _USART(obj) ((Usart*)pUSART_S(obj))
kadonotakashi 0:8fdf9a60065b 35 #define USART_NUM 8
kadonotakashi 0:8fdf9a60065b 36
kadonotakashi 0:8fdf9a60065b 37 static uint8_t serial_get_index(serial_t *obj);
kadonotakashi 0:8fdf9a60065b 38 static IRQn_Type get_serial_irq_num (serial_t *obj);
kadonotakashi 0:8fdf9a60065b 39 static uint32_t get_serial_vector (serial_t *obj);
kadonotakashi 0:8fdf9a60065b 40 static uint32_t serial_irq_ids[USART_NUM] = {0};
kadonotakashi 0:8fdf9a60065b 41 static uart_irq_handler irq_handler;
kadonotakashi 0:8fdf9a60065b 42 static void uart0_irq(void);
kadonotakashi 0:8fdf9a60065b 43 static void uart1_irq(void);
kadonotakashi 0:8fdf9a60065b 44 static void uart2_irq(void);
kadonotakashi 0:8fdf9a60065b 45 static void uart3_irq(void);
kadonotakashi 0:8fdf9a60065b 46 static void uart4_irq(void);
kadonotakashi 0:8fdf9a60065b 47 static void uart5_irq(void);
kadonotakashi 0:8fdf9a60065b 48 static void uart6_irq(void);
kadonotakashi 0:8fdf9a60065b 49 static void uart7_irq(void);
kadonotakashi 0:8fdf9a60065b 50
kadonotakashi 0:8fdf9a60065b 51
kadonotakashi 0:8fdf9a60065b 52 int stdio_uart_inited = 0;
kadonotakashi 0:8fdf9a60065b 53 serial_t stdio_uart;
kadonotakashi 0:8fdf9a60065b 54
kadonotakashi 0:8fdf9a60065b 55 extern uint8_t g_sys_init;
kadonotakashi 0:8fdf9a60065b 56
kadonotakashi 0:8fdf9a60065b 57 static int get_usart_clock_id(UARTName peripheral)
kadonotakashi 0:8fdf9a60065b 58 {
kadonotakashi 0:8fdf9a60065b 59 int cid;
kadonotakashi 0:8fdf9a60065b 60 switch (peripheral) {
kadonotakashi 0:8fdf9a60065b 61 case UART_0:
kadonotakashi 0:8fdf9a60065b 62 cid = ID_FLEXCOM0;
kadonotakashi 0:8fdf9a60065b 63 break;
kadonotakashi 0:8fdf9a60065b 64 case UART_1:
kadonotakashi 0:8fdf9a60065b 65 cid = ID_FLEXCOM1;
kadonotakashi 0:8fdf9a60065b 66 break;
kadonotakashi 0:8fdf9a60065b 67 case UART_2:
kadonotakashi 0:8fdf9a60065b 68 cid = ID_FLEXCOM2;
kadonotakashi 0:8fdf9a60065b 69 break;
kadonotakashi 0:8fdf9a60065b 70 case UART_3:
kadonotakashi 0:8fdf9a60065b 71 cid = ID_FLEXCOM3;
kadonotakashi 0:8fdf9a60065b 72 break;
kadonotakashi 0:8fdf9a60065b 73 case UART_4:
kadonotakashi 0:8fdf9a60065b 74 cid = ID_FLEXCOM4;
kadonotakashi 0:8fdf9a60065b 75 break;
kadonotakashi 0:8fdf9a60065b 76 case UART_5:
kadonotakashi 0:8fdf9a60065b 77 cid = ID_FLEXCOM5;
kadonotakashi 0:8fdf9a60065b 78 break;
kadonotakashi 0:8fdf9a60065b 79 case UART_6:
kadonotakashi 0:8fdf9a60065b 80 cid = ID_FLEXCOM6;
kadonotakashi 0:8fdf9a60065b 81 break;
kadonotakashi 0:8fdf9a60065b 82 case UART_7:
kadonotakashi 0:8fdf9a60065b 83 cid = ID_FLEXCOM7;
kadonotakashi 0:8fdf9a60065b 84 break;
kadonotakashi 0:8fdf9a60065b 85 default :
kadonotakashi 0:8fdf9a60065b 86 cid = NC;
kadonotakashi 0:8fdf9a60065b 87 break;
kadonotakashi 0:8fdf9a60065b 88 }
kadonotakashi 0:8fdf9a60065b 89 return cid;
kadonotakashi 0:8fdf9a60065b 90 }
kadonotakashi 0:8fdf9a60065b 91
kadonotakashi 0:8fdf9a60065b 92 static int get_flexcom_id(UARTName peripheral)
kadonotakashi 0:8fdf9a60065b 93 {
kadonotakashi 0:8fdf9a60065b 94 int fid;
kadonotakashi 0:8fdf9a60065b 95 switch (peripheral) {
kadonotakashi 0:8fdf9a60065b 96 case UART_0:
kadonotakashi 0:8fdf9a60065b 97 fid = (int)FLEXCOM0;
kadonotakashi 0:8fdf9a60065b 98 break;
kadonotakashi 0:8fdf9a60065b 99 case UART_1:
kadonotakashi 0:8fdf9a60065b 100 fid = (int)FLEXCOM1;
kadonotakashi 0:8fdf9a60065b 101 break;
kadonotakashi 0:8fdf9a60065b 102 case UART_2:
kadonotakashi 0:8fdf9a60065b 103 fid = (int)FLEXCOM2;
kadonotakashi 0:8fdf9a60065b 104 break;
kadonotakashi 0:8fdf9a60065b 105 case UART_3:
kadonotakashi 0:8fdf9a60065b 106 fid = (int)FLEXCOM3;
kadonotakashi 0:8fdf9a60065b 107 break;
kadonotakashi 0:8fdf9a60065b 108 case UART_4:
kadonotakashi 0:8fdf9a60065b 109 fid = (int)FLEXCOM4;
kadonotakashi 0:8fdf9a60065b 110 break;
kadonotakashi 0:8fdf9a60065b 111 case UART_5:
kadonotakashi 0:8fdf9a60065b 112 fid = (int)FLEXCOM5;
kadonotakashi 0:8fdf9a60065b 113 break;
kadonotakashi 0:8fdf9a60065b 114 case UART_6:
kadonotakashi 0:8fdf9a60065b 115 fid = (int)FLEXCOM6;
kadonotakashi 0:8fdf9a60065b 116 break;
kadonotakashi 0:8fdf9a60065b 117 case UART_7:
kadonotakashi 0:8fdf9a60065b 118 fid = (int)FLEXCOM7;
kadonotakashi 0:8fdf9a60065b 119 break;
kadonotakashi 0:8fdf9a60065b 120 default :
kadonotakashi 0:8fdf9a60065b 121 fid = NC;
kadonotakashi 0:8fdf9a60065b 122 break;
kadonotakashi 0:8fdf9a60065b 123 }
kadonotakashi 0:8fdf9a60065b 124 return fid;
kadonotakashi 0:8fdf9a60065b 125 }
kadonotakashi 0:8fdf9a60065b 126
kadonotakashi 0:8fdf9a60065b 127 void serial_init(serial_t *obj, PinName tx, PinName rx)
kadonotakashi 0:8fdf9a60065b 128 {
kadonotakashi 0:8fdf9a60065b 129 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 130 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 131 int clockid = NC, flexcom = NC;
kadonotakashi 0:8fdf9a60065b 132
kadonotakashi 0:8fdf9a60065b 133 /*To determine the uart peripheral associated with pins*/
kadonotakashi 0:8fdf9a60065b 134 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
kadonotakashi 0:8fdf9a60065b 135 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
kadonotakashi 0:8fdf9a60065b 136 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
kadonotakashi 0:8fdf9a60065b 137
kadonotakashi 0:8fdf9a60065b 138 MBED_ASSERT(uart != (UARTName)NC);
kadonotakashi 0:8fdf9a60065b 139
kadonotakashi 0:8fdf9a60065b 140 if (g_sys_init == 0) {
kadonotakashi 0:8fdf9a60065b 141 sysclk_init();
kadonotakashi 0:8fdf9a60065b 142 system_board_init();
kadonotakashi 0:8fdf9a60065b 143 g_sys_init = 1;
kadonotakashi 0:8fdf9a60065b 144 }
kadonotakashi 0:8fdf9a60065b 145 pUSART_S(obj) = uart;
kadonotakashi 0:8fdf9a60065b 146 pSERIAL_S(obj)->uart_serial_options.baudrate = (9600UL);
kadonotakashi 0:8fdf9a60065b 147 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_8_BIT;
kadonotakashi 0:8fdf9a60065b 148 pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_NO;
kadonotakashi 0:8fdf9a60065b 149 pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_1_BIT;
kadonotakashi 0:8fdf9a60065b 150 pSERIAL_S(obj)->actrec = false;
kadonotakashi 0:8fdf9a60065b 151 pSERIAL_S(obj)->acttra = false;
kadonotakashi 0:8fdf9a60065b 152
kadonotakashi 0:8fdf9a60065b 153 /* Configure UART pins */
kadonotakashi 0:8fdf9a60065b 154 if(tx != NC) {
kadonotakashi 0:8fdf9a60065b 155 pin_function(tx, pinmap_find_function(tx, PinMap_UART_TX));
kadonotakashi 0:8fdf9a60065b 156 ioport_disable_pin(tx);
kadonotakashi 0:8fdf9a60065b 157 }
kadonotakashi 0:8fdf9a60065b 158 if(rx != NC) {
kadonotakashi 0:8fdf9a60065b 159 pin_function(rx, pinmap_find_function(rx, PinMap_UART_RX));
kadonotakashi 0:8fdf9a60065b 160 ioport_disable_pin(rx);
kadonotakashi 0:8fdf9a60065b 161 }
kadonotakashi 0:8fdf9a60065b 162 clockid = get_usart_clock_id(uart);
kadonotakashi 0:8fdf9a60065b 163 if (clockid != NC) {
kadonotakashi 0:8fdf9a60065b 164 sysclk_enable_peripheral_clock(clockid);
kadonotakashi 0:8fdf9a60065b 165 }
kadonotakashi 0:8fdf9a60065b 166
kadonotakashi 0:8fdf9a60065b 167 flexcom = (int)get_flexcom_id(uart);
kadonotakashi 0:8fdf9a60065b 168 #if (!SAM4L)
kadonotakashi 0:8fdf9a60065b 169 #if (SAMG55)
kadonotakashi 0:8fdf9a60065b 170 /* Configure flexcom for usart */
kadonotakashi 0:8fdf9a60065b 171 flexcom_enable((Flexcom* )flexcom);
kadonotakashi 0:8fdf9a60065b 172 flexcom_set_opmode((Flexcom* )flexcom, FLEXCOM_USART);
kadonotakashi 0:8fdf9a60065b 173 #else
kadonotakashi 0:8fdf9a60065b 174 sysclk_enable_peripheral_clock(clockid);
kadonotakashi 0:8fdf9a60065b 175 #endif
kadonotakashi 0:8fdf9a60065b 176 /* Configure USART */
kadonotakashi 0:8fdf9a60065b 177 usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options),
kadonotakashi 0:8fdf9a60065b 178 sysclk_get_peripheral_hz());
kadonotakashi 0:8fdf9a60065b 179 #endif
kadonotakashi 0:8fdf9a60065b 180 #if (SAM4L)
kadonotakashi 0:8fdf9a60065b 181 sysclk_enable_peripheral_clock(clockid);
kadonotakashi 0:8fdf9a60065b 182 /* Configure USART */
kadonotakashi 0:8fdf9a60065b 183 usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options, sysclk_get_peripheral_bus_hz((Usart*)uart));
kadonotakashi 0:8fdf9a60065b 184 #endif
kadonotakashi 0:8fdf9a60065b 185 /* Disable rx and tx in case 1 line only required to be configured for usart */
kadonotakashi 0:8fdf9a60065b 186 usart_disable_tx((Usart*)uart);
kadonotakashi 0:8fdf9a60065b 187 usart_disable_rx((Usart*)uart);
kadonotakashi 0:8fdf9a60065b 188 /* Enable the receiver and transmitter. */
kadonotakashi 0:8fdf9a60065b 189 if(tx != NC) {
kadonotakashi 0:8fdf9a60065b 190 usart_enable_tx((Usart*)uart);
kadonotakashi 0:8fdf9a60065b 191 }
kadonotakashi 0:8fdf9a60065b 192 if(rx != NC) {
kadonotakashi 0:8fdf9a60065b 193 usart_enable_rx((Usart*)uart);
kadonotakashi 0:8fdf9a60065b 194 }
kadonotakashi 0:8fdf9a60065b 195
kadonotakashi 0:8fdf9a60065b 196 if(uart == STDIO_UART) {
kadonotakashi 0:8fdf9a60065b 197 stdio_uart_inited = 1;
kadonotakashi 0:8fdf9a60065b 198 memcpy(&stdio_uart, obj, sizeof(serial_t));
kadonotakashi 0:8fdf9a60065b 199 }
kadonotakashi 0:8fdf9a60065b 200 }
kadonotakashi 0:8fdf9a60065b 201
kadonotakashi 0:8fdf9a60065b 202 void serial_free(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 203 {
kadonotakashi 0:8fdf9a60065b 204 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 205 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 206 usart_reset(_USART(obj));
kadonotakashi 0:8fdf9a60065b 207 }
kadonotakashi 0:8fdf9a60065b 208
kadonotakashi 0:8fdf9a60065b 209 void serial_baud(serial_t *obj, int baudrate)
kadonotakashi 0:8fdf9a60065b 210 {
kadonotakashi 0:8fdf9a60065b 211 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 212 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 213 MBED_ASSERT((baudrate == 110) || (baudrate == 150) || (baudrate == 300) || (baudrate == 1200) ||
kadonotakashi 0:8fdf9a60065b 214 (baudrate == 2400) || (baudrate == 4800) || (baudrate == 9600) || (baudrate == 19200) || (baudrate == 38400) ||
kadonotakashi 0:8fdf9a60065b 215 (baudrate == 57600) || (baudrate == 115200) || (baudrate == 230400) || (baudrate == 460800) || (baudrate == 921600) );
kadonotakashi 0:8fdf9a60065b 216 uint32_t clockid = 0;
kadonotakashi 0:8fdf9a60065b 217 clockid = get_usart_clock_id(pUSART_S(obj));
kadonotakashi 0:8fdf9a60065b 218 if (clockid != (uint32_t)NC) {
kadonotakashi 0:8fdf9a60065b 219 sysclk_disable_peripheral_clock(clockid);
kadonotakashi 0:8fdf9a60065b 220 }
kadonotakashi 0:8fdf9a60065b 221 pSERIAL_S(obj)->uart_serial_options.baudrate = baudrate;
kadonotakashi 0:8fdf9a60065b 222 usart_serial_init(_USART(obj), &(pSERIAL_S(obj)->uart_serial_options));
kadonotakashi 0:8fdf9a60065b 223 sysclk_enable_peripheral_clock(clockid);
kadonotakashi 0:8fdf9a60065b 224 }
kadonotakashi 0:8fdf9a60065b 225
kadonotakashi 0:8fdf9a60065b 226 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
kadonotakashi 0:8fdf9a60065b 227 {
kadonotakashi 0:8fdf9a60065b 228 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 229 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 230 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
kadonotakashi 0:8fdf9a60065b 231 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
kadonotakashi 0:8fdf9a60065b 232 MBED_ASSERT((data_bits == 5) || (data_bits == 6) || (data_bits == 7) || (data_bits == 8));
kadonotakashi 0:8fdf9a60065b 233
kadonotakashi 0:8fdf9a60065b 234 uint32_t clockid = 0;
kadonotakashi 0:8fdf9a60065b 235 clockid = get_usart_clock_id(pUSART_S(obj));
kadonotakashi 0:8fdf9a60065b 236 if (clockid != (uint32_t)NC) {
kadonotakashi 0:8fdf9a60065b 237 sysclk_disable_peripheral_clock(clockid);
kadonotakashi 0:8fdf9a60065b 238 }
kadonotakashi 0:8fdf9a60065b 239
kadonotakashi 0:8fdf9a60065b 240 switch(stop_bits) { /*selecting the stop bits*/
kadonotakashi 0:8fdf9a60065b 241 case 1:
kadonotakashi 0:8fdf9a60065b 242 pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_1_BIT;
kadonotakashi 0:8fdf9a60065b 243 break;
kadonotakashi 0:8fdf9a60065b 244 case 2:
kadonotakashi 0:8fdf9a60065b 245 pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_2_BIT;
kadonotakashi 0:8fdf9a60065b 246 break;
kadonotakashi 0:8fdf9a60065b 247 }
kadonotakashi 0:8fdf9a60065b 248
kadonotakashi 0:8fdf9a60065b 249 switch(parity) { /*selecting the parity bits*/
kadonotakashi 0:8fdf9a60065b 250 case ParityNone:
kadonotakashi 0:8fdf9a60065b 251 pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_NO;
kadonotakashi 0:8fdf9a60065b 252 break;
kadonotakashi 0:8fdf9a60065b 253 case ParityOdd:
kadonotakashi 0:8fdf9a60065b 254 pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_ODD;
kadonotakashi 0:8fdf9a60065b 255 break;
kadonotakashi 0:8fdf9a60065b 256 case ParityEven:
kadonotakashi 0:8fdf9a60065b 257 pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_EVEN;
kadonotakashi 0:8fdf9a60065b 258 break;
kadonotakashi 0:8fdf9a60065b 259 case ParityForced1: /*No Hardware Support*/
kadonotakashi 0:8fdf9a60065b 260 MBED_ASSERT(0);
kadonotakashi 0:8fdf9a60065b 261 break;
kadonotakashi 0:8fdf9a60065b 262 case ParityForced0: /*No Hardware Support*/
kadonotakashi 0:8fdf9a60065b 263 MBED_ASSERT(0);
kadonotakashi 0:8fdf9a60065b 264 break;
kadonotakashi 0:8fdf9a60065b 265 }
kadonotakashi 0:8fdf9a60065b 266
kadonotakashi 0:8fdf9a60065b 267 switch(data_bits) { /*selecting the data bits*/
kadonotakashi 0:8fdf9a60065b 268 case 5:
kadonotakashi 0:8fdf9a60065b 269 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_5_BIT;
kadonotakashi 0:8fdf9a60065b 270 break;
kadonotakashi 0:8fdf9a60065b 271 case 6:
kadonotakashi 0:8fdf9a60065b 272 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_6_BIT;
kadonotakashi 0:8fdf9a60065b 273 break;
kadonotakashi 0:8fdf9a60065b 274 case 7:
kadonotakashi 0:8fdf9a60065b 275 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_7_BIT;
kadonotakashi 0:8fdf9a60065b 276 break;
kadonotakashi 0:8fdf9a60065b 277 case 8:
kadonotakashi 0:8fdf9a60065b 278 pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_8_BIT;
kadonotakashi 0:8fdf9a60065b 279 break;
kadonotakashi 0:8fdf9a60065b 280 }
kadonotakashi 0:8fdf9a60065b 281
kadonotakashi 0:8fdf9a60065b 282 usart_serial_init(_USART(obj), &(pSERIAL_S(obj)->uart_serial_options));
kadonotakashi 0:8fdf9a60065b 283 sysclk_enable_peripheral_clock(clockid);
kadonotakashi 0:8fdf9a60065b 284 }
kadonotakashi 0:8fdf9a60065b 285
kadonotakashi 0:8fdf9a60065b 286 #ifdef DEVICE_SERIAL_FC
kadonotakashi 0:8fdf9a60065b 287
kadonotakashi 0:8fdf9a60065b 288 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
kadonotakashi 0:8fdf9a60065b 289 {
kadonotakashi 0:8fdf9a60065b 290 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 291 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 292
kadonotakashi 0:8fdf9a60065b 293 if(FlowControlNone == type) {
kadonotakashi 0:8fdf9a60065b 294 /* Disable Hardware Handshaking. */
kadonotakashi 0:8fdf9a60065b 295 _USART(obj)->US_MR = (_USART(obj)->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_NORMAL;
kadonotakashi 0:8fdf9a60065b 296 return;
kadonotakashi 0:8fdf9a60065b 297 }
kadonotakashi 0:8fdf9a60065b 298
kadonotakashi 0:8fdf9a60065b 299 /*To determine the uart peripheral associated with pins*/
kadonotakashi 0:8fdf9a60065b 300 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
kadonotakashi 0:8fdf9a60065b 301 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
kadonotakashi 0:8fdf9a60065b 302 UARTName uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
kadonotakashi 0:8fdf9a60065b 303 MBED_ASSERT(uart != (UARTName)NC);
kadonotakashi 0:8fdf9a60065b 304
kadonotakashi 0:8fdf9a60065b 305 if((FlowControlCTS == type) || (FlowControlRTSCTS== type)) {
kadonotakashi 0:8fdf9a60065b 306 /* Configure CTS pin. */
kadonotakashi 0:8fdf9a60065b 307 pin_function(txflow, pinmap_find_function(txflow, PinMap_UART_CTS));
kadonotakashi 0:8fdf9a60065b 308 ioport_disable_pin(txflow);
kadonotakashi 0:8fdf9a60065b 309 }
kadonotakashi 0:8fdf9a60065b 310
kadonotakashi 0:8fdf9a60065b 311 if((FlowControlRTS == type) || (FlowControlRTSCTS== type)) {
kadonotakashi 0:8fdf9a60065b 312 /* Configure CTS pin. */
kadonotakashi 0:8fdf9a60065b 313 pin_function(rxflow, pinmap_find_function(rxflow, PinMap_UART_RTS));
kadonotakashi 0:8fdf9a60065b 314 ioport_disable_pin(rxflow);
kadonotakashi 0:8fdf9a60065b 315 }
kadonotakashi 0:8fdf9a60065b 316
kadonotakashi 0:8fdf9a60065b 317 /* Set hardware handshaking mode. */
kadonotakashi 0:8fdf9a60065b 318 _USART(obj)->US_MR = (_USART(obj)->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_HW_HANDSHAKING;
kadonotakashi 0:8fdf9a60065b 319 }
kadonotakashi 0:8fdf9a60065b 320
kadonotakashi 0:8fdf9a60065b 321 #endif //DEVICE_SERIAL_FC
kadonotakashi 0:8fdf9a60065b 322
kadonotakashi 0:8fdf9a60065b 323 void serial_break_set(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 324 {
kadonotakashi 0:8fdf9a60065b 325 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 326 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 327 _USART(obj)->US_CR = US_CR_STTBRK;
kadonotakashi 0:8fdf9a60065b 328
kadonotakashi 0:8fdf9a60065b 329 }
kadonotakashi 0:8fdf9a60065b 330
kadonotakashi 0:8fdf9a60065b 331 void serial_break_clear(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 332 {
kadonotakashi 0:8fdf9a60065b 333 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 334 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 335 _USART(obj)->US_CR = US_CR_STPBRK;
kadonotakashi 0:8fdf9a60065b 336
kadonotakashi 0:8fdf9a60065b 337 }
kadonotakashi 0:8fdf9a60065b 338
kadonotakashi 0:8fdf9a60065b 339 void serial_pinout_tx(PinName tx)
kadonotakashi 0:8fdf9a60065b 340 {
kadonotakashi 0:8fdf9a60065b 341 pin_function(tx, pinmap_find_function(tx, PinMap_UART_TX));
kadonotakashi 0:8fdf9a60065b 342 ioport_disable_pin(tx);
kadonotakashi 0:8fdf9a60065b 343 }
kadonotakashi 0:8fdf9a60065b 344
kadonotakashi 0:8fdf9a60065b 345 /******************************************************************************
kadonotakashi 0:8fdf9a60065b 346 * INTERRUPTS HANDLING
kadonotakashi 0:8fdf9a60065b 347 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 348
kadonotakashi 0:8fdf9a60065b 349 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
kadonotakashi 0:8fdf9a60065b 350 {
kadonotakashi 0:8fdf9a60065b 351 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 352 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 353 irq_handler = handler;
kadonotakashi 0:8fdf9a60065b 354 serial_irq_ids[serial_get_index(obj)] = id;
kadonotakashi 0:8fdf9a60065b 355 }
kadonotakashi 0:8fdf9a60065b 356
kadonotakashi 0:8fdf9a60065b 357 #warning "Interrupt only available for Serial Receive complete. Transmit complete not supported by Controller"
kadonotakashi 0:8fdf9a60065b 358
kadonotakashi 0:8fdf9a60065b 359 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
kadonotakashi 0:8fdf9a60065b 360 {
kadonotakashi 0:8fdf9a60065b 361 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 362 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 363 IRQn_Type irq_n = (IRQn_Type)0;
kadonotakashi 0:8fdf9a60065b 364 uint32_t vector = 0;
kadonotakashi 0:8fdf9a60065b 365
kadonotakashi 0:8fdf9a60065b 366 vector = get_serial_vector(obj);
kadonotakashi 0:8fdf9a60065b 367 irq_n = get_serial_irq_num(obj);
kadonotakashi 0:8fdf9a60065b 368
kadonotakashi 0:8fdf9a60065b 369 if (enable) {
kadonotakashi 0:8fdf9a60065b 370 switch (irq) {
kadonotakashi 0:8fdf9a60065b 371 case RxIrq:
kadonotakashi 0:8fdf9a60065b 372 usart_enable_interrupt(_USART(obj), US_IER_RXRDY);
kadonotakashi 0:8fdf9a60065b 373 break;
kadonotakashi 0:8fdf9a60065b 374 case TxIrq:
kadonotakashi 0:8fdf9a60065b 375 break;
kadonotakashi 0:8fdf9a60065b 376 }
kadonotakashi 0:8fdf9a60065b 377 NVIC_ClearPendingIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 378 NVIC_DisableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 379 NVIC_SetVector(irq_n, vector);
kadonotakashi 0:8fdf9a60065b 380 NVIC_EnableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 381 } else {
kadonotakashi 0:8fdf9a60065b 382 switch (irq) {
kadonotakashi 0:8fdf9a60065b 383 case RxIrq:
kadonotakashi 0:8fdf9a60065b 384 usart_disable_interrupt(_USART(obj), US_IER_RXRDY);
kadonotakashi 0:8fdf9a60065b 385 break;
kadonotakashi 0:8fdf9a60065b 386 case TxIrq:
kadonotakashi 0:8fdf9a60065b 387 break;
kadonotakashi 0:8fdf9a60065b 388 }
kadonotakashi 0:8fdf9a60065b 389 NVIC_DisableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 390 }
kadonotakashi 0:8fdf9a60065b 391 }
kadonotakashi 0:8fdf9a60065b 392
kadonotakashi 0:8fdf9a60065b 393 static inline void uart_irq(Usart *const usart, uint32_t index)
kadonotakashi 0:8fdf9a60065b 394 {
kadonotakashi 0:8fdf9a60065b 395 MBED_ASSERT(usart != (void*)0);
kadonotakashi 0:8fdf9a60065b 396 uint32_t mask, status;
kadonotakashi 0:8fdf9a60065b 397 /* Read and clear mask. */
kadonotakashi 0:8fdf9a60065b 398 status = usart_get_status(usart);
kadonotakashi 0:8fdf9a60065b 399 mask = usart_get_interrupt_mask(usart);
kadonotakashi 0:8fdf9a60065b 400 status &= mask;
kadonotakashi 0:8fdf9a60065b 401
kadonotakashi 0:8fdf9a60065b 402 if (serial_irq_ids[index] != 0) {
kadonotakashi 0:8fdf9a60065b 403 if (status & US_IER_RXRDY) { /*For Receive Complete*/
kadonotakashi 0:8fdf9a60065b 404 if (irq_handler) {
kadonotakashi 0:8fdf9a60065b 405 irq_handler(serial_irq_ids[index], RxIrq);
kadonotakashi 0:8fdf9a60065b 406 }
kadonotakashi 0:8fdf9a60065b 407 }
kadonotakashi 0:8fdf9a60065b 408 }
kadonotakashi 0:8fdf9a60065b 409 }
kadonotakashi 0:8fdf9a60065b 410
kadonotakashi 0:8fdf9a60065b 411 void uart0_irq(void)
kadonotakashi 0:8fdf9a60065b 412 {
kadonotakashi 0:8fdf9a60065b 413 uart_irq(USART0, 0);
kadonotakashi 0:8fdf9a60065b 414 }
kadonotakashi 0:8fdf9a60065b 415
kadonotakashi 0:8fdf9a60065b 416 void uart1_irq(void)
kadonotakashi 0:8fdf9a60065b 417 {
kadonotakashi 0:8fdf9a60065b 418 uart_irq(USART1, 1);
kadonotakashi 0:8fdf9a60065b 419 }
kadonotakashi 0:8fdf9a60065b 420
kadonotakashi 0:8fdf9a60065b 421 void uart2_irq(void)
kadonotakashi 0:8fdf9a60065b 422 {
kadonotakashi 0:8fdf9a60065b 423 uart_irq(USART2, 2);
kadonotakashi 0:8fdf9a60065b 424 }
kadonotakashi 0:8fdf9a60065b 425
kadonotakashi 0:8fdf9a60065b 426 void uart3_irq(void)
kadonotakashi 0:8fdf9a60065b 427 {
kadonotakashi 0:8fdf9a60065b 428 uart_irq(USART3, 3);
kadonotakashi 0:8fdf9a60065b 429 }
kadonotakashi 0:8fdf9a60065b 430
kadonotakashi 0:8fdf9a60065b 431 void uart4_irq(void)
kadonotakashi 0:8fdf9a60065b 432 {
kadonotakashi 0:8fdf9a60065b 433 uart_irq(USART4, 4);
kadonotakashi 0:8fdf9a60065b 434 }
kadonotakashi 0:8fdf9a60065b 435
kadonotakashi 0:8fdf9a60065b 436 void uart5_irq(void)
kadonotakashi 0:8fdf9a60065b 437 {
kadonotakashi 0:8fdf9a60065b 438 uart_irq(USART5, 5);
kadonotakashi 0:8fdf9a60065b 439 }
kadonotakashi 0:8fdf9a60065b 440
kadonotakashi 0:8fdf9a60065b 441 void uart6_irq(void)
kadonotakashi 0:8fdf9a60065b 442 {
kadonotakashi 0:8fdf9a60065b 443 uart_irq(USART6, 6);
kadonotakashi 0:8fdf9a60065b 444 }
kadonotakashi 0:8fdf9a60065b 445
kadonotakashi 0:8fdf9a60065b 446 void uart7_irq(void)
kadonotakashi 0:8fdf9a60065b 447 {
kadonotakashi 0:8fdf9a60065b 448 uart_irq(USART7, 7);
kadonotakashi 0:8fdf9a60065b 449 }
kadonotakashi 0:8fdf9a60065b 450
kadonotakashi 0:8fdf9a60065b 451 static uint8_t serial_get_index(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 452 {
kadonotakashi 0:8fdf9a60065b 453 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 454 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 455 switch ((int)pUSART_S(obj)) {
kadonotakashi 0:8fdf9a60065b 456 case UART_0:
kadonotakashi 0:8fdf9a60065b 457 return 0;
kadonotakashi 0:8fdf9a60065b 458 case UART_1:
kadonotakashi 0:8fdf9a60065b 459 return 1;
kadonotakashi 0:8fdf9a60065b 460 case UART_2:
kadonotakashi 0:8fdf9a60065b 461 return 2;
kadonotakashi 0:8fdf9a60065b 462 case UART_3:
kadonotakashi 0:8fdf9a60065b 463 return 3;
kadonotakashi 0:8fdf9a60065b 464 case UART_4:
kadonotakashi 0:8fdf9a60065b 465 return 4;
kadonotakashi 0:8fdf9a60065b 466 case UART_5:
kadonotakashi 0:8fdf9a60065b 467 return 5;
kadonotakashi 0:8fdf9a60065b 468 case UART_6:
kadonotakashi 0:8fdf9a60065b 469 return 6;
kadonotakashi 0:8fdf9a60065b 470 case UART_7:
kadonotakashi 0:8fdf9a60065b 471 return 7;
kadonotakashi 0:8fdf9a60065b 472 }
kadonotakashi 0:8fdf9a60065b 473 return 0;
kadonotakashi 0:8fdf9a60065b 474 }
kadonotakashi 0:8fdf9a60065b 475
kadonotakashi 0:8fdf9a60065b 476 static uint32_t get_serial_vector (serial_t *obj)
kadonotakashi 0:8fdf9a60065b 477 {
kadonotakashi 0:8fdf9a60065b 478 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 479 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 480 uint32_t vector = 0;
kadonotakashi 0:8fdf9a60065b 481 switch ((int)pUSART_S(obj)) {
kadonotakashi 0:8fdf9a60065b 482 case UART_0:
kadonotakashi 0:8fdf9a60065b 483 vector = (uint32_t)uart0_irq;
kadonotakashi 0:8fdf9a60065b 484 break;
kadonotakashi 0:8fdf9a60065b 485 case UART_1:
kadonotakashi 0:8fdf9a60065b 486 vector = (uint32_t)uart1_irq;
kadonotakashi 0:8fdf9a60065b 487 break;
kadonotakashi 0:8fdf9a60065b 488 case UART_2:
kadonotakashi 0:8fdf9a60065b 489 vector = (uint32_t)uart2_irq;
kadonotakashi 0:8fdf9a60065b 490 break;
kadonotakashi 0:8fdf9a60065b 491 case UART_3:
kadonotakashi 0:8fdf9a60065b 492 vector = (uint32_t)uart3_irq;
kadonotakashi 0:8fdf9a60065b 493 break;
kadonotakashi 0:8fdf9a60065b 494 case UART_4:
kadonotakashi 0:8fdf9a60065b 495 vector = (uint32_t)uart4_irq;
kadonotakashi 0:8fdf9a60065b 496 break;
kadonotakashi 0:8fdf9a60065b 497 case UART_5:
kadonotakashi 0:8fdf9a60065b 498 vector = (uint32_t)uart5_irq;
kadonotakashi 0:8fdf9a60065b 499 break;
kadonotakashi 0:8fdf9a60065b 500 case UART_6:
kadonotakashi 0:8fdf9a60065b 501 vector = (uint32_t)uart6_irq;
kadonotakashi 0:8fdf9a60065b 502 break;
kadonotakashi 0:8fdf9a60065b 503 case UART_7:
kadonotakashi 0:8fdf9a60065b 504 vector = (uint32_t)uart7_irq;
kadonotakashi 0:8fdf9a60065b 505 break;
kadonotakashi 0:8fdf9a60065b 506 }
kadonotakashi 0:8fdf9a60065b 507 return vector;
kadonotakashi 0:8fdf9a60065b 508 }
kadonotakashi 0:8fdf9a60065b 509
kadonotakashi 0:8fdf9a60065b 510 IRQn_Type get_serial_irq_num (serial_t *obj)
kadonotakashi 0:8fdf9a60065b 511 {
kadonotakashi 0:8fdf9a60065b 512 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 513 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 514 switch ((int)pUSART_S(obj)) {
kadonotakashi 0:8fdf9a60065b 515 case UART_0:
kadonotakashi 0:8fdf9a60065b 516 return FLEXCOM0_IRQn;
kadonotakashi 0:8fdf9a60065b 517 case UART_1:
kadonotakashi 0:8fdf9a60065b 518 return FLEXCOM1_IRQn;
kadonotakashi 0:8fdf9a60065b 519 case UART_2:
kadonotakashi 0:8fdf9a60065b 520 return FLEXCOM2_IRQn;
kadonotakashi 0:8fdf9a60065b 521 case UART_3:
kadonotakashi 0:8fdf9a60065b 522 return FLEXCOM3_IRQn;
kadonotakashi 0:8fdf9a60065b 523 case UART_4:
kadonotakashi 0:8fdf9a60065b 524 return FLEXCOM4_IRQn;
kadonotakashi 0:8fdf9a60065b 525 case UART_5:
kadonotakashi 0:8fdf9a60065b 526 return FLEXCOM5_IRQn;
kadonotakashi 0:8fdf9a60065b 527 case UART_6:
kadonotakashi 0:8fdf9a60065b 528 return FLEXCOM6_IRQn;
kadonotakashi 0:8fdf9a60065b 529 case UART_7:
kadonotakashi 0:8fdf9a60065b 530 return FLEXCOM7_IRQn;
kadonotakashi 0:8fdf9a60065b 531 default:
kadonotakashi 0:8fdf9a60065b 532 MBED_ASSERT(0);
kadonotakashi 0:8fdf9a60065b 533 }
kadonotakashi 0:8fdf9a60065b 534 return 0; /*Warning Suppression*/
kadonotakashi 0:8fdf9a60065b 535 }
kadonotakashi 0:8fdf9a60065b 536
kadonotakashi 0:8fdf9a60065b 537 /******************************************************************************
kadonotakashi 0:8fdf9a60065b 538 * READ/WRITE
kadonotakashi 0:8fdf9a60065b 539 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 540 int serial_getc(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 541 {
kadonotakashi 0:8fdf9a60065b 542 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 543 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 544 while (!serial_readable(obj));
kadonotakashi 0:8fdf9a60065b 545 return (int)((_USART(obj)->US_RHR & US_RHR_RXCHR_Msk) & 0xFF);
kadonotakashi 0:8fdf9a60065b 546 }
kadonotakashi 0:8fdf9a60065b 547
kadonotakashi 0:8fdf9a60065b 548 void serial_putc(serial_t *obj, int c)
kadonotakashi 0:8fdf9a60065b 549 {
kadonotakashi 0:8fdf9a60065b 550 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 551 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 552 while (!serial_writable(obj));
kadonotakashi 0:8fdf9a60065b 553 _USART(obj)->US_THR = US_THR_TXCHR(c);
kadonotakashi 0:8fdf9a60065b 554 }
kadonotakashi 0:8fdf9a60065b 555
kadonotakashi 0:8fdf9a60065b 556 int serial_readable(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 557 {
kadonotakashi 0:8fdf9a60065b 558 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 559 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 560 uint32_t status = 1;
kadonotakashi 0:8fdf9a60065b 561 if (!(_USART(obj)->US_CSR & US_CSR_RXRDY)) {
kadonotakashi 0:8fdf9a60065b 562 status = 0;
kadonotakashi 0:8fdf9a60065b 563 } else {
kadonotakashi 0:8fdf9a60065b 564 status = 1;
kadonotakashi 0:8fdf9a60065b 565 }
kadonotakashi 0:8fdf9a60065b 566 return status;
kadonotakashi 0:8fdf9a60065b 567 }
kadonotakashi 0:8fdf9a60065b 568
kadonotakashi 0:8fdf9a60065b 569 int serial_writable(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 570 {
kadonotakashi 0:8fdf9a60065b 571 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 572 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 573 uint32_t status = 1;
kadonotakashi 0:8fdf9a60065b 574 if (!(_USART(obj)->US_CSR & US_CSR_TXRDY)) {
kadonotakashi 0:8fdf9a60065b 575 status = 0;
kadonotakashi 0:8fdf9a60065b 576 } else {
kadonotakashi 0:8fdf9a60065b 577 status = 1;
kadonotakashi 0:8fdf9a60065b 578 }
kadonotakashi 0:8fdf9a60065b 579 return status;
kadonotakashi 0:8fdf9a60065b 580 }
kadonotakashi 0:8fdf9a60065b 581
kadonotakashi 0:8fdf9a60065b 582 /************************************************************************************
kadonotakashi 0:8fdf9a60065b 583 * ASYNCHRONOUS HAL *
kadonotakashi 0:8fdf9a60065b 584 ************************************************************************************/
kadonotakashi 0:8fdf9a60065b 585
kadonotakashi 0:8fdf9a60065b 586
kadonotakashi 0:8fdf9a60065b 587 #if DEVICE_SERIAL_ASYNCH
kadonotakashi 0:8fdf9a60065b 588 /************************************
kadonotakashi 0:8fdf9a60065b 589 * HELPER FUNCTIONS *
kadonotakashi 0:8fdf9a60065b 590 ***********************************/
kadonotakashi 0:8fdf9a60065b 591
kadonotakashi 0:8fdf9a60065b 592 void serial_set_char_match(serial_t *obj, uint8_t char_match)
kadonotakashi 0:8fdf9a60065b 593 {
kadonotakashi 0:8fdf9a60065b 594 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 595 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 596 if (char_match != SERIAL_RESERVED_CHAR_MATCH) {
kadonotakashi 0:8fdf9a60065b 597 obj->char_match = char_match;
kadonotakashi 0:8fdf9a60065b 598 _USART(obj)->US_CMPR = (char_match & 0xFF);
kadonotakashi 0:8fdf9a60065b 599 usart_enable_interrupt(_USART(obj), US_IER_CMP);
kadonotakashi 0:8fdf9a60065b 600 }
kadonotakashi 0:8fdf9a60065b 601 }
kadonotakashi 0:8fdf9a60065b 602
kadonotakashi 0:8fdf9a60065b 603 /************************************
kadonotakashi 0:8fdf9a60065b 604 * TRANSFER FUNCTIONS *
kadonotakashi 0:8fdf9a60065b 605 ***********************************/
kadonotakashi 0:8fdf9a60065b 606 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
kadonotakashi 0:8fdf9a60065b 607 {
kadonotakashi 0:8fdf9a60065b 608 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 609 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 610 MBED_ASSERT(tx != (void*)0);
kadonotakashi 0:8fdf9a60065b 611 if(tx_length == 0) return 0;
kadonotakashi 0:8fdf9a60065b 612 Pdc *pdc_base;
kadonotakashi 0:8fdf9a60065b 613 IRQn_Type irq_n = (IRQn_Type)0;
kadonotakashi 0:8fdf9a60065b 614 pdc_packet_t packet;
kadonotakashi 0:8fdf9a60065b 615
kadonotakashi 0:8fdf9a60065b 616 pSERIAL_S(obj)->acttra = true; /* flag for active transmit transfer */
kadonotakashi 0:8fdf9a60065b 617
kadonotakashi 0:8fdf9a60065b 618 irq_n = get_serial_irq_num(obj);
kadonotakashi 0:8fdf9a60065b 619
kadonotakashi 0:8fdf9a60065b 620 /* Get board USART PDC base address and enable transmitter. */
kadonotakashi 0:8fdf9a60065b 621 pdc_base = usart_get_pdc_base(_USART(obj));
kadonotakashi 0:8fdf9a60065b 622 pdc_enable_transfer(pdc_base, PERIPH_PTCR_TXTEN);
kadonotakashi 0:8fdf9a60065b 623
kadonotakashi 0:8fdf9a60065b 624 packet.ul_addr = (uint32_t)tx;
kadonotakashi 0:8fdf9a60065b 625 packet.ul_size = (uint32_t)tx_length;
kadonotakashi 0:8fdf9a60065b 626
kadonotakashi 0:8fdf9a60065b 627 pdc_tx_init(pdc_base, &packet, NULL);
kadonotakashi 0:8fdf9a60065b 628 usart_enable_interrupt(_USART(obj), US_IER_TXBUFE);
kadonotakashi 0:8fdf9a60065b 629
kadonotakashi 0:8fdf9a60065b 630 NVIC_ClearPendingIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 631 NVIC_DisableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 632 NVIC_SetVector(irq_n, (uint32_t)handler);
kadonotakashi 0:8fdf9a60065b 633 NVIC_EnableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 634
kadonotakashi 0:8fdf9a60065b 635 return 0;
kadonotakashi 0:8fdf9a60065b 636 }
kadonotakashi 0:8fdf9a60065b 637
kadonotakashi 0:8fdf9a60065b 638 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
kadonotakashi 0:8fdf9a60065b 639 {
kadonotakashi 0:8fdf9a60065b 640 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 641 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 642 MBED_ASSERT(rx != (void*)0);
kadonotakashi 0:8fdf9a60065b 643 if(rx_length == 0) return 0;
kadonotakashi 0:8fdf9a60065b 644 Pdc *pdc_base;
kadonotakashi 0:8fdf9a60065b 645 IRQn_Type irq_n = (IRQn_Type)0;
kadonotakashi 0:8fdf9a60065b 646 pdc_packet_t packet;
kadonotakashi 0:8fdf9a60065b 647
kadonotakashi 0:8fdf9a60065b 648 pSERIAL_S(obj)->actrec = true; /* flag for active receive transfer */
kadonotakashi 0:8fdf9a60065b 649 if (event == SERIAL_EVENT_RX_CHARACTER_MATCH) { /* if event is character match alone */
kadonotakashi 0:8fdf9a60065b 650 pSERIAL_S(obj)->events = SERIAL_EVENT_RX_CHARACTER_MATCH;
kadonotakashi 0:8fdf9a60065b 651 }
kadonotakashi 0:8fdf9a60065b 652
kadonotakashi 0:8fdf9a60065b 653 irq_n = get_serial_irq_num(obj);
kadonotakashi 0:8fdf9a60065b 654
kadonotakashi 0:8fdf9a60065b 655 serial_set_char_match(obj, char_match);
kadonotakashi 0:8fdf9a60065b 656
kadonotakashi 0:8fdf9a60065b 657 /* Get board USART PDC base address and enable transmitter. */
kadonotakashi 0:8fdf9a60065b 658 pdc_base = usart_get_pdc_base(_USART(obj));
kadonotakashi 0:8fdf9a60065b 659 pdc_enable_transfer(pdc_base, PERIPH_PTCR_RXTEN);
kadonotakashi 0:8fdf9a60065b 660 packet.ul_addr = (uint32_t)rx;
kadonotakashi 0:8fdf9a60065b 661 packet.ul_size = (uint32_t)rx_length;
kadonotakashi 0:8fdf9a60065b 662 pdc_rx_init(pdc_base, &packet, NULL);
kadonotakashi 0:8fdf9a60065b 663
kadonotakashi 0:8fdf9a60065b 664 usart_enable_interrupt(_USART(obj), (US_IER_RXBUFF | US_IER_OVRE | US_IER_FRAME | US_IER_PARE));
kadonotakashi 0:8fdf9a60065b 665
kadonotakashi 0:8fdf9a60065b 666 NVIC_ClearPendingIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 667 NVIC_DisableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 668 NVIC_SetVector(irq_n, (uint32_t)handler);
kadonotakashi 0:8fdf9a60065b 669 NVIC_EnableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 670
kadonotakashi 0:8fdf9a60065b 671 }
kadonotakashi 0:8fdf9a60065b 672
kadonotakashi 0:8fdf9a60065b 673 uint8_t serial_tx_active(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 674 {
kadonotakashi 0:8fdf9a60065b 675 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 676 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 677 return pSERIAL_S(obj)->acttra;
kadonotakashi 0:8fdf9a60065b 678 }
kadonotakashi 0:8fdf9a60065b 679
kadonotakashi 0:8fdf9a60065b 680 uint8_t serial_rx_active(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 681 {
kadonotakashi 0:8fdf9a60065b 682 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 683 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 684 return pSERIAL_S(obj)->actrec;
kadonotakashi 0:8fdf9a60065b 685 }
kadonotakashi 0:8fdf9a60065b 686
kadonotakashi 0:8fdf9a60065b 687 int serial_tx_irq_handler_asynch(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 688 {
kadonotakashi 0:8fdf9a60065b 689 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 690 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 691 serial_tx_abort_asynch(obj);
kadonotakashi 0:8fdf9a60065b 692 return SERIAL_EVENT_TX_COMPLETE;
kadonotakashi 0:8fdf9a60065b 693 }
kadonotakashi 0:8fdf9a60065b 694 int serial_rx_irq_handler_asynch(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 695 {
kadonotakashi 0:8fdf9a60065b 696 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 697 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 698 uint32_t ul_status, ulmask;
kadonotakashi 0:8fdf9a60065b 699
kadonotakashi 0:8fdf9a60065b 700 /* Read USART Status. */
kadonotakashi 0:8fdf9a60065b 701 ul_status = usart_get_status(_USART(obj));
kadonotakashi 0:8fdf9a60065b 702 ulmask = usart_get_interrupt_mask(_USART(obj));
kadonotakashi 0:8fdf9a60065b 703 ul_status &= ulmask;
kadonotakashi 0:8fdf9a60065b 704
kadonotakashi 0:8fdf9a60065b 705 if (ul_status & US_CSR_OVRE) { /* Overrun Error */
kadonotakashi 0:8fdf9a60065b 706 usart_disable_interrupt(_USART(obj), US_IDR_OVRE);
kadonotakashi 0:8fdf9a60065b 707 serial_rx_abort_asynch(obj);
kadonotakashi 0:8fdf9a60065b 708 return SERIAL_EVENT_RX_OVERFLOW;
kadonotakashi 0:8fdf9a60065b 709 }
kadonotakashi 0:8fdf9a60065b 710 if (ul_status & US_CSR_FRAME) { /* Framing Error */
kadonotakashi 0:8fdf9a60065b 711 usart_disable_interrupt(_USART(obj), US_IDR_FRAME);
kadonotakashi 0:8fdf9a60065b 712 serial_rx_abort_asynch(obj);
kadonotakashi 0:8fdf9a60065b 713 return SERIAL_EVENT_RX_FRAMING_ERROR;
kadonotakashi 0:8fdf9a60065b 714 }
kadonotakashi 0:8fdf9a60065b 715 if (ul_status & US_CSR_PARE) { /* Parity Error */
kadonotakashi 0:8fdf9a60065b 716 usart_disable_interrupt(_USART(obj), US_IDR_PARE);
kadonotakashi 0:8fdf9a60065b 717 serial_rx_abort_asynch(obj);
kadonotakashi 0:8fdf9a60065b 718 return SERIAL_EVENT_RX_PARITY_ERROR;
kadonotakashi 0:8fdf9a60065b 719 }
kadonotakashi 0:8fdf9a60065b 720 if ((ul_status & (US_IER_RXBUFF | US_IER_CMP)) == (US_IER_RXBUFF | US_IER_CMP)) { /* Character match in last character in transfer*/
kadonotakashi 0:8fdf9a60065b 721 usart_disable_interrupt(_USART(obj), US_IDR_CMP);
kadonotakashi 0:8fdf9a60065b 722 serial_rx_abort_asynch(obj);
kadonotakashi 0:8fdf9a60065b 723 return SERIAL_EVENT_RX_COMPLETE|SERIAL_EVENT_RX_CHARACTER_MATCH;
kadonotakashi 0:8fdf9a60065b 724 }
kadonotakashi 0:8fdf9a60065b 725 if (ul_status & US_IER_CMP) { /* Character match */
kadonotakashi 0:8fdf9a60065b 726 usart_disable_interrupt(_USART(obj), US_IDR_CMP);
kadonotakashi 0:8fdf9a60065b 727 if (pSERIAL_S(obj)->events == SERIAL_EVENT_RX_CHARACTER_MATCH) { /*if character match is the only event abort transfer */
kadonotakashi 0:8fdf9a60065b 728 serial_rx_abort_asynch(obj);
kadonotakashi 0:8fdf9a60065b 729 }
kadonotakashi 0:8fdf9a60065b 730 return SERIAL_EVENT_RX_CHARACTER_MATCH;
kadonotakashi 0:8fdf9a60065b 731 }
kadonotakashi 0:8fdf9a60065b 732 if (ul_status & US_IER_RXBUFF) { /* Reception Complete */
kadonotakashi 0:8fdf9a60065b 733 serial_rx_abort_asynch(obj);
kadonotakashi 0:8fdf9a60065b 734 return SERIAL_EVENT_RX_COMPLETE;
kadonotakashi 0:8fdf9a60065b 735 }
kadonotakashi 0:8fdf9a60065b 736 return 0;
kadonotakashi 0:8fdf9a60065b 737 }
kadonotakashi 0:8fdf9a60065b 738
kadonotakashi 0:8fdf9a60065b 739 int serial_irq_handler_asynch(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 740 {
kadonotakashi 0:8fdf9a60065b 741 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 742 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 743 uint32_t ul_status, ulmask;
kadonotakashi 0:8fdf9a60065b 744
kadonotakashi 0:8fdf9a60065b 745 /* Read USART Status. */
kadonotakashi 0:8fdf9a60065b 746 ul_status = usart_get_status(_USART(obj));
kadonotakashi 0:8fdf9a60065b 747 ulmask = usart_get_interrupt_mask(_USART(obj));
kadonotakashi 0:8fdf9a60065b 748
kadonotakashi 0:8fdf9a60065b 749 ul_status &= ulmask;
kadonotakashi 0:8fdf9a60065b 750
kadonotakashi 0:8fdf9a60065b 751 if (ul_status & (US_CSR_RXBUFF | US_CSR_OVRE | US_CSR_FRAME | US_CSR_PARE | US_IER_CMP)) {
kadonotakashi 0:8fdf9a60065b 752 return serial_rx_irq_handler_asynch(obj);
kadonotakashi 0:8fdf9a60065b 753 }
kadonotakashi 0:8fdf9a60065b 754 if (ul_status & US_CSR_TXBUFE) {
kadonotakashi 0:8fdf9a60065b 755 return serial_tx_irq_handler_asynch(obj);
kadonotakashi 0:8fdf9a60065b 756 }
kadonotakashi 0:8fdf9a60065b 757 return 0;
kadonotakashi 0:8fdf9a60065b 758 }
kadonotakashi 0:8fdf9a60065b 759
kadonotakashi 0:8fdf9a60065b 760 void serial_tx_abort_asynch(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 761 {
kadonotakashi 0:8fdf9a60065b 762 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 763 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 764 Pdc *pdc_base;
kadonotakashi 0:8fdf9a60065b 765 usart_disable_interrupt(_USART(obj), US_IER_TXBUFE);
kadonotakashi 0:8fdf9a60065b 766 pdc_base = usart_get_pdc_base(_USART(obj));
kadonotakashi 0:8fdf9a60065b 767 pdc_disable_transfer(pdc_base, PERIPH_PTCR_TXTEN);
kadonotakashi 0:8fdf9a60065b 768 pSERIAL_S(obj)->acttra = false;
kadonotakashi 0:8fdf9a60065b 769 }
kadonotakashi 0:8fdf9a60065b 770
kadonotakashi 0:8fdf9a60065b 771 void serial_rx_abort_asynch(serial_t *obj)
kadonotakashi 0:8fdf9a60065b 772 {
kadonotakashi 0:8fdf9a60065b 773 IRQn_Type irq_n = (IRQn_Type)0;
kadonotakashi 0:8fdf9a60065b 774 /* Sanity check arguments */
kadonotakashi 0:8fdf9a60065b 775 MBED_ASSERT(obj);
kadonotakashi 0:8fdf9a60065b 776 Pdc *pdc_base;
kadonotakashi 0:8fdf9a60065b 777 usart_disable_interrupt(_USART(obj), US_IER_RXBUFF);
kadonotakashi 0:8fdf9a60065b 778 pdc_base = usart_get_pdc_base(_USART(obj));
kadonotakashi 0:8fdf9a60065b 779 pdc_disable_transfer(pdc_base, PERIPH_PTCR_RXTEN);
kadonotakashi 0:8fdf9a60065b 780 irq_n = get_serial_irq_num(obj);
kadonotakashi 0:8fdf9a60065b 781 NVIC_ClearPendingIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 782 NVIC_DisableIRQ(irq_n);
kadonotakashi 0:8fdf9a60065b 783 pSERIAL_S(obj)->actrec = false;
kadonotakashi 0:8fdf9a60065b 784 }
kadonotakashi 0:8fdf9a60065b 785
kadonotakashi 0:8fdf9a60065b 786 #endif