takashi kadono
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Nucleo446_SSD1331
Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466
mbed-os/platform/mbed_application.c@0:8fdf9a60065b, 2018-10-10 (annotated)
- Committer:
- kadonotakashi
- Date:
- Wed Oct 10 00:33:53 2018 +0000
- Revision:
- 0:8fdf9a60065b
how to make mbed librry
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
kadonotakashi | 0:8fdf9a60065b | 1 | /* mbed Microcontroller Library |
kadonotakashi | 0:8fdf9a60065b | 2 | * Copyright (c) 2017-2017 ARM Limited |
kadonotakashi | 0:8fdf9a60065b | 3 | * |
kadonotakashi | 0:8fdf9a60065b | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
kadonotakashi | 0:8fdf9a60065b | 5 | * you may not use this file except in compliance with the License. |
kadonotakashi | 0:8fdf9a60065b | 6 | * You may obtain a copy of the License at |
kadonotakashi | 0:8fdf9a60065b | 7 | * |
kadonotakashi | 0:8fdf9a60065b | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
kadonotakashi | 0:8fdf9a60065b | 9 | * |
kadonotakashi | 0:8fdf9a60065b | 10 | * Unless required by applicable law or agreed to in writing, software |
kadonotakashi | 0:8fdf9a60065b | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
kadonotakashi | 0:8fdf9a60065b | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
kadonotakashi | 0:8fdf9a60065b | 13 | * See the License for the specific language governing permissions and |
kadonotakashi | 0:8fdf9a60065b | 14 | * limitations under the License. |
kadonotakashi | 0:8fdf9a60065b | 15 | */ |
kadonotakashi | 0:8fdf9a60065b | 16 | |
kadonotakashi | 0:8fdf9a60065b | 17 | #include <stdlib.h> |
kadonotakashi | 0:8fdf9a60065b | 18 | #include <stdarg.h> |
kadonotakashi | 0:8fdf9a60065b | 19 | #include "device.h" |
kadonotakashi | 0:8fdf9a60065b | 20 | #include "platform/mbed_application.h" |
kadonotakashi | 0:8fdf9a60065b | 21 | |
kadonotakashi | 0:8fdf9a60065b | 22 | #if MBED_APPLICATION_SUPPORT |
kadonotakashi | 0:8fdf9a60065b | 23 | |
kadonotakashi | 0:8fdf9a60065b | 24 | #if defined(__CORTEX_A9) |
kadonotakashi | 0:8fdf9a60065b | 25 | |
kadonotakashi | 0:8fdf9a60065b | 26 | static void powerdown_gic(void); |
kadonotakashi | 0:8fdf9a60065b | 27 | |
kadonotakashi | 0:8fdf9a60065b | 28 | void mbed_start_application(uintptr_t address) |
kadonotakashi | 0:8fdf9a60065b | 29 | { |
kadonotakashi | 0:8fdf9a60065b | 30 | __disable_irq(); |
kadonotakashi | 0:8fdf9a60065b | 31 | powerdown_gic(); |
kadonotakashi | 0:8fdf9a60065b | 32 | __enable_irq(); |
kadonotakashi | 0:8fdf9a60065b | 33 | ((void(*)())address)(); |
kadonotakashi | 0:8fdf9a60065b | 34 | } |
kadonotakashi | 0:8fdf9a60065b | 35 | |
kadonotakashi | 0:8fdf9a60065b | 36 | static void powerdown_gic() |
kadonotakashi | 0:8fdf9a60065b | 37 | { |
kadonotakashi | 0:8fdf9a60065b | 38 | int i; |
kadonotakashi | 0:8fdf9a60065b | 39 | int j; |
kadonotakashi | 0:8fdf9a60065b | 40 | |
kadonotakashi | 0:8fdf9a60065b | 41 | for (i = 0; i < 32; i++) { |
kadonotakashi | 0:8fdf9a60065b | 42 | GICDistributor->ICENABLER[i] = 0xFFFFFFFF; |
kadonotakashi | 0:8fdf9a60065b | 43 | GICDistributor->ICPENDR[i] = 0xFFFFFFFF; |
kadonotakashi | 0:8fdf9a60065b | 44 | if (i < 4) { |
kadonotakashi | 0:8fdf9a60065b | 45 | GICDistributor->CPENDSGIR[i] = 0xFFFFFFFF; |
kadonotakashi | 0:8fdf9a60065b | 46 | } |
kadonotakashi | 0:8fdf9a60065b | 47 | for (j = 0; j < 8; j++) { |
kadonotakashi | 0:8fdf9a60065b | 48 | GICDistributor->IPRIORITYR[i*8+j] = 0x00000000; |
kadonotakashi | 0:8fdf9a60065b | 49 | } |
kadonotakashi | 0:8fdf9a60065b | 50 | } |
kadonotakashi | 0:8fdf9a60065b | 51 | } |
kadonotakashi | 0:8fdf9a60065b | 52 | |
kadonotakashi | 0:8fdf9a60065b | 53 | #else |
kadonotakashi | 0:8fdf9a60065b | 54 | |
kadonotakashi | 0:8fdf9a60065b | 55 | static void powerdown_nvic(void); |
kadonotakashi | 0:8fdf9a60065b | 56 | static void powerdown_scb(uint32_t vtor); |
kadonotakashi | 0:8fdf9a60065b | 57 | static void start_new_application(void *sp, void *pc); |
kadonotakashi | 0:8fdf9a60065b | 58 | |
kadonotakashi | 0:8fdf9a60065b | 59 | void mbed_start_application(uintptr_t address) |
kadonotakashi | 0:8fdf9a60065b | 60 | { |
kadonotakashi | 0:8fdf9a60065b | 61 | void *sp; |
kadonotakashi | 0:8fdf9a60065b | 62 | void *pc; |
kadonotakashi | 0:8fdf9a60065b | 63 | |
kadonotakashi | 0:8fdf9a60065b | 64 | // Interrupts are re-enabled in start_new_application |
kadonotakashi | 0:8fdf9a60065b | 65 | __disable_irq(); |
kadonotakashi | 0:8fdf9a60065b | 66 | |
kadonotakashi | 0:8fdf9a60065b | 67 | SysTick->CTRL = 0x00000000; |
kadonotakashi | 0:8fdf9a60065b | 68 | powerdown_nvic(); |
kadonotakashi | 0:8fdf9a60065b | 69 | powerdown_scb(address); |
kadonotakashi | 0:8fdf9a60065b | 70 | |
kadonotakashi | 0:8fdf9a60065b | 71 | sp = *((void **)address + 0); |
kadonotakashi | 0:8fdf9a60065b | 72 | pc = *((void **)address + 1); |
kadonotakashi | 0:8fdf9a60065b | 73 | start_new_application(sp, pc); |
kadonotakashi | 0:8fdf9a60065b | 74 | } |
kadonotakashi | 0:8fdf9a60065b | 75 | |
kadonotakashi | 0:8fdf9a60065b | 76 | static void powerdown_nvic() |
kadonotakashi | 0:8fdf9a60065b | 77 | { |
kadonotakashi | 0:8fdf9a60065b | 78 | int isr_groups_32; |
kadonotakashi | 0:8fdf9a60065b | 79 | int i; |
kadonotakashi | 0:8fdf9a60065b | 80 | int j; |
kadonotakashi | 0:8fdf9a60065b | 81 | |
kadonotakashi | 0:8fdf9a60065b | 82 | #if defined(__CORTEX_M23) |
kadonotakashi | 0:8fdf9a60065b | 83 | // M23 doesn't support ICTR and supports up to 240 external interrupts. |
kadonotakashi | 0:8fdf9a60065b | 84 | isr_groups_32 = 8; |
kadonotakashi | 0:8fdf9a60065b | 85 | #else |
kadonotakashi | 0:8fdf9a60065b | 86 | isr_groups_32 = ((SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos) + 1; |
kadonotakashi | 0:8fdf9a60065b | 87 | #endif |
kadonotakashi | 0:8fdf9a60065b | 88 | for (i = 0; i < isr_groups_32; i++) { |
kadonotakashi | 0:8fdf9a60065b | 89 | NVIC->ICER[i] = 0xFFFFFFFF; |
kadonotakashi | 0:8fdf9a60065b | 90 | NVIC->ICPR[i] = 0xFFFFFFFF; |
kadonotakashi | 0:8fdf9a60065b | 91 | for (j = 0; j < 8; j++) { |
kadonotakashi | 0:8fdf9a60065b | 92 | #if defined(__CORTEX_M23) |
kadonotakashi | 0:8fdf9a60065b | 93 | NVIC->IPR[i * 8 + j] = 0x00000000; |
kadonotakashi | 0:8fdf9a60065b | 94 | #else |
kadonotakashi | 0:8fdf9a60065b | 95 | NVIC->IP[i * 8 + j] = 0x00000000; |
kadonotakashi | 0:8fdf9a60065b | 96 | #endif |
kadonotakashi | 0:8fdf9a60065b | 97 | } |
kadonotakashi | 0:8fdf9a60065b | 98 | } |
kadonotakashi | 0:8fdf9a60065b | 99 | } |
kadonotakashi | 0:8fdf9a60065b | 100 | |
kadonotakashi | 0:8fdf9a60065b | 101 | static void powerdown_scb(uint32_t vtor) |
kadonotakashi | 0:8fdf9a60065b | 102 | { |
kadonotakashi | 0:8fdf9a60065b | 103 | int i; |
kadonotakashi | 0:8fdf9a60065b | 104 | |
kadonotakashi | 0:8fdf9a60065b | 105 | // SCB->CPUID - Read only CPU ID register |
kadonotakashi | 0:8fdf9a60065b | 106 | SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk; |
kadonotakashi | 0:8fdf9a60065b | 107 | SCB->VTOR = vtor; |
kadonotakashi | 0:8fdf9a60065b | 108 | SCB->AIRCR = 0x05FA | 0x0000; |
kadonotakashi | 0:8fdf9a60065b | 109 | SCB->SCR = 0x00000000; |
kadonotakashi | 0:8fdf9a60065b | 110 | // SCB->CCR - Implementation defined value |
kadonotakashi | 0:8fdf9a60065b | 111 | #if defined(__CORTEX_M23) |
kadonotakashi | 0:8fdf9a60065b | 112 | for (i = 0; i < 2; i++) { |
kadonotakashi | 0:8fdf9a60065b | 113 | SCB->SHPR[i] = 0x00; |
kadonotakashi | 0:8fdf9a60065b | 114 | } |
kadonotakashi | 0:8fdf9a60065b | 115 | #else |
kadonotakashi | 0:8fdf9a60065b | 116 | for (i = 0; i < 12; i++) { |
kadonotakashi | 0:8fdf9a60065b | 117 | #if defined(__CORTEX_M7) |
kadonotakashi | 0:8fdf9a60065b | 118 | SCB->SHPR[i] = 0x00; |
kadonotakashi | 0:8fdf9a60065b | 119 | #else |
kadonotakashi | 0:8fdf9a60065b | 120 | SCB->SHP[i] = 0x00; |
kadonotakashi | 0:8fdf9a60065b | 121 | #endif |
kadonotakashi | 0:8fdf9a60065b | 122 | } |
kadonotakashi | 0:8fdf9a60065b | 123 | #endif |
kadonotakashi | 0:8fdf9a60065b | 124 | SCB->SHCSR = 0x00000000; |
kadonotakashi | 0:8fdf9a60065b | 125 | #if defined(__CORTEX_M23) |
kadonotakashi | 0:8fdf9a60065b | 126 | #else |
kadonotakashi | 0:8fdf9a60065b | 127 | SCB->CFSR = 0xFFFFFFFF; |
kadonotakashi | 0:8fdf9a60065b | 128 | SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk; |
kadonotakashi | 0:8fdf9a60065b | 129 | SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk | |
kadonotakashi | 0:8fdf9a60065b | 130 | SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk; |
kadonotakashi | 0:8fdf9a60065b | 131 | #endif |
kadonotakashi | 0:8fdf9a60065b | 132 | // SCB->MMFAR - Implementation defined value |
kadonotakashi | 0:8fdf9a60065b | 133 | // SCB->BFAR - Implementation defined value |
kadonotakashi | 0:8fdf9a60065b | 134 | // SCB->AFSR - Implementation defined value |
kadonotakashi | 0:8fdf9a60065b | 135 | // SCB->PFR - Read only processor feature register |
kadonotakashi | 0:8fdf9a60065b | 136 | // SCB->DFR - Read only debug feature registers |
kadonotakashi | 0:8fdf9a60065b | 137 | // SCB->ADR - Read only auxiliary feature registers |
kadonotakashi | 0:8fdf9a60065b | 138 | // SCB->MMFR - Read only memory model feature registers |
kadonotakashi | 0:8fdf9a60065b | 139 | // SCB->ISAR - Read only instruction set attribute registers |
kadonotakashi | 0:8fdf9a60065b | 140 | // SCB->CPACR - Implementation defined value |
kadonotakashi | 0:8fdf9a60065b | 141 | } |
kadonotakashi | 0:8fdf9a60065b | 142 | |
kadonotakashi | 0:8fdf9a60065b | 143 | #if defined (__CC_ARM) |
kadonotakashi | 0:8fdf9a60065b | 144 | |
kadonotakashi | 0:8fdf9a60065b | 145 | __asm static void start_new_application(void *sp, void *pc) |
kadonotakashi | 0:8fdf9a60065b | 146 | { |
kadonotakashi | 0:8fdf9a60065b | 147 | MOV R2, #0 |
kadonotakashi | 0:8fdf9a60065b | 148 | MSR CONTROL, R2 // Switch to main stack |
kadonotakashi | 0:8fdf9a60065b | 149 | MOV SP, R0 |
kadonotakashi | 0:8fdf9a60065b | 150 | MSR PRIMASK, R2 // Enable interrupts |
kadonotakashi | 0:8fdf9a60065b | 151 | BX R1 |
kadonotakashi | 0:8fdf9a60065b | 152 | } |
kadonotakashi | 0:8fdf9a60065b | 153 | |
kadonotakashi | 0:8fdf9a60065b | 154 | #elif defined (__GNUC__) || defined (__ICCARM__) |
kadonotakashi | 0:8fdf9a60065b | 155 | |
kadonotakashi | 0:8fdf9a60065b | 156 | void start_new_application(void *sp, void *pc) |
kadonotakashi | 0:8fdf9a60065b | 157 | { |
kadonotakashi | 0:8fdf9a60065b | 158 | __asm volatile( |
kadonotakashi | 0:8fdf9a60065b | 159 | "movw r2, #0 \n" // Fail to compile "mov r2, #0" with ARMC6. Replace with MOVW. |
kadonotakashi | 0:8fdf9a60065b | 160 | // We needn't "movt r2, #0" immediately following because MOVW |
kadonotakashi | 0:8fdf9a60065b | 161 | // will zero-extend the 16-bit immediate. |
kadonotakashi | 0:8fdf9a60065b | 162 | "msr control, r2 \n" // Switch to main stack |
kadonotakashi | 0:8fdf9a60065b | 163 | "mov sp, %0 \n" |
kadonotakashi | 0:8fdf9a60065b | 164 | "msr primask, r2 \n" // Enable interrupts |
kadonotakashi | 0:8fdf9a60065b | 165 | "bx %1 \n" |
kadonotakashi | 0:8fdf9a60065b | 166 | : |
kadonotakashi | 0:8fdf9a60065b | 167 | : "l"(sp), "l"(pc) |
kadonotakashi | 0:8fdf9a60065b | 168 | : "r2", "cc", "memory" |
kadonotakashi | 0:8fdf9a60065b | 169 | ); |
kadonotakashi | 0:8fdf9a60065b | 170 | } |
kadonotakashi | 0:8fdf9a60065b | 171 | |
kadonotakashi | 0:8fdf9a60065b | 172 | #else |
kadonotakashi | 0:8fdf9a60065b | 173 | |
kadonotakashi | 0:8fdf9a60065b | 174 | #error "Unsupported toolchain" |
kadonotakashi | 0:8fdf9a60065b | 175 | |
kadonotakashi | 0:8fdf9a60065b | 176 | #endif |
kadonotakashi | 0:8fdf9a60065b | 177 | |
kadonotakashi | 0:8fdf9a60065b | 178 | #endif |
kadonotakashi | 0:8fdf9a60065b | 179 | |
kadonotakashi | 0:8fdf9a60065b | 180 | #endif /* MBED_APPLICATION_SUPPORT */ |