takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/TARGET_FRDM/PeripheralNames.h@3:f3764f852aa8, 2018-10-11 (annotated)

Committer:
kadonotakashi
Date:
Thu Oct 11 02:27:46 2018 +0000
Revision:
3:f3764f852aa8
Parent:
0:8fdf9a60065b 
Nucreo 446 + SSD1331 test version;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /* mbed Microcontroller Library
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2006-2013 ARM Limited
kadonotakashi 0:8fdf9a60065b 3 *
kadonotakashi 0:8fdf9a60065b 4 * Licensed under the Apache License, Version 2.0 (the "License");
kadonotakashi 0:8fdf9a60065b 5 * you may not use this file except in compliance with the License.
kadonotakashi 0:8fdf9a60065b 6 * You may obtain a copy of the License at
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * http://www.apache.org/licenses/LICENSE-2.0
kadonotakashi 0:8fdf9a60065b 9 *
kadonotakashi 0:8fdf9a60065b 10 * Unless required by applicable law or agreed to in writing, software
kadonotakashi 0:8fdf9a60065b 11 * distributed under the License is distributed on an "AS IS" BASIS,
kadonotakashi 0:8fdf9a60065b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
kadonotakashi 0:8fdf9a60065b 13 * See the License for the specific language governing permissions and
kadonotakashi 0:8fdf9a60065b 14 * limitations under the License.
kadonotakashi 0:8fdf9a60065b 15 */
kadonotakashi 0:8fdf9a60065b 16 #ifndef MBED_PERIPHERALNAMES_H
kadonotakashi 0:8fdf9a60065b 17 #define MBED_PERIPHERALNAMES_H
kadonotakashi 0:8fdf9a60065b 18
kadonotakashi 0:8fdf9a60065b 19 #include "cmsis.h"
kadonotakashi 0:8fdf9a60065b 20
kadonotakashi 0:8fdf9a60065b 21 #ifdef __cplusplus
kadonotakashi 0:8fdf9a60065b 22 extern "C" {
kadonotakashi 0:8fdf9a60065b 23 #endif
kadonotakashi 0:8fdf9a60065b 24
kadonotakashi 0:8fdf9a60065b 25 typedef enum {
kadonotakashi 0:8fdf9a60065b 26 OSC32KCLK = 0,
kadonotakashi 0:8fdf9a60065b 27 } RTCName;
kadonotakashi 0:8fdf9a60065b 28
kadonotakashi 0:8fdf9a60065b 29 typedef enum {
kadonotakashi 0:8fdf9a60065b 30 UART_0 = 0,
kadonotakashi 0:8fdf9a60065b 31 UART_1 = 1,
kadonotakashi 0:8fdf9a60065b 32 UART_2 = 2,
kadonotakashi 0:8fdf9a60065b 33 UART_3 = 3,
kadonotakashi 0:8fdf9a60065b 34 UART_4 = 4,
kadonotakashi 0:8fdf9a60065b 35 } UARTName;
kadonotakashi 0:8fdf9a60065b 36
kadonotakashi 0:8fdf9a60065b 37 #define STDIO_UART_TX USBTX
kadonotakashi 0:8fdf9a60065b 38 #define STDIO_UART_RX USBRX
kadonotakashi 0:8fdf9a60065b 39 #define STDIO_UART UART_0
kadonotakashi 0:8fdf9a60065b 40
kadonotakashi 0:8fdf9a60065b 41 typedef enum {
kadonotakashi 0:8fdf9a60065b 42 I2C_0 = 0,
kadonotakashi 0:8fdf9a60065b 43 I2C_1 = 1,
kadonotakashi 0:8fdf9a60065b 44 I2C_2 = 2,
kadonotakashi 0:8fdf9a60065b 45 } I2CName;
kadonotakashi 0:8fdf9a60065b 46
kadonotakashi 0:8fdf9a60065b 47 #define TPM_SHIFT 8
kadonotakashi 0:8fdf9a60065b 48 typedef enum {
kadonotakashi 0:8fdf9a60065b 49 PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
kadonotakashi 0:8fdf9a60065b 50 PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
kadonotakashi 0:8fdf9a60065b 51 PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
kadonotakashi 0:8fdf9a60065b 52 PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
kadonotakashi 0:8fdf9a60065b 53 PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
kadonotakashi 0:8fdf9a60065b 54 PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
kadonotakashi 0:8fdf9a60065b 55 PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
kadonotakashi 0:8fdf9a60065b 56 PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
kadonotakashi 0:8fdf9a60065b 57 PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
kadonotakashi 0:8fdf9a60065b 58 PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
kadonotakashi 0:8fdf9a60065b 59 PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
kadonotakashi 0:8fdf9a60065b 60 PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
kadonotakashi 0:8fdf9a60065b 61 PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
kadonotakashi 0:8fdf9a60065b 62 PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
kadonotakashi 0:8fdf9a60065b 63 PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
kadonotakashi 0:8fdf9a60065b 64 PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
kadonotakashi 0:8fdf9a60065b 65 PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
kadonotakashi 0:8fdf9a60065b 66 PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
kadonotakashi 0:8fdf9a60065b 67 PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
kadonotakashi 0:8fdf9a60065b 68 PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
kadonotakashi 0:8fdf9a60065b 69 PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
kadonotakashi 0:8fdf9a60065b 70 PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
kadonotakashi 0:8fdf9a60065b 71 PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
kadonotakashi 0:8fdf9a60065b 72 PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
kadonotakashi 0:8fdf9a60065b 73 PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
kadonotakashi 0:8fdf9a60065b 74 PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
kadonotakashi 0:8fdf9a60065b 75 PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
kadonotakashi 0:8fdf9a60065b 76 PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
kadonotakashi 0:8fdf9a60065b 77 PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
kadonotakashi 0:8fdf9a60065b 78 PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
kadonotakashi 0:8fdf9a60065b 79 PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
kadonotakashi 0:8fdf9a60065b 80 PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
kadonotakashi 0:8fdf9a60065b 81 } PWMName;
kadonotakashi 0:8fdf9a60065b 82
kadonotakashi 0:8fdf9a60065b 83 #define ADC_INSTANCE_SHIFT 8
kadonotakashi 0:8fdf9a60065b 84 #define ADC_B_CHANNEL_SHIFT 5
kadonotakashi 0:8fdf9a60065b 85 typedef enum {
kadonotakashi 0:8fdf9a60065b 86 ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
kadonotakashi 0:8fdf9a60065b 87 ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
kadonotakashi 0:8fdf9a60065b 88 ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
kadonotakashi 0:8fdf9a60065b 89 ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
kadonotakashi 0:8fdf9a60065b 90 ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
kadonotakashi 0:8fdf9a60065b 91 ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
kadonotakashi 0:8fdf9a60065b 92 ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
kadonotakashi 0:8fdf9a60065b 93 ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
kadonotakashi 0:8fdf9a60065b 94 ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
kadonotakashi 0:8fdf9a60065b 95 ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
kadonotakashi 0:8fdf9a60065b 96 ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
kadonotakashi 0:8fdf9a60065b 97 ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
kadonotakashi 0:8fdf9a60065b 98 ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
kadonotakashi 0:8fdf9a60065b 99 ADC0_SE21 = (0 << ADC_INSTANCE_SHIFT) | 21,
kadonotakashi 0:8fdf9a60065b 100 ADC0_SE22 = (0 << ADC_INSTANCE_SHIFT) | 22,
kadonotakashi 0:8fdf9a60065b 101 ADC0_SE23 = (0 << ADC_INSTANCE_SHIFT) | 23,
kadonotakashi 0:8fdf9a60065b 102 ADC1_SE4a = (1 << ADC_INSTANCE_SHIFT) | 4,
kadonotakashi 0:8fdf9a60065b 103 ADC1_SE5a = (1 << ADC_INSTANCE_SHIFT) | 5,
kadonotakashi 0:8fdf9a60065b 104 ADC1_SE6a = (1 << ADC_INSTANCE_SHIFT) | 6,
kadonotakashi 0:8fdf9a60065b 105 ADC1_SE7a = (1 << ADC_INSTANCE_SHIFT) | 7,
kadonotakashi 0:8fdf9a60065b 106 ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
kadonotakashi 0:8fdf9a60065b 107 ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
kadonotakashi 0:8fdf9a60065b 108 ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
kadonotakashi 0:8fdf9a60065b 109 ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
kadonotakashi 0:8fdf9a60065b 110 ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
kadonotakashi 0:8fdf9a60065b 111 ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
kadonotakashi 0:8fdf9a60065b 112 ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
kadonotakashi 0:8fdf9a60065b 113 ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
kadonotakashi 0:8fdf9a60065b 114 ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
kadonotakashi 0:8fdf9a60065b 115 ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
kadonotakashi 0:8fdf9a60065b 116 ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
kadonotakashi 0:8fdf9a60065b 117 ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
kadonotakashi 0:8fdf9a60065b 118 ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
kadonotakashi 0:8fdf9a60065b 119 ADC1_SE23 = (1 << ADC_INSTANCE_SHIFT) | 23,
kadonotakashi 0:8fdf9a60065b 120 } ADCName;
kadonotakashi 0:8fdf9a60065b 121
kadonotakashi 0:8fdf9a60065b 122 typedef enum {
kadonotakashi 0:8fdf9a60065b 123 DAC_0 = 0
kadonotakashi 0:8fdf9a60065b 124 } DACName;
kadonotakashi 0:8fdf9a60065b 125
kadonotakashi 0:8fdf9a60065b 126
kadonotakashi 0:8fdf9a60065b 127 typedef enum {
kadonotakashi 0:8fdf9a60065b 128 SPI_0 = 0,
kadonotakashi 0:8fdf9a60065b 129 SPI_1 = 1,
kadonotakashi 0:8fdf9a60065b 130 SPI_2 = 2,
kadonotakashi 0:8fdf9a60065b 131 } SPIName;
kadonotakashi 0:8fdf9a60065b 132
kadonotakashi 0:8fdf9a60065b 133 #ifdef __cplusplus
kadonotakashi 0:8fdf9a60065b 134 }
kadonotakashi 0:8fdf9a60065b 135 #endif
kadonotakashi 0:8fdf9a60065b 136
kadonotakashi 0:8fdf9a60065b 137 #endif