takashi kadono
Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466
mbed-os/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_uart.h@3:f3764f852aa8, 2018-10-11 (annotated)
- Committer:
- kadonotakashi
- Date:
- Thu Oct 11 02:27:46 2018 +0000
- Revision:
- 3:f3764f852aa8
- Parent:
- 0:8fdf9a60065b
Nucreo 446 + SSD1331 test version;
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| kadonotakashi | 0:8fdf9a60065b | 1 | /* |
| kadonotakashi | 0:8fdf9a60065b | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
| kadonotakashi | 0:8fdf9a60065b | 3 | * All rights reserved. |
| kadonotakashi | 0:8fdf9a60065b | 4 | * |
| kadonotakashi | 0:8fdf9a60065b | 5 | * Redistribution and use in source and binary forms, with or without modification, |
| kadonotakashi | 0:8fdf9a60065b | 6 | * are permitted provided that the following conditions are met: |
| kadonotakashi | 0:8fdf9a60065b | 7 | * |
| kadonotakashi | 0:8fdf9a60065b | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
| kadonotakashi | 0:8fdf9a60065b | 9 | * of conditions and the following disclaimer. |
| kadonotakashi | 0:8fdf9a60065b | 10 | * |
| kadonotakashi | 0:8fdf9a60065b | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
| kadonotakashi | 0:8fdf9a60065b | 12 | * list of conditions and the following disclaimer in the documentation and/or |
| kadonotakashi | 0:8fdf9a60065b | 13 | * other materials provided with the distribution. |
| kadonotakashi | 0:8fdf9a60065b | 14 | * |
| kadonotakashi | 0:8fdf9a60065b | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
| kadonotakashi | 0:8fdf9a60065b | 16 | * contributors may be used to endorse or promote products derived from this |
| kadonotakashi | 0:8fdf9a60065b | 17 | * software without specific prior written permission. |
| kadonotakashi | 0:8fdf9a60065b | 18 | * |
| kadonotakashi | 0:8fdf9a60065b | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| kadonotakashi | 0:8fdf9a60065b | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| kadonotakashi | 0:8fdf9a60065b | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| kadonotakashi | 0:8fdf9a60065b | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
| kadonotakashi | 0:8fdf9a60065b | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| kadonotakashi | 0:8fdf9a60065b | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| kadonotakashi | 0:8fdf9a60065b | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| kadonotakashi | 0:8fdf9a60065b | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| kadonotakashi | 0:8fdf9a60065b | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| kadonotakashi | 0:8fdf9a60065b | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| kadonotakashi | 0:8fdf9a60065b | 29 | */ |
| kadonotakashi | 0:8fdf9a60065b | 30 | #ifndef _FSL_UART_H_ |
| kadonotakashi | 0:8fdf9a60065b | 31 | #define _FSL_UART_H_ |
| kadonotakashi | 0:8fdf9a60065b | 32 | |
| kadonotakashi | 0:8fdf9a60065b | 33 | #include "fsl_common.h" |
| kadonotakashi | 0:8fdf9a60065b | 34 | |
| kadonotakashi | 0:8fdf9a60065b | 35 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 36 | * @addtogroup uart_driver |
| kadonotakashi | 0:8fdf9a60065b | 37 | * @{ |
| kadonotakashi | 0:8fdf9a60065b | 38 | */ |
| kadonotakashi | 0:8fdf9a60065b | 39 | |
| kadonotakashi | 0:8fdf9a60065b | 40 | /*! @file */ |
| kadonotakashi | 0:8fdf9a60065b | 41 | |
| kadonotakashi | 0:8fdf9a60065b | 42 | /******************************************************************************* |
| kadonotakashi | 0:8fdf9a60065b | 43 | * Definitions |
| kadonotakashi | 0:8fdf9a60065b | 44 | ******************************************************************************/ |
| kadonotakashi | 0:8fdf9a60065b | 45 | |
| kadonotakashi | 0:8fdf9a60065b | 46 | /*! @name Driver version */ |
| kadonotakashi | 0:8fdf9a60065b | 47 | /*@{*/ |
| kadonotakashi | 0:8fdf9a60065b | 48 | /*! @brief UART driver version 2.1.0. */ |
| kadonotakashi | 0:8fdf9a60065b | 49 | #define FSL_UART_DRIVER_VERSION (MAKE_VERSION(2, 1, 0)) |
| kadonotakashi | 0:8fdf9a60065b | 50 | /*@}*/ |
| kadonotakashi | 0:8fdf9a60065b | 51 | |
| kadonotakashi | 0:8fdf9a60065b | 52 | /*! @brief Error codes for the UART driver. */ |
| kadonotakashi | 0:8fdf9a60065b | 53 | enum _uart_status |
| kadonotakashi | 0:8fdf9a60065b | 54 | { |
| kadonotakashi | 0:8fdf9a60065b | 55 | kStatus_UART_TxBusy = MAKE_STATUS(kStatusGroup_UART, 0), /*!< Transmitter is busy. */ |
| kadonotakashi | 0:8fdf9a60065b | 56 | kStatus_UART_RxBusy = MAKE_STATUS(kStatusGroup_UART, 1), /*!< Receiver is busy. */ |
| kadonotakashi | 0:8fdf9a60065b | 57 | kStatus_UART_TxIdle = MAKE_STATUS(kStatusGroup_UART, 2), /*!< UART transmitter is idle. */ |
| kadonotakashi | 0:8fdf9a60065b | 58 | kStatus_UART_RxIdle = MAKE_STATUS(kStatusGroup_UART, 3), /*!< UART receiver is idle. */ |
| kadonotakashi | 0:8fdf9a60065b | 59 | kStatus_UART_TxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_UART, 4), /*!< TX FIFO watermark too large */ |
| kadonotakashi | 0:8fdf9a60065b | 60 | kStatus_UART_RxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_UART, 5), /*!< RX FIFO watermark too large */ |
| kadonotakashi | 0:8fdf9a60065b | 61 | kStatus_UART_FlagCannotClearManually = |
| kadonotakashi | 0:8fdf9a60065b | 62 | MAKE_STATUS(kStatusGroup_UART, 6), /*!< UART flag can't be manually cleared. */ |
| kadonotakashi | 0:8fdf9a60065b | 63 | kStatus_UART_Error = MAKE_STATUS(kStatusGroup_UART, 7), /*!< Error happens on UART. */ |
| kadonotakashi | 0:8fdf9a60065b | 64 | kStatus_UART_RxRingBufferOverrun = MAKE_STATUS(kStatusGroup_UART, 8), /*!< UART RX software ring buffer overrun. */ |
| kadonotakashi | 0:8fdf9a60065b | 65 | kStatus_UART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_UART, 9), /*!< UART RX receiver overrun. */ |
| kadonotakashi | 0:8fdf9a60065b | 66 | kStatus_UART_NoiseError = MAKE_STATUS(kStatusGroup_UART, 10), /*!< UART noise error. */ |
| kadonotakashi | 0:8fdf9a60065b | 67 | kStatus_UART_FramingError = MAKE_STATUS(kStatusGroup_UART, 11), /*!< UART framing error. */ |
| kadonotakashi | 0:8fdf9a60065b | 68 | kStatus_UART_ParityError = MAKE_STATUS(kStatusGroup_UART, 12), /*!< UART parity error. */ |
| kadonotakashi | 0:8fdf9a60065b | 69 | }; |
| kadonotakashi | 0:8fdf9a60065b | 70 | |
| kadonotakashi | 0:8fdf9a60065b | 71 | /*! @brief UART parity mode. */ |
| kadonotakashi | 0:8fdf9a60065b | 72 | typedef enum _uart_parity_mode |
| kadonotakashi | 0:8fdf9a60065b | 73 | { |
| kadonotakashi | 0:8fdf9a60065b | 74 | kUART_ParityDisabled = 0x0U, /*!< Parity disabled */ |
| kadonotakashi | 0:8fdf9a60065b | 75 | kUART_ParityEven = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */ |
| kadonotakashi | 0:8fdf9a60065b | 76 | kUART_ParityOdd = 0x3U, /*!< Parity enabled, type odd, bit setting: PE|PT = 11 */ |
| kadonotakashi | 0:8fdf9a60065b | 77 | } uart_parity_mode_t; |
| kadonotakashi | 0:8fdf9a60065b | 78 | |
| kadonotakashi | 0:8fdf9a60065b | 79 | /*! @brief UART stop bit count. */ |
| kadonotakashi | 0:8fdf9a60065b | 80 | typedef enum _uart_stop_bit_count |
| kadonotakashi | 0:8fdf9a60065b | 81 | { |
| kadonotakashi | 0:8fdf9a60065b | 82 | kUART_OneStopBit = 0U, /*!< One stop bit */ |
| kadonotakashi | 0:8fdf9a60065b | 83 | kUART_TwoStopBit = 1U, /*!< Two stop bits */ |
| kadonotakashi | 0:8fdf9a60065b | 84 | } uart_stop_bit_count_t; |
| kadonotakashi | 0:8fdf9a60065b | 85 | |
| kadonotakashi | 0:8fdf9a60065b | 86 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 87 | * @brief UART interrupt configuration structure, default settings all disabled. |
| kadonotakashi | 0:8fdf9a60065b | 88 | * |
| kadonotakashi | 0:8fdf9a60065b | 89 | * This structure contains the settings for all of the UART interrupt configurations. |
| kadonotakashi | 0:8fdf9a60065b | 90 | */ |
| kadonotakashi | 0:8fdf9a60065b | 91 | enum _uart_interrupt_enable |
| kadonotakashi | 0:8fdf9a60065b | 92 | { |
| kadonotakashi | 0:8fdf9a60065b | 93 | #if defined(FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT |
| kadonotakashi | 0:8fdf9a60065b | 94 | kUART_LinBreakInterruptEnable = (UART_BDH_LBKDIE_MASK), /*!< LIN break detect interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 95 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 96 | kUART_RxActiveEdgeInterruptEnable = (UART_BDH_RXEDGIE_MASK), /*!< RX active edge interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 97 | kUART_TxDataRegEmptyInterruptEnable = (UART_C2_TIE_MASK << 8), /*!< Transmit data register empty interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 98 | kUART_TransmissionCompleteInterruptEnable = (UART_C2_TCIE_MASK << 8), /*!< Transmission complete interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 99 | kUART_RxDataRegFullInterruptEnable = (UART_C2_RIE_MASK << 8), /*!< Receiver data register full interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 100 | kUART_IdleLineInterruptEnable = (UART_C2_ILIE_MASK << 8), /*!< Idle line interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 101 | kUART_RxOverrunInterruptEnable = (UART_C3_ORIE_MASK << 16), /*!< Receiver overrun interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 102 | kUART_NoiseErrorInterruptEnable = (UART_C3_NEIE_MASK << 16), /*!< Noise error flag interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 103 | kUART_FramingErrorInterruptEnable = (UART_C3_FEIE_MASK << 16), /*!< Framing error flag interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 104 | kUART_ParityErrorInterruptEnable = (UART_C3_PEIE_MASK << 16), /*!< Parity error flag interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 105 | #if defined(FSL_FEATURE_UART_HAS_FIFO) && FSL_FEATURE_UART_HAS_FIFO |
| kadonotakashi | 0:8fdf9a60065b | 106 | kUART_RxFifoOverflowInterruptEnable = (UART_CFIFO_TXOFE_MASK << 24), /*!< TX FIFO overflow interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 107 | kUART_TxFifoOverflowInterruptEnable = (UART_CFIFO_RXUFE_MASK << 24), /*!< RX FIFO underflow interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 108 | kUART_RxFifoUnderflowInterruptEnable = (UART_CFIFO_RXUFE_MASK << 24), /*!< RX FIFO underflow interrupt. */ |
| kadonotakashi | 0:8fdf9a60065b | 109 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 110 | }; |
| kadonotakashi | 0:8fdf9a60065b | 111 | |
| kadonotakashi | 0:8fdf9a60065b | 112 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 113 | * @brief UART status flags. |
| kadonotakashi | 0:8fdf9a60065b | 114 | * |
| kadonotakashi | 0:8fdf9a60065b | 115 | * This provides constants for the UART status flags for use in the UART functions. |
| kadonotakashi | 0:8fdf9a60065b | 116 | */ |
| kadonotakashi | 0:8fdf9a60065b | 117 | enum _uart_flags |
| kadonotakashi | 0:8fdf9a60065b | 118 | { |
| kadonotakashi | 0:8fdf9a60065b | 119 | kUART_TxDataRegEmptyFlag = (UART_S1_TDRE_MASK), /*!< TX data register empty flag. */ |
| kadonotakashi | 0:8fdf9a60065b | 120 | kUART_TransmissionCompleteFlag = (UART_S1_TC_MASK), /*!< Transmission complete flag. */ |
| kadonotakashi | 0:8fdf9a60065b | 121 | kUART_RxDataRegFullFlag = (UART_S1_RDRF_MASK), /*!< RX data register full flag. */ |
| kadonotakashi | 0:8fdf9a60065b | 122 | kUART_IdleLineFlag = (UART_S1_IDLE_MASK), /*!< Idle line detect flag. */ |
| kadonotakashi | 0:8fdf9a60065b | 123 | kUART_RxOverrunFlag = (UART_S1_OR_MASK), /*!< RX overrun flag. */ |
| kadonotakashi | 0:8fdf9a60065b | 124 | kUART_NoiseErrorFlag = (UART_S1_NF_MASK), /*!< RX takes 3 samples of each received bit. |
| kadonotakashi | 0:8fdf9a60065b | 125 | If any of these samples differ, noise flag sets */ |
| kadonotakashi | 0:8fdf9a60065b | 126 | kUART_FramingErrorFlag = (UART_S1_FE_MASK), /*!< Frame error flag, sets if logic 0 was detected |
| kadonotakashi | 0:8fdf9a60065b | 127 | where stop bit expected */ |
| kadonotakashi | 0:8fdf9a60065b | 128 | kUART_ParityErrorFlag = (UART_S1_PF_MASK), /*!< If parity enabled, sets upon parity error detection */ |
| kadonotakashi | 0:8fdf9a60065b | 129 | #if defined(FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT |
| kadonotakashi | 0:8fdf9a60065b | 130 | kUART_LinBreakFlag = |
| kadonotakashi | 0:8fdf9a60065b | 131 | (UART_S2_LBKDIF_MASK << 8), /*!< LIN break detect interrupt flag, sets when |
| kadonotakashi | 0:8fdf9a60065b | 132 | LIN break char detected and LIN circuit enabled */ |
| kadonotakashi | 0:8fdf9a60065b | 133 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 134 | kUART_RxActiveEdgeFlag = (UART_S2_RXEDGIF_MASK << 8), /*!< RX pin active edge interrupt flag, |
| kadonotakashi | 0:8fdf9a60065b | 135 | sets when active edge detected */ |
| kadonotakashi | 0:8fdf9a60065b | 136 | kUART_RxActiveFlag = (UART_S2_RAF_MASK << 8), /*!< Receiver Active Flag (RAF), |
| kadonotakashi | 0:8fdf9a60065b | 137 | sets at beginning of valid start bit */ |
| kadonotakashi | 0:8fdf9a60065b | 138 | #if defined(FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS) && FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS |
| kadonotakashi | 0:8fdf9a60065b | 139 | kUART_NoiseErrorInRxDataRegFlag = (UART_ED_NOISY_MASK << 16), /*!< Noisy bit, sets if noise detected. */ |
| kadonotakashi | 0:8fdf9a60065b | 140 | kUART_ParityErrorInRxDataRegFlag = (UART_ED_PARITYE_MASK << 16), /*!< Paritye bit, sets if parity error detected. */ |
| kadonotakashi | 0:8fdf9a60065b | 141 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 142 | #if defined(FSL_FEATURE_UART_HAS_FIFO) && FSL_FEATURE_UART_HAS_FIFO |
| kadonotakashi | 0:8fdf9a60065b | 143 | kUART_TxFifoEmptyFlag = (UART_SFIFO_TXEMPT_MASK << 24), /*!< TXEMPT bit, sets if TX buffer is empty */ |
| kadonotakashi | 0:8fdf9a60065b | 144 | kUART_RxFifoEmptyFlag = (UART_SFIFO_RXEMPT_MASK << 24), /*!< RXEMPT bit, sets if RX buffer is empty */ |
| kadonotakashi | 0:8fdf9a60065b | 145 | kUART_TxFifoOverflowFlag = (UART_SFIFO_TXOF_MASK << 24), /*!< TXOF bit, sets if TX buffer overflow occurred */ |
| kadonotakashi | 0:8fdf9a60065b | 146 | kUART_RxFifoOverflowFlag = (UART_SFIFO_RXOF_MASK << 24), /*!< RXOF bit, sets if receive buffer overflow */ |
| kadonotakashi | 0:8fdf9a60065b | 147 | kUART_RxFifoUnderflowFlag = (UART_SFIFO_RXUF_MASK << 24), /*!< RXUF bit, sets if receive buffer underflow */ |
| kadonotakashi | 0:8fdf9a60065b | 148 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 149 | }; |
| kadonotakashi | 0:8fdf9a60065b | 150 | |
| kadonotakashi | 0:8fdf9a60065b | 151 | /*! @brief UART configuration structure. */ |
| kadonotakashi | 0:8fdf9a60065b | 152 | typedef struct _uart_config |
| kadonotakashi | 0:8fdf9a60065b | 153 | { |
| kadonotakashi | 0:8fdf9a60065b | 154 | uint32_t baudRate_Bps; /*!< UART baud rate */ |
| kadonotakashi | 0:8fdf9a60065b | 155 | uart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */ |
| kadonotakashi | 0:8fdf9a60065b | 156 | #if defined(FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT |
| kadonotakashi | 0:8fdf9a60065b | 157 | uart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */ |
| kadonotakashi | 0:8fdf9a60065b | 158 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 159 | #if defined(FSL_FEATURE_UART_HAS_FIFO) && FSL_FEATURE_UART_HAS_FIFO |
| kadonotakashi | 0:8fdf9a60065b | 160 | uint8_t txFifoWatermark; /*!< TX FIFO watermark */ |
| kadonotakashi | 0:8fdf9a60065b | 161 | uint8_t rxFifoWatermark; /*!< RX FIFO watermark */ |
| kadonotakashi | 0:8fdf9a60065b | 162 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 163 | bool enableTx; /*!< Enable TX */ |
| kadonotakashi | 0:8fdf9a60065b | 164 | bool enableRx; /*!< Enable RX */ |
| kadonotakashi | 0:8fdf9a60065b | 165 | } uart_config_t; |
| kadonotakashi | 0:8fdf9a60065b | 166 | |
| kadonotakashi | 0:8fdf9a60065b | 167 | /*! @brief UART transfer structure. */ |
| kadonotakashi | 0:8fdf9a60065b | 168 | typedef struct _uart_transfer |
| kadonotakashi | 0:8fdf9a60065b | 169 | { |
| kadonotakashi | 0:8fdf9a60065b | 170 | uint8_t *data; /*!< The buffer of data to be transfer.*/ |
| kadonotakashi | 0:8fdf9a60065b | 171 | size_t dataSize; /*!< The byte count to be transfer. */ |
| kadonotakashi | 0:8fdf9a60065b | 172 | } uart_transfer_t; |
| kadonotakashi | 0:8fdf9a60065b | 173 | |
| kadonotakashi | 0:8fdf9a60065b | 174 | /* Forward declaration of the handle typedef. */ |
| kadonotakashi | 0:8fdf9a60065b | 175 | typedef struct _uart_handle uart_handle_t; |
| kadonotakashi | 0:8fdf9a60065b | 176 | |
| kadonotakashi | 0:8fdf9a60065b | 177 | /*! @brief UART transfer callback function. */ |
| kadonotakashi | 0:8fdf9a60065b | 178 | typedef void (*uart_transfer_callback_t)(UART_Type *base, uart_handle_t *handle, status_t status, void *userData); |
| kadonotakashi | 0:8fdf9a60065b | 179 | |
| kadonotakashi | 0:8fdf9a60065b | 180 | /*! @brief UART handle structure. */ |
| kadonotakashi | 0:8fdf9a60065b | 181 | struct _uart_handle |
| kadonotakashi | 0:8fdf9a60065b | 182 | { |
| kadonotakashi | 0:8fdf9a60065b | 183 | uint8_t *volatile txData; /*!< Address of remaining data to send. */ |
| kadonotakashi | 0:8fdf9a60065b | 184 | volatile size_t txDataSize; /*!< Size of the remaining data to send. */ |
| kadonotakashi | 0:8fdf9a60065b | 185 | size_t txDataSizeAll; /*!< Size of the data to send out. */ |
| kadonotakashi | 0:8fdf9a60065b | 186 | uint8_t *volatile rxData; /*!< Address of remaining data to receive. */ |
| kadonotakashi | 0:8fdf9a60065b | 187 | volatile size_t rxDataSize; /*!< Size of the remaining data to receive. */ |
| kadonotakashi | 0:8fdf9a60065b | 188 | size_t rxDataSizeAll; /*!< Size of the data to receive. */ |
| kadonotakashi | 0:8fdf9a60065b | 189 | |
| kadonotakashi | 0:8fdf9a60065b | 190 | uint8_t *rxRingBuffer; /*!< Start address of the receiver ring buffer. */ |
| kadonotakashi | 0:8fdf9a60065b | 191 | size_t rxRingBufferSize; /*!< Size of the ring buffer. */ |
| kadonotakashi | 0:8fdf9a60065b | 192 | volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */ |
| kadonotakashi | 0:8fdf9a60065b | 193 | volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */ |
| kadonotakashi | 0:8fdf9a60065b | 194 | |
| kadonotakashi | 0:8fdf9a60065b | 195 | uart_transfer_callback_t callback; /*!< Callback function. */ |
| kadonotakashi | 0:8fdf9a60065b | 196 | void *userData; /*!< UART callback function parameter.*/ |
| kadonotakashi | 0:8fdf9a60065b | 197 | |
| kadonotakashi | 0:8fdf9a60065b | 198 | volatile uint8_t txState; /*!< TX transfer state. */ |
| kadonotakashi | 0:8fdf9a60065b | 199 | volatile uint8_t rxState; /*!< RX transfer state */ |
| kadonotakashi | 0:8fdf9a60065b | 200 | }; |
| kadonotakashi | 0:8fdf9a60065b | 201 | |
| kadonotakashi | 0:8fdf9a60065b | 202 | /******************************************************************************* |
| kadonotakashi | 0:8fdf9a60065b | 203 | * API |
| kadonotakashi | 0:8fdf9a60065b | 204 | ******************************************************************************/ |
| kadonotakashi | 0:8fdf9a60065b | 205 | |
| kadonotakashi | 0:8fdf9a60065b | 206 | #if defined(__cplusplus) |
| kadonotakashi | 0:8fdf9a60065b | 207 | extern "C" { |
| kadonotakashi | 0:8fdf9a60065b | 208 | #endif /* _cplusplus */ |
| kadonotakashi | 0:8fdf9a60065b | 209 | |
| kadonotakashi | 0:8fdf9a60065b | 210 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 211 | * @name Initialization and deinitialization |
| kadonotakashi | 0:8fdf9a60065b | 212 | * @{ |
| kadonotakashi | 0:8fdf9a60065b | 213 | */ |
| kadonotakashi | 0:8fdf9a60065b | 214 | |
| kadonotakashi | 0:8fdf9a60065b | 215 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 216 | * @brief Initializes a UART instance with user configuration structure and peripheral clock. |
| kadonotakashi | 0:8fdf9a60065b | 217 | * |
| kadonotakashi | 0:8fdf9a60065b | 218 | * This function configures the UART module with the user-defined settings. The user can configure the configuration |
| kadonotakashi | 0:8fdf9a60065b | 219 | * structure and also get the default configuration by using the UART_GetDefaultConfig() function. |
| kadonotakashi | 0:8fdf9a60065b | 220 | * Example below shows how to use this API to configure UART. |
| kadonotakashi | 0:8fdf9a60065b | 221 | * @code |
| kadonotakashi | 0:8fdf9a60065b | 222 | * uart_config_t uartConfig; |
| kadonotakashi | 0:8fdf9a60065b | 223 | * uartConfig.baudRate_Bps = 115200U; |
| kadonotakashi | 0:8fdf9a60065b | 224 | * uartConfig.parityMode = kUART_ParityDisabled; |
| kadonotakashi | 0:8fdf9a60065b | 225 | * uartConfig.stopBitCount = kUART_OneStopBit; |
| kadonotakashi | 0:8fdf9a60065b | 226 | * uartConfig.txFifoWatermark = 0; |
| kadonotakashi | 0:8fdf9a60065b | 227 | * uartConfig.rxFifoWatermark = 1; |
| kadonotakashi | 0:8fdf9a60065b | 228 | * UART_Init(UART1, &uartConfig, 20000000U); |
| kadonotakashi | 0:8fdf9a60065b | 229 | * @endcode |
| kadonotakashi | 0:8fdf9a60065b | 230 | * |
| kadonotakashi | 0:8fdf9a60065b | 231 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 232 | * @param config Pointer to user-defined configuration structure. |
| kadonotakashi | 0:8fdf9a60065b | 233 | * @param srcClock_Hz UART clock source frequency in HZ. |
| kadonotakashi | 0:8fdf9a60065b | 234 | */ |
| kadonotakashi | 0:8fdf9a60065b | 235 | void UART_Init(UART_Type *base, const uart_config_t *config, uint32_t srcClock_Hz); |
| kadonotakashi | 0:8fdf9a60065b | 236 | |
| kadonotakashi | 0:8fdf9a60065b | 237 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 238 | * @brief Deinitializes a UART instance. |
| kadonotakashi | 0:8fdf9a60065b | 239 | * |
| kadonotakashi | 0:8fdf9a60065b | 240 | * This function waits for TX complete, disables TX and RX, and disables the UART clock. |
| kadonotakashi | 0:8fdf9a60065b | 241 | * |
| kadonotakashi | 0:8fdf9a60065b | 242 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 243 | */ |
| kadonotakashi | 0:8fdf9a60065b | 244 | void UART_Deinit(UART_Type *base); |
| kadonotakashi | 0:8fdf9a60065b | 245 | |
| kadonotakashi | 0:8fdf9a60065b | 246 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 247 | * @brief Gets the default configuration structure. |
| kadonotakashi | 0:8fdf9a60065b | 248 | * |
| kadonotakashi | 0:8fdf9a60065b | 249 | * This function initializes the UART configuration structure to a default value. The default |
| kadonotakashi | 0:8fdf9a60065b | 250 | * values are: |
| kadonotakashi | 0:8fdf9a60065b | 251 | * uartConfig->baudRate_Bps = 115200U; |
| kadonotakashi | 0:8fdf9a60065b | 252 | * uartConfig->bitCountPerChar = kUART_8BitsPerChar; |
| kadonotakashi | 0:8fdf9a60065b | 253 | * uartConfig->parityMode = kUART_ParityDisabled; |
| kadonotakashi | 0:8fdf9a60065b | 254 | * uartConfig->stopBitCount = kUART_OneStopBit; |
| kadonotakashi | 0:8fdf9a60065b | 255 | * uartConfig->txFifoWatermark = 0; |
| kadonotakashi | 0:8fdf9a60065b | 256 | * uartConfig->rxFifoWatermark = 1; |
| kadonotakashi | 0:8fdf9a60065b | 257 | * uartConfig->enableTx = false; |
| kadonotakashi | 0:8fdf9a60065b | 258 | * uartConfig->enableRx = false; |
| kadonotakashi | 0:8fdf9a60065b | 259 | * |
| kadonotakashi | 0:8fdf9a60065b | 260 | * @param config Pointer to configuration structure. |
| kadonotakashi | 0:8fdf9a60065b | 261 | */ |
| kadonotakashi | 0:8fdf9a60065b | 262 | void UART_GetDefaultConfig(uart_config_t *config); |
| kadonotakashi | 0:8fdf9a60065b | 263 | |
| kadonotakashi | 0:8fdf9a60065b | 264 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 265 | * @brief Sets the UART instance baud rate. |
| kadonotakashi | 0:8fdf9a60065b | 266 | * |
| kadonotakashi | 0:8fdf9a60065b | 267 | * This function configures the UART module baud rate. This function is used to update |
| kadonotakashi | 0:8fdf9a60065b | 268 | * the UART module baud rate after the UART module is initialized by the UART_Init. |
| kadonotakashi | 0:8fdf9a60065b | 269 | * @code |
| kadonotakashi | 0:8fdf9a60065b | 270 | * UART_SetBaudRate(UART1, 115200U, 20000000U); |
| kadonotakashi | 0:8fdf9a60065b | 271 | * @endcode |
| kadonotakashi | 0:8fdf9a60065b | 272 | * |
| kadonotakashi | 0:8fdf9a60065b | 273 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 274 | * @param baudRate_Bps UART baudrate to be set. |
| kadonotakashi | 0:8fdf9a60065b | 275 | * @param srcClock_Hz UART clock source freqency in HZ. |
| kadonotakashi | 0:8fdf9a60065b | 276 | */ |
| kadonotakashi | 0:8fdf9a60065b | 277 | void UART_SetBaudRate(UART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz); |
| kadonotakashi | 0:8fdf9a60065b | 278 | |
| kadonotakashi | 0:8fdf9a60065b | 279 | /* @} */ |
| kadonotakashi | 0:8fdf9a60065b | 280 | |
| kadonotakashi | 0:8fdf9a60065b | 281 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 282 | * @name Status |
| kadonotakashi | 0:8fdf9a60065b | 283 | * @{ |
| kadonotakashi | 0:8fdf9a60065b | 284 | */ |
| kadonotakashi | 0:8fdf9a60065b | 285 | |
| kadonotakashi | 0:8fdf9a60065b | 286 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 287 | * @brief Get UART status flags. |
| kadonotakashi | 0:8fdf9a60065b | 288 | * |
| kadonotakashi | 0:8fdf9a60065b | 289 | * This function get all UART status flags, the flags are returned as the logical |
| kadonotakashi | 0:8fdf9a60065b | 290 | * OR value of the enumerators @ref _uart_flags. To check specific status, |
| kadonotakashi | 0:8fdf9a60065b | 291 | * compare the return value with enumerators in @ref _uart_flags. |
| kadonotakashi | 0:8fdf9a60065b | 292 | * For example, to check whether the TX is empty: |
| kadonotakashi | 0:8fdf9a60065b | 293 | * @code |
| kadonotakashi | 0:8fdf9a60065b | 294 | * if (kUART_TxDataRegEmptyFlag & UART_GetStatusFlags(UART1)) |
| kadonotakashi | 0:8fdf9a60065b | 295 | * { |
| kadonotakashi | 0:8fdf9a60065b | 296 | * ... |
| kadonotakashi | 0:8fdf9a60065b | 297 | * } |
| kadonotakashi | 0:8fdf9a60065b | 298 | * @endcode |
| kadonotakashi | 0:8fdf9a60065b | 299 | * |
| kadonotakashi | 0:8fdf9a60065b | 300 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 301 | * @return UART status flags which are ORed by the enumerators in the _uart_flags. |
| kadonotakashi | 0:8fdf9a60065b | 302 | */ |
| kadonotakashi | 0:8fdf9a60065b | 303 | uint32_t UART_GetStatusFlags(UART_Type *base); |
| kadonotakashi | 0:8fdf9a60065b | 304 | |
| kadonotakashi | 0:8fdf9a60065b | 305 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 306 | * @brief Clears status flags with the provided mask. |
| kadonotakashi | 0:8fdf9a60065b | 307 | * |
| kadonotakashi | 0:8fdf9a60065b | 308 | * This function clears UART status flags with a provided mask. Automatically cleared flag |
| kadonotakashi | 0:8fdf9a60065b | 309 | * can't be cleared by this function. |
| kadonotakashi | 0:8fdf9a60065b | 310 | * Some flags can only be cleared or set by hardware itself. These flags are: |
| kadonotakashi | 0:8fdf9a60065b | 311 | * kUART_TxDataRegEmptyFlag, kUART_TransmissionCompleteFlag, kUART_RxDataRegFullFlag, |
| kadonotakashi | 0:8fdf9a60065b | 312 | * kUART_RxActiveFlag, kUART_NoiseErrorInRxDataRegFlag, kUART_ParityErrorInRxDataRegFlag, |
| kadonotakashi | 0:8fdf9a60065b | 313 | * kUART_TxFifoEmptyFlag,kUART_RxFifoEmptyFlag |
| kadonotakashi | 0:8fdf9a60065b | 314 | * Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects. |
| kadonotakashi | 0:8fdf9a60065b | 315 | * |
| kadonotakashi | 0:8fdf9a60065b | 316 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 317 | * @param mask The status flags to be cleared, it is logical OR value of @ref _uart_flags. |
| kadonotakashi | 0:8fdf9a60065b | 318 | * @retval kStatus_UART_FlagCannotClearManually The flag can't be cleared by this function but |
| kadonotakashi | 0:8fdf9a60065b | 319 | * it is cleared automatically by hardware. |
| kadonotakashi | 0:8fdf9a60065b | 320 | * @retval kStatus_Success Status in the mask are cleared. |
| kadonotakashi | 0:8fdf9a60065b | 321 | */ |
| kadonotakashi | 0:8fdf9a60065b | 322 | status_t UART_ClearStatusFlags(UART_Type *base, uint32_t mask); |
| kadonotakashi | 0:8fdf9a60065b | 323 | |
| kadonotakashi | 0:8fdf9a60065b | 324 | /* @} */ |
| kadonotakashi | 0:8fdf9a60065b | 325 | |
| kadonotakashi | 0:8fdf9a60065b | 326 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 327 | * @name Interrupts |
| kadonotakashi | 0:8fdf9a60065b | 328 | * @{ |
| kadonotakashi | 0:8fdf9a60065b | 329 | */ |
| kadonotakashi | 0:8fdf9a60065b | 330 | |
| kadonotakashi | 0:8fdf9a60065b | 331 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 332 | * @brief Enables UART interrupts according to the provided mask. |
| kadonotakashi | 0:8fdf9a60065b | 333 | * |
| kadonotakashi | 0:8fdf9a60065b | 334 | * This function enables the UART interrupts according to the provided mask. The mask |
| kadonotakashi | 0:8fdf9a60065b | 335 | * is a logical OR of enumeration members. See @ref _uart_interrupt_enable. |
| kadonotakashi | 0:8fdf9a60065b | 336 | * For example, to enable TX empty interrupt and RX full interrupt: |
| kadonotakashi | 0:8fdf9a60065b | 337 | * @code |
| kadonotakashi | 0:8fdf9a60065b | 338 | * UART_EnableInterrupts(UART1,kUART_TxDataRegEmptyInterruptEnable | kUART_RxDataRegFullInterruptEnable); |
| kadonotakashi | 0:8fdf9a60065b | 339 | * @endcode |
| kadonotakashi | 0:8fdf9a60065b | 340 | * |
| kadonotakashi | 0:8fdf9a60065b | 341 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 342 | * @param mask The interrupts to enable. Logical OR of @ref _uart_interrupt_enable. |
| kadonotakashi | 0:8fdf9a60065b | 343 | */ |
| kadonotakashi | 0:8fdf9a60065b | 344 | void UART_EnableInterrupts(UART_Type *base, uint32_t mask); |
| kadonotakashi | 0:8fdf9a60065b | 345 | |
| kadonotakashi | 0:8fdf9a60065b | 346 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 347 | * @brief Disables the UART interrupts according to the provided mask. |
| kadonotakashi | 0:8fdf9a60065b | 348 | * |
| kadonotakashi | 0:8fdf9a60065b | 349 | * This function disables the UART interrupts according to the provided mask. The mask |
| kadonotakashi | 0:8fdf9a60065b | 350 | * is a logical OR of enumeration members. See @ref _uart_interrupt_enable. |
| kadonotakashi | 0:8fdf9a60065b | 351 | * For example, to disable TX empty interrupt and RX full interrupt: |
| kadonotakashi | 0:8fdf9a60065b | 352 | * @code |
| kadonotakashi | 0:8fdf9a60065b | 353 | * UART_DisableInterrupts(UART1,kUART_TxDataRegEmptyInterruptEnable | kUART_RxDataRegFullInterruptEnable); |
| kadonotakashi | 0:8fdf9a60065b | 354 | * @endcode |
| kadonotakashi | 0:8fdf9a60065b | 355 | * |
| kadonotakashi | 0:8fdf9a60065b | 356 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 357 | * @param mask The interrupts to disable. Logical OR of @ref _uart_interrupt_enable. |
| kadonotakashi | 0:8fdf9a60065b | 358 | */ |
| kadonotakashi | 0:8fdf9a60065b | 359 | void UART_DisableInterrupts(UART_Type *base, uint32_t mask); |
| kadonotakashi | 0:8fdf9a60065b | 360 | |
| kadonotakashi | 0:8fdf9a60065b | 361 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 362 | * @brief Gets the enabled UART interrupts. |
| kadonotakashi | 0:8fdf9a60065b | 363 | * |
| kadonotakashi | 0:8fdf9a60065b | 364 | * This function gets the enabled UART interrupts. The enabled interrupts are returned |
| kadonotakashi | 0:8fdf9a60065b | 365 | * as the logical OR value of the enumerators @ref _uart_interrupt_enable. To check |
| kadonotakashi | 0:8fdf9a60065b | 366 | * specific interrupts enable status, compare the return value with enumerators |
| kadonotakashi | 0:8fdf9a60065b | 367 | * in @ref _uart_interrupt_enable. |
| kadonotakashi | 0:8fdf9a60065b | 368 | * For example, to check whether TX empty interrupt is enabled: |
| kadonotakashi | 0:8fdf9a60065b | 369 | * @code |
| kadonotakashi | 0:8fdf9a60065b | 370 | * uint32_t enabledInterrupts = UART_GetEnabledInterrupts(UART1); |
| kadonotakashi | 0:8fdf9a60065b | 371 | * |
| kadonotakashi | 0:8fdf9a60065b | 372 | * if (kUART_TxDataRegEmptyInterruptEnable & enabledInterrupts) |
| kadonotakashi | 0:8fdf9a60065b | 373 | * { |
| kadonotakashi | 0:8fdf9a60065b | 374 | * ... |
| kadonotakashi | 0:8fdf9a60065b | 375 | * } |
| kadonotakashi | 0:8fdf9a60065b | 376 | * @endcode |
| kadonotakashi | 0:8fdf9a60065b | 377 | * |
| kadonotakashi | 0:8fdf9a60065b | 378 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 379 | * @return UART interrupt flags which are logical OR of the enumerators in @ref _uart_interrupt_enable. |
| kadonotakashi | 0:8fdf9a60065b | 380 | */ |
| kadonotakashi | 0:8fdf9a60065b | 381 | uint32_t UART_GetEnabledInterrupts(UART_Type *base); |
| kadonotakashi | 0:8fdf9a60065b | 382 | |
| kadonotakashi | 0:8fdf9a60065b | 383 | /* @} */ |
| kadonotakashi | 0:8fdf9a60065b | 384 | |
| kadonotakashi | 0:8fdf9a60065b | 385 | #if defined(FSL_FEATURE_UART_HAS_DMA_SELECT) && FSL_FEATURE_UART_HAS_DMA_SELECT |
| kadonotakashi | 0:8fdf9a60065b | 386 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 387 | * @name DMA Control |
| kadonotakashi | 0:8fdf9a60065b | 388 | * @{ |
| kadonotakashi | 0:8fdf9a60065b | 389 | */ |
| kadonotakashi | 0:8fdf9a60065b | 390 | |
| kadonotakashi | 0:8fdf9a60065b | 391 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 392 | * @brief Gets the UART data register address. |
| kadonotakashi | 0:8fdf9a60065b | 393 | * |
| kadonotakashi | 0:8fdf9a60065b | 394 | * This function returns the UART data register address, which is mainly used by DMA/eDMA. |
| kadonotakashi | 0:8fdf9a60065b | 395 | * |
| kadonotakashi | 0:8fdf9a60065b | 396 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 397 | * @return UART data register address which are used both by transmitter and receiver. |
| kadonotakashi | 0:8fdf9a60065b | 398 | */ |
| kadonotakashi | 0:8fdf9a60065b | 399 | static inline uint32_t UART_GetDataRegisterAddress(UART_Type *base) |
| kadonotakashi | 0:8fdf9a60065b | 400 | { |
| kadonotakashi | 0:8fdf9a60065b | 401 | return (uint32_t) & (base->D); |
| kadonotakashi | 0:8fdf9a60065b | 402 | } |
| kadonotakashi | 0:8fdf9a60065b | 403 | |
| kadonotakashi | 0:8fdf9a60065b | 404 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 405 | * @brief Enables or disables the UART transmitter DMA request. |
| kadonotakashi | 0:8fdf9a60065b | 406 | * |
| kadonotakashi | 0:8fdf9a60065b | 407 | * This function enables or disables the transmit data register empty flag, S1[TDRE], to generate the DMA requests. |
| kadonotakashi | 0:8fdf9a60065b | 408 | * |
| kadonotakashi | 0:8fdf9a60065b | 409 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 410 | * @param enable True to enable, false to disable. |
| kadonotakashi | 0:8fdf9a60065b | 411 | */ |
| kadonotakashi | 0:8fdf9a60065b | 412 | static inline void UART_EnableTxDMA(UART_Type *base, bool enable) |
| kadonotakashi | 0:8fdf9a60065b | 413 | { |
| kadonotakashi | 0:8fdf9a60065b | 414 | if (enable) |
| kadonotakashi | 0:8fdf9a60065b | 415 | { |
| kadonotakashi | 0:8fdf9a60065b | 416 | #if (defined(FSL_FEATURE_UART_IS_SCI) && FSL_FEATURE_UART_IS_SCI) |
| kadonotakashi | 0:8fdf9a60065b | 417 | base->C4 |= UART_C4_TDMAS_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 418 | #else |
| kadonotakashi | 0:8fdf9a60065b | 419 | base->C5 |= UART_C5_TDMAS_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 420 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 421 | base->C2 |= UART_C2_TIE_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 422 | } |
| kadonotakashi | 0:8fdf9a60065b | 423 | else |
| kadonotakashi | 0:8fdf9a60065b | 424 | { |
| kadonotakashi | 0:8fdf9a60065b | 425 | #if (defined(FSL_FEATURE_UART_IS_SCI) && FSL_FEATURE_UART_IS_SCI) |
| kadonotakashi | 0:8fdf9a60065b | 426 | base->C4 &= ~UART_C4_TDMAS_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 427 | #else |
| kadonotakashi | 0:8fdf9a60065b | 428 | base->C5 &= ~UART_C5_TDMAS_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 429 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 430 | base->C2 &= ~UART_C2_TIE_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 431 | } |
| kadonotakashi | 0:8fdf9a60065b | 432 | } |
| kadonotakashi | 0:8fdf9a60065b | 433 | |
| kadonotakashi | 0:8fdf9a60065b | 434 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 435 | * @brief Enables or disables the UART receiver DMA. |
| kadonotakashi | 0:8fdf9a60065b | 436 | * |
| kadonotakashi | 0:8fdf9a60065b | 437 | * This function enables or disables the receiver data register full flag, S1[RDRF], to generate DMA requests. |
| kadonotakashi | 0:8fdf9a60065b | 438 | * |
| kadonotakashi | 0:8fdf9a60065b | 439 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 440 | * @param enable True to enable, false to disable. |
| kadonotakashi | 0:8fdf9a60065b | 441 | */ |
| kadonotakashi | 0:8fdf9a60065b | 442 | static inline void UART_EnableRxDMA(UART_Type *base, bool enable) |
| kadonotakashi | 0:8fdf9a60065b | 443 | { |
| kadonotakashi | 0:8fdf9a60065b | 444 | if (enable) |
| kadonotakashi | 0:8fdf9a60065b | 445 | { |
| kadonotakashi | 0:8fdf9a60065b | 446 | #if (defined(FSL_FEATURE_UART_IS_SCI) && FSL_FEATURE_UART_IS_SCI) |
| kadonotakashi | 0:8fdf9a60065b | 447 | base->C4 |= UART_C4_RDMAS_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 448 | #else |
| kadonotakashi | 0:8fdf9a60065b | 449 | base->C5 |= UART_C5_RDMAS_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 450 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 451 | base->C2 |= UART_C2_RIE_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 452 | } |
| kadonotakashi | 0:8fdf9a60065b | 453 | else |
| kadonotakashi | 0:8fdf9a60065b | 454 | { |
| kadonotakashi | 0:8fdf9a60065b | 455 | #if (defined(FSL_FEATURE_UART_IS_SCI) && FSL_FEATURE_UART_IS_SCI) |
| kadonotakashi | 0:8fdf9a60065b | 456 | base->C4 &= ~UART_C4_RDMAS_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 457 | #else |
| kadonotakashi | 0:8fdf9a60065b | 458 | base->C5 &= ~UART_C5_RDMAS_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 459 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 460 | base->C2 &= ~UART_C2_RIE_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 461 | } |
| kadonotakashi | 0:8fdf9a60065b | 462 | } |
| kadonotakashi | 0:8fdf9a60065b | 463 | |
| kadonotakashi | 0:8fdf9a60065b | 464 | /* @} */ |
| kadonotakashi | 0:8fdf9a60065b | 465 | #endif /* FSL_FEATURE_UART_HAS_DMA_SELECT */ |
| kadonotakashi | 0:8fdf9a60065b | 466 | |
| kadonotakashi | 0:8fdf9a60065b | 467 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 468 | * @name Bus Operations |
| kadonotakashi | 0:8fdf9a60065b | 469 | * @{ |
| kadonotakashi | 0:8fdf9a60065b | 470 | */ |
| kadonotakashi | 0:8fdf9a60065b | 471 | |
| kadonotakashi | 0:8fdf9a60065b | 472 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 473 | * @brief Enables or disables the UART transmitter. |
| kadonotakashi | 0:8fdf9a60065b | 474 | * |
| kadonotakashi | 0:8fdf9a60065b | 475 | * This function enables or disables the UART transmitter. |
| kadonotakashi | 0:8fdf9a60065b | 476 | * |
| kadonotakashi | 0:8fdf9a60065b | 477 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 478 | * @param enable True to enable, false to disable. |
| kadonotakashi | 0:8fdf9a60065b | 479 | */ |
| kadonotakashi | 0:8fdf9a60065b | 480 | static inline void UART_EnableTx(UART_Type *base, bool enable) |
| kadonotakashi | 0:8fdf9a60065b | 481 | { |
| kadonotakashi | 0:8fdf9a60065b | 482 | if (enable) |
| kadonotakashi | 0:8fdf9a60065b | 483 | { |
| kadonotakashi | 0:8fdf9a60065b | 484 | base->C2 |= UART_C2_TE_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 485 | } |
| kadonotakashi | 0:8fdf9a60065b | 486 | else |
| kadonotakashi | 0:8fdf9a60065b | 487 | { |
| kadonotakashi | 0:8fdf9a60065b | 488 | base->C2 &= ~UART_C2_TE_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 489 | } |
| kadonotakashi | 0:8fdf9a60065b | 490 | } |
| kadonotakashi | 0:8fdf9a60065b | 491 | |
| kadonotakashi | 0:8fdf9a60065b | 492 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 493 | * @brief Enables or disables the UART receiver. |
| kadonotakashi | 0:8fdf9a60065b | 494 | * |
| kadonotakashi | 0:8fdf9a60065b | 495 | * This function enables or disables the UART receiver. |
| kadonotakashi | 0:8fdf9a60065b | 496 | * |
| kadonotakashi | 0:8fdf9a60065b | 497 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 498 | * @param enable True to enable, false to disable. |
| kadonotakashi | 0:8fdf9a60065b | 499 | */ |
| kadonotakashi | 0:8fdf9a60065b | 500 | static inline void UART_EnableRx(UART_Type *base, bool enable) |
| kadonotakashi | 0:8fdf9a60065b | 501 | { |
| kadonotakashi | 0:8fdf9a60065b | 502 | if (enable) |
| kadonotakashi | 0:8fdf9a60065b | 503 | { |
| kadonotakashi | 0:8fdf9a60065b | 504 | base->C2 |= UART_C2_RE_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 505 | } |
| kadonotakashi | 0:8fdf9a60065b | 506 | else |
| kadonotakashi | 0:8fdf9a60065b | 507 | { |
| kadonotakashi | 0:8fdf9a60065b | 508 | base->C2 &= ~UART_C2_RE_MASK; |
| kadonotakashi | 0:8fdf9a60065b | 509 | } |
| kadonotakashi | 0:8fdf9a60065b | 510 | } |
| kadonotakashi | 0:8fdf9a60065b | 511 | |
| kadonotakashi | 0:8fdf9a60065b | 512 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 513 | * @brief Writes to the TX register. |
| kadonotakashi | 0:8fdf9a60065b | 514 | * |
| kadonotakashi | 0:8fdf9a60065b | 515 | * This function writes data to the TX register directly. The upper layer must ensure |
| kadonotakashi | 0:8fdf9a60065b | 516 | * that the TX register is empty or TX FIFO has empty room before calling this function. |
| kadonotakashi | 0:8fdf9a60065b | 517 | * |
| kadonotakashi | 0:8fdf9a60065b | 518 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 519 | * @param data The byte to write. |
| kadonotakashi | 0:8fdf9a60065b | 520 | */ |
| kadonotakashi | 0:8fdf9a60065b | 521 | static inline void UART_WriteByte(UART_Type *base, uint8_t data) |
| kadonotakashi | 0:8fdf9a60065b | 522 | { |
| kadonotakashi | 0:8fdf9a60065b | 523 | base->D = data; |
| kadonotakashi | 0:8fdf9a60065b | 524 | } |
| kadonotakashi | 0:8fdf9a60065b | 525 | |
| kadonotakashi | 0:8fdf9a60065b | 526 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 527 | * @brief Reads the RX register directly. |
| kadonotakashi | 0:8fdf9a60065b | 528 | * |
| kadonotakashi | 0:8fdf9a60065b | 529 | * This function reads data from the TX register directly. The upper layer must |
| kadonotakashi | 0:8fdf9a60065b | 530 | * ensure that the RX register is full or that the TX FIFO has data before calling this function. |
| kadonotakashi | 0:8fdf9a60065b | 531 | * |
| kadonotakashi | 0:8fdf9a60065b | 532 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 533 | * @return The byte read from UART data register. |
| kadonotakashi | 0:8fdf9a60065b | 534 | */ |
| kadonotakashi | 0:8fdf9a60065b | 535 | static inline uint8_t UART_ReadByte(UART_Type *base) |
| kadonotakashi | 0:8fdf9a60065b | 536 | { |
| kadonotakashi | 0:8fdf9a60065b | 537 | return base->D; |
| kadonotakashi | 0:8fdf9a60065b | 538 | } |
| kadonotakashi | 0:8fdf9a60065b | 539 | |
| kadonotakashi | 0:8fdf9a60065b | 540 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 541 | * @brief Writes to the TX register using a blocking method. |
| kadonotakashi | 0:8fdf9a60065b | 542 | * |
| kadonotakashi | 0:8fdf9a60065b | 543 | * This function polls the TX register, waits for the TX register to be empty or for the TX FIFO |
| kadonotakashi | 0:8fdf9a60065b | 544 | * to have room and writes data to the TX buffer. |
| kadonotakashi | 0:8fdf9a60065b | 545 | * |
| kadonotakashi | 0:8fdf9a60065b | 546 | * @note This function does not check whether all the data has been sent out to the bus. |
| kadonotakashi | 0:8fdf9a60065b | 547 | * Before disabling the TX, check kUART_TransmissionCompleteFlag to ensure that the TX is |
| kadonotakashi | 0:8fdf9a60065b | 548 | * finished. |
| kadonotakashi | 0:8fdf9a60065b | 549 | * |
| kadonotakashi | 0:8fdf9a60065b | 550 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 551 | * @param data Start address of the data to write. |
| kadonotakashi | 0:8fdf9a60065b | 552 | * @param length Size of the data to write. |
| kadonotakashi | 0:8fdf9a60065b | 553 | */ |
| kadonotakashi | 0:8fdf9a60065b | 554 | void UART_WriteBlocking(UART_Type *base, const uint8_t *data, size_t length); |
| kadonotakashi | 0:8fdf9a60065b | 555 | |
| kadonotakashi | 0:8fdf9a60065b | 556 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 557 | * @brief Read RX data register using a blocking method. |
| kadonotakashi | 0:8fdf9a60065b | 558 | * |
| kadonotakashi | 0:8fdf9a60065b | 559 | * This function polls the RX register, waits for the RX register to be full or for RX FIFO to |
| kadonotakashi | 0:8fdf9a60065b | 560 | * have data and read data from the TX register. |
| kadonotakashi | 0:8fdf9a60065b | 561 | * |
| kadonotakashi | 0:8fdf9a60065b | 562 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 563 | * @param data Start address of the buffer to store the received data. |
| kadonotakashi | 0:8fdf9a60065b | 564 | * @param length Size of the buffer. |
| kadonotakashi | 0:8fdf9a60065b | 565 | * @retval kStatus_UART_RxHardwareOverrun Receiver overrun happened while receiving data. |
| kadonotakashi | 0:8fdf9a60065b | 566 | * @retval kStatus_UART_NoiseError Noise error happened while receiving data. |
| kadonotakashi | 0:8fdf9a60065b | 567 | * @retval kStatus_UART_FramingError Framing error happened while receiving data. |
| kadonotakashi | 0:8fdf9a60065b | 568 | * @retval kStatus_UART_ParityError Parity error happened while receiving data. |
| kadonotakashi | 0:8fdf9a60065b | 569 | * @retval kStatus_Success Successfully received all data. |
| kadonotakashi | 0:8fdf9a60065b | 570 | */ |
| kadonotakashi | 0:8fdf9a60065b | 571 | status_t UART_ReadBlocking(UART_Type *base, uint8_t *data, size_t length); |
| kadonotakashi | 0:8fdf9a60065b | 572 | |
| kadonotakashi | 0:8fdf9a60065b | 573 | /* @} */ |
| kadonotakashi | 0:8fdf9a60065b | 574 | |
| kadonotakashi | 0:8fdf9a60065b | 575 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 576 | * @name Transactional |
| kadonotakashi | 0:8fdf9a60065b | 577 | * @{ |
| kadonotakashi | 0:8fdf9a60065b | 578 | */ |
| kadonotakashi | 0:8fdf9a60065b | 579 | |
| kadonotakashi | 0:8fdf9a60065b | 580 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 581 | * @brief Initializes the UART handle. |
| kadonotakashi | 0:8fdf9a60065b | 582 | * |
| kadonotakashi | 0:8fdf9a60065b | 583 | * This function initializes the UART handle which can be used for other UART |
| kadonotakashi | 0:8fdf9a60065b | 584 | * transactional APIs. Usually, for a specified UART instance, |
| kadonotakashi | 0:8fdf9a60065b | 585 | * call this API once to get the initialized handle. |
| kadonotakashi | 0:8fdf9a60065b | 586 | * |
| kadonotakashi | 0:8fdf9a60065b | 587 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 588 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 589 | * @param callback The callback function. |
| kadonotakashi | 0:8fdf9a60065b | 590 | * @param userData The parameter of the callback function. |
| kadonotakashi | 0:8fdf9a60065b | 591 | */ |
| kadonotakashi | 0:8fdf9a60065b | 592 | void UART_TransferCreateHandle(UART_Type *base, |
| kadonotakashi | 0:8fdf9a60065b | 593 | uart_handle_t *handle, |
| kadonotakashi | 0:8fdf9a60065b | 594 | uart_transfer_callback_t callback, |
| kadonotakashi | 0:8fdf9a60065b | 595 | void *userData); |
| kadonotakashi | 0:8fdf9a60065b | 596 | |
| kadonotakashi | 0:8fdf9a60065b | 597 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 598 | * @brief Sets up the RX ring buffer. |
| kadonotakashi | 0:8fdf9a60065b | 599 | * |
| kadonotakashi | 0:8fdf9a60065b | 600 | * This function sets up the RX ring buffer to a specific UART handle. |
| kadonotakashi | 0:8fdf9a60065b | 601 | * |
| kadonotakashi | 0:8fdf9a60065b | 602 | * When the RX ring buffer is used, data received are stored into the ring buffer even when the |
| kadonotakashi | 0:8fdf9a60065b | 603 | * user doesn't call the UART_TransferReceiveNonBlocking() API. If there is already data received |
| kadonotakashi | 0:8fdf9a60065b | 604 | * in the ring buffer, the user can get the received data from the ring buffer directly. |
| kadonotakashi | 0:8fdf9a60065b | 605 | * |
| kadonotakashi | 0:8fdf9a60065b | 606 | * @note When using the RX ring buffer, one byte is reserved for internal use. In other |
| kadonotakashi | 0:8fdf9a60065b | 607 | * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data. |
| kadonotakashi | 0:8fdf9a60065b | 608 | * |
| kadonotakashi | 0:8fdf9a60065b | 609 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 610 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 611 | * @param ringBuffer Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer. |
| kadonotakashi | 0:8fdf9a60065b | 612 | * @param ringBufferSize size of the ring buffer. |
| kadonotakashi | 0:8fdf9a60065b | 613 | */ |
| kadonotakashi | 0:8fdf9a60065b | 614 | void UART_TransferStartRingBuffer(UART_Type *base, uart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize); |
| kadonotakashi | 0:8fdf9a60065b | 615 | |
| kadonotakashi | 0:8fdf9a60065b | 616 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 617 | * @brief Aborts the background transfer and uninstalls the ring buffer. |
| kadonotakashi | 0:8fdf9a60065b | 618 | * |
| kadonotakashi | 0:8fdf9a60065b | 619 | * This function aborts the background transfer and uninstalls the ring buffer. |
| kadonotakashi | 0:8fdf9a60065b | 620 | * |
| kadonotakashi | 0:8fdf9a60065b | 621 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 622 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 623 | */ |
| kadonotakashi | 0:8fdf9a60065b | 624 | void UART_TransferStopRingBuffer(UART_Type *base, uart_handle_t *handle); |
| kadonotakashi | 0:8fdf9a60065b | 625 | |
| kadonotakashi | 0:8fdf9a60065b | 626 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 627 | * @brief Transmits a buffer of data using the interrupt method. |
| kadonotakashi | 0:8fdf9a60065b | 628 | * |
| kadonotakashi | 0:8fdf9a60065b | 629 | * This function sends data using an interrupt method. This is a non-blocking function, which |
| kadonotakashi | 0:8fdf9a60065b | 630 | * returns directly without waiting for all data to be written to the TX register. When |
| kadonotakashi | 0:8fdf9a60065b | 631 | * all data is written to the TX register in the ISR, the UART driver calls the callback |
| kadonotakashi | 0:8fdf9a60065b | 632 | * function and passes the @ref kStatus_UART_TxIdle as status parameter. |
| kadonotakashi | 0:8fdf9a60065b | 633 | * |
| kadonotakashi | 0:8fdf9a60065b | 634 | * @note The kStatus_UART_TxIdle is passed to the upper layer when all data is written |
| kadonotakashi | 0:8fdf9a60065b | 635 | * to the TX register. However it does not ensure that all data are sent out. Before disabling the TX, |
| kadonotakashi | 0:8fdf9a60065b | 636 | * check the kUART_TransmissionCompleteFlag to ensure that the TX is finished. |
| kadonotakashi | 0:8fdf9a60065b | 637 | * |
| kadonotakashi | 0:8fdf9a60065b | 638 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 639 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 640 | * @param xfer UART transfer structure. See #uart_transfer_t. |
| kadonotakashi | 0:8fdf9a60065b | 641 | * @retval kStatus_Success Successfully start the data transmission. |
| kadonotakashi | 0:8fdf9a60065b | 642 | * @retval kStatus_UART_TxBusy Previous transmission still not finished, data not all written to TX register yet. |
| kadonotakashi | 0:8fdf9a60065b | 643 | * @retval kStatus_InvalidArgument Invalid argument. |
| kadonotakashi | 0:8fdf9a60065b | 644 | */ |
| kadonotakashi | 0:8fdf9a60065b | 645 | status_t UART_TransferSendNonBlocking(UART_Type *base, uart_handle_t *handle, uart_transfer_t *xfer); |
| kadonotakashi | 0:8fdf9a60065b | 646 | |
| kadonotakashi | 0:8fdf9a60065b | 647 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 648 | * @brief Aborts the interrupt driven data transmit. |
| kadonotakashi | 0:8fdf9a60065b | 649 | * |
| kadonotakashi | 0:8fdf9a60065b | 650 | * This function aborts the interrupt driven data sending. The user can get the remainBytes to find out |
| kadonotakashi | 0:8fdf9a60065b | 651 | * how many bytes are still not sent out. |
| kadonotakashi | 0:8fdf9a60065b | 652 | * |
| kadonotakashi | 0:8fdf9a60065b | 653 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 654 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 655 | */ |
| kadonotakashi | 0:8fdf9a60065b | 656 | void UART_TransferAbortSend(UART_Type *base, uart_handle_t *handle); |
| kadonotakashi | 0:8fdf9a60065b | 657 | |
| kadonotakashi | 0:8fdf9a60065b | 658 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 659 | * @brief Get the number of bytes that have been written to UART TX register. |
| kadonotakashi | 0:8fdf9a60065b | 660 | * |
| kadonotakashi | 0:8fdf9a60065b | 661 | * This function gets the number of bytes that have been written to UART TX |
| kadonotakashi | 0:8fdf9a60065b | 662 | * register by interrupt method. |
| kadonotakashi | 0:8fdf9a60065b | 663 | * |
| kadonotakashi | 0:8fdf9a60065b | 664 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 665 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 666 | * @param count Send bytes count. |
| kadonotakashi | 0:8fdf9a60065b | 667 | * @retval kStatus_NoTransferInProgress No send in progress. |
| kadonotakashi | 0:8fdf9a60065b | 668 | * @retval kStatus_InvalidArgument Parameter is invalid. |
| kadonotakashi | 0:8fdf9a60065b | 669 | * @retval kStatus_Success Get successfully through the parameter \p count; |
| kadonotakashi | 0:8fdf9a60065b | 670 | */ |
| kadonotakashi | 0:8fdf9a60065b | 671 | status_t UART_TransferGetSendCount(UART_Type *base, uart_handle_t *handle, uint32_t *count); |
| kadonotakashi | 0:8fdf9a60065b | 672 | |
| kadonotakashi | 0:8fdf9a60065b | 673 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 674 | * @brief Receives a buffer of data using an interrupt method. |
| kadonotakashi | 0:8fdf9a60065b | 675 | * |
| kadonotakashi | 0:8fdf9a60065b | 676 | * This function receives data using an interrupt method. This is a non-blocking function, which |
| kadonotakashi | 0:8fdf9a60065b | 677 | * returns without waiting for all data to be received. |
| kadonotakashi | 0:8fdf9a60065b | 678 | * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and |
| kadonotakashi | 0:8fdf9a60065b | 679 | * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer. |
| kadonotakashi | 0:8fdf9a60065b | 680 | * After copying, if the data in the ring buffer is not enough to read, the receive |
| kadonotakashi | 0:8fdf9a60065b | 681 | * request is saved by the UART driver. When the new data arrives, the receive request |
| kadonotakashi | 0:8fdf9a60065b | 682 | * is serviced first. When all data is received, the UART driver notifies the upper layer |
| kadonotakashi | 0:8fdf9a60065b | 683 | * through a callback function and passes the status parameter @ref kStatus_UART_RxIdle. |
| kadonotakashi | 0:8fdf9a60065b | 684 | * For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer. |
| kadonotakashi | 0:8fdf9a60065b | 685 | * The 5 bytes are copied to the xfer->data and this function returns with the |
| kadonotakashi | 0:8fdf9a60065b | 686 | * parameter @p receivedBytes set to 5. For the left 5 bytes, newly arrived data is |
| kadonotakashi | 0:8fdf9a60065b | 687 | * saved from the xfer->data[5]. When 5 bytes are received, the UART driver notifies the upper layer. |
| kadonotakashi | 0:8fdf9a60065b | 688 | * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt |
| kadonotakashi | 0:8fdf9a60065b | 689 | * to receive data to the xfer->data. When all data is received, the upper layer is notified. |
| kadonotakashi | 0:8fdf9a60065b | 690 | * |
| kadonotakashi | 0:8fdf9a60065b | 691 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 692 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 693 | * @param xfer UART transfer structure, refer to #uart_transfer_t. |
| kadonotakashi | 0:8fdf9a60065b | 694 | * @param receivedBytes Bytes received from the ring buffer directly. |
| kadonotakashi | 0:8fdf9a60065b | 695 | * @retval kStatus_Success Successfully queue the transfer into transmit queue. |
| kadonotakashi | 0:8fdf9a60065b | 696 | * @retval kStatus_UART_RxBusy Previous receive request is not finished. |
| kadonotakashi | 0:8fdf9a60065b | 697 | * @retval kStatus_InvalidArgument Invalid argument. |
| kadonotakashi | 0:8fdf9a60065b | 698 | */ |
| kadonotakashi | 0:8fdf9a60065b | 699 | status_t UART_TransferReceiveNonBlocking(UART_Type *base, |
| kadonotakashi | 0:8fdf9a60065b | 700 | uart_handle_t *handle, |
| kadonotakashi | 0:8fdf9a60065b | 701 | uart_transfer_t *xfer, |
| kadonotakashi | 0:8fdf9a60065b | 702 | size_t *receivedBytes); |
| kadonotakashi | 0:8fdf9a60065b | 703 | |
| kadonotakashi | 0:8fdf9a60065b | 704 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 705 | * @brief Aborts the interrupt-driven data receiving. |
| kadonotakashi | 0:8fdf9a60065b | 706 | * |
| kadonotakashi | 0:8fdf9a60065b | 707 | * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to know |
| kadonotakashi | 0:8fdf9a60065b | 708 | * how many bytes not received yet. |
| kadonotakashi | 0:8fdf9a60065b | 709 | * |
| kadonotakashi | 0:8fdf9a60065b | 710 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 711 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 712 | */ |
| kadonotakashi | 0:8fdf9a60065b | 713 | void UART_TransferAbortReceive(UART_Type *base, uart_handle_t *handle); |
| kadonotakashi | 0:8fdf9a60065b | 714 | |
| kadonotakashi | 0:8fdf9a60065b | 715 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 716 | * @brief Get the number of bytes that have been received. |
| kadonotakashi | 0:8fdf9a60065b | 717 | * |
| kadonotakashi | 0:8fdf9a60065b | 718 | * This function gets the number of bytes that have been received. |
| kadonotakashi | 0:8fdf9a60065b | 719 | * |
| kadonotakashi | 0:8fdf9a60065b | 720 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 721 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 722 | * @param count Receive bytes count. |
| kadonotakashi | 0:8fdf9a60065b | 723 | * @retval kStatus_NoTransferInProgress No receive in progress. |
| kadonotakashi | 0:8fdf9a60065b | 724 | * @retval kStatus_InvalidArgument Parameter is invalid. |
| kadonotakashi | 0:8fdf9a60065b | 725 | * @retval kStatus_Success Get successfully through the parameter \p count; |
| kadonotakashi | 0:8fdf9a60065b | 726 | */ |
| kadonotakashi | 0:8fdf9a60065b | 727 | status_t UART_TransferGetReceiveCount(UART_Type *base, uart_handle_t *handle, uint32_t *count); |
| kadonotakashi | 0:8fdf9a60065b | 728 | |
| kadonotakashi | 0:8fdf9a60065b | 729 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 730 | * @brief UART IRQ handle function. |
| kadonotakashi | 0:8fdf9a60065b | 731 | * |
| kadonotakashi | 0:8fdf9a60065b | 732 | * This function handles the UART transmit and receive IRQ request. |
| kadonotakashi | 0:8fdf9a60065b | 733 | * |
| kadonotakashi | 0:8fdf9a60065b | 734 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 735 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 736 | */ |
| kadonotakashi | 0:8fdf9a60065b | 737 | void UART_TransferHandleIRQ(UART_Type *base, uart_handle_t *handle); |
| kadonotakashi | 0:8fdf9a60065b | 738 | |
| kadonotakashi | 0:8fdf9a60065b | 739 | /*! |
| kadonotakashi | 0:8fdf9a60065b | 740 | * @brief UART Error IRQ handle function. |
| kadonotakashi | 0:8fdf9a60065b | 741 | * |
| kadonotakashi | 0:8fdf9a60065b | 742 | * This function handle the UART error IRQ request. |
| kadonotakashi | 0:8fdf9a60065b | 743 | * |
| kadonotakashi | 0:8fdf9a60065b | 744 | * @param base UART peripheral base address. |
| kadonotakashi | 0:8fdf9a60065b | 745 | * @param handle UART handle pointer. |
| kadonotakashi | 0:8fdf9a60065b | 746 | */ |
| kadonotakashi | 0:8fdf9a60065b | 747 | void UART_TransferHandleErrorIRQ(UART_Type *base, uart_handle_t *handle); |
| kadonotakashi | 0:8fdf9a60065b | 748 | |
| kadonotakashi | 0:8fdf9a60065b | 749 | /* @} */ |
| kadonotakashi | 0:8fdf9a60065b | 750 | |
| kadonotakashi | 0:8fdf9a60065b | 751 | #if defined(__cplusplus) |
| kadonotakashi | 0:8fdf9a60065b | 752 | } |
| kadonotakashi | 0:8fdf9a60065b | 753 | #endif |
| kadonotakashi | 0:8fdf9a60065b | 754 | |
| kadonotakashi | 0:8fdf9a60065b | 755 | /*! @}*/ |
| kadonotakashi | 0:8fdf9a60065b | 756 | |
| kadonotakashi | 0:8fdf9a60065b | 757 | #endif /* _FSL_UART_H_ */ |