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Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466
mbed-os/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_adc16.h@3:f3764f852aa8, 2018-10-11 (annotated)
- Committer:
- kadonotakashi
- Date:
- Thu Oct 11 02:27:46 2018 +0000
- Revision:
- 3:f3764f852aa8
- Parent:
- 0:8fdf9a60065b
Nucreo 446 + SSD1331 test version;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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kadonotakashi | 0:8fdf9a60065b | 1 | /* |
kadonotakashi | 0:8fdf9a60065b | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
kadonotakashi | 0:8fdf9a60065b | 3 | * All rights reserved. |
kadonotakashi | 0:8fdf9a60065b | 4 | * |
kadonotakashi | 0:8fdf9a60065b | 5 | * Redistribution and use in source and binary forms, with or without modification, |
kadonotakashi | 0:8fdf9a60065b | 6 | * are permitted provided that the following conditions are met: |
kadonotakashi | 0:8fdf9a60065b | 7 | * |
kadonotakashi | 0:8fdf9a60065b | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
kadonotakashi | 0:8fdf9a60065b | 9 | * of conditions and the following disclaimer. |
kadonotakashi | 0:8fdf9a60065b | 10 | * |
kadonotakashi | 0:8fdf9a60065b | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
kadonotakashi | 0:8fdf9a60065b | 12 | * list of conditions and the following disclaimer in the documentation and/or |
kadonotakashi | 0:8fdf9a60065b | 13 | * other materials provided with the distribution. |
kadonotakashi | 0:8fdf9a60065b | 14 | * |
kadonotakashi | 0:8fdf9a60065b | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
kadonotakashi | 0:8fdf9a60065b | 16 | * contributors may be used to endorse or promote products derived from this |
kadonotakashi | 0:8fdf9a60065b | 17 | * software without specific prior written permission. |
kadonotakashi | 0:8fdf9a60065b | 18 | * |
kadonotakashi | 0:8fdf9a60065b | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
kadonotakashi | 0:8fdf9a60065b | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
kadonotakashi | 0:8fdf9a60065b | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
kadonotakashi | 0:8fdf9a60065b | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
kadonotakashi | 0:8fdf9a60065b | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
kadonotakashi | 0:8fdf9a60065b | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
kadonotakashi | 0:8fdf9a60065b | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
kadonotakashi | 0:8fdf9a60065b | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
kadonotakashi | 0:8fdf9a60065b | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
kadonotakashi | 0:8fdf9a60065b | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
kadonotakashi | 0:8fdf9a60065b | 29 | */ |
kadonotakashi | 0:8fdf9a60065b | 30 | |
kadonotakashi | 0:8fdf9a60065b | 31 | #ifndef _FSL_ADC16_H_ |
kadonotakashi | 0:8fdf9a60065b | 32 | #define _FSL_ADC16_H_ |
kadonotakashi | 0:8fdf9a60065b | 33 | |
kadonotakashi | 0:8fdf9a60065b | 34 | #include "fsl_common.h" |
kadonotakashi | 0:8fdf9a60065b | 35 | |
kadonotakashi | 0:8fdf9a60065b | 36 | /*! |
kadonotakashi | 0:8fdf9a60065b | 37 | * @addtogroup adc16 |
kadonotakashi | 0:8fdf9a60065b | 38 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 39 | */ |
kadonotakashi | 0:8fdf9a60065b | 40 | |
kadonotakashi | 0:8fdf9a60065b | 41 | |
kadonotakashi | 0:8fdf9a60065b | 42 | /******************************************************************************* |
kadonotakashi | 0:8fdf9a60065b | 43 | * Definitions |
kadonotakashi | 0:8fdf9a60065b | 44 | ******************************************************************************/ |
kadonotakashi | 0:8fdf9a60065b | 45 | |
kadonotakashi | 0:8fdf9a60065b | 46 | /*! @name Driver version */ |
kadonotakashi | 0:8fdf9a60065b | 47 | /*@{*/ |
kadonotakashi | 0:8fdf9a60065b | 48 | /*! @brief ADC16 driver version 2.0.0. */ |
kadonotakashi | 0:8fdf9a60065b | 49 | #define FSL_ADC16_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) |
kadonotakashi | 0:8fdf9a60065b | 50 | /*@}*/ |
kadonotakashi | 0:8fdf9a60065b | 51 | |
kadonotakashi | 0:8fdf9a60065b | 52 | /*! |
kadonotakashi | 0:8fdf9a60065b | 53 | * @brief Channel status flags. |
kadonotakashi | 0:8fdf9a60065b | 54 | */ |
kadonotakashi | 0:8fdf9a60065b | 55 | enum _adc16_channel_status_flags |
kadonotakashi | 0:8fdf9a60065b | 56 | { |
kadonotakashi | 0:8fdf9a60065b | 57 | kADC16_ChannelConversionDoneFlag = ADC_SC1_COCO_MASK, /*!< Conversion done. */ |
kadonotakashi | 0:8fdf9a60065b | 58 | }; |
kadonotakashi | 0:8fdf9a60065b | 59 | |
kadonotakashi | 0:8fdf9a60065b | 60 | /*! |
kadonotakashi | 0:8fdf9a60065b | 61 | * @brief Converter status flags. |
kadonotakashi | 0:8fdf9a60065b | 62 | */ |
kadonotakashi | 0:8fdf9a60065b | 63 | enum _adc16_status_flags |
kadonotakashi | 0:8fdf9a60065b | 64 | { |
kadonotakashi | 0:8fdf9a60065b | 65 | kADC16_ActiveFlag = ADC_SC2_ADACT_MASK, /*!< Converter is active. */ |
kadonotakashi | 0:8fdf9a60065b | 66 | #if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION |
kadonotakashi | 0:8fdf9a60065b | 67 | kADC16_CalibrationFailedFlag = ADC_SC3_CALF_MASK, /*!< Calibration is failed. */ |
kadonotakashi | 0:8fdf9a60065b | 68 | #endif /* FSL_FEATURE_ADC16_HAS_CALIBRATION */ |
kadonotakashi | 0:8fdf9a60065b | 69 | }; |
kadonotakashi | 0:8fdf9a60065b | 70 | |
kadonotakashi | 0:8fdf9a60065b | 71 | #if defined(FSL_FEATURE_ADC16_HAS_MUX_SELECT) && FSL_FEATURE_ADC16_HAS_MUX_SELECT |
kadonotakashi | 0:8fdf9a60065b | 72 | /*! |
kadonotakashi | 0:8fdf9a60065b | 73 | * @brief Channel multiplexer mode for each channel. |
kadonotakashi | 0:8fdf9a60065b | 74 | * |
kadonotakashi | 0:8fdf9a60065b | 75 | * For some ADC16 channels, there are two pin selections in channel multiplexer. For example, ADC0_SE4a and ADC0_SE4b |
kadonotakashi | 0:8fdf9a60065b | 76 | * are the different channels that share the same channel number. |
kadonotakashi | 0:8fdf9a60065b | 77 | */ |
kadonotakashi | 0:8fdf9a60065b | 78 | typedef enum _adc_channel_mux_mode |
kadonotakashi | 0:8fdf9a60065b | 79 | { |
kadonotakashi | 0:8fdf9a60065b | 80 | kADC16_ChannelMuxA = 0U, /*!< For channel with channel mux a. */ |
kadonotakashi | 0:8fdf9a60065b | 81 | kADC16_ChannelMuxB = 1U, /*!< For channel with channel mux b. */ |
kadonotakashi | 0:8fdf9a60065b | 82 | } adc16_channel_mux_mode_t; |
kadonotakashi | 0:8fdf9a60065b | 83 | #endif /* FSL_FEATURE_ADC16_HAS_MUX_SELECT */ |
kadonotakashi | 0:8fdf9a60065b | 84 | |
kadonotakashi | 0:8fdf9a60065b | 85 | /*! |
kadonotakashi | 0:8fdf9a60065b | 86 | * @brief Clock divider for the converter. |
kadonotakashi | 0:8fdf9a60065b | 87 | */ |
kadonotakashi | 0:8fdf9a60065b | 88 | typedef enum _adc16_clock_divider |
kadonotakashi | 0:8fdf9a60065b | 89 | { |
kadonotakashi | 0:8fdf9a60065b | 90 | kADC16_ClockDivider1 = 0U, /*!< For divider 1 from the input clock to the module. */ |
kadonotakashi | 0:8fdf9a60065b | 91 | kADC16_ClockDivider2 = 1U, /*!< For divider 2 from the input clock to the module. */ |
kadonotakashi | 0:8fdf9a60065b | 92 | kADC16_ClockDivider4 = 2U, /*!< For divider 4 from the input clock to the module. */ |
kadonotakashi | 0:8fdf9a60065b | 93 | kADC16_ClockDivider8 = 3U, /*!< For divider 8 from the input clock to the module. */ |
kadonotakashi | 0:8fdf9a60065b | 94 | } adc16_clock_divider_t; |
kadonotakashi | 0:8fdf9a60065b | 95 | |
kadonotakashi | 0:8fdf9a60065b | 96 | /*! |
kadonotakashi | 0:8fdf9a60065b | 97 | *@brief Converter's resolution. |
kadonotakashi | 0:8fdf9a60065b | 98 | */ |
kadonotakashi | 0:8fdf9a60065b | 99 | typedef enum _adc16_resolution |
kadonotakashi | 0:8fdf9a60065b | 100 | { |
kadonotakashi | 0:8fdf9a60065b | 101 | /* This group of enumeration is for internal use which is related to register setting. */ |
kadonotakashi | 0:8fdf9a60065b | 102 | kADC16_Resolution8or9Bit = 0U, /*!< Single End 8-bit or Differential Sample 9-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 103 | kADC16_Resolution12or13Bit = 1U, /*!< Single End 12-bit or Differential Sample 13-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 104 | kADC16_Resolution10or11Bit = 2U, /*!< Single End 10-bit or Differential Sample 11-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 105 | |
kadonotakashi | 0:8fdf9a60065b | 106 | /* This group of enumeration is for a public user. */ |
kadonotakashi | 0:8fdf9a60065b | 107 | kADC16_ResolutionSE8Bit = kADC16_Resolution8or9Bit, /*!< Single End 8-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 108 | kADC16_ResolutionSE12Bit = kADC16_Resolution12or13Bit, /*!< Single End 12-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 109 | kADC16_ResolutionSE10Bit = kADC16_Resolution10or11Bit, /*!< Single End 10-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 110 | #if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE |
kadonotakashi | 0:8fdf9a60065b | 111 | kADC16_ResolutionDF9Bit = kADC16_Resolution8or9Bit, /*!< Differential Sample 9-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 112 | kADC16_ResolutionDF13Bit = kADC16_Resolution12or13Bit, /*!< Differential Sample 13-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 113 | kADC16_ResolutionDF11Bit = kADC16_Resolution10or11Bit, /*!< Differential Sample 11-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 114 | #endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */ |
kadonotakashi | 0:8fdf9a60065b | 115 | |
kadonotakashi | 0:8fdf9a60065b | 116 | #if defined(FSL_FEATURE_ADC16_MAX_RESOLUTION) && (FSL_FEATURE_ADC16_MAX_RESOLUTION >= 16U) |
kadonotakashi | 0:8fdf9a60065b | 117 | /* 16-bit is supported by default. */ |
kadonotakashi | 0:8fdf9a60065b | 118 | kADC16_Resolution16Bit = 3U, /*!< Single End 16-bit or Differential Sample 16-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 119 | kADC16_ResolutionSE16Bit = kADC16_Resolution16Bit, /*!< Single End 16-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 120 | #if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE |
kadonotakashi | 0:8fdf9a60065b | 121 | kADC16_ResolutionDF16Bit = kADC16_Resolution16Bit, /*!< Differential Sample 16-bit. */ |
kadonotakashi | 0:8fdf9a60065b | 122 | #endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */ |
kadonotakashi | 0:8fdf9a60065b | 123 | #endif /* FSL_FEATURE_ADC16_MAX_RESOLUTION >= 16U */ |
kadonotakashi | 0:8fdf9a60065b | 124 | } adc16_resolution_t; |
kadonotakashi | 0:8fdf9a60065b | 125 | |
kadonotakashi | 0:8fdf9a60065b | 126 | /*! |
kadonotakashi | 0:8fdf9a60065b | 127 | * @brief Clock source. |
kadonotakashi | 0:8fdf9a60065b | 128 | */ |
kadonotakashi | 0:8fdf9a60065b | 129 | typedef enum _adc16_clock_source |
kadonotakashi | 0:8fdf9a60065b | 130 | { |
kadonotakashi | 0:8fdf9a60065b | 131 | kADC16_ClockSourceAlt0 = 0U, /*!< Selection 0 of the clock source. */ |
kadonotakashi | 0:8fdf9a60065b | 132 | kADC16_ClockSourceAlt1 = 1U, /*!< Selection 1 of the clock source. */ |
kadonotakashi | 0:8fdf9a60065b | 133 | kADC16_ClockSourceAlt2 = 2U, /*!< Selection 2 of the clock source. */ |
kadonotakashi | 0:8fdf9a60065b | 134 | kADC16_ClockSourceAlt3 = 3U, /*!< Selection 3 of the clock source. */ |
kadonotakashi | 0:8fdf9a60065b | 135 | |
kadonotakashi | 0:8fdf9a60065b | 136 | /* Chip defined clock source */ |
kadonotakashi | 0:8fdf9a60065b | 137 | kADC16_ClockSourceAsynchronousClock = kADC16_ClockSourceAlt3, /*!< Using internal asynchronous clock. */ |
kadonotakashi | 0:8fdf9a60065b | 138 | } adc16_clock_source_t; |
kadonotakashi | 0:8fdf9a60065b | 139 | |
kadonotakashi | 0:8fdf9a60065b | 140 | /*! |
kadonotakashi | 0:8fdf9a60065b | 141 | * @brief Long sample mode. |
kadonotakashi | 0:8fdf9a60065b | 142 | */ |
kadonotakashi | 0:8fdf9a60065b | 143 | typedef enum _adc16_long_sample_mode |
kadonotakashi | 0:8fdf9a60065b | 144 | { |
kadonotakashi | 0:8fdf9a60065b | 145 | kADC16_LongSampleCycle24 = 0U, /*!< 20 extra ADCK cycles, 24 ADCK cycles total. */ |
kadonotakashi | 0:8fdf9a60065b | 146 | kADC16_LongSampleCycle16 = 1U, /*!< 12 extra ADCK cycles, 16 ADCK cycles total. */ |
kadonotakashi | 0:8fdf9a60065b | 147 | kADC16_LongSampleCycle10 = 2U, /*!< 6 extra ADCK cycles, 10 ADCK cycles total. */ |
kadonotakashi | 0:8fdf9a60065b | 148 | kADC16_LongSampleCycle6 = 3U, /*!< 2 extra ADCK cycles, 6 ADCK cycles total. */ |
kadonotakashi | 0:8fdf9a60065b | 149 | kADC16_LongSampleDisabled = 4U, /*!< Disable the long sample feature. */ |
kadonotakashi | 0:8fdf9a60065b | 150 | } adc16_long_sample_mode_t; |
kadonotakashi | 0:8fdf9a60065b | 151 | |
kadonotakashi | 0:8fdf9a60065b | 152 | /*! |
kadonotakashi | 0:8fdf9a60065b | 153 | * @brief Reference voltage source. |
kadonotakashi | 0:8fdf9a60065b | 154 | */ |
kadonotakashi | 0:8fdf9a60065b | 155 | typedef enum _adc16_reference_voltage_source |
kadonotakashi | 0:8fdf9a60065b | 156 | { |
kadonotakashi | 0:8fdf9a60065b | 157 | kADC16_ReferenceVoltageSourceVref = 0U, /*!< For external pins pair of VrefH and VrefL. */ |
kadonotakashi | 0:8fdf9a60065b | 158 | kADC16_ReferenceVoltageSourceValt = 1U, /*!< For alternate reference pair of ValtH and ValtL. */ |
kadonotakashi | 0:8fdf9a60065b | 159 | } adc16_reference_voltage_source_t; |
kadonotakashi | 0:8fdf9a60065b | 160 | |
kadonotakashi | 0:8fdf9a60065b | 161 | #if defined(FSL_FEATURE_ADC16_HAS_HW_AVERAGE) && FSL_FEATURE_ADC16_HAS_HW_AVERAGE |
kadonotakashi | 0:8fdf9a60065b | 162 | /*! |
kadonotakashi | 0:8fdf9a60065b | 163 | * @brief Hardware average mode. |
kadonotakashi | 0:8fdf9a60065b | 164 | */ |
kadonotakashi | 0:8fdf9a60065b | 165 | typedef enum _adc16_hardware_average_mode |
kadonotakashi | 0:8fdf9a60065b | 166 | { |
kadonotakashi | 0:8fdf9a60065b | 167 | kADC16_HardwareAverageCount4 = 0U, /*!< For hardware average with 4 samples. */ |
kadonotakashi | 0:8fdf9a60065b | 168 | kADC16_HardwareAverageCount8 = 1U, /*!< For hardware average with 8 samples. */ |
kadonotakashi | 0:8fdf9a60065b | 169 | kADC16_HardwareAverageCount16 = 2U, /*!< For hardware average with 16 samples. */ |
kadonotakashi | 0:8fdf9a60065b | 170 | kADC16_HardwareAverageCount32 = 3U, /*!< For hardware average with 32 samples. */ |
kadonotakashi | 0:8fdf9a60065b | 171 | kADC16_HardwareAverageDisabled = 4U, /*!< Disable the hardware average feature.*/ |
kadonotakashi | 0:8fdf9a60065b | 172 | } adc16_hardware_average_mode_t; |
kadonotakashi | 0:8fdf9a60065b | 173 | #endif /* FSL_FEATURE_ADC16_HAS_HW_AVERAGE */ |
kadonotakashi | 0:8fdf9a60065b | 174 | |
kadonotakashi | 0:8fdf9a60065b | 175 | /*! |
kadonotakashi | 0:8fdf9a60065b | 176 | * @brief Hardware compare mode. |
kadonotakashi | 0:8fdf9a60065b | 177 | */ |
kadonotakashi | 0:8fdf9a60065b | 178 | typedef enum _adc16_hardware_compare_mode |
kadonotakashi | 0:8fdf9a60065b | 179 | { |
kadonotakashi | 0:8fdf9a60065b | 180 | kADC16_HardwareCompareMode0 = 0U, /*!< x < value1. */ |
kadonotakashi | 0:8fdf9a60065b | 181 | kADC16_HardwareCompareMode1 = 1U, /*!< x > value1. */ |
kadonotakashi | 0:8fdf9a60065b | 182 | kADC16_HardwareCompareMode2 = 2U, /*!< if value1 <= value2, then x < value1 || x > value2; |
kadonotakashi | 0:8fdf9a60065b | 183 | else, value1 > x > value2. */ |
kadonotakashi | 0:8fdf9a60065b | 184 | kADC16_HardwareCompareMode3 = 3U, /*!< if value1 <= value2, then value1 <= x <= value2; |
kadonotakashi | 0:8fdf9a60065b | 185 | else x >= value1 || x <= value2. */ |
kadonotakashi | 0:8fdf9a60065b | 186 | } adc16_hardware_compare_mode_t; |
kadonotakashi | 0:8fdf9a60065b | 187 | |
kadonotakashi | 0:8fdf9a60065b | 188 | #if defined(FSL_FEATURE_ADC16_HAS_PGA) && FSL_FEATURE_ADC16_HAS_PGA |
kadonotakashi | 0:8fdf9a60065b | 189 | /*! |
kadonotakashi | 0:8fdf9a60065b | 190 | * @brief PGA's Gain mode. |
kadonotakashi | 0:8fdf9a60065b | 191 | */ |
kadonotakashi | 0:8fdf9a60065b | 192 | typedef enum _adc16_pga_gain |
kadonotakashi | 0:8fdf9a60065b | 193 | { |
kadonotakashi | 0:8fdf9a60065b | 194 | kADC16_PGAGainValueOf1 = 0U, /*!< For amplifier gain of 1. */ |
kadonotakashi | 0:8fdf9a60065b | 195 | kADC16_PGAGainValueOf2 = 1U, /*!< For amplifier gain of 2. */ |
kadonotakashi | 0:8fdf9a60065b | 196 | kADC16_PGAGainValueOf4 = 2U, /*!< For amplifier gain of 4. */ |
kadonotakashi | 0:8fdf9a60065b | 197 | kADC16_PGAGainValueOf8 = 3U, /*!< For amplifier gain of 8. */ |
kadonotakashi | 0:8fdf9a60065b | 198 | kADC16_PGAGainValueOf16 = 4U, /*!< For amplifier gain of 16. */ |
kadonotakashi | 0:8fdf9a60065b | 199 | kADC16_PGAGainValueOf32 = 5U, /*!< For amplifier gain of 32. */ |
kadonotakashi | 0:8fdf9a60065b | 200 | kADC16_PGAGainValueOf64 = 6U, /*!< For amplifier gain of 64. */ |
kadonotakashi | 0:8fdf9a60065b | 201 | } adc16_pga_gain_t; |
kadonotakashi | 0:8fdf9a60065b | 202 | #endif /* FSL_FEATURE_ADC16_HAS_PGA */ |
kadonotakashi | 0:8fdf9a60065b | 203 | |
kadonotakashi | 0:8fdf9a60065b | 204 | /*! |
kadonotakashi | 0:8fdf9a60065b | 205 | * @brief ADC16 converter configuration. |
kadonotakashi | 0:8fdf9a60065b | 206 | */ |
kadonotakashi | 0:8fdf9a60065b | 207 | typedef struct _adc16_config |
kadonotakashi | 0:8fdf9a60065b | 208 | { |
kadonotakashi | 0:8fdf9a60065b | 209 | adc16_reference_voltage_source_t referenceVoltageSource; /*!< Select the reference voltage source. */ |
kadonotakashi | 0:8fdf9a60065b | 210 | adc16_clock_source_t clockSource; /*!< Select the input clock source to converter. */ |
kadonotakashi | 0:8fdf9a60065b | 211 | bool enableAsynchronousClock; /*!< Enable the asynchronous clock output. */ |
kadonotakashi | 0:8fdf9a60065b | 212 | adc16_clock_divider_t clockDivider; /*!< Select the divider of input clock source. */ |
kadonotakashi | 0:8fdf9a60065b | 213 | adc16_resolution_t resolution; /*!< Select the sample resolution mode. */ |
kadonotakashi | 0:8fdf9a60065b | 214 | adc16_long_sample_mode_t longSampleMode; /*!< Select the long sample mode. */ |
kadonotakashi | 0:8fdf9a60065b | 215 | bool enableHighSpeed; /*!< Enable the high-speed mode. */ |
kadonotakashi | 0:8fdf9a60065b | 216 | bool enableLowPower; /*!< Enable low power. */ |
kadonotakashi | 0:8fdf9a60065b | 217 | bool enableContinuousConversion; /*!< Enable continuous conversion mode. */ |
kadonotakashi | 0:8fdf9a60065b | 218 | } adc16_config_t; |
kadonotakashi | 0:8fdf9a60065b | 219 | |
kadonotakashi | 0:8fdf9a60065b | 220 | /*! |
kadonotakashi | 0:8fdf9a60065b | 221 | * @brief ADC16 Hardware comparison configuration. |
kadonotakashi | 0:8fdf9a60065b | 222 | */ |
kadonotakashi | 0:8fdf9a60065b | 223 | typedef struct _adc16_hardware_compare_config |
kadonotakashi | 0:8fdf9a60065b | 224 | { |
kadonotakashi | 0:8fdf9a60065b | 225 | adc16_hardware_compare_mode_t hardwareCompareMode; /*!< Select the hardware compare mode. |
kadonotakashi | 0:8fdf9a60065b | 226 | See "adc16_hardware_compare_mode_t". */ |
kadonotakashi | 0:8fdf9a60065b | 227 | int16_t value1; /*!< Setting value1 for hardware compare mode. */ |
kadonotakashi | 0:8fdf9a60065b | 228 | int16_t value2; /*!< Setting value2 for hardware compare mode. */ |
kadonotakashi | 0:8fdf9a60065b | 229 | } adc16_hardware_compare_config_t; |
kadonotakashi | 0:8fdf9a60065b | 230 | |
kadonotakashi | 0:8fdf9a60065b | 231 | /*! |
kadonotakashi | 0:8fdf9a60065b | 232 | * @brief ADC16 channel conversion configuration. |
kadonotakashi | 0:8fdf9a60065b | 233 | */ |
kadonotakashi | 0:8fdf9a60065b | 234 | typedef struct _adc16_channel_config |
kadonotakashi | 0:8fdf9a60065b | 235 | { |
kadonotakashi | 0:8fdf9a60065b | 236 | uint32_t channelNumber; /*!< Setting the conversion channel number. The available range is 0-31. |
kadonotakashi | 0:8fdf9a60065b | 237 | See channel connection information for each chip in Reference |
kadonotakashi | 0:8fdf9a60065b | 238 | Manual document. */ |
kadonotakashi | 0:8fdf9a60065b | 239 | bool enableInterruptOnConversionCompleted; /*!< Generate an interrupt request once the conversion is completed. */ |
kadonotakashi | 0:8fdf9a60065b | 240 | #if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE |
kadonotakashi | 0:8fdf9a60065b | 241 | bool enableDifferentialConversion; /*!< Using Differential sample mode. */ |
kadonotakashi | 0:8fdf9a60065b | 242 | #endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */ |
kadonotakashi | 0:8fdf9a60065b | 243 | } adc16_channel_config_t; |
kadonotakashi | 0:8fdf9a60065b | 244 | |
kadonotakashi | 0:8fdf9a60065b | 245 | #if defined(FSL_FEATURE_ADC16_HAS_PGA) && FSL_FEATURE_ADC16_HAS_PGA |
kadonotakashi | 0:8fdf9a60065b | 246 | /*! |
kadonotakashi | 0:8fdf9a60065b | 247 | * @brief ADC16 programmable gain amplifier configuration. |
kadonotakashi | 0:8fdf9a60065b | 248 | */ |
kadonotakashi | 0:8fdf9a60065b | 249 | typedef struct _adc16_pga_config |
kadonotakashi | 0:8fdf9a60065b | 250 | { |
kadonotakashi | 0:8fdf9a60065b | 251 | adc16_pga_gain_t pgaGain; /*!< Setting PGA gain. */ |
kadonotakashi | 0:8fdf9a60065b | 252 | bool enableRunInNormalMode; /*!< Enable PGA working in normal mode, or low power mode by default. */ |
kadonotakashi | 0:8fdf9a60065b | 253 | #if defined(FSL_FEATURE_ADC16_HAS_PGA_CHOPPING) && FSL_FEATURE_ADC16_HAS_PGA_CHOPPING |
kadonotakashi | 0:8fdf9a60065b | 254 | bool disablePgaChopping; /*!< Disable the PGA chopping function. |
kadonotakashi | 0:8fdf9a60065b | 255 | The PGA employs chopping to remove/reduce offset and 1/f noise and offers |
kadonotakashi | 0:8fdf9a60065b | 256 | an offset measurement configuration that aids the offset calibration. */ |
kadonotakashi | 0:8fdf9a60065b | 257 | #endif /* FSL_FEATURE_ADC16_HAS_PGA_CHOPPING */ |
kadonotakashi | 0:8fdf9a60065b | 258 | #if defined(FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT) && FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT |
kadonotakashi | 0:8fdf9a60065b | 259 | bool enableRunInOffsetMeasurement; /*!< Enable the PGA working in offset measurement mode. |
kadonotakashi | 0:8fdf9a60065b | 260 | When this feature is enabled, the PGA disconnects itself from the external |
kadonotakashi | 0:8fdf9a60065b | 261 | inputs and auto-configures into offset measurement mode. With this field |
kadonotakashi | 0:8fdf9a60065b | 262 | set, run the ADC in the recommended settings and enable the maximum hardware |
kadonotakashi | 0:8fdf9a60065b | 263 | averaging to get the PGA offset number. The output is the |
kadonotakashi | 0:8fdf9a60065b | 264 | (PGA offset * (64+1)) for the given PGA setting. */ |
kadonotakashi | 0:8fdf9a60065b | 265 | #endif /* FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT */ |
kadonotakashi | 0:8fdf9a60065b | 266 | } adc16_pga_config_t; |
kadonotakashi | 0:8fdf9a60065b | 267 | #endif /* FSL_FEATURE_ADC16_HAS_PGA */ |
kadonotakashi | 0:8fdf9a60065b | 268 | |
kadonotakashi | 0:8fdf9a60065b | 269 | #if defined(__cplusplus) |
kadonotakashi | 0:8fdf9a60065b | 270 | extern "C" { |
kadonotakashi | 0:8fdf9a60065b | 271 | #endif |
kadonotakashi | 0:8fdf9a60065b | 272 | |
kadonotakashi | 0:8fdf9a60065b | 273 | /******************************************************************************* |
kadonotakashi | 0:8fdf9a60065b | 274 | * API |
kadonotakashi | 0:8fdf9a60065b | 275 | ******************************************************************************/ |
kadonotakashi | 0:8fdf9a60065b | 276 | |
kadonotakashi | 0:8fdf9a60065b | 277 | /*! |
kadonotakashi | 0:8fdf9a60065b | 278 | * @name Initialization |
kadonotakashi | 0:8fdf9a60065b | 279 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 280 | */ |
kadonotakashi | 0:8fdf9a60065b | 281 | |
kadonotakashi | 0:8fdf9a60065b | 282 | /*! |
kadonotakashi | 0:8fdf9a60065b | 283 | * @brief Initializes the ADC16 module. |
kadonotakashi | 0:8fdf9a60065b | 284 | * |
kadonotakashi | 0:8fdf9a60065b | 285 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 286 | * @param config Pointer to configuration structure. See "adc16_config_t". |
kadonotakashi | 0:8fdf9a60065b | 287 | */ |
kadonotakashi | 0:8fdf9a60065b | 288 | void ADC16_Init(ADC_Type *base, const adc16_config_t *config); |
kadonotakashi | 0:8fdf9a60065b | 289 | |
kadonotakashi | 0:8fdf9a60065b | 290 | /*! |
kadonotakashi | 0:8fdf9a60065b | 291 | * @brief De-initializes the ADC16 module. |
kadonotakashi | 0:8fdf9a60065b | 292 | * |
kadonotakashi | 0:8fdf9a60065b | 293 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 294 | */ |
kadonotakashi | 0:8fdf9a60065b | 295 | void ADC16_Deinit(ADC_Type *base); |
kadonotakashi | 0:8fdf9a60065b | 296 | |
kadonotakashi | 0:8fdf9a60065b | 297 | /*! |
kadonotakashi | 0:8fdf9a60065b | 298 | * @brief Gets an available pre-defined settings for the converter's configuration. |
kadonotakashi | 0:8fdf9a60065b | 299 | * |
kadonotakashi | 0:8fdf9a60065b | 300 | * This function initializes the converter configuration structure with available settings. The default values are as follows. |
kadonotakashi | 0:8fdf9a60065b | 301 | * @code |
kadonotakashi | 0:8fdf9a60065b | 302 | * config->referenceVoltageSource = kADC16_ReferenceVoltageSourceVref; |
kadonotakashi | 0:8fdf9a60065b | 303 | * config->clockSource = kADC16_ClockSourceAsynchronousClock; |
kadonotakashi | 0:8fdf9a60065b | 304 | * config->enableAsynchronousClock = true; |
kadonotakashi | 0:8fdf9a60065b | 305 | * config->clockDivider = kADC16_ClockDivider8; |
kadonotakashi | 0:8fdf9a60065b | 306 | * config->resolution = kADC16_ResolutionSE12Bit; |
kadonotakashi | 0:8fdf9a60065b | 307 | * config->longSampleMode = kADC16_LongSampleDisabled; |
kadonotakashi | 0:8fdf9a60065b | 308 | * config->enableHighSpeed = false; |
kadonotakashi | 0:8fdf9a60065b | 309 | * config->enableLowPower = false; |
kadonotakashi | 0:8fdf9a60065b | 310 | * config->enableContinuousConversion = false; |
kadonotakashi | 0:8fdf9a60065b | 311 | * @endcode |
kadonotakashi | 0:8fdf9a60065b | 312 | * @param config Pointer to the configuration structure. |
kadonotakashi | 0:8fdf9a60065b | 313 | */ |
kadonotakashi | 0:8fdf9a60065b | 314 | void ADC16_GetDefaultConfig(adc16_config_t *config); |
kadonotakashi | 0:8fdf9a60065b | 315 | |
kadonotakashi | 0:8fdf9a60065b | 316 | #if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION |
kadonotakashi | 0:8fdf9a60065b | 317 | /*! |
kadonotakashi | 0:8fdf9a60065b | 318 | * @brief Automates the hardware calibration. |
kadonotakashi | 0:8fdf9a60065b | 319 | * |
kadonotakashi | 0:8fdf9a60065b | 320 | * This auto calibration helps to adjust the plus/minus side gain automatically. |
kadonotakashi | 0:8fdf9a60065b | 321 | * Execute the calibration before using the converter. Note that the hardware trigger should be used |
kadonotakashi | 0:8fdf9a60065b | 322 | * during the calibration. |
kadonotakashi | 0:8fdf9a60065b | 323 | * |
kadonotakashi | 0:8fdf9a60065b | 324 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 325 | * |
kadonotakashi | 0:8fdf9a60065b | 326 | * @return Execution status. |
kadonotakashi | 0:8fdf9a60065b | 327 | * @retval kStatus_Success Calibration is done successfully. |
kadonotakashi | 0:8fdf9a60065b | 328 | * @retval kStatus_Fail Calibration has failed. |
kadonotakashi | 0:8fdf9a60065b | 329 | */ |
kadonotakashi | 0:8fdf9a60065b | 330 | status_t ADC16_DoAutoCalibration(ADC_Type *base); |
kadonotakashi | 0:8fdf9a60065b | 331 | #endif /* FSL_FEATURE_ADC16_HAS_CALIBRATION */ |
kadonotakashi | 0:8fdf9a60065b | 332 | |
kadonotakashi | 0:8fdf9a60065b | 333 | #if defined(FSL_FEATURE_ADC16_HAS_OFFSET_CORRECTION) && FSL_FEATURE_ADC16_HAS_OFFSET_CORRECTION |
kadonotakashi | 0:8fdf9a60065b | 334 | /*! |
kadonotakashi | 0:8fdf9a60065b | 335 | * @brief Sets the offset value for the conversion result. |
kadonotakashi | 0:8fdf9a60065b | 336 | * |
kadonotakashi | 0:8fdf9a60065b | 337 | * This offset value takes effect on the conversion result. If the offset value is not zero, the reading result |
kadonotakashi | 0:8fdf9a60065b | 338 | * is subtracted by it. Note, the hardware calibration fills the offset value automatically. |
kadonotakashi | 0:8fdf9a60065b | 339 | * |
kadonotakashi | 0:8fdf9a60065b | 340 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 341 | * @param value Setting offset value. |
kadonotakashi | 0:8fdf9a60065b | 342 | */ |
kadonotakashi | 0:8fdf9a60065b | 343 | static inline void ADC16_SetOffsetValue(ADC_Type *base, int16_t value) |
kadonotakashi | 0:8fdf9a60065b | 344 | { |
kadonotakashi | 0:8fdf9a60065b | 345 | base->OFS = (uint32_t)(value); |
kadonotakashi | 0:8fdf9a60065b | 346 | } |
kadonotakashi | 0:8fdf9a60065b | 347 | #endif /* FSL_FEATURE_ADC16_HAS_OFFSET_CORRECTION */ |
kadonotakashi | 0:8fdf9a60065b | 348 | |
kadonotakashi | 0:8fdf9a60065b | 349 | /* @} */ |
kadonotakashi | 0:8fdf9a60065b | 350 | |
kadonotakashi | 0:8fdf9a60065b | 351 | /*! |
kadonotakashi | 0:8fdf9a60065b | 352 | * @name Advanced Features |
kadonotakashi | 0:8fdf9a60065b | 353 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 354 | */ |
kadonotakashi | 0:8fdf9a60065b | 355 | |
kadonotakashi | 0:8fdf9a60065b | 356 | #if defined(FSL_FEATURE_ADC16_HAS_DMA) && FSL_FEATURE_ADC16_HAS_DMA |
kadonotakashi | 0:8fdf9a60065b | 357 | /*! |
kadonotakashi | 0:8fdf9a60065b | 358 | * @brief Enables generating the DMA trigger when the conversion is complete. |
kadonotakashi | 0:8fdf9a60065b | 359 | * |
kadonotakashi | 0:8fdf9a60065b | 360 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 361 | * @param enable Switcher of the DMA feature. "true" means enabled, "false" means not enabled. |
kadonotakashi | 0:8fdf9a60065b | 362 | */ |
kadonotakashi | 0:8fdf9a60065b | 363 | static inline void ADC16_EnableDMA(ADC_Type *base, bool enable) |
kadonotakashi | 0:8fdf9a60065b | 364 | { |
kadonotakashi | 0:8fdf9a60065b | 365 | if (enable) |
kadonotakashi | 0:8fdf9a60065b | 366 | { |
kadonotakashi | 0:8fdf9a60065b | 367 | base->SC2 |= ADC_SC2_DMAEN_MASK; |
kadonotakashi | 0:8fdf9a60065b | 368 | } |
kadonotakashi | 0:8fdf9a60065b | 369 | else |
kadonotakashi | 0:8fdf9a60065b | 370 | { |
kadonotakashi | 0:8fdf9a60065b | 371 | base->SC2 &= ~ADC_SC2_DMAEN_MASK; |
kadonotakashi | 0:8fdf9a60065b | 372 | } |
kadonotakashi | 0:8fdf9a60065b | 373 | } |
kadonotakashi | 0:8fdf9a60065b | 374 | #endif /* FSL_FEATURE_ADC16_HAS_DMA */ |
kadonotakashi | 0:8fdf9a60065b | 375 | |
kadonotakashi | 0:8fdf9a60065b | 376 | /*! |
kadonotakashi | 0:8fdf9a60065b | 377 | * @brief Enables the hardware trigger mode. |
kadonotakashi | 0:8fdf9a60065b | 378 | * |
kadonotakashi | 0:8fdf9a60065b | 379 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 380 | * @param enable Switcher of the hardware trigger feature. "true" means enabled, "false" means not enabled. |
kadonotakashi | 0:8fdf9a60065b | 381 | */ |
kadonotakashi | 0:8fdf9a60065b | 382 | static inline void ADC16_EnableHardwareTrigger(ADC_Type *base, bool enable) |
kadonotakashi | 0:8fdf9a60065b | 383 | { |
kadonotakashi | 0:8fdf9a60065b | 384 | if (enable) |
kadonotakashi | 0:8fdf9a60065b | 385 | { |
kadonotakashi | 0:8fdf9a60065b | 386 | base->SC2 |= ADC_SC2_ADTRG_MASK; |
kadonotakashi | 0:8fdf9a60065b | 387 | } |
kadonotakashi | 0:8fdf9a60065b | 388 | else |
kadonotakashi | 0:8fdf9a60065b | 389 | { |
kadonotakashi | 0:8fdf9a60065b | 390 | base->SC2 &= ~ADC_SC2_ADTRG_MASK; |
kadonotakashi | 0:8fdf9a60065b | 391 | } |
kadonotakashi | 0:8fdf9a60065b | 392 | } |
kadonotakashi | 0:8fdf9a60065b | 393 | |
kadonotakashi | 0:8fdf9a60065b | 394 | #if defined(FSL_FEATURE_ADC16_HAS_MUX_SELECT) && FSL_FEATURE_ADC16_HAS_MUX_SELECT |
kadonotakashi | 0:8fdf9a60065b | 395 | /*! |
kadonotakashi | 0:8fdf9a60065b | 396 | * @brief Sets the channel mux mode. |
kadonotakashi | 0:8fdf9a60065b | 397 | * |
kadonotakashi | 0:8fdf9a60065b | 398 | * Some sample pins share the same channel index. The channel mux mode decides which pin is used for an |
kadonotakashi | 0:8fdf9a60065b | 399 | * indicated channel. |
kadonotakashi | 0:8fdf9a60065b | 400 | * |
kadonotakashi | 0:8fdf9a60065b | 401 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 402 | * @param mode Setting channel mux mode. See "adc16_channel_mux_mode_t". |
kadonotakashi | 0:8fdf9a60065b | 403 | */ |
kadonotakashi | 0:8fdf9a60065b | 404 | void ADC16_SetChannelMuxMode(ADC_Type *base, adc16_channel_mux_mode_t mode); |
kadonotakashi | 0:8fdf9a60065b | 405 | #endif /* FSL_FEATURE_ADC16_HAS_MUX_SELECT */ |
kadonotakashi | 0:8fdf9a60065b | 406 | |
kadonotakashi | 0:8fdf9a60065b | 407 | /*! |
kadonotakashi | 0:8fdf9a60065b | 408 | * @brief Configures the hardware compare mode. |
kadonotakashi | 0:8fdf9a60065b | 409 | * |
kadonotakashi | 0:8fdf9a60065b | 410 | * The hardware compare mode provides a way to process the conversion result automatically by using hardware. Only the result |
kadonotakashi | 0:8fdf9a60065b | 411 | * in the compare range is available. To compare the range, see "adc16_hardware_compare_mode_t" or the appopriate reference |
kadonotakashi | 0:8fdf9a60065b | 412 | * manual for more information. |
kadonotakashi | 0:8fdf9a60065b | 413 | * |
kadonotakashi | 0:8fdf9a60065b | 414 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 415 | * @param config Pointer to the "adc16_hardware_compare_config_t" structure. Passing "NULL" disables the feature. |
kadonotakashi | 0:8fdf9a60065b | 416 | */ |
kadonotakashi | 0:8fdf9a60065b | 417 | void ADC16_SetHardwareCompareConfig(ADC_Type *base, const adc16_hardware_compare_config_t *config); |
kadonotakashi | 0:8fdf9a60065b | 418 | |
kadonotakashi | 0:8fdf9a60065b | 419 | #if defined(FSL_FEATURE_ADC16_HAS_HW_AVERAGE) && FSL_FEATURE_ADC16_HAS_HW_AVERAGE |
kadonotakashi | 0:8fdf9a60065b | 420 | /*! |
kadonotakashi | 0:8fdf9a60065b | 421 | * @brief Sets the hardware average mode. |
kadonotakashi | 0:8fdf9a60065b | 422 | * |
kadonotakashi | 0:8fdf9a60065b | 423 | * The hardware average mode provides a way to process the conversion result automatically by using hardware. The multiple |
kadonotakashi | 0:8fdf9a60065b | 424 | * conversion results are accumulated and averaged internally making them easier to read. |
kadonotakashi | 0:8fdf9a60065b | 425 | * |
kadonotakashi | 0:8fdf9a60065b | 426 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 427 | * @param mode Setting the hardware average mode. See "adc16_hardware_average_mode_t". |
kadonotakashi | 0:8fdf9a60065b | 428 | */ |
kadonotakashi | 0:8fdf9a60065b | 429 | void ADC16_SetHardwareAverage(ADC_Type *base, adc16_hardware_average_mode_t mode); |
kadonotakashi | 0:8fdf9a60065b | 430 | #endif /* FSL_FEATURE_ADC16_HAS_HW_AVERAGE */ |
kadonotakashi | 0:8fdf9a60065b | 431 | |
kadonotakashi | 0:8fdf9a60065b | 432 | #if defined(FSL_FEATURE_ADC16_HAS_PGA) && FSL_FEATURE_ADC16_HAS_PGA |
kadonotakashi | 0:8fdf9a60065b | 433 | /*! |
kadonotakashi | 0:8fdf9a60065b | 434 | * @brief Configures the PGA for the converter's front end. |
kadonotakashi | 0:8fdf9a60065b | 435 | * |
kadonotakashi | 0:8fdf9a60065b | 436 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 437 | * @param config Pointer to the "adc16_pga_config_t" structure. Passing "NULL" disables the feature. |
kadonotakashi | 0:8fdf9a60065b | 438 | */ |
kadonotakashi | 0:8fdf9a60065b | 439 | void ADC16_SetPGAConfig(ADC_Type *base, const adc16_pga_config_t *config); |
kadonotakashi | 0:8fdf9a60065b | 440 | #endif /* FSL_FEATURE_ADC16_HAS_PGA */ |
kadonotakashi | 0:8fdf9a60065b | 441 | |
kadonotakashi | 0:8fdf9a60065b | 442 | /*! |
kadonotakashi | 0:8fdf9a60065b | 443 | * @brief Gets the status flags of the converter. |
kadonotakashi | 0:8fdf9a60065b | 444 | * |
kadonotakashi | 0:8fdf9a60065b | 445 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 446 | * |
kadonotakashi | 0:8fdf9a60065b | 447 | * @return Flags' mask if indicated flags are asserted. See "_adc16_status_flags". |
kadonotakashi | 0:8fdf9a60065b | 448 | */ |
kadonotakashi | 0:8fdf9a60065b | 449 | uint32_t ADC16_GetStatusFlags(ADC_Type *base); |
kadonotakashi | 0:8fdf9a60065b | 450 | |
kadonotakashi | 0:8fdf9a60065b | 451 | /*! |
kadonotakashi | 0:8fdf9a60065b | 452 | * @brief Clears the status flags of the converter. |
kadonotakashi | 0:8fdf9a60065b | 453 | * |
kadonotakashi | 0:8fdf9a60065b | 454 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 455 | * @param mask Mask value for the cleared flags. See "_adc16_status_flags". |
kadonotakashi | 0:8fdf9a60065b | 456 | */ |
kadonotakashi | 0:8fdf9a60065b | 457 | void ADC16_ClearStatusFlags(ADC_Type *base, uint32_t mask); |
kadonotakashi | 0:8fdf9a60065b | 458 | |
kadonotakashi | 0:8fdf9a60065b | 459 | /* @} */ |
kadonotakashi | 0:8fdf9a60065b | 460 | |
kadonotakashi | 0:8fdf9a60065b | 461 | /*! |
kadonotakashi | 0:8fdf9a60065b | 462 | * @name Conversion Channel |
kadonotakashi | 0:8fdf9a60065b | 463 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 464 | */ |
kadonotakashi | 0:8fdf9a60065b | 465 | |
kadonotakashi | 0:8fdf9a60065b | 466 | /*! |
kadonotakashi | 0:8fdf9a60065b | 467 | * @brief Configures the conversion channel. |
kadonotakashi | 0:8fdf9a60065b | 468 | * |
kadonotakashi | 0:8fdf9a60065b | 469 | * This operation triggers the conversion when in software trigger mode. When in hardware trigger mode, this API |
kadonotakashi | 0:8fdf9a60065b | 470 | * configures the channel while the external trigger source helps to trigger the conversion. |
kadonotakashi | 0:8fdf9a60065b | 471 | * |
kadonotakashi | 0:8fdf9a60065b | 472 | * Note that the "Channel Group" has a detailed description. |
kadonotakashi | 0:8fdf9a60065b | 473 | * To allow sequential conversions of the ADC to be triggered by internal peripherals, the ADC has more than one |
kadonotakashi | 0:8fdf9a60065b | 474 | * group of status and control registers, one for each conversion. The channel group parameter indicates which group of |
kadonotakashi | 0:8fdf9a60065b | 475 | * registers are used, for example, channel group 0 is for Group A registers and channel group 1 is for Group B registers. The |
kadonotakashi | 0:8fdf9a60065b | 476 | * channel groups are used in a "ping-pong" approach to control the ADC operation. At any point, only one of |
kadonotakashi | 0:8fdf9a60065b | 477 | * the channel groups is actively controlling ADC conversions. The channel group 0 is used for both software and hardware |
kadonotakashi | 0:8fdf9a60065b | 478 | * trigger modes. Channel group 1 and greater indicates multiple channel group registers for |
kadonotakashi | 0:8fdf9a60065b | 479 | * use only in hardware trigger mode. See the chip configuration information in the appropriate MCU reference manual for the |
kadonotakashi | 0:8fdf9a60065b | 480 | * number of SC1n registers (channel groups) specific to this device. Channel group 1 or greater are not used |
kadonotakashi | 0:8fdf9a60065b | 481 | * for software trigger operation. Therefore, writing to these channel groups does not initiate a new conversion. |
kadonotakashi | 0:8fdf9a60065b | 482 | * Updating the channel group 0 while a different channel group is actively controlling a conversion is allowed and |
kadonotakashi | 0:8fdf9a60065b | 483 | * vice versa. Writing any of the channel group registers while that specific channel group is actively controlling a |
kadonotakashi | 0:8fdf9a60065b | 484 | * conversion aborts the current conversion. |
kadonotakashi | 0:8fdf9a60065b | 485 | * |
kadonotakashi | 0:8fdf9a60065b | 486 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 487 | * @param channelGroup Channel group index. |
kadonotakashi | 0:8fdf9a60065b | 488 | * @param config Pointer to the "adc16_channel_config_t" structure for the conversion channel. |
kadonotakashi | 0:8fdf9a60065b | 489 | */ |
kadonotakashi | 0:8fdf9a60065b | 490 | void ADC16_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc16_channel_config_t *config); |
kadonotakashi | 0:8fdf9a60065b | 491 | |
kadonotakashi | 0:8fdf9a60065b | 492 | /*! |
kadonotakashi | 0:8fdf9a60065b | 493 | * @brief Gets the conversion value. |
kadonotakashi | 0:8fdf9a60065b | 494 | * |
kadonotakashi | 0:8fdf9a60065b | 495 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 496 | * @param channelGroup Channel group index. |
kadonotakashi | 0:8fdf9a60065b | 497 | * |
kadonotakashi | 0:8fdf9a60065b | 498 | * @return Conversion value. |
kadonotakashi | 0:8fdf9a60065b | 499 | */ |
kadonotakashi | 0:8fdf9a60065b | 500 | static inline uint32_t ADC16_GetChannelConversionValue(ADC_Type *base, uint32_t channelGroup) |
kadonotakashi | 0:8fdf9a60065b | 501 | { |
kadonotakashi | 0:8fdf9a60065b | 502 | assert(channelGroup < ADC_R_COUNT); |
kadonotakashi | 0:8fdf9a60065b | 503 | |
kadonotakashi | 0:8fdf9a60065b | 504 | return base->R[channelGroup]; |
kadonotakashi | 0:8fdf9a60065b | 505 | } |
kadonotakashi | 0:8fdf9a60065b | 506 | |
kadonotakashi | 0:8fdf9a60065b | 507 | /*! |
kadonotakashi | 0:8fdf9a60065b | 508 | * @brief Gets the status flags of channel. |
kadonotakashi | 0:8fdf9a60065b | 509 | * |
kadonotakashi | 0:8fdf9a60065b | 510 | * @param base ADC16 peripheral base address. |
kadonotakashi | 0:8fdf9a60065b | 511 | * @param channelGroup Channel group index. |
kadonotakashi | 0:8fdf9a60065b | 512 | * |
kadonotakashi | 0:8fdf9a60065b | 513 | * @return Flags' mask if indicated flags are asserted. See "_adc16_channel_status_flags". |
kadonotakashi | 0:8fdf9a60065b | 514 | */ |
kadonotakashi | 0:8fdf9a60065b | 515 | uint32_t ADC16_GetChannelStatusFlags(ADC_Type *base, uint32_t channelGroup); |
kadonotakashi | 0:8fdf9a60065b | 516 | |
kadonotakashi | 0:8fdf9a60065b | 517 | /* @} */ |
kadonotakashi | 0:8fdf9a60065b | 518 | |
kadonotakashi | 0:8fdf9a60065b | 519 | #if defined(__cplusplus) |
kadonotakashi | 0:8fdf9a60065b | 520 | } |
kadonotakashi | 0:8fdf9a60065b | 521 | #endif |
kadonotakashi | 0:8fdf9a60065b | 522 | /*! |
kadonotakashi | 0:8fdf9a60065b | 523 | * @} |
kadonotakashi | 0:8fdf9a60065b | 524 | */ |
kadonotakashi | 0:8fdf9a60065b | 525 | #endif /* _FSL_ADC16_H_ */ |