takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_Atmel/TARGET_SAM_CortexM4/drivers/tc/tc.h@3:f3764f852aa8, 2018-10-11 (annotated)

Committer:
kadonotakashi
Date:
Thu Oct 11 02:27:46 2018 +0000
Revision:
3:f3764f852aa8
Parent:
0:8fdf9a60065b 
Nucreo 446 + SSD1331 test version;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /**
kadonotakashi 0:8fdf9a60065b 2 * \file
kadonotakashi 0:8fdf9a60065b 3 *
kadonotakashi 0:8fdf9a60065b 4 * \brief SAM Timer Counter (TC) driver.
kadonotakashi 0:8fdf9a60065b 5 *
kadonotakashi 0:8fdf9a60065b 6 * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved.
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * \asf_license_start
kadonotakashi 0:8fdf9a60065b 9 *
kadonotakashi 0:8fdf9a60065b 10 * \page License
kadonotakashi 0:8fdf9a60065b 11 *
kadonotakashi 0:8fdf9a60065b 12 * Redistribution and use in source and binary forms, with or without
kadonotakashi 0:8fdf9a60065b 13 * modification, are permitted provided that the following conditions are met:
kadonotakashi 0:8fdf9a60065b 14 *
kadonotakashi 0:8fdf9a60065b 15 * 1. Redistributions of source code must retain the above copyright notice,
kadonotakashi 0:8fdf9a60065b 16 * this list of conditions and the following disclaimer.
kadonotakashi 0:8fdf9a60065b 17 *
kadonotakashi 0:8fdf9a60065b 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
kadonotakashi 0:8fdf9a60065b 19 * this list of conditions and the following disclaimer in the documentation
kadonotakashi 0:8fdf9a60065b 20 * and/or other materials provided with the distribution.
kadonotakashi 0:8fdf9a60065b 21 *
kadonotakashi 0:8fdf9a60065b 22 * 3. The name of Atmel may not be used to endorse or promote products derived
kadonotakashi 0:8fdf9a60065b 23 * from this software without specific prior written permission.
kadonotakashi 0:8fdf9a60065b 24 *
kadonotakashi 0:8fdf9a60065b 25 * 4. This software may only be redistributed and used in connection with an
kadonotakashi 0:8fdf9a60065b 26 * Atmel microcontroller product.
kadonotakashi 0:8fdf9a60065b 27 *
kadonotakashi 0:8fdf9a60065b 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
kadonotakashi 0:8fdf9a60065b 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
kadonotakashi 0:8fdf9a60065b 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
kadonotakashi 0:8fdf9a60065b 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
kadonotakashi 0:8fdf9a60065b 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
kadonotakashi 0:8fdf9a60065b 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
kadonotakashi 0:8fdf9a60065b 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
kadonotakashi 0:8fdf9a60065b 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
kadonotakashi 0:8fdf9a60065b 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
kadonotakashi 0:8fdf9a60065b 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
kadonotakashi 0:8fdf9a60065b 38 * POSSIBILITY OF SUCH DAMAGE.
kadonotakashi 0:8fdf9a60065b 39 *
kadonotakashi 0:8fdf9a60065b 40 * \asf_license_stop
kadonotakashi 0:8fdf9a60065b 41 *
kadonotakashi 0:8fdf9a60065b 42 */
kadonotakashi 0:8fdf9a60065b 43 /*
kadonotakashi 0:8fdf9a60065b 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
kadonotakashi 0:8fdf9a60065b 45 */
kadonotakashi 0:8fdf9a60065b 46
kadonotakashi 0:8fdf9a60065b 47 #ifndef TC_H_INCLUDED
kadonotakashi 0:8fdf9a60065b 48 #define TC_H_INCLUDED
kadonotakashi 0:8fdf9a60065b 49
kadonotakashi 0:8fdf9a60065b 50 /**
kadonotakashi 0:8fdf9a60065b 51 * \defgroup asfdoc_sam_drivers_tc_group SAM3/4S/4L/4E/4N/4CM/4C/G Timer Counter (TC) Driver
kadonotakashi 0:8fdf9a60065b 52 *
kadonotakashi 0:8fdf9a60065b 53 * This driver for Atmel&reg; | SMART ARM&reg;-based microcontrollers
kadonotakashi 0:8fdf9a60065b 54 * provides an interface for the configuration and management of the
kadonotakashi 0:8fdf9a60065b 55 * device's Timer Counter functionality.
kadonotakashi 0:8fdf9a60065b 56 *
kadonotakashi 0:8fdf9a60065b 57 * The Timer Counter (TC) includes several identical 16-bit or 32-bit
kadonotakashi 0:8fdf9a60065b 58 * Timer Counter channels. Each channel can be independently programmed
kadonotakashi 0:8fdf9a60065b 59 * to perform a wide range of functions that includes frequency
kadonotakashi 0:8fdf9a60065b 60 * measurement, event counting, interval measurement, pulse generation,
kadonotakashi 0:8fdf9a60065b 61 * delay timing, and pulse width modulation.
kadonotakashi 0:8fdf9a60065b 62 *
kadonotakashi 0:8fdf9a60065b 63 * Devices from the following series can use this module:
kadonotakashi 0:8fdf9a60065b 64 * - Atmel | SMART SAM3
kadonotakashi 0:8fdf9a60065b 65 * - Atmel | SMART SAM4S
kadonotakashi 0:8fdf9a60065b 66 * - Atmel | SMART SAM4L
kadonotakashi 0:8fdf9a60065b 67 * - Atmel | SMART SAM4E
kadonotakashi 0:8fdf9a60065b 68 * - Atmel | SMART SAM4N
kadonotakashi 0:8fdf9a60065b 69 * - Atmel | SMART SAM4CM
kadonotakashi 0:8fdf9a60065b 70 * - Atmel | SMART SAM4C
kadonotakashi 0:8fdf9a60065b 71 * - Atmel | SMART SAMG
kadonotakashi 0:8fdf9a60065b 72 *
kadonotakashi 0:8fdf9a60065b 73 * The outline of this documentation is as follows:
kadonotakashi 0:8fdf9a60065b 74 * - \ref asfdoc_sam_drivers_tc_prerequisites
kadonotakashi 0:8fdf9a60065b 75 * - \ref asfdoc_sam_drivers_tc_module_overview
kadonotakashi 0:8fdf9a60065b 76 * - \ref asfdoc_sam_drivers_tc_special_considerations
kadonotakashi 0:8fdf9a60065b 77 * - \ref asfdoc_sam_drivers_tc_extra_info
kadonotakashi 0:8fdf9a60065b 78 * - \ref asfdoc_sam_drivers_tc_examples
kadonotakashi 0:8fdf9a60065b 79 * - \ref asfdoc_sam_drivers_tc_api_overview
kadonotakashi 0:8fdf9a60065b 80 *
kadonotakashi 0:8fdf9a60065b 81 *
kadonotakashi 0:8fdf9a60065b 82 * \section asfdoc_sam_drivers_tc_prerequisites Prerequisites
kadonotakashi 0:8fdf9a60065b 83 *
kadonotakashi 0:8fdf9a60065b 84 * There are no prerequisites for this module.
kadonotakashi 0:8fdf9a60065b 85 *
kadonotakashi 0:8fdf9a60065b 86 *
kadonotakashi 0:8fdf9a60065b 87 * \section asfdoc_sam_drivers_tc_module_overview Module Overview
kadonotakashi 0:8fdf9a60065b 88 * The Timer Counter (TC) includes several identical 16-bit or 32-bit Timer
kadonotakashi 0:8fdf9a60065b 89 * Counter channels. The number of TC channels is device specific, refer
kadonotakashi 0:8fdf9a60065b 90 * to the device-specific datasheet for more information.
kadonotakashi 0:8fdf9a60065b 91 *
kadonotakashi 0:8fdf9a60065b 92 * Each channel can be independently programmed to perform a wide range of
kadonotakashi 0:8fdf9a60065b 93 * functions that includes frequency measurement, event counting, interval measurement,
kadonotakashi 0:8fdf9a60065b 94 * pulse generation, delay timing, and pulse width modulation.
kadonotakashi 0:8fdf9a60065b 95 *
kadonotakashi 0:8fdf9a60065b 96 * Each channel has three external clock inputs, five internal clock inputs,
kadonotakashi 0:8fdf9a60065b 97 * and two multi-purpose input/output signals which can be configured by the user.
kadonotakashi 0:8fdf9a60065b 98 * Each channel drives an internal interrupt signal which can be programmed to
kadonotakashi 0:8fdf9a60065b 99 * generate processor interrupts.
kadonotakashi 0:8fdf9a60065b 100 *
kadonotakashi 0:8fdf9a60065b 101 * The Timer Counter (TC) embeds a quadrature decoder logic connected in front of
kadonotakashi 0:8fdf9a60065b 102 * the timers. When enabled, the quadrature decoder performs the input line
kadonotakashi 0:8fdf9a60065b 103 * filtering, decoding of quadrature signals and connects to the timers/counters
kadonotakashi 0:8fdf9a60065b 104 * in order to read the position and speed of the motor.
kadonotakashi 0:8fdf9a60065b 105 *
kadonotakashi 0:8fdf9a60065b 106 *
kadonotakashi 0:8fdf9a60065b 107 * \section asfdoc_sam_drivers_tc_special_considerations Special Considerations
kadonotakashi 0:8fdf9a60065b 108 * \subsection asfdoc_sam_drivers_tc_special_considerations_clock External Clock
kadonotakashi 0:8fdf9a60065b 109 * In all cases, if an external clock is used, the duration of each of its levels
kadonotakashi 0:8fdf9a60065b 110 * must be longer than the master clock (MCLK) period. The external clock frequency
kadonotakashi 0:8fdf9a60065b 111 * must be at least 2.5 times lower than the master clock.
kadonotakashi 0:8fdf9a60065b 112 *
kadonotakashi 0:8fdf9a60065b 113 * \subsection asfdoc_sam_drivers_tc_special_considerations_trigger External Trigger
kadonotakashi 0:8fdf9a60065b 114 * If an external trigger is used, the duration of its pulses must be longer than
kadonotakashi 0:8fdf9a60065b 115 * the master clock (MCLK) period in order to be detected.
kadonotakashi 0:8fdf9a60065b 116 *
kadonotakashi 0:8fdf9a60065b 117 *
kadonotakashi 0:8fdf9a60065b 118 * \section asfdoc_sam_drivers_tc_extra_info Extra Information
kadonotakashi 0:8fdf9a60065b 119 *
kadonotakashi 0:8fdf9a60065b 120 * For extra information, see \ref asfdoc_sam_drivers_tc_extra. This includes:
kadonotakashi 0:8fdf9a60065b 121 * - \ref asfdoc_sam_drivers_tc_extra_acronyms
kadonotakashi 0:8fdf9a60065b 122 * - \ref asfdoc_sam_drivers_tc_extra_dependencies
kadonotakashi 0:8fdf9a60065b 123 * - \ref asfdoc_sam_drivers_tc_extra_errata
kadonotakashi 0:8fdf9a60065b 124 * - \ref asfdoc_sam_drivers_tc_extra_history
kadonotakashi 0:8fdf9a60065b 125 *
kadonotakashi 0:8fdf9a60065b 126 * \section asfdoc_sam_drivers_tc_examples Examples
kadonotakashi 0:8fdf9a60065b 127 *
kadonotakashi 0:8fdf9a60065b 128 * For a list of examples related to this driver, see
kadonotakashi 0:8fdf9a60065b 129 * \ref asfdoc_sam_drivers_tc_exqsg.
kadonotakashi 0:8fdf9a60065b 130 *
kadonotakashi 0:8fdf9a60065b 131 *
kadonotakashi 0:8fdf9a60065b 132 * \section asfdoc_sam_drivers_tc_api_overview API Overview
kadonotakashi 0:8fdf9a60065b 133 * @{
kadonotakashi 0:8fdf9a60065b 134 */
kadonotakashi 0:8fdf9a60065b 135
kadonotakashi 0:8fdf9a60065b 136 #include <compiler.h>
kadonotakashi 0:8fdf9a60065b 137
kadonotakashi 0:8fdf9a60065b 138 /// @cond
kadonotakashi 0:8fdf9a60065b 139 /**INDENT-OFF**/
kadonotakashi 0:8fdf9a60065b 140 #ifdef __cplusplus
kadonotakashi 0:8fdf9a60065b 141 extern "C" {
kadonotakashi 0:8fdf9a60065b 142 #endif
kadonotakashi 0:8fdf9a60065b 143 /**INDENT-ON**/
kadonotakashi 0:8fdf9a60065b 144 /// @endcond
kadonotakashi 0:8fdf9a60065b 145
kadonotakashi 0:8fdf9a60065b 146 void tc_init(Tc *p_tc, uint32_t ul_Channel, uint32_t ul_Mode);
kadonotakashi 0:8fdf9a60065b 147 void tc_sync_trigger(Tc *p_tc);
kadonotakashi 0:8fdf9a60065b 148 void tc_set_block_mode(Tc *p_tc, uint32_t ul_blockmode);
kadonotakashi 0:8fdf9a60065b 149
kadonotakashi 0:8fdf9a60065b 150 #if (!SAM3U) || defined(__DOXYGEN__)
kadonotakashi 0:8fdf9a60065b 151 uint32_t tc_init_2bit_gray(Tc *p_tc, uint32_t ul_channel,
kadonotakashi 0:8fdf9a60065b 152 uint32_t ul_steppermode);
kadonotakashi 0:8fdf9a60065b 153 #endif /* (!SAM3U) || defined(__DOXYGEN__) */
kadonotakashi 0:8fdf9a60065b 154
kadonotakashi 0:8fdf9a60065b 155 void tc_start(Tc *p_tc, uint32_t ul_channel);
kadonotakashi 0:8fdf9a60065b 156 void tc_stop(Tc *p_tc, uint32_t ul_channel);
kadonotakashi 0:8fdf9a60065b 157
kadonotakashi 0:8fdf9a60065b 158 uint32_t tc_read_cv(Tc *p_tc, uint32_t ul_channel);
kadonotakashi 0:8fdf9a60065b 159 uint32_t tc_read_ra(Tc *p_tc, uint32_t ul_channel);
kadonotakashi 0:8fdf9a60065b 160 uint32_t tc_read_rb(Tc *p_tc, uint32_t ul_channel);
kadonotakashi 0:8fdf9a60065b 161 uint32_t tc_read_rc(Tc *p_tc, uint32_t ul_channel);
kadonotakashi 0:8fdf9a60065b 162
kadonotakashi 0:8fdf9a60065b 163 void tc_write_ra(Tc *p_tc, uint32_t ul_channel,
kadonotakashi 0:8fdf9a60065b 164 uint32_t ul_value);
kadonotakashi 0:8fdf9a60065b 165 void tc_write_rb(Tc *p_tc, uint32_t ul_channel,
kadonotakashi 0:8fdf9a60065b 166 uint32_t ul_value);
kadonotakashi 0:8fdf9a60065b 167 void tc_write_rc(Tc *p_tc, uint32_t ul_channel,
kadonotakashi 0:8fdf9a60065b 168 uint32_t ul_value);
kadonotakashi 0:8fdf9a60065b 169
kadonotakashi 0:8fdf9a60065b 170 uint32_t tc_find_mck_divisor(uint32_t ul_freq, uint32_t ul_mck,
kadonotakashi 0:8fdf9a60065b 171 uint32_t *p_uldiv, uint32_t *ul_tcclks, uint32_t ul_boardmck);
kadonotakashi 0:8fdf9a60065b 172 void tc_enable_interrupt(Tc *p_tc, uint32_t ul_channel,
kadonotakashi 0:8fdf9a60065b 173 uint32_t ul_sources);
kadonotakashi 0:8fdf9a60065b 174 void tc_disable_interrupt(Tc *p_tc, uint32_t ul_channel,
kadonotakashi 0:8fdf9a60065b 175 uint32_t ul_sources);
kadonotakashi 0:8fdf9a60065b 176 uint32_t tc_get_interrupt_mask(Tc *p_tc, uint32_t ul_channel);
kadonotakashi 0:8fdf9a60065b 177 uint32_t tc_get_status(Tc *p_tc, uint32_t ul_channel);
kadonotakashi 0:8fdf9a60065b 178 #if (!SAM4L && !SAMG) || defined(__DOXYGEN__)
kadonotakashi 0:8fdf9a60065b 179 void tc_enable_qdec_interrupt(Tc *p_tc, uint32_t ul_sources);
kadonotakashi 0:8fdf9a60065b 180 void tc_disable_qdec_interrupt(Tc *p_tc, uint32_t ul_sources);
kadonotakashi 0:8fdf9a60065b 181 uint32_t tc_get_qdec_interrupt_mask(Tc *p_tc);
kadonotakashi 0:8fdf9a60065b 182 uint32_t tc_get_qdec_interrupt_status(Tc *p_tc);
kadonotakashi 0:8fdf9a60065b 183 #endif /* (!SAM4L && !SAMG) || defined(__DOXYGEN__) */
kadonotakashi 0:8fdf9a60065b 184
kadonotakashi 0:8fdf9a60065b 185 #if (!SAM3U)
kadonotakashi 0:8fdf9a60065b 186 void tc_set_writeprotect(Tc *p_tc, uint32_t ul_enable);
kadonotakashi 0:8fdf9a60065b 187 #endif /* (!SAM3U) */
kadonotakashi 0:8fdf9a60065b 188
kadonotakashi 0:8fdf9a60065b 189 #if SAM4L || defined(__DOXYGEN__)
kadonotakashi 0:8fdf9a60065b 190 uint32_t tc_get_feature(Tc *p_tc);
kadonotakashi 0:8fdf9a60065b 191 uint32_t tc_get_version(Tc *p_tc);
kadonotakashi 0:8fdf9a60065b 192 #endif /* SAM4L || defined(__DOXYGEN__) */
kadonotakashi 0:8fdf9a60065b 193
kadonotakashi 0:8fdf9a60065b 194 /// @cond
kadonotakashi 0:8fdf9a60065b 195 /**INDENT-OFF**/
kadonotakashi 0:8fdf9a60065b 196 #ifdef __cplusplus
kadonotakashi 0:8fdf9a60065b 197 }
kadonotakashi 0:8fdf9a60065b 198 #endif
kadonotakashi 0:8fdf9a60065b 199 /**INDENT-ON**/
kadonotakashi 0:8fdf9a60065b 200 /// @endcond
kadonotakashi 0:8fdf9a60065b 201
kadonotakashi 0:8fdf9a60065b 202 /** @} */
kadonotakashi 0:8fdf9a60065b 203
kadonotakashi 0:8fdf9a60065b 204 /**
kadonotakashi 0:8fdf9a60065b 205 * \page asfdoc_sam_drivers_tc_extra Extra Information for Timer Counter Driver
kadonotakashi 0:8fdf9a60065b 206 *
kadonotakashi 0:8fdf9a60065b 207 * \section asfdoc_sam_drivers_tc_extra_acronyms Acronyms
kadonotakashi 0:8fdf9a60065b 208 * Below is a table listing the acronyms used in this module, along with their
kadonotakashi 0:8fdf9a60065b 209 * intended meanings.
kadonotakashi 0:8fdf9a60065b 210 *
kadonotakashi 0:8fdf9a60065b 211 * <table>
kadonotakashi 0:8fdf9a60065b 212 * <tr>
kadonotakashi 0:8fdf9a60065b 213 * <th>Acronym</th>
kadonotakashi 0:8fdf9a60065b 214 * <th>Definition</th>
kadonotakashi 0:8fdf9a60065b 215 * </tr>
kadonotakashi 0:8fdf9a60065b 216 * <tr>
kadonotakashi 0:8fdf9a60065b 217 * <td>MCK</td>
kadonotakashi 0:8fdf9a60065b 218 * <td>Master Clock</td>
kadonotakashi 0:8fdf9a60065b 219 * </tr>
kadonotakashi 0:8fdf9a60065b 220 * <tr>
kadonotakashi 0:8fdf9a60065b 221 * <td>PBA</td>
kadonotakashi 0:8fdf9a60065b 222 * <td>Peripheral Bus A clock</td>
kadonotakashi 0:8fdf9a60065b 223 * </tr>
kadonotakashi 0:8fdf9a60065b 224 * <tr>
kadonotakashi 0:8fdf9a60065b 225 * <td>PHA</td>
kadonotakashi 0:8fdf9a60065b 226 * <td>Quadrature Decoder input signal Phase A</td>
kadonotakashi 0:8fdf9a60065b 227 * </tr>
kadonotakashi 0:8fdf9a60065b 228 * <tr>
kadonotakashi 0:8fdf9a60065b 229 * <td>PHB</td>
kadonotakashi 0:8fdf9a60065b 230 * <td>Quadrature Decoder input signal Phase B</td>
kadonotakashi 0:8fdf9a60065b 231 * </tr>
kadonotakashi 0:8fdf9a60065b 232 * <tr>
kadonotakashi 0:8fdf9a60065b 233 * <td>QDEC</td>
kadonotakashi 0:8fdf9a60065b 234 * <td>Quadrature Decoder</td>
kadonotakashi 0:8fdf9a60065b 235 * </tr>
kadonotakashi 0:8fdf9a60065b 236 * <tr>
kadonotakashi 0:8fdf9a60065b 237 * <td>QSG</td>
kadonotakashi 0:8fdf9a60065b 238 * <td>Quick Start Guide</td>
kadonotakashi 0:8fdf9a60065b 239 * </tr>
kadonotakashi 0:8fdf9a60065b 240 * <tr>
kadonotakashi 0:8fdf9a60065b 241 * <td>RA</td>
kadonotakashi 0:8fdf9a60065b 242 * <td>Register A</td>
kadonotakashi 0:8fdf9a60065b 243 * </tr>
kadonotakashi 0:8fdf9a60065b 244 * <tr>
kadonotakashi 0:8fdf9a60065b 245 * <td>RB</td>
kadonotakashi 0:8fdf9a60065b 246 * <td>Register B</td>
kadonotakashi 0:8fdf9a60065b 247 * </tr>
kadonotakashi 0:8fdf9a60065b 248 * <tr>
kadonotakashi 0:8fdf9a60065b 249 * <td>RC</td>
kadonotakashi 0:8fdf9a60065b 250 * <td>Register C</td>
kadonotakashi 0:8fdf9a60065b 251 * </tr>
kadonotakashi 0:8fdf9a60065b 252 * <tr>
kadonotakashi 0:8fdf9a60065b 253 * <td>TIOB</td>
kadonotakashi 0:8fdf9a60065b 254 * <td>Timer Input Output B</td>
kadonotakashi 0:8fdf9a60065b 255 * </tr>
kadonotakashi 0:8fdf9a60065b 256 * </table>
kadonotakashi 0:8fdf9a60065b 257 *
kadonotakashi 0:8fdf9a60065b 258 *
kadonotakashi 0:8fdf9a60065b 259 * \section asfdoc_sam_drivers_tc_extra_dependencies Dependencies
kadonotakashi 0:8fdf9a60065b 260 * This driver has the following dependencies:
kadonotakashi 0:8fdf9a60065b 261 *
kadonotakashi 0:8fdf9a60065b 262 * - \ref clk_group "System Clock Management (sysclock)"
kadonotakashi 0:8fdf9a60065b 263 * - \ref asfdoc_sam_drivers_gpio_group "General Purpose I/O (GPIO) driver"
kadonotakashi 0:8fdf9a60065b 264 * - \ref asfdoc_sam_drivers_pmc_group "Power Manager Controller (PMC) driver"
kadonotakashi 0:8fdf9a60065b 265 *
kadonotakashi 0:8fdf9a60065b 266 *
kadonotakashi 0:8fdf9a60065b 267 * \section asfdoc_sam_drivers_tc_extra_errata Errata
kadonotakashi 0:8fdf9a60065b 268 * There are no errata related to this driver.
kadonotakashi 0:8fdf9a60065b 269 *
kadonotakashi 0:8fdf9a60065b 270 *
kadonotakashi 0:8fdf9a60065b 271 * \section asfdoc_sam_drivers_tc_extra_history Module History
kadonotakashi 0:8fdf9a60065b 272 * An overview of the module history is presented in the table below, with
kadonotakashi 0:8fdf9a60065b 273 * details on the enhancements and fixes made to the module since its first
kadonotakashi 0:8fdf9a60065b 274 * release. The current version of this corresponds to the newest version in
kadonotakashi 0:8fdf9a60065b 275 * the table.
kadonotakashi 0:8fdf9a60065b 276 *
kadonotakashi 0:8fdf9a60065b 277 * <table>
kadonotakashi 0:8fdf9a60065b 278 * <tr>
kadonotakashi 0:8fdf9a60065b 279 * <th>Changelog</th>
kadonotakashi 0:8fdf9a60065b 280 * </tr>
kadonotakashi 0:8fdf9a60065b 281 * <tr>
kadonotakashi 0:8fdf9a60065b 282 * <td>Initial document release</td>
kadonotakashi 0:8fdf9a60065b 283 * </tr>
kadonotakashi 0:8fdf9a60065b 284 * </table>
kadonotakashi 0:8fdf9a60065b 285 */
kadonotakashi 0:8fdf9a60065b 286
kadonotakashi 0:8fdf9a60065b 287 /**
kadonotakashi 0:8fdf9a60065b 288 * \page asfdoc_sam_drivers_tc_exqsg Examples for Timer Counter
kadonotakashi 0:8fdf9a60065b 289 *
kadonotakashi 0:8fdf9a60065b 290 * This is a list of the available Quick Start Guides (QSGs) and example
kadonotakashi 0:8fdf9a60065b 291 * applications for \ref asfdoc_sam_drivers_tc_group. QSGs are simple examples with
kadonotakashi 0:8fdf9a60065b 292 * step-by-step instructions to configure and use this driver in a selection of
kadonotakashi 0:8fdf9a60065b 293 * use cases. Note that a QSG can be compiled as a standalone application or be
kadonotakashi 0:8fdf9a60065b 294 * added to the user application.
kadonotakashi 0:8fdf9a60065b 295 *
kadonotakashi 0:8fdf9a60065b 296 * - \subpage asfdoc_sam_drivers_tc_qsg
kadonotakashi 0:8fdf9a60065b 297 * - \subpage asfdoc_sam_drivers_tc_example
kadonotakashi 0:8fdf9a60065b 298 *
kadonotakashi 0:8fdf9a60065b 299 * \page asfdoc_sam_drivers_tc_document_revision_history Document Revision History
kadonotakashi 0:8fdf9a60065b 300 *
kadonotakashi 0:8fdf9a60065b 301 * <table>
kadonotakashi 0:8fdf9a60065b 302 * <tr>
kadonotakashi 0:8fdf9a60065b 303 * <th>Doc. Rev.</td>
kadonotakashi 0:8fdf9a60065b 304 * <th>Date</td>
kadonotakashi 0:8fdf9a60065b 305 * <th>Comments</td>
kadonotakashi 0:8fdf9a60065b 306 * </tr>
kadonotakashi 0:8fdf9a60065b 307 * <tr>
kadonotakashi 0:8fdf9a60065b 308 * <td>42301B</td>
kadonotakashi 0:8fdf9a60065b 309 * <td>07/2015</td>
kadonotakashi 0:8fdf9a60065b 310 * <td>Updated title of application note and added list of supported devices</td>
kadonotakashi 0:8fdf9a60065b 311 * </tr>
kadonotakashi 0:8fdf9a60065b 312 * <tr>
kadonotakashi 0:8fdf9a60065b 313 * <td>42301A</td>
kadonotakashi 0:8fdf9a60065b 314 * <td>05/2014</td>
kadonotakashi 0:8fdf9a60065b 315 * <td>Initial document release</td>
kadonotakashi 0:8fdf9a60065b 316 * </tr>
kadonotakashi 0:8fdf9a60065b 317 * </table>
kadonotakashi 0:8fdf9a60065b 318 *
kadonotakashi 0:8fdf9a60065b 319 */
kadonotakashi 0:8fdf9a60065b 320
kadonotakashi 0:8fdf9a60065b 321 /**
kadonotakashi 0:8fdf9a60065b 322 * \page asfdoc_sam_drivers_tc_qsg Quick Start Guide for the TC driver
kadonotakashi 0:8fdf9a60065b 323 *
kadonotakashi 0:8fdf9a60065b 324 * This is the quick start guide for the \ref asfdoc_sam_drivers_tc_group, with
kadonotakashi 0:8fdf9a60065b 325 * step-by-step instructions on how to configure and use the driver for
kadonotakashi 0:8fdf9a60065b 326 * a specific use case. The code examples can be copied into the main
kadonotakashi 0:8fdf9a60065b 327 * application loop or any other function that will need to control the
kadonotakashi 0:8fdf9a60065b 328 * AST module.
kadonotakashi 0:8fdf9a60065b 329 *
kadonotakashi 0:8fdf9a60065b 330 * \section asfdoc_sam_drivers_tc_qsg_use_cases Use Cases
kadonotakashi 0:8fdf9a60065b 331 * - \ref asfdoc_sam_drivers_tc_qsg_basic_capture
kadonotakashi 0:8fdf9a60065b 332 * - \ref asfdoc_sam_drivers_tc_qsg_basic_waveform
kadonotakashi 0:8fdf9a60065b 333 *
kadonotakashi 0:8fdf9a60065b 334 * \section asfdoc_sam_drivers_tc_qsg_basic_capture TC Capture Mode Basic Usage
kadonotakashi 0:8fdf9a60065b 335 *
kadonotakashi 0:8fdf9a60065b 336 * This use case will demonstrate how to initialize the TC module to
kadonotakashi 0:8fdf9a60065b 337 * operate in capture mode using interrupts. Note, that the macros
kadonotakashi 0:8fdf9a60065b 338 * used to select the TC channel are device specific. Refer to the
kadonotakashi 0:8fdf9a60065b 339 * appropriate device-specific datasheet for more information.
kadonotakashi 0:8fdf9a60065b 340 *
kadonotakashi 0:8fdf9a60065b 341 *
kadonotakashi 0:8fdf9a60065b 342 * \section asfdoc_sam_drivers_tc_qsg_basic_capture_setup Setup Steps
kadonotakashi 0:8fdf9a60065b 343 *
kadonotakashi 0:8fdf9a60065b 344 * \subsection asfdoc_sam_tc_qsg_basic_capture_prereq Prerequisites
kadonotakashi 0:8fdf9a60065b 345 *
kadonotakashi 0:8fdf9a60065b 346 * This module requires the following services:
kadonotakashi 0:8fdf9a60065b 347 * - \ref clk_group "System Clock Management (sysclock)"
kadonotakashi 0:8fdf9a60065b 348 * - \ref asfdoc_sam_drivers_gpio_group "General Purpose I/O (GPIO) driver"
kadonotakashi 0:8fdf9a60065b 349 *
kadonotakashi 0:8fdf9a60065b 350 * \subsection asfdoc_sam_drivers_tc_qsg_basic_capture_setup_code Setup Code
kadonotakashi 0:8fdf9a60065b 351 *
kadonotakashi 0:8fdf9a60065b 352 * Add these macros to the top of your main application C-file:
kadonotakashi 0:8fdf9a60065b 353 * \snippet conf_board.h tc_define_peripheral
kadonotakashi 0:8fdf9a60065b 354 * \snippet conf_board.h tc_define_ch2
kadonotakashi 0:8fdf9a60065b 355 * \snippet conf_board.h tc_define_irq_handler
kadonotakashi 0:8fdf9a60065b 356 *
kadonotakashi 0:8fdf9a60065b 357 * Add this macro and functions to your main application C-file:
kadonotakashi 0:8fdf9a60065b 358 * \snippet tc_capture_waveform_example.c tc_capture_selection
kadonotakashi 0:8fdf9a60065b 359 * \snippet tc_capture_waveform_example.c tc_capture_init
kadonotakashi 0:8fdf9a60065b 360 * \snippet tc_capture_waveform_example.c tc_capture_irq_handler_start
kadonotakashi 0:8fdf9a60065b 361 * \snippet tc_capture_waveform_example.c tc_capture_irq_handler_end
kadonotakashi 0:8fdf9a60065b 362 *
kadonotakashi 0:8fdf9a60065b 363 * \subsection asfdoc_sam_drivers_tc_qsg_basic_capture_setup_workflow Workflow
kadonotakashi 0:8fdf9a60065b 364 *
kadonotakashi 0:8fdf9a60065b 365 * -# Enable the TC module's capture pin:
kadonotakashi 0:8fdf9a60065b 366 * \snippet tc_capture_waveform_example.c tc_capture_gpio
kadonotakashi 0:8fdf9a60065b 367 * -# Initialize the capture channel to the following:
kadonotakashi 0:8fdf9a60065b 368 * - Load RA on the rising edge of TIOA
kadonotakashi 0:8fdf9a60065b 369 * - Load RB on the falling edge of TIOA
kadonotakashi 0:8fdf9a60065b 370 * - Set the external trigger to TIOA
kadonotakashi 0:8fdf9a60065b 371 * - Set the external trigger to falling edge
kadonotakashi 0:8fdf9a60065b 372 * \snippet tc_capture_waveform_example.c tc_capture_init_call
kadonotakashi 0:8fdf9a60065b 373 * -# Enable the TC interrupt using NVIC:
kadonotakashi 0:8fdf9a60065b 374 * \snippet tc_capture_waveform_example.c tc_capture_init_irq
kadonotakashi 0:8fdf9a60065b 375 * -# Enable the capture channel interrupt:
kadonotakashi 0:8fdf9a60065b 376 * \snippet tc_capture_waveform_example.c tc_capture_init_module_irq
kadonotakashi 0:8fdf9a60065b 377 * -# In the \ref TC_Handler_null "TC_Handler()" function, the load.
kadonotakashi 0:8fdf9a60065b 378 * RB interrupt can be checked by:
kadonotakashi 0:8fdf9a60065b 379 * \snippet tc_capture_waveform_example.c tc_capture_irq_handler_status
kadonotakashi 0:8fdf9a60065b 380 * \code } \endcode
kadonotakashi 0:8fdf9a60065b 381 * -# In the \ref TC_Handler_null "TC_Handler()" function, the RA value.
kadonotakashi 0:8fdf9a60065b 382 * can be read by:
kadonotakashi 0:8fdf9a60065b 383 * \code uint32_t gs_ul_captured_ra; \endcode
kadonotakashi 0:8fdf9a60065b 384 * \snippet tc_capture_waveform_example.c tc_capture_irq_handler_read_ra
kadonotakashi 0:8fdf9a60065b 385 * -# In the \ref TC_Handler_null "TC_Handler()" function, the RB value.
kadonotakashi 0:8fdf9a60065b 386 * can be read by:
kadonotakashi 0:8fdf9a60065b 387 * \code uint32_t gs_ul_captured_rb; \endcode
kadonotakashi 0:8fdf9a60065b 388 * \snippet tc_capture_waveform_example.c tc_capture_irq_handler_read_rb
kadonotakashi 0:8fdf9a60065b 389 *
kadonotakashi 0:8fdf9a60065b 390 * \section asfdoc_sam_drivers_tc_qsg_basic_waveform TC Waveform Mode Basic Usage
kadonotakashi 0:8fdf9a60065b 391 *
kadonotakashi 0:8fdf9a60065b 392 * This use case will demonstrate how to initialize the TC module to
kadonotakashi 0:8fdf9a60065b 393 * operate in waveform mode. Note, that the macros used to select
kadonotakashi 0:8fdf9a60065b 394 * the TC channel are device specific. Refer to the appropriate
kadonotakashi 0:8fdf9a60065b 395 * device-specific datasheet for more information.
kadonotakashi 0:8fdf9a60065b 396 *
kadonotakashi 0:8fdf9a60065b 397 *
kadonotakashi 0:8fdf9a60065b 398 * \section asfdoc_sam_drivers_tc_qsg_basic_waveform_setup Setup Steps
kadonotakashi 0:8fdf9a60065b 399 *
kadonotakashi 0:8fdf9a60065b 400 * \subsection asfdoc_sam_tc_qsg_basic_waveform_prereq Prerequisites
kadonotakashi 0:8fdf9a60065b 401 *
kadonotakashi 0:8fdf9a60065b 402 * This module requires the following services:
kadonotakashi 0:8fdf9a60065b 403 * - \ref clk_group "System Clock Management (sysclock)"
kadonotakashi 0:8fdf9a60065b 404 * - \ref asfdoc_sam_drivers_gpio_group "General Purpose I/O (GPIO) driver"
kadonotakashi 0:8fdf9a60065b 405 *
kadonotakashi 0:8fdf9a60065b 406 * \subsection asfdoc_sam_drivers_tc_qsg_basic_waveform_setup_code Setup Code
kadonotakashi 0:8fdf9a60065b 407 *
kadonotakashi 0:8fdf9a60065b 408 * Add these macros to the top of your main application C-file:
kadonotakashi 0:8fdf9a60065b 409 * \snippet conf_board.h tc_define_peripheral
kadonotakashi 0:8fdf9a60065b 410 * \snippet conf_board.h tc_define_ch1
kadonotakashi 0:8fdf9a60065b 411 *
kadonotakashi 0:8fdf9a60065b 412 * Add these macros and function to your main application C-file:
kadonotakashi 0:8fdf9a60065b 413 * \code #define TC_WAVEFORM_TIMER_SELECTION TC_CMR_TCCLKS_TIMER_CLOCK4 \endcode
kadonotakashi 0:8fdf9a60065b 414 * \code #define TC_WAVEFORM_DIVISOR 128 \endcode
kadonotakashi 0:8fdf9a60065b 415 * \code #define TC_WAVEFORM_FREQUENCY 178 \endcode
kadonotakashi 0:8fdf9a60065b 416 * \code #define TC_WAVEFORM_DUTY_CYCLE 30 \endcode
kadonotakashi 0:8fdf9a60065b 417 * \code
kadonotakashi 0:8fdf9a60065b 418 * static void tc_waveform_initialize(void)
kadonotakashi 0:8fdf9a60065b 419 * {
kadonotakashi 0:8fdf9a60065b 420 * uint32_t ra, rc;
kadonotakashi 0:8fdf9a60065b 421 *
kadonotakashi 0:8fdf9a60065b 422 * // Configure the PMC to enable the TC module.
kadonotakashi 0:8fdf9a60065b 423 * sysclk_enable_peripheral_clock(ID_TC_WAVEFORM);
kadonotakashi 0:8fdf9a60065b 424 *
kadonotakashi 0:8fdf9a60065b 425 * // Init TC to waveform mode.
kadonotakashi 0:8fdf9a60065b 426 * tc_init(TC, TC_CHANNEL_WAVEFORM,
kadonotakashi 0:8fdf9a60065b 427 * TC_WAVEFORM_TIMER_SELECTION // Waveform Clock Selection
kadonotakashi 0:8fdf9a60065b 428 * | TC_CMR_WAVE // Waveform mode is enabled
kadonotakashi 0:8fdf9a60065b 429 * | TC_CMR_ACPA_SET // RA Compare Effect: set
kadonotakashi 0:8fdf9a60065b 430 * | TC_CMR_ACPC_CLEAR // RC Compare Effect: clear
kadonotakashi 0:8fdf9a60065b 431 * | TC_CMR_CPCTRG // UP mode with automatic trigger on RC Compare
kadonotakashi 0:8fdf9a60065b 432 * );
kadonotakashi 0:8fdf9a60065b 433 *
kadonotakashi 0:8fdf9a60065b 434 * // Configure waveform frequency and duty cycle.
kadonotakashi 0:8fdf9a60065b 435 * rc = (sysclk_get_peripheral_bus_hz(TC) /
kadonotakashi 0:8fdf9a60065b 436 * TC_WAVEFORM_DIVISOR /
kadonotakashi 0:8fdf9a60065b 437 * TC_WAVEFORM_FREQUENCY;
kadonotakashi 0:8fdf9a60065b 438 * tc_write_rc(TC, TC_CHANNEL_WAVEFORM, rc);
kadonotakashi 0:8fdf9a60065b 439 * ra = (100 - TC_WAVEFORM_FREQUENCY_DUTY_CYCLE * rc / 100;
kadonotakashi 0:8fdf9a60065b 440 * tc_write_ra(TC, TC_CHANNEL_WAVEFORM, ra);
kadonotakashi 0:8fdf9a60065b 441 *
kadonotakashi 0:8fdf9a60065b 442 * // Enable TC TC_CHANNEL_WAVEFORM.
kadonotakashi 0:8fdf9a60065b 443 * tc_start(TC, TC_CHANNEL_WAVEFORM);
kadonotakashi 0:8fdf9a60065b 444 * } \endcode
kadonotakashi 0:8fdf9a60065b 445 *
kadonotakashi 0:8fdf9a60065b 446 * \subsection asfdoc_sam_drivers_tc_qsg_basic_waveform_setup_workflow Workflow
kadonotakashi 0:8fdf9a60065b 447 *
kadonotakashi 0:8fdf9a60065b 448 * -# Enable the TC module's waveform pin:
kadonotakashi 0:8fdf9a60065b 449 * \snippet tc_capture_waveform_example.c tc_waveform_gpio
kadonotakashi 0:8fdf9a60065b 450 * -# Initialize the waveform channel to the following:
kadonotakashi 0:8fdf9a60065b 451 * - Output frequency of 178Hz, with a duty-cycle of 30%
kadonotakashi 0:8fdf9a60065b 452 * - Use TC_CMR_TCCLKS_TIMER_CLOCK4, with a divisor of 128
kadonotakashi 0:8fdf9a60065b 453 * \snippet tc_capture_waveform_example.c tc_waveform_init_call
kadonotakashi 0:8fdf9a60065b 454 */
kadonotakashi 0:8fdf9a60065b 455 #endif /* TC_H_INCLUDED */