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mbed-os/targets/TARGET_NUVOTON/TARGET_M2351/device/Reg/usbd_reg.h@0:8fdf9a60065b, 2018-10-10 (annotated)
- Committer:
- kadonotakashi
- Date:
- Wed Oct 10 00:33:53 2018 +0000
- Revision:
- 0:8fdf9a60065b
how to make mbed librry
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| kadonotakashi | 0:8fdf9a60065b | 1 | /**************************************************************************//** |
| kadonotakashi | 0:8fdf9a60065b | 2 | * @file usbd_reg.h |
| kadonotakashi | 0:8fdf9a60065b | 3 | * @version V1.00 |
| kadonotakashi | 0:8fdf9a60065b | 4 | * @brief USBD register definition header file |
| kadonotakashi | 0:8fdf9a60065b | 5 | * |
| kadonotakashi | 0:8fdf9a60065b | 6 | * @copyright (C) 2017 Nuvoton Technology Corp. All rights reserved. |
| kadonotakashi | 0:8fdf9a60065b | 7 | *****************************************************************************/ |
| kadonotakashi | 0:8fdf9a60065b | 8 | #ifndef __USBD_REG_H__ |
| kadonotakashi | 0:8fdf9a60065b | 9 | #define __USBD_REG_H__ |
| kadonotakashi | 0:8fdf9a60065b | 10 | |
| kadonotakashi | 0:8fdf9a60065b | 11 | |
| kadonotakashi | 0:8fdf9a60065b | 12 | /*---------------------- USB Device Controller -------------------------*/ |
| kadonotakashi | 0:8fdf9a60065b | 13 | /** |
| kadonotakashi | 0:8fdf9a60065b | 14 | @addtogroup USBD USB Device Controller(USBD) |
| kadonotakashi | 0:8fdf9a60065b | 15 | Memory Mapped Structure for USBD Controller |
| kadonotakashi | 0:8fdf9a60065b | 16 | @{ */ |
| kadonotakashi | 0:8fdf9a60065b | 17 | |
| kadonotakashi | 0:8fdf9a60065b | 18 | |
| kadonotakashi | 0:8fdf9a60065b | 19 | |
| kadonotakashi | 0:8fdf9a60065b | 20 | /** |
| kadonotakashi | 0:8fdf9a60065b | 21 | * @brief USBD endpoints register |
| kadonotakashi | 0:8fdf9a60065b | 22 | */ |
| kadonotakashi | 0:8fdf9a60065b | 23 | typedef struct |
| kadonotakashi | 0:8fdf9a60065b | 24 | { |
| kadonotakashi | 0:8fdf9a60065b | 25 | /** |
| kadonotakashi | 0:8fdf9a60065b | 26 | * @var USBD_EP_T::BUFSEG |
| kadonotakashi | 0:8fdf9a60065b | 27 | * Offset: 0x500/0x510/0x520/0x530/0x540/0x550/0x560/0x570/0x580/0x590/0x5A0/0x5B0 Endpoint Buffer Segmentation Register |
| kadonotakashi | 0:8fdf9a60065b | 28 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 29 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 30 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 31 | * |[8:3] |BUFSEG |Endpoint Buffer Segmentation |
| kadonotakashi | 0:8fdf9a60065b | 32 | * | | |It is used to indicate the offset address for each endpoint with the USB SRAM starting address The effective starting address of the endpoint is |
| kadonotakashi | 0:8fdf9a60065b | 33 | * | | |USBD_SRAM address + { BUFSEG, 3'b000} |
| kadonotakashi | 0:8fdf9a60065b | 34 | * | | |Where the USBD_SRAM address = USBD_BA+0x100h. |
| kadonotakashi | 0:8fdf9a60065b | 35 | * | | |Refer to the section 6.29.5.7 for the endpoint SRAM structure and its description. |
| kadonotakashi | 0:8fdf9a60065b | 36 | * @var USBD_EP_T::MXPLD |
| kadonotakashi | 0:8fdf9a60065b | 37 | * Offset: 0x504/0x514/0x524/0x534/0x544/0x554/0x564/0x574/0x584/0x594/0x5A4/0x5B4 Endpoint Maximal Payload Register |
| kadonotakashi | 0:8fdf9a60065b | 38 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 39 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 40 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 41 | * |[8:0] |MXPLD |Maximal Payload |
| kadonotakashi | 0:8fdf9a60065b | 42 | * | | |Define the data length which is transmitted to host (IN token) or the actual data length which is received from the host (OUT token) |
| kadonotakashi | 0:8fdf9a60065b | 43 | * | | |It also used to indicate that the endpoint is ready to be transmitted in IN token or received in OUT token. |
| kadonotakashi | 0:8fdf9a60065b | 44 | * | | |(1) When the register is written by CPU, |
| kadonotakashi | 0:8fdf9a60065b | 45 | * | | |For IN token, the value of MXPLD is used to define the data length to be transmitted and indicate the data buffer is ready. |
| kadonotakashi | 0:8fdf9a60065b | 46 | * | | |For OUT token, it means that the controller is ready to receive data from the host and the value of MXPLD is the maximal data length comes from host. |
| kadonotakashi | 0:8fdf9a60065b | 47 | * | | |(2) When the register is read by CPU, |
| kadonotakashi | 0:8fdf9a60065b | 48 | * | | |For IN token, the value of MXPLD is indicated by the data length be transmitted to host |
| kadonotakashi | 0:8fdf9a60065b | 49 | * | | |For OUT token, the value of MXPLD is indicated the actual data length receiving from host. |
| kadonotakashi | 0:8fdf9a60065b | 50 | * | | |Note: Once MXPLD is written, the data packets will be transmitted/received immediately after IN/OUT token arrived. |
| kadonotakashi | 0:8fdf9a60065b | 51 | * @var USBD_EP_T::CFG |
| kadonotakashi | 0:8fdf9a60065b | 52 | * Offset: 0x508/0x518/0x528/0x538/0x548/0x558/0x568/0x578/0x588/0x598/0x5A8/0x5B8 Endpoint Configuration Register |
| kadonotakashi | 0:8fdf9a60065b | 53 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 54 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 55 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 56 | * |[3:0] |EPNUM |Endpoint Number |
| kadonotakashi | 0:8fdf9a60065b | 57 | * | | |These bits are used to define the endpoint number of the current endpoint |
| kadonotakashi | 0:8fdf9a60065b | 58 | * |[4] |ISOCH |Isochronous Endpoint |
| kadonotakashi | 0:8fdf9a60065b | 59 | * | | |This bit is used to set the endpoint as Isochronous endpoint, no handshake. |
| kadonotakashi | 0:8fdf9a60065b | 60 | * | | |0 = No Isochronous endpoint. |
| kadonotakashi | 0:8fdf9a60065b | 61 | * | | |1 = Isochronous endpoint. |
| kadonotakashi | 0:8fdf9a60065b | 62 | * |[6:5] |STATE |Endpoint STATE |
| kadonotakashi | 0:8fdf9a60065b | 63 | * | | |00 = Endpoint is Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 64 | * | | |01 = Out endpoint. |
| kadonotakashi | 0:8fdf9a60065b | 65 | * | | |10 = IN endpoint. |
| kadonotakashi | 0:8fdf9a60065b | 66 | * | | |11 = Undefined. |
| kadonotakashi | 0:8fdf9a60065b | 67 | * |[7] |DSQSYNC |Data Sequence Synchronization |
| kadonotakashi | 0:8fdf9a60065b | 68 | * | | |0 = DATA0 PID. |
| kadonotakashi | 0:8fdf9a60065b | 69 | * | | |1 = DATA1 PID. |
| kadonotakashi | 0:8fdf9a60065b | 70 | * | | |Note: It is used to specify the DATA0 or DATA1 PID in the following IN token transaction |
| kadonotakashi | 0:8fdf9a60065b | 71 | * | | |hardware will toggle automatically in IN token base on the bit. |
| kadonotakashi | 0:8fdf9a60065b | 72 | * |[9] |CSTALL |Clear STALL Response |
| kadonotakashi | 0:8fdf9a60065b | 73 | * | | |0 = Disable the device to clear the STALL handshake in setup stage. |
| kadonotakashi | 0:8fdf9a60065b | 74 | * | | |1 = Clear the device to response STALL handshake in setup stage. |
| kadonotakashi | 0:8fdf9a60065b | 75 | * @var USBD_EP_T::CFGP |
| kadonotakashi | 0:8fdf9a60065b | 76 | * Offset: 0x50C/0x51C/0x52C/0x53C/0x54C/0x55C/0x56C/0x57C/0x58C/0x59C/0x5AC/0x5BC Endpoint Set Stall and Clear In/Out Ready Control Register |
| kadonotakashi | 0:8fdf9a60065b | 77 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 78 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 79 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 80 | * |[0] |CLRRDY |Clear Ready |
| kadonotakashi | 0:8fdf9a60065b | 81 | * | | |When the USBD_MXPLDx register is set by user, it means that the endpoint is ready to transmit or receive data |
| kadonotakashi | 0:8fdf9a60065b | 82 | * | | |If the user wants to disable this transaction before the transaction start, users can set this bit to 1 to disable it and it is auto clear to 0. |
| kadonotakashi | 0:8fdf9a60065b | 83 | * | | |For IN token, write '1' to clear the IN token had ready to transmit the data to USB. |
| kadonotakashi | 0:8fdf9a60065b | 84 | * | | |For OUT token, write '1' to clear the OUT token had ready to receive the data from USB. |
| kadonotakashi | 0:8fdf9a60065b | 85 | * | | |This bit is write 1 only and is always 0 when it is read back. |
| kadonotakashi | 0:8fdf9a60065b | 86 | * |[1] |SSTALL |Set STALL |
| kadonotakashi | 0:8fdf9a60065b | 87 | * | | |0 = Disable the device to response STALL. |
| kadonotakashi | 0:8fdf9a60065b | 88 | * | | |1 = Set the device to respond STALL automatically. |
| kadonotakashi | 0:8fdf9a60065b | 89 | */ |
| kadonotakashi | 0:8fdf9a60065b | 90 | __IO uint32_t BUFSEG; /*!< [0x0000] Endpoint Buffer Segmentation Register */ |
| kadonotakashi | 0:8fdf9a60065b | 91 | __IO uint32_t MXPLD; /*!< [0x0004] Endpoint Maximal Payload Register */ |
| kadonotakashi | 0:8fdf9a60065b | 92 | __IO uint32_t CFG; /*!< [0x0008] Endpoint Configuration Register */ |
| kadonotakashi | 0:8fdf9a60065b | 93 | __IO uint32_t CFGP; /*!< [0x000c] Endpoint Set Stall and Clear In/Out Ready Control Register */ |
| kadonotakashi | 0:8fdf9a60065b | 94 | |
| kadonotakashi | 0:8fdf9a60065b | 95 | } USBD_EP_T; |
| kadonotakashi | 0:8fdf9a60065b | 96 | |
| kadonotakashi | 0:8fdf9a60065b | 97 | typedef struct |
| kadonotakashi | 0:8fdf9a60065b | 98 | { |
| kadonotakashi | 0:8fdf9a60065b | 99 | |
| kadonotakashi | 0:8fdf9a60065b | 100 | |
| kadonotakashi | 0:8fdf9a60065b | 101 | /** |
| kadonotakashi | 0:8fdf9a60065b | 102 | * @var USBD_T::INTEN |
| kadonotakashi | 0:8fdf9a60065b | 103 | * Offset: 0x00 USB Device Interrupt Enable Register |
| kadonotakashi | 0:8fdf9a60065b | 104 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 105 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 106 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 107 | * |[0] |BUSIEN |Bus Event Interrupt Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 108 | * | | |0 = BUS event interrupt Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 109 | * | | |1 = BUS event interrupt Enabled. |
| kadonotakashi | 0:8fdf9a60065b | 110 | * |[1] |USBIEN |USB Event Interrupt Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 111 | * | | |0 = USB event interrupt Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 112 | * | | |1 = USB event interrupt Enabled. |
| kadonotakashi | 0:8fdf9a60065b | 113 | * |[2] |VBDETIEN |VBUS Detection Interrupt Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 114 | * | | |0 = VBUS detection Interrupt Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 115 | * | | |1 = VBUS detection Interrupt Enabled. |
| kadonotakashi | 0:8fdf9a60065b | 116 | * |[3] |NEVWKIEN |USB No-event-wake-up Interrupt Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 117 | * | | |0 = No-event-wake-up Interrupt Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 118 | * | | |1 = No-event-wake-up Interrupt Enabled. |
| kadonotakashi | 0:8fdf9a60065b | 119 | * |[4] |SOFIEN |Start of Frame Interrupt Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 120 | * | | |0 = SOF Interrupt Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 121 | * | | |1 = SOF Interrupt Enabled. |
| kadonotakashi | 0:8fdf9a60065b | 122 | * |[8] |WKEN |Wake-up Function Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 123 | * | | |0 = USB wake-up function Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 124 | * | | |1 = USB wake-up function Enabled. |
| kadonotakashi | 0:8fdf9a60065b | 125 | * |[15] |INNAKEN |Active NAK Function and Its Status in IN Token |
| kadonotakashi | 0:8fdf9a60065b | 126 | * | | |0 = When device responds NAK after receiving IN token, IN NAK status will not be updated to USBD_EPSTS0 and USBD_EPSTS1register, so that the USB interrupt event will not be asserted. |
| kadonotakashi | 0:8fdf9a60065b | 127 | * | | |1 = IN NAK status will be updated to USBD_EPSTS0 and USBD_EPSTS1 register and the USB interrupt event will be asserted, when the device responds NAK after receiving IN token. |
| kadonotakashi | 0:8fdf9a60065b | 128 | * @var USBD_T::INTSTS |
| kadonotakashi | 0:8fdf9a60065b | 129 | * Offset: 0x04 USB Device Interrupt Event Status Register |
| kadonotakashi | 0:8fdf9a60065b | 130 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 131 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 132 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 133 | * |[0] |BUSIF |BUS Interrupt Status |
| kadonotakashi | 0:8fdf9a60065b | 134 | * | | |The BUS event means that there is one of the suspense or the resume function in the bus. |
| kadonotakashi | 0:8fdf9a60065b | 135 | * | | |0 = No BUS event occurred. |
| kadonotakashi | 0:8fdf9a60065b | 136 | * | | |1 = Bus event occurred; check USBD_ATTR[3:0] to know which kind of bus event was occurred, cleared by write 1 to USBD_INTSTS[0]. |
| kadonotakashi | 0:8fdf9a60065b | 137 | * |[1] |USBIF |USB Event Interrupt Status |
| kadonotakashi | 0:8fdf9a60065b | 138 | * | | |The USB event includes the SETUP Token, IN Token, OUT ACK, ISO IN, or ISO OUT events in the bus. |
| kadonotakashi | 0:8fdf9a60065b | 139 | * | | |0 = No USB event occurred. |
| kadonotakashi | 0:8fdf9a60065b | 140 | * | | |1 = USB event occurred, check EPSTS0~5[2:0] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[1] or EPSTS0~11 and SETUP (USBD_INTSTS[31]). |
| kadonotakashi | 0:8fdf9a60065b | 141 | * |[2] |VBDETIF |VBUS Detection Interrupt Status |
| kadonotakashi | 0:8fdf9a60065b | 142 | * | | |0 = There is not attached/detached event in the USB. |
| kadonotakashi | 0:8fdf9a60065b | 143 | * | | |1 = There is attached/detached event in the USB bus and it is cleared by write 1 to USBD_INTSTS[2]. |
| kadonotakashi | 0:8fdf9a60065b | 144 | * |[3] |NEVWKIF |No-event-wake-up Interrupt Status |
| kadonotakashi | 0:8fdf9a60065b | 145 | * | | |0 = NEVWK event does not occur. |
| kadonotakashi | 0:8fdf9a60065b | 146 | * | | |1 = No-event-wake-up event occurred, cleared by write 1 to USBD_INTSTS[3]. |
| kadonotakashi | 0:8fdf9a60065b | 147 | * |[4] |SOFIF |Start of Frame Interrupt Status |
| kadonotakashi | 0:8fdf9a60065b | 148 | * | | |0 = SOF event does not occur. |
| kadonotakashi | 0:8fdf9a60065b | 149 | * | | |1 = SOF event occurred, cleared by write 1 to USBD_INTSTS[4]. |
| kadonotakashi | 0:8fdf9a60065b | 150 | * |[16] |EPEVT0 |Endpoint 0's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 151 | * | | |0 = No event occurred in endpoint 0. |
| kadonotakashi | 0:8fdf9a60065b | 152 | * | | |1 = USB event occurred on Endpoint 0, check USBD_EPSTS0[3:0] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[16] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 153 | * |[17] |EPEVT1 |Endpoint 1's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 154 | * | | |0 = No event occurred in endpoint 1. |
| kadonotakashi | 0:8fdf9a60065b | 155 | * | | |1 = USB event occurred on Endpoint 1, check USBD_EPSTS0[7:4] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[17] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 156 | * |[18] |EPEVT2 |Endpoint 2's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 157 | * | | |0 = No event occurred in endpoint 2. |
| kadonotakashi | 0:8fdf9a60065b | 158 | * | | |1 = USB event occurred on Endpoint 2, check USBD_EPSTS0[11:8] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[18] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 159 | * |[19] |EPEVT3 |Endpoint 3's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 160 | * | | |0 = No event occurred in endpoint 3. |
| kadonotakashi | 0:8fdf9a60065b | 161 | * | | |1 = USB event occurred on Endpoint 3, check USBD_EPSTS0[15:12] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[19] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 162 | * |[20] |EPEVT4 |Endpoint 4's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 163 | * | | |0 = No event occurred in endpoint 4. |
| kadonotakashi | 0:8fdf9a60065b | 164 | * | | |1 = USB event occurred on Endpoint 4, check USBD_EPSTS0[19:16] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[20] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 165 | * |[21] |EPEVT5 |Endpoint 5's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 166 | * | | |0 = No event occurred in endpoint 5. |
| kadonotakashi | 0:8fdf9a60065b | 167 | * | | |1 = USB event occurred on Endpoint 5, check USBD_EPSTS0[23:20] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[21] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 168 | * |[22] |EPEVT6 |Endpoint 6's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 169 | * | | |0 = No event occurred in endpoint 6. |
| kadonotakashi | 0:8fdf9a60065b | 170 | * | | |1 = USB event occurred on Endpoint 6, check USBD_EPSTS0[27:24] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[22] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 171 | * |[23] |EPEVT7 |Endpoint 7's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 172 | * | | |0 = No event occurred in endpoint 7. |
| kadonotakashi | 0:8fdf9a60065b | 173 | * | | |1 = USB event occurred on Endpoint 7, check USBD_EPSTS0[31:28] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[23] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 174 | * |[24] |EPEVT8 |Endpoint 8's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 175 | * | | |0 = No event occurred in endpoint 8. |
| kadonotakashi | 0:8fdf9a60065b | 176 | * | | |1 = USB event occurred on Endpoint 8, check USBD_EPSTS1[3:0] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[24] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 177 | * |[25] |EPEVT9 |Endpoint 9's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 178 | * | | |0 = No event occurred in endpoint 9. |
| kadonotakashi | 0:8fdf9a60065b | 179 | * | | |1 = USB event occurred on Endpoint 9, check USBD_EPSTS1[7:4] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[25] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 180 | * |[26] |EPEVT10 |Endpoint 10's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 181 | * | | |0 = No event occurred in endpoint 10. |
| kadonotakashi | 0:8fdf9a60065b | 182 | * | | |1 = USB event occurred on Endpoint 10, check USBD_EPSTS1[11:8] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[26] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 183 | * |[27] |EPEVT11 |Endpoint 11's USB Event Status |
| kadonotakashi | 0:8fdf9a60065b | 184 | * | | |0 = No event occurred in endpoint 11. |
| kadonotakashi | 0:8fdf9a60065b | 185 | * | | |1 = USB event occurred on Endpoint 11, check USBD_EPSTS1[15:12] to know which kind of USB event was occurred, cleared by write 1 to USBD_INTSTS[27] or USBD_INTSTS[1]. |
| kadonotakashi | 0:8fdf9a60065b | 186 | * |[31] |SETUP |Setup Event Status |
| kadonotakashi | 0:8fdf9a60065b | 187 | * | | |0 = No Setup event. |
| kadonotakashi | 0:8fdf9a60065b | 188 | * | | |1 = Setup event occurred, cleared by write 1 to USBD_INTSTS[31]. |
| kadonotakashi | 0:8fdf9a60065b | 189 | * @var USBD_T::FADDR |
| kadonotakashi | 0:8fdf9a60065b | 190 | * Offset: 0x08 USB Device Function Address Register |
| kadonotakashi | 0:8fdf9a60065b | 191 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 192 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 193 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 194 | * |[6:0] |FADDR |USB Device Function Address |
| kadonotakashi | 0:8fdf9a60065b | 195 | * @var USBD_T::EPSTS |
| kadonotakashi | 0:8fdf9a60065b | 196 | * Offset: 0x0C USB Device Endpoint Status Register |
| kadonotakashi | 0:8fdf9a60065b | 197 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 198 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 199 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 200 | * |[7] |OV |Overrun |
| kadonotakashi | 0:8fdf9a60065b | 201 | * | | |It indicates that the received data is over the maximum payload number or not. |
| kadonotakashi | 0:8fdf9a60065b | 202 | * | | |0 = No overrun. |
| kadonotakashi | 0:8fdf9a60065b | 203 | * | | |1 = Out Data is more than the Max Payload in MXPLD register or the Setup Data is more than 8 Bytes. |
| kadonotakashi | 0:8fdf9a60065b | 204 | * @var USBD_T::ATTR |
| kadonotakashi | 0:8fdf9a60065b | 205 | * Offset: 0x10 USB Device Bus Status and Attribution Register |
| kadonotakashi | 0:8fdf9a60065b | 206 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 207 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 208 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 209 | * |[0] |USBRST |USB Reset Status |
| kadonotakashi | 0:8fdf9a60065b | 210 | * | | |0 = Bus no reset. |
| kadonotakashi | 0:8fdf9a60065b | 211 | * | | |1 = Bus reset when SE0 (single-ended 0) more than 2.5us. |
| kadonotakashi | 0:8fdf9a60065b | 212 | * | | |Note: This bit is read only. |
| kadonotakashi | 0:8fdf9a60065b | 213 | * |[1] |SUSPEND |Suspend Status |
| kadonotakashi | 0:8fdf9a60065b | 214 | * | | |0 = Bus no suspend. |
| kadonotakashi | 0:8fdf9a60065b | 215 | * | | |1 = Bus idle more than 3ms, either cable is plugged off or host is sleeping. |
| kadonotakashi | 0:8fdf9a60065b | 216 | * | | |Note: This bit is read only. |
| kadonotakashi | 0:8fdf9a60065b | 217 | * |[2] |RESUME |Resume Status |
| kadonotakashi | 0:8fdf9a60065b | 218 | * | | |0 = No bus resume. |
| kadonotakashi | 0:8fdf9a60065b | 219 | * | | |1 = Resume from suspend. |
| kadonotakashi | 0:8fdf9a60065b | 220 | * | | |Note: This bit is read only. |
| kadonotakashi | 0:8fdf9a60065b | 221 | * |[3] |TOUT |Time-out Status |
| kadonotakashi | 0:8fdf9a60065b | 222 | * | | |0 = No time-out. |
| kadonotakashi | 0:8fdf9a60065b | 223 | * | | |1 = No Bus response more than 18 bits time. |
| kadonotakashi | 0:8fdf9a60065b | 224 | * | | |Note: This bit is read only. |
| kadonotakashi | 0:8fdf9a60065b | 225 | * |[4] |PHYEN |PHY Transceiver Function Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 226 | * | | |0 = PHY transceiver function Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 227 | * | | |1 = PHY transceiver function Enabled. |
| kadonotakashi | 0:8fdf9a60065b | 228 | * |[5] |RWAKEUP |Remote Wake-up |
| kadonotakashi | 0:8fdf9a60065b | 229 | * | | |0 = Release the USB bus from K state. |
| kadonotakashi | 0:8fdf9a60065b | 230 | * | | |1 = Force USB bus to K (USB_D+ low, USB_D-: high) state, used for remote wake-up. |
| kadonotakashi | 0:8fdf9a60065b | 231 | * |[7] |USBEN |USB Controller Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 232 | * | | |0 = USB Controller Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 233 | * | | |1 = USB Controller Enabled. |
| kadonotakashi | 0:8fdf9a60065b | 234 | * |[8] |DPPUEN |Pull-up Resistor on USB_DP Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 235 | * | | |0 = Pull-up resistor in USB_D+ bus Disabled. |
| kadonotakashi | 0:8fdf9a60065b | 236 | * | | |1 = Pull-up resistor in USB_D+ bus Active. |
| kadonotakashi | 0:8fdf9a60065b | 237 | * |[10] |BYTEM |CPU Access USB SRAM Size Mode Selection |
| kadonotakashi | 0:8fdf9a60065b | 238 | * | | |0 = Word mode: The size of the transfer from CPU to USB SRAM can be Word only. |
| kadonotakashi | 0:8fdf9a60065b | 239 | * | | |1 = Byte mode: The size of the transfer from CPU to USB SRAM can be Byte only. |
| kadonotakashi | 0:8fdf9a60065b | 240 | * |[11] |LPMACK |LPM Token Acknowledge Enable Bit |
| kadonotakashi | 0:8fdf9a60065b | 241 | * | | |The NYET/ACK will be returned only on a successful LPM transaction if no errors in both the EXT token and the LPM token and a valid bLinkState = 0001 (L1) is received, else ERROR and STALL will be returned automatically, respectively. |
| kadonotakashi | 0:8fdf9a60065b | 242 | * | | |0= the valid LPM Token will be NYET. |
| kadonotakashi | 0:8fdf9a60065b | 243 | * | | |1= the valid LPM Token will be ACK. |
| kadonotakashi | 0:8fdf9a60065b | 244 | * |[12] |L1SUSPEND |LPM L1 Suspend |
| kadonotakashi | 0:8fdf9a60065b | 245 | * | | |0 = Bus no L1 state suspend. |
| kadonotakashi | 0:8fdf9a60065b | 246 | * | | |1 = This bit is set by the hardware when LPM command to enter the L1 state is successfully received and acknowledged. |
| kadonotakashi | 0:8fdf9a60065b | 247 | * | | |Note: This bit is read only. |
| kadonotakashi | 0:8fdf9a60065b | 248 | * |[13] |L1RESUME |LPM L1 Resume |
| kadonotakashi | 0:8fdf9a60065b | 249 | * | | |0 = Bus no LPM L1 state resume. |
| kadonotakashi | 0:8fdf9a60065b | 250 | * | | |1 = LPM L1 state Resume from LPM L1 state suspend. |
| kadonotakashi | 0:8fdf9a60065b | 251 | * | | |Note: This bit is read only. |
| kadonotakashi | 0:8fdf9a60065b | 252 | * @var USBD_T::VBUSDET |
| kadonotakashi | 0:8fdf9a60065b | 253 | * Offset: 0x14 USB Device VBUS Detection Register |
| kadonotakashi | 0:8fdf9a60065b | 254 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 255 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 256 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 257 | * |[0] |VBUSDET |Device VBUS Detection |
| kadonotakashi | 0:8fdf9a60065b | 258 | * | | |0 = Controller is not attached to the USB host. |
| kadonotakashi | 0:8fdf9a60065b | 259 | * | | |1 = Controller is attached to the USB host. |
| kadonotakashi | 0:8fdf9a60065b | 260 | * @var USBD_T::STBUFSEG |
| kadonotakashi | 0:8fdf9a60065b | 261 | * Offset: 0x18 SETUP Token Buffer Segmentation Register |
| kadonotakashi | 0:8fdf9a60065b | 262 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 263 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 264 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 265 | * |[8:3] |STBUFSEG |SETUP Token Buffer Segmentation |
| kadonotakashi | 0:8fdf9a60065b | 266 | * | | |It is used to indicate the offset address for the SETUP token with the USB Device SRAM starting address The effective starting address is |
| kadonotakashi | 0:8fdf9a60065b | 267 | * | | |USBD_SRAM address + {STBUFSEG, 3'b000} |
| kadonotakashi | 0:8fdf9a60065b | 268 | * | | |Where the USBD_SRAM address = USBD_BA+0x100h. |
| kadonotakashi | 0:8fdf9a60065b | 269 | * | | |Note: It is used for SETUP token only. |
| kadonotakashi | 0:8fdf9a60065b | 270 | * @var USBD_T::EPSTS0 |
| kadonotakashi | 0:8fdf9a60065b | 271 | * Offset: 0x20 USB Device Endpoint Status Register 0 |
| kadonotakashi | 0:8fdf9a60065b | 272 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 273 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 274 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 275 | * |[3:0] |EPSTS0 |Endpoint 0 Status |
| kadonotakashi | 0:8fdf9a60065b | 276 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 277 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 278 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 279 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 280 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 281 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 282 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 283 | * |[7:4] |EPSTS1 |Endpoint 1 Status |
| kadonotakashi | 0:8fdf9a60065b | 284 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 285 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 286 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 287 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 288 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 289 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 290 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 291 | * |[11:8] |EPSTS2 |Endpoint 2 Status |
| kadonotakashi | 0:8fdf9a60065b | 292 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 293 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 294 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 295 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 296 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 297 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 298 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 299 | * |[15:12] |EPSTS3 |Endpoint 3 Status |
| kadonotakashi | 0:8fdf9a60065b | 300 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 301 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 302 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 303 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 304 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 305 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 306 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 307 | * |[19:16] |EPSTS4 |Endpoint 4 Status |
| kadonotakashi | 0:8fdf9a60065b | 308 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 309 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 310 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 311 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 312 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 313 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 314 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 315 | * |[23:20] |EPSTS5 |Endpoint 5 Status |
| kadonotakashi | 0:8fdf9a60065b | 316 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 317 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 318 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 319 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 320 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 321 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 322 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 323 | * |[27:24] |EPSTS6 |Endpoint 6 Status |
| kadonotakashi | 0:8fdf9a60065b | 324 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 325 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 326 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 327 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 328 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 329 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 330 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 331 | * |[31:28] |EPSTS7 |Endpoint 7 Status |
| kadonotakashi | 0:8fdf9a60065b | 332 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 333 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 334 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 335 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 336 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 337 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 338 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 339 | * @var USBD_T::EPSTS1 |
| kadonotakashi | 0:8fdf9a60065b | 340 | * Offset: 0x24 USB Device Endpoint Status Register 1 |
| kadonotakashi | 0:8fdf9a60065b | 341 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 342 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 343 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 344 | * |[3:0] |EPSTS8 |Endpoint 8 Status |
| kadonotakashi | 0:8fdf9a60065b | 345 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 346 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 347 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 348 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 349 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 350 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 351 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 352 | * |[7:4] |EPSTS9 |Endpoint 9 Status |
| kadonotakashi | 0:8fdf9a60065b | 353 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 354 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 355 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 356 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 357 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 358 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 359 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 360 | * |[11:8] |EPSTS10 |Endpoint 10 Status |
| kadonotakashi | 0:8fdf9a60065b | 361 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 362 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 363 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 364 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 365 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 366 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 367 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 368 | * |[15:12] |EPSTS11 |Endpoint 11 Status |
| kadonotakashi | 0:8fdf9a60065b | 369 | * | | |These bits are used to indicate the current status of this endpoint |
| kadonotakashi | 0:8fdf9a60065b | 370 | * | | |0000 = In ACK. |
| kadonotakashi | 0:8fdf9a60065b | 371 | * | | |0001 = In NAK. |
| kadonotakashi | 0:8fdf9a60065b | 372 | * | | |0010 = Out Packet Data0 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 373 | * | | |0011 = Setup ACK. |
| kadonotakashi | 0:8fdf9a60065b | 374 | * | | |0110 = Out Packet Data1 ACK. |
| kadonotakashi | 0:8fdf9a60065b | 375 | * | | |0111 = Isochronous transfer end. |
| kadonotakashi | 0:8fdf9a60065b | 376 | * @var USBD_T::LPMATTR |
| kadonotakashi | 0:8fdf9a60065b | 377 | * Offset: 0x88 USB LPM Attribution Register |
| kadonotakashi | 0:8fdf9a60065b | 378 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 379 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 380 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 381 | * |[3:0] |LPMLINKSTS|LPM Link State |
| kadonotakashi | 0:8fdf9a60065b | 382 | * | | |These bits contain the bLinkState received with last ACK LPM Token |
| kadonotakashi | 0:8fdf9a60065b | 383 | * | | |0000 = Reserve. |
| kadonotakashi | 0:8fdf9a60065b | 384 | * | | |0001 = L1 (Sleep). |
| kadonotakashi | 0:8fdf9a60065b | 385 | * | | |0010 - 1111 = Reserve. |
| kadonotakashi | 0:8fdf9a60065b | 386 | * |[7:4] |LPMBESL |LPM Best Effort Service Latency |
| kadonotakashi | 0:8fdf9a60065b | 387 | * | | |These bits contain the BESL value received with last ACK LPM Token |
| kadonotakashi | 0:8fdf9a60065b | 388 | * | | |0000 = 125us. |
| kadonotakashi | 0:8fdf9a60065b | 389 | * | | |0001 = 150us. |
| kadonotakashi | 0:8fdf9a60065b | 390 | * | | |0010 = 200us. |
| kadonotakashi | 0:8fdf9a60065b | 391 | * | | |0011 = 300us. |
| kadonotakashi | 0:8fdf9a60065b | 392 | * | | |0100 = 400us. |
| kadonotakashi | 0:8fdf9a60065b | 393 | * | | |0101 = 500us. |
| kadonotakashi | 0:8fdf9a60065b | 394 | * | | |0110 = 1000us. |
| kadonotakashi | 0:8fdf9a60065b | 395 | * | | |0111 = 2000us. |
| kadonotakashi | 0:8fdf9a60065b | 396 | * | | |1000 = 3000us. |
| kadonotakashi | 0:8fdf9a60065b | 397 | * | | |1001 = 4000us. |
| kadonotakashi | 0:8fdf9a60065b | 398 | * | | |1010 = 5000us. |
| kadonotakashi | 0:8fdf9a60065b | 399 | * | | |1011 = 6000us. |
| kadonotakashi | 0:8fdf9a60065b | 400 | * | | |1100 = 7000us. |
| kadonotakashi | 0:8fdf9a60065b | 401 | * | | |1101 = 8000us. |
| kadonotakashi | 0:8fdf9a60065b | 402 | * | | |1110 = 9000us. |
| kadonotakashi | 0:8fdf9a60065b | 403 | * | | |1111 = 10000us. |
| kadonotakashi | 0:8fdf9a60065b | 404 | * |[8] |LPMRWAKUP |LPM Remote Wakeup |
| kadonotakashi | 0:8fdf9a60065b | 405 | * | | |This bit contains the bRemoteWake value received with last ACK LPM Token |
| kadonotakashi | 0:8fdf9a60065b | 406 | * @var USBD_T::FN |
| kadonotakashi | 0:8fdf9a60065b | 407 | * Offset: 0x8C USB Frame number Register |
| kadonotakashi | 0:8fdf9a60065b | 408 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 409 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 410 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 411 | * |[10:0] |FN |Frame Number |
| kadonotakashi | 0:8fdf9a60065b | 412 | * | | |These bits contain the 11-bits frame number in the last received SOF packet. |
| kadonotakashi | 0:8fdf9a60065b | 413 | * @var USBD_T::SE0 |
| kadonotakashi | 0:8fdf9a60065b | 414 | * Offset: 0x90 USB Device Drive SE0 Control Register |
| kadonotakashi | 0:8fdf9a60065b | 415 | * --------------------------------------------------------------------------------------------------- |
| kadonotakashi | 0:8fdf9a60065b | 416 | * |Bits |Field |Descriptions |
| kadonotakashi | 0:8fdf9a60065b | 417 | * | :----: | :----: | :---- | |
| kadonotakashi | 0:8fdf9a60065b | 418 | * |[0] |SE0 |Drive Single Ended Zero in USB Bus |
| kadonotakashi | 0:8fdf9a60065b | 419 | * | | |The Single Ended Zero (SE0) is when both lines (USB_D+ and USB_D-) are being pulled low. |
| kadonotakashi | 0:8fdf9a60065b | 420 | * | | |0 = Normal operation. |
| kadonotakashi | 0:8fdf9a60065b | 421 | * | | |1 = Force USB PHY transceiver to drive SE0. |
| kadonotakashi | 0:8fdf9a60065b | 422 | */ |
| kadonotakashi | 0:8fdf9a60065b | 423 | |
| kadonotakashi | 0:8fdf9a60065b | 424 | __IO uint32_t INTEN; /*!< [0x0000] USB Device Interrupt Enable Register */ |
| kadonotakashi | 0:8fdf9a60065b | 425 | __IO uint32_t INTSTS; /*!< [0x0004] USB Device Interrupt Event Status Register */ |
| kadonotakashi | 0:8fdf9a60065b | 426 | __IO uint32_t FADDR; /*!< [0x0008] USB Device Function Address Register */ |
| kadonotakashi | 0:8fdf9a60065b | 427 | __I uint32_t EPSTS; /*!< [0x000c] USB Device Endpoint Status Register */ |
| kadonotakashi | 0:8fdf9a60065b | 428 | __IO uint32_t ATTR; /*!< [0x0010] USB Device Bus Status and Attribution Register */ |
| kadonotakashi | 0:8fdf9a60065b | 429 | __I uint32_t VBUSDET; /*!< [0x0014] USB Device VBUS Detection Register */ |
| kadonotakashi | 0:8fdf9a60065b | 430 | __IO uint32_t STBUFSEG; /*!< [0x0018] SETUP Token Buffer Segmentation Register */ |
| kadonotakashi | 0:8fdf9a60065b | 431 | __I uint32_t RESERVE0[1]; |
| kadonotakashi | 0:8fdf9a60065b | 432 | __I uint32_t EPSTS0; /*!< [0x0020] USB Device Endpoint Status Register 0 */ |
| kadonotakashi | 0:8fdf9a60065b | 433 | __I uint32_t EPSTS1; /*!< [0x0024] USB Device Endpoint Status Register 1 */ |
| kadonotakashi | 0:8fdf9a60065b | 434 | __I uint32_t RESERVE1[24]; |
| kadonotakashi | 0:8fdf9a60065b | 435 | __I uint32_t LPMATTR; /*!< [0x0088] USB LPM Attribution Register */ |
| kadonotakashi | 0:8fdf9a60065b | 436 | __I uint32_t FN; /*!< [0x008c] USB Frame number Register */ |
| kadonotakashi | 0:8fdf9a60065b | 437 | __IO uint32_t SE0; /*!< [0x0090] USB Device Drive SE0 Control Register */ |
| kadonotakashi | 0:8fdf9a60065b | 438 | __I uint32_t RESERVE2[283]; |
| kadonotakashi | 0:8fdf9a60065b | 439 | USBD_EP_T EP[12]; /*!< [0x500~0x5bc] USB End Point 0 ~ 11 Configuration Register */ |
| kadonotakashi | 0:8fdf9a60065b | 440 | |
| kadonotakashi | 0:8fdf9a60065b | 441 | } USBD_T; |
| kadonotakashi | 0:8fdf9a60065b | 442 | |
| kadonotakashi | 0:8fdf9a60065b | 443 | /** |
| kadonotakashi | 0:8fdf9a60065b | 444 | @addtogroup USBD_CONST USBD Bit Field Definition |
| kadonotakashi | 0:8fdf9a60065b | 445 | Constant Definitions for USBD Controller |
| kadonotakashi | 0:8fdf9a60065b | 446 | @{ */ |
| kadonotakashi | 0:8fdf9a60065b | 447 | |
| kadonotakashi | 0:8fdf9a60065b | 448 | #define USBD_INTEN_BUSIEN_Pos (0) /*!< USBD_T::INTEN: BUSIEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 449 | #define USBD_INTEN_BUSIEN_Msk (0x1ul << USBD_INTEN_BUSIEN_Pos) /*!< USBD_T::INTEN: BUSIEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 450 | |
| kadonotakashi | 0:8fdf9a60065b | 451 | #define USBD_INTEN_USBIEN_Pos (1) /*!< USBD_T::INTEN: USBIEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 452 | #define USBD_INTEN_USBIEN_Msk (0x1ul << USBD_INTEN_USBIEN_Pos) /*!< USBD_T::INTEN: USBIEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 453 | |
| kadonotakashi | 0:8fdf9a60065b | 454 | #define USBD_INTEN_VBDETIEN_Pos (2) /*!< USBD_T::INTEN: VBDETIEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 455 | #define USBD_INTEN_VBDETIEN_Msk (0x1ul << USBD_INTEN_VBDETIEN_Pos) /*!< USBD_T::INTEN: VBDETIEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 456 | |
| kadonotakashi | 0:8fdf9a60065b | 457 | #define USBD_INTEN_NEVWKIEN_Pos (3) /*!< USBD_T::INTEN: NEVWKIEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 458 | #define USBD_INTEN_NEVWKIEN_Msk (0x1ul << USBD_INTEN_NEVWKIEN_Pos) /*!< USBD_T::INTEN: NEVWKIEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 459 | |
| kadonotakashi | 0:8fdf9a60065b | 460 | #define USBD_INTEN_SOFIEN_Pos (4) /*!< USBD_T::INTEN: SOFIEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 461 | #define USBD_INTEN_SOFIEN_Msk (0x1ul << USBD_INTEN_SOFIEN_Pos) /*!< USBD_T::INTEN: SOFIEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 462 | |
| kadonotakashi | 0:8fdf9a60065b | 463 | #define USBD_INTEN_WKEN_Pos (8) /*!< USBD_T::INTEN: WKEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 464 | #define USBD_INTEN_WKEN_Msk (0x1ul << USBD_INTEN_WKEN_Pos) /*!< USBD_T::INTEN: WKEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 465 | |
| kadonotakashi | 0:8fdf9a60065b | 466 | #define USBD_INTEN_INNAKEN_Pos (15) /*!< USBD_T::INTEN: INNAKEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 467 | #define USBD_INTEN_INNAKEN_Msk (0x1ul << USBD_INTEN_INNAKEN_Pos) /*!< USBD_T::INTEN: INNAKEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 468 | |
| kadonotakashi | 0:8fdf9a60065b | 469 | #define USBD_INTSTS_BUSIF_Pos (0) /*!< USBD_T::INTSTS: BUSIF Position */ |
| kadonotakashi | 0:8fdf9a60065b | 470 | #define USBD_INTSTS_BUSIF_Msk (0x1ul << USBD_INTSTS_BUSIF_Pos) /*!< USBD_T::INTSTS: BUSIF Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 471 | |
| kadonotakashi | 0:8fdf9a60065b | 472 | #define USBD_INTSTS_USBIF_Pos (1) /*!< USBD_T::INTSTS: USBIF Position */ |
| kadonotakashi | 0:8fdf9a60065b | 473 | #define USBD_INTSTS_USBIF_Msk (0x1ul << USBD_INTSTS_USBIF_Pos) /*!< USBD_T::INTSTS: USBIF Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 474 | |
| kadonotakashi | 0:8fdf9a60065b | 475 | #define USBD_INTSTS_VBDETIF_Pos (2) /*!< USBD_T::INTSTS: VBDETIF Position */ |
| kadonotakashi | 0:8fdf9a60065b | 476 | #define USBD_INTSTS_VBDETIF_Msk (0x1ul << USBD_INTSTS_VBDETIF_Pos) /*!< USBD_T::INTSTS: VBDETIF Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 477 | |
| kadonotakashi | 0:8fdf9a60065b | 478 | #define USBD_INTSTS_NEVWKIF_Pos (3) /*!< USBD_T::INTSTS: NEVWKIF Position */ |
| kadonotakashi | 0:8fdf9a60065b | 479 | #define USBD_INTSTS_NEVWKIF_Msk (0x1ul << USBD_INTSTS_NEVWKIF_Pos) /*!< USBD_T::INTSTS: NEVWKIF Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 480 | |
| kadonotakashi | 0:8fdf9a60065b | 481 | #define USBD_INTSTS_SOFIF_Pos (4) /*!< USBD_T::INTSTS: SOFIF Position */ |
| kadonotakashi | 0:8fdf9a60065b | 482 | #define USBD_INTSTS_SOFIF_Msk (0x1ul << USBD_INTSTS_SOFIF_Pos) /*!< USBD_T::INTSTS: SOFIF Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 483 | |
| kadonotakashi | 0:8fdf9a60065b | 484 | #define USBD_INTSTS_EPEVT0_Pos (16) /*!< USBD_T::INTSTS: EPEVT0 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 485 | #define USBD_INTSTS_EPEVT0_Msk (0x1ul << USBD_INTSTS_EPEVT0_Pos) /*!< USBD_T::INTSTS: EPEVT0 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 486 | |
| kadonotakashi | 0:8fdf9a60065b | 487 | #define USBD_INTSTS_EPEVT1_Pos (17) /*!< USBD_T::INTSTS: EPEVT1 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 488 | #define USBD_INTSTS_EPEVT1_Msk (0x1ul << USBD_INTSTS_EPEVT1_Pos) /*!< USBD_T::INTSTS: EPEVT1 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 489 | |
| kadonotakashi | 0:8fdf9a60065b | 490 | #define USBD_INTSTS_EPEVT2_Pos (18) /*!< USBD_T::INTSTS: EPEVT2 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 491 | #define USBD_INTSTS_EPEVT2_Msk (0x1ul << USBD_INTSTS_EPEVT2_Pos) /*!< USBD_T::INTSTS: EPEVT2 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 492 | |
| kadonotakashi | 0:8fdf9a60065b | 493 | #define USBD_INTSTS_EPEVT3_Pos (19) /*!< USBD_T::INTSTS: EPEVT3 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 494 | #define USBD_INTSTS_EPEVT3_Msk (0x1ul << USBD_INTSTS_EPEVT3_Pos) /*!< USBD_T::INTSTS: EPEVT3 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 495 | |
| kadonotakashi | 0:8fdf9a60065b | 496 | #define USBD_INTSTS_EPEVT4_Pos (20) /*!< USBD_T::INTSTS: EPEVT4 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 497 | #define USBD_INTSTS_EPEVT4_Msk (0x1ul << USBD_INTSTS_EPEVT4_Pos) /*!< USBD_T::INTSTS: EPEVT4 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 498 | |
| kadonotakashi | 0:8fdf9a60065b | 499 | #define USBD_INTSTS_EPEVT5_Pos (21) /*!< USBD_T::INTSTS: EPEVT5 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 500 | #define USBD_INTSTS_EPEVT5_Msk (0x1ul << USBD_INTSTS_EPEVT5_Pos) /*!< USBD_T::INTSTS: EPEVT5 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 501 | |
| kadonotakashi | 0:8fdf9a60065b | 502 | #define USBD_INTSTS_EPEVT6_Pos (22) /*!< USBD_T::INTSTS: EPEVT6 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 503 | #define USBD_INTSTS_EPEVT6_Msk (0x1ul << USBD_INTSTS_EPEVT6_Pos) /*!< USBD_T::INTSTS: EPEVT6 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 504 | |
| kadonotakashi | 0:8fdf9a60065b | 505 | #define USBD_INTSTS_EPEVT7_Pos (23) /*!< USBD_T::INTSTS: EPEVT7 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 506 | #define USBD_INTSTS_EPEVT7_Msk (0x1ul << USBD_INTSTS_EPEVT7_Pos) /*!< USBD_T::INTSTS: EPEVT7 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 507 | |
| kadonotakashi | 0:8fdf9a60065b | 508 | #define USBD_INTSTS_EPEVT8_Pos (24) /*!< USBD_T::INTSTS: EPEVT8 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 509 | #define USBD_INTSTS_EPEVT8_Msk (0x1ul << USBD_INTSTS_EPEVT8_Pos) /*!< USBD_T::INTSTS: EPEVT8 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 510 | |
| kadonotakashi | 0:8fdf9a60065b | 511 | #define USBD_INTSTS_EPEVT9_Pos (25) /*!< USBD_T::INTSTS: EPEVT9 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 512 | #define USBD_INTSTS_EPEVT9_Msk (0x1ul << USBD_INTSTS_EPEVT9_Pos) /*!< USBD_T::INTSTS: EPEVT9 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 513 | |
| kadonotakashi | 0:8fdf9a60065b | 514 | #define USBD_INTSTS_EPEVT10_Pos (26) /*!< USBD_T::INTSTS: EPEVT10 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 515 | #define USBD_INTSTS_EPEVT10_Msk (0x1ul << USBD_INTSTS_EPEVT10_Pos) /*!< USBD_T::INTSTS: EPEVT10 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 516 | |
| kadonotakashi | 0:8fdf9a60065b | 517 | #define USBD_INTSTS_EPEVT11_Pos (27) /*!< USBD_T::INTSTS: EPEVT11 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 518 | #define USBD_INTSTS_EPEVT11_Msk (0x1ul << USBD_INTSTS_EPEVT11_Pos) /*!< USBD_T::INTSTS: EPEVT11 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 519 | |
| kadonotakashi | 0:8fdf9a60065b | 520 | #define USBD_INTSTS_SETUP_Pos (31) /*!< USBD_T::INTSTS: SETUP Position */ |
| kadonotakashi | 0:8fdf9a60065b | 521 | #define USBD_INTSTS_SETUP_Msk (0x1ul << USBD_INTSTS_SETUP_Pos) /*!< USBD_T::INTSTS: SETUP Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 522 | |
| kadonotakashi | 0:8fdf9a60065b | 523 | #define USBD_FADDR_FADDR_Pos (0) /*!< USBD_T::FADDR: FADDR Position */ |
| kadonotakashi | 0:8fdf9a60065b | 524 | #define USBD_FADDR_FADDR_Msk (0x7ful << USBD_FADDR_FADDR_Pos) /*!< USBD_T::FADDR: FADDR Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 525 | |
| kadonotakashi | 0:8fdf9a60065b | 526 | #define USBD_EPSTS_OV_Pos (7) /*!< USBD_T::EPSTS: OV Position */ |
| kadonotakashi | 0:8fdf9a60065b | 527 | #define USBD_EPSTS_OV_Msk (0x1ul << USBD_EPSTS_OV_Pos) /*!< USBD_T::EPSTS: OV Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 528 | |
| kadonotakashi | 0:8fdf9a60065b | 529 | #define USBD_ATTR_USBRST_Pos (0) /*!< USBD_T::ATTR: USBRST Position */ |
| kadonotakashi | 0:8fdf9a60065b | 530 | #define USBD_ATTR_USBRST_Msk (0x1ul << USBD_ATTR_USBRST_Pos) /*!< USBD_T::ATTR: USBRST Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 531 | |
| kadonotakashi | 0:8fdf9a60065b | 532 | #define USBD_ATTR_SUSPEND_Pos (1) /*!< USBD_T::ATTR: SUSPEND Position */ |
| kadonotakashi | 0:8fdf9a60065b | 533 | #define USBD_ATTR_SUSPEND_Msk (0x1ul << USBD_ATTR_SUSPEND_Pos) /*!< USBD_T::ATTR: SUSPEND Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 534 | |
| kadonotakashi | 0:8fdf9a60065b | 535 | #define USBD_ATTR_RESUME_Pos (2) /*!< USBD_T::ATTR: RESUME Position */ |
| kadonotakashi | 0:8fdf9a60065b | 536 | #define USBD_ATTR_RESUME_Msk (0x1ul << USBD_ATTR_RESUME_Pos) /*!< USBD_T::ATTR: RESUME Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 537 | |
| kadonotakashi | 0:8fdf9a60065b | 538 | #define USBD_ATTR_TOUT_Pos (3) /*!< USBD_T::ATTR: TOUT Position */ |
| kadonotakashi | 0:8fdf9a60065b | 539 | #define USBD_ATTR_TOUT_Msk (0x1ul << USBD_ATTR_TOUT_Pos) /*!< USBD_T::ATTR: TOUT Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 540 | |
| kadonotakashi | 0:8fdf9a60065b | 541 | #define USBD_ATTR_PHYEN_Pos (4) /*!< USBD_T::ATTR: PHYEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 542 | #define USBD_ATTR_PHYEN_Msk (0x1ul << USBD_ATTR_PHYEN_Pos) /*!< USBD_T::ATTR: PHYEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 543 | |
| kadonotakashi | 0:8fdf9a60065b | 544 | #define USBD_ATTR_RWAKEUP_Pos (5) /*!< USBD_T::ATTR: RWAKEUP Position */ |
| kadonotakashi | 0:8fdf9a60065b | 545 | #define USBD_ATTR_RWAKEUP_Msk (0x1ul << USBD_ATTR_RWAKEUP_Pos) /*!< USBD_T::ATTR: RWAKEUP Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 546 | |
| kadonotakashi | 0:8fdf9a60065b | 547 | #define USBD_ATTR_USBEN_Pos (7) /*!< USBD_T::ATTR: USBEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 548 | #define USBD_ATTR_USBEN_Msk (0x1ul << USBD_ATTR_USBEN_Pos) /*!< USBD_T::ATTR: USBEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 549 | |
| kadonotakashi | 0:8fdf9a60065b | 550 | #define USBD_ATTR_DPPUEN_Pos (8) /*!< USBD_T::ATTR: DPPUEN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 551 | #define USBD_ATTR_DPPUEN_Msk (0x1ul << USBD_ATTR_DPPUEN_Pos) /*!< USBD_T::ATTR: DPPUEN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 552 | |
| kadonotakashi | 0:8fdf9a60065b | 553 | #define USBD_ATTR_BYTEM_Pos (10) /*!< USBD_T::ATTR: BYTEM Position */ |
| kadonotakashi | 0:8fdf9a60065b | 554 | #define USBD_ATTR_BYTEM_Msk (0x1ul << USBD_ATTR_BYTEM_Pos) /*!< USBD_T::ATTR: BYTEM Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 555 | |
| kadonotakashi | 0:8fdf9a60065b | 556 | #define USBD_ATTR_LPMACK_Pos (11) /*!< USBD_T::ATTR: LPMACK Position */ |
| kadonotakashi | 0:8fdf9a60065b | 557 | #define USBD_ATTR_LPMACK_Msk (0x1ul << USBD_ATTR_LPMACK_Pos) /*!< USBD_T::ATTR: LPMACK Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 558 | |
| kadonotakashi | 0:8fdf9a60065b | 559 | #define USBD_ATTR_L1SUSPEND_Pos (12) /*!< USBD_T::ATTR: L1SUSPEND Position */ |
| kadonotakashi | 0:8fdf9a60065b | 560 | #define USBD_ATTR_L1SUSPEND_Msk (0x1ul << USBD_ATTR_L1SUSPEND_Pos) /*!< USBD_T::ATTR: L1SUSPEND Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 561 | |
| kadonotakashi | 0:8fdf9a60065b | 562 | #define USBD_ATTR_L1RESUME_Pos (13) /*!< USBD_T::ATTR: L1RESUME Position */ |
| kadonotakashi | 0:8fdf9a60065b | 563 | #define USBD_ATTR_L1RESUME_Msk (0x1ul << USBD_ATTR_L1RESUME_Pos) /*!< USBD_T::ATTR: L1RESUME Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 564 | |
| kadonotakashi | 0:8fdf9a60065b | 565 | #define USBD_VBUSDET_VBUSDET_Pos (0) /*!< USBD_T::VBUSDET: VBUSDET Position */ |
| kadonotakashi | 0:8fdf9a60065b | 566 | #define USBD_VBUSDET_VBUSDET_Msk (0x1ul << USBD_VBUSDET_VBUSDET_Pos) /*!< USBD_T::VBUSDET: VBUSDET Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 567 | |
| kadonotakashi | 0:8fdf9a60065b | 568 | #define USBD_STBUFSEG_STBUFSEG_Pos (3) /*!< USBD_T::STBUFSEG: STBUFSEG Position */ |
| kadonotakashi | 0:8fdf9a60065b | 569 | #define USBD_STBUFSEG_STBUFSEG_Msk (0x3ful << USBD_STBUFSEG_STBUFSEG_Pos) /*!< USBD_T::STBUFSEG: STBUFSEG Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 570 | |
| kadonotakashi | 0:8fdf9a60065b | 571 | #define USBD_EPSTS0_EPSTS0_Pos (0) /*!< USBD_T::EPSTS0: EPSTS0 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 572 | #define USBD_EPSTS0_EPSTS0_Msk (0xful << USBD_EPSTS0_EPSTS0_Pos) /*!< USBD_T::EPSTS0: EPSTS0 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 573 | |
| kadonotakashi | 0:8fdf9a60065b | 574 | #define USBD_EPSTS0_EPSTS1_Pos (4) /*!< USBD_T::EPSTS0: EPSTS1 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 575 | #define USBD_EPSTS0_EPSTS1_Msk (0xful << USBD_EPSTS0_EPSTS1_Pos) /*!< USBD_T::EPSTS0: EPSTS1 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 576 | |
| kadonotakashi | 0:8fdf9a60065b | 577 | #define USBD_EPSTS0_EPSTS2_Pos (8) /*!< USBD_T::EPSTS0: EPSTS2 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 578 | #define USBD_EPSTS0_EPSTS2_Msk (0xful << USBD_EPSTS0_EPSTS2_Pos) /*!< USBD_T::EPSTS0: EPSTS2 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 579 | |
| kadonotakashi | 0:8fdf9a60065b | 580 | #define USBD_EPSTS0_EPSTS3_Pos (12) /*!< USBD_T::EPSTS0: EPSTS3 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 581 | #define USBD_EPSTS0_EPSTS3_Msk (0xful << USBD_EPSTS0_EPSTS3_Pos) /*!< USBD_T::EPSTS0: EPSTS3 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 582 | |
| kadonotakashi | 0:8fdf9a60065b | 583 | #define USBD_EPSTS0_EPSTS4_Pos (16) /*!< USBD_T::EPSTS0: EPSTS4 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 584 | #define USBD_EPSTS0_EPSTS4_Msk (0xful << USBD_EPSTS0_EPSTS4_Pos) /*!< USBD_T::EPSTS0: EPSTS4 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 585 | |
| kadonotakashi | 0:8fdf9a60065b | 586 | #define USBD_EPSTS0_EPSTS5_Pos (20) /*!< USBD_T::EPSTS0: EPSTS5 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 587 | #define USBD_EPSTS0_EPSTS5_Msk (0xful << USBD_EPSTS0_EPSTS5_Pos) /*!< USBD_T::EPSTS0: EPSTS5 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 588 | |
| kadonotakashi | 0:8fdf9a60065b | 589 | #define USBD_EPSTS0_EPSTS6_Pos (24) /*!< USBD_T::EPSTS0: EPSTS6 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 590 | #define USBD_EPSTS0_EPSTS6_Msk (0xful << USBD_EPSTS0_EPSTS6_Pos) /*!< USBD_T::EPSTS0: EPSTS6 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 591 | |
| kadonotakashi | 0:8fdf9a60065b | 592 | #define USBD_EPSTS0_EPSTS7_Pos (28) /*!< USBD_T::EPSTS0: EPSTS7 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 593 | #define USBD_EPSTS0_EPSTS7_Msk (0xful << USBD_EPSTS0_EPSTS7_Pos) /*!< USBD_T::EPSTS0: EPSTS7 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 594 | |
| kadonotakashi | 0:8fdf9a60065b | 595 | #define USBD_EPSTS1_EPSTS8_Pos (0) /*!< USBD_T::EPSTS1: EPSTS8 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 596 | #define USBD_EPSTS1_EPSTS8_Msk (0xful << USBD_EPSTS1_EPSTS8_Pos) /*!< USBD_T::EPSTS1: EPSTS8 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 597 | |
| kadonotakashi | 0:8fdf9a60065b | 598 | #define USBD_EPSTS1_EPSTS9_Pos (4) /*!< USBD_T::EPSTS1: EPSTS9 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 599 | #define USBD_EPSTS1_EPSTS9_Msk (0xful << USBD_EPSTS1_EPSTS9_Pos) /*!< USBD_T::EPSTS1: EPSTS9 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 600 | |
| kadonotakashi | 0:8fdf9a60065b | 601 | #define USBD_EPSTS1_EPSTS10_Pos (8) /*!< USBD_T::EPSTS1: EPSTS10 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 602 | #define USBD_EPSTS1_EPSTS10_Msk (0xful << USBD_EPSTS1_EPSTS10_Pos) /*!< USBD_T::EPSTS1: EPSTS10 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 603 | |
| kadonotakashi | 0:8fdf9a60065b | 604 | #define USBD_EPSTS1_EPSTS11_Pos (12) /*!< USBD_T::EPSTS1: EPSTS11 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 605 | #define USBD_EPSTS1_EPSTS11_Msk (0xful << USBD_EPSTS1_EPSTS11_Pos) /*!< USBD_T::EPSTS1: EPSTS11 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 606 | |
| kadonotakashi | 0:8fdf9a60065b | 607 | #define USBD_LPMATTR_LPMLINKSTS_Pos (0) /*!< USBD_T::LPMATTR: LPMLINKSTS Position */ |
| kadonotakashi | 0:8fdf9a60065b | 608 | #define USBD_LPMATTR_LPMLINKSTS_Msk (0xful << USBD_LPMATTR_LPMLINKSTS_Pos) /*!< USBD_T::LPMATTR: LPMLINKSTS Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 609 | |
| kadonotakashi | 0:8fdf9a60065b | 610 | #define USBD_LPMATTR_LPMBESL_Pos (4) /*!< USBD_T::LPMATTR: LPMBESL Position */ |
| kadonotakashi | 0:8fdf9a60065b | 611 | #define USBD_LPMATTR_LPMBESL_Msk (0xful << USBD_LPMATTR_LPMBESL_Pos) /*!< USBD_T::LPMATTR: LPMBESL Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 612 | |
| kadonotakashi | 0:8fdf9a60065b | 613 | #define USBD_LPMATTR_LPMRWAKUP_Pos (8) /*!< USBD_T::LPMATTR: LPMRWAKUP Position */ |
| kadonotakashi | 0:8fdf9a60065b | 614 | #define USBD_LPMATTR_LPMRWAKUP_Msk (0x1ul << USBD_LPMATTR_LPMRWAKUP_Pos) /*!< USBD_T::LPMATTR: LPMRWAKUP Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 615 | |
| kadonotakashi | 0:8fdf9a60065b | 616 | #define USBD_FN_FN_Pos (0) /*!< USBD_T::FN: FN Position */ |
| kadonotakashi | 0:8fdf9a60065b | 617 | #define USBD_FN_FN_Msk (0x7fful << USBD_FN_FN_Pos) /*!< USBD_T::FN: FN Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 618 | |
| kadonotakashi | 0:8fdf9a60065b | 619 | #define USBD_SE0_SE0_Pos (0) /*!< USBD_T::SE0: SE0 Position */ |
| kadonotakashi | 0:8fdf9a60065b | 620 | #define USBD_SE0_SE0_Msk (0x1ul << USBD_SE0_SE0_Pos) /*!< USBD_T::SE0: SE0 Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 621 | |
| kadonotakashi | 0:8fdf9a60065b | 622 | #define USBD_BUFSEG_BUFSEG_Pos (3) /*!< USBD_EP_T::BUFSEG: BUFSEG Position */ |
| kadonotakashi | 0:8fdf9a60065b | 623 | #define USBD_BUFSEG_BUFSEG_Msk (0x3ful << USBD_BUFSEG_BUFSEG_Pos) /*!< USBD_EP_T::BUFSEG: BUFSEG Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 624 | |
| kadonotakashi | 0:8fdf9a60065b | 625 | #define USBD_MXPLD_MXPLD_Pos (0) /*!< USBD_EP_T::MXPLD: MXPLD Position */ |
| kadonotakashi | 0:8fdf9a60065b | 626 | #define USBD_MXPLD_MXPLD_Msk (0x1fful << USBD_MXPLD_MXPLD_Pos) /*!< USBD_EP_T::MXPLD: MXPLD Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 627 | |
| kadonotakashi | 0:8fdf9a60065b | 628 | #define USBD_CFG_EPNUM_Pos (0) /*!< USBD_EP_T::CFG: EPNUM Position */ |
| kadonotakashi | 0:8fdf9a60065b | 629 | #define USBD_CFG_EPNUM_Msk (0xful << USBD_CFG_EPNUM_Pos) /*!< USBD_EP_T::CFG: EPNUM Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 630 | |
| kadonotakashi | 0:8fdf9a60065b | 631 | #define USBD_CFG_ISOCH_Pos (4) /*!< USBD_EP_T::CFG: ISOCH Position */ |
| kadonotakashi | 0:8fdf9a60065b | 632 | #define USBD_CFG_ISOCH_Msk (0x1ul << USBD_CFG_ISOCH_Pos) /*!< USBD_EP_T::CFG: ISOCH Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 633 | |
| kadonotakashi | 0:8fdf9a60065b | 634 | #define USBD_CFG_STATE_Pos (5) /*!< USBD_EP_T::CFG: STATE Position */ |
| kadonotakashi | 0:8fdf9a60065b | 635 | #define USBD_CFG_STATE_Msk (0x3ul << USBD_CFG_STATE_Pos) /*!< USBD_EP_T::CFG: STATE Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 636 | |
| kadonotakashi | 0:8fdf9a60065b | 637 | #define USBD_CFG_DSQSYNC_Pos (7) /*!< USBD_EP_T::CFG: DSQSYNC Position */ |
| kadonotakashi | 0:8fdf9a60065b | 638 | #define USBD_CFG_DSQSYNC_Msk (0x1ul << USBD_CFG_DSQSYNC_Pos) /*!< USBD_EP_T::CFG: DSQSYNC Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 639 | |
| kadonotakashi | 0:8fdf9a60065b | 640 | #define USBD_CFG_CSTALL_Pos (9) /*!< USBD_EP_T::CFG: CSTALL Position */ |
| kadonotakashi | 0:8fdf9a60065b | 641 | #define USBD_CFG_CSTALL_Msk (0x1ul << USBD_CFG_CSTALL_Pos) /*!< USBD_EP_T::CFG: CSTALL Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 642 | |
| kadonotakashi | 0:8fdf9a60065b | 643 | #define USBD_CFGP_CLRRDY_Pos (0) /*!< USBD_EP_T::CFGP: CLRRDY Position */ |
| kadonotakashi | 0:8fdf9a60065b | 644 | #define USBD_CFGP_CLRRDY_Msk (0x1ul << USBD_CFGP_CLRRDY_Pos) /*!< USBD_EP_T::CFGP: CLRRDY Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 645 | |
| kadonotakashi | 0:8fdf9a60065b | 646 | #define USBD_CFGP_SSTALL_Pos (1) /*!< USBD_EP_T::CFGP: SSTALL Position */ |
| kadonotakashi | 0:8fdf9a60065b | 647 | #define USBD_CFGP_SSTALL_Msk (0x1ul << USBD_CFGP_SSTALL_Pos) /*!< USBD_EP_T::CFGP: SSTALL Mask */ |
| kadonotakashi | 0:8fdf9a60065b | 648 | |
| kadonotakashi | 0:8fdf9a60065b | 649 | |
| kadonotakashi | 0:8fdf9a60065b | 650 | /**@}*/ /* USBD_CONST */ |
| kadonotakashi | 0:8fdf9a60065b | 651 | /**@}*/ /* end of USBD register group */ |
| kadonotakashi | 0:8fdf9a60065b | 652 | |
| kadonotakashi | 0:8fdf9a60065b | 653 | |
| kadonotakashi | 0:8fdf9a60065b | 654 | |
| kadonotakashi | 0:8fdf9a60065b | 655 | #endif /* __USBD_REG_H__ */ |