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Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466
mbed-os/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/peripheral_clock_defines.h@0:8fdf9a60065b, 2018-10-10 (annotated)
- Committer:
- kadonotakashi
- Date:
- Wed Oct 10 00:33:53 2018 +0000
- Revision:
- 0:8fdf9a60065b
how to make mbed librry
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
kadonotakashi | 0:8fdf9a60065b | 1 | /* |
kadonotakashi | 0:8fdf9a60065b | 2 | * Copyright (c) 2016, Freescale Semiconductor, Inc. |
kadonotakashi | 0:8fdf9a60065b | 3 | * All rights reserved. |
kadonotakashi | 0:8fdf9a60065b | 4 | * |
kadonotakashi | 0:8fdf9a60065b | 5 | * Redistribution and use in source and binary forms, with or without modification, |
kadonotakashi | 0:8fdf9a60065b | 6 | * are permitted provided that the following conditions are met: |
kadonotakashi | 0:8fdf9a60065b | 7 | * |
kadonotakashi | 0:8fdf9a60065b | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
kadonotakashi | 0:8fdf9a60065b | 9 | * of conditions and the following disclaimer. |
kadonotakashi | 0:8fdf9a60065b | 10 | * |
kadonotakashi | 0:8fdf9a60065b | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
kadonotakashi | 0:8fdf9a60065b | 12 | * list of conditions and the following disclaimer in the documentation and/or |
kadonotakashi | 0:8fdf9a60065b | 13 | * other materials provided with the distribution. |
kadonotakashi | 0:8fdf9a60065b | 14 | * |
kadonotakashi | 0:8fdf9a60065b | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
kadonotakashi | 0:8fdf9a60065b | 16 | * contributors may be used to endorse or promote products derived from this |
kadonotakashi | 0:8fdf9a60065b | 17 | * software without specific prior written permission. |
kadonotakashi | 0:8fdf9a60065b | 18 | * |
kadonotakashi | 0:8fdf9a60065b | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
kadonotakashi | 0:8fdf9a60065b | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
kadonotakashi | 0:8fdf9a60065b | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
kadonotakashi | 0:8fdf9a60065b | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
kadonotakashi | 0:8fdf9a60065b | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
kadonotakashi | 0:8fdf9a60065b | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
kadonotakashi | 0:8fdf9a60065b | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
kadonotakashi | 0:8fdf9a60065b | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
kadonotakashi | 0:8fdf9a60065b | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
kadonotakashi | 0:8fdf9a60065b | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
kadonotakashi | 0:8fdf9a60065b | 29 | */ |
kadonotakashi | 0:8fdf9a60065b | 30 | |
kadonotakashi | 0:8fdf9a60065b | 31 | #ifndef _FSL_PERIPHERAL_CLOCK_H_ |
kadonotakashi | 0:8fdf9a60065b | 32 | #define _FSL_PERIPHERAL_CLOCK_H_ |
kadonotakashi | 0:8fdf9a60065b | 33 | |
kadonotakashi | 0:8fdf9a60065b | 34 | #include "fsl_clock.h" |
kadonotakashi | 0:8fdf9a60065b | 35 | |
kadonotakashi | 0:8fdf9a60065b | 36 | /* Array for UART module clocks */ |
kadonotakashi | 0:8fdf9a60065b | 37 | #define UART_CLOCK_FREQS \ |
kadonotakashi | 0:8fdf9a60065b | 38 | { \ |
kadonotakashi | 0:8fdf9a60065b | 39 | kCLOCK_IpInvalid, kCLOCK_IpInvalid, UART2_CLK_SRC \ |
kadonotakashi | 0:8fdf9a60065b | 40 | } |
kadonotakashi | 0:8fdf9a60065b | 41 | |
kadonotakashi | 0:8fdf9a60065b | 42 | /* Array for LPUART module clocks */ |
kadonotakashi | 0:8fdf9a60065b | 43 | #define LPUART_CLOCK_FREQS \ |
kadonotakashi | 0:8fdf9a60065b | 44 | { \ |
kadonotakashi | 0:8fdf9a60065b | 45 | kCLOCK_McgIrc48MClk, kCLOCK_McgIrc48MClk \ |
kadonotakashi | 0:8fdf9a60065b | 46 | } |
kadonotakashi | 0:8fdf9a60065b | 47 | |
kadonotakashi | 0:8fdf9a60065b | 48 | /* Array for I2C module clocks */ |
kadonotakashi | 0:8fdf9a60065b | 49 | #define I2C_CLOCK_FREQS \ |
kadonotakashi | 0:8fdf9a60065b | 50 | { \ |
kadonotakashi | 0:8fdf9a60065b | 51 | I2C0_CLK_SRC, I2C1_CLK_SRC \ |
kadonotakashi | 0:8fdf9a60065b | 52 | } |
kadonotakashi | 0:8fdf9a60065b | 53 | |
kadonotakashi | 0:8fdf9a60065b | 54 | /* Array for DSPI module clocks */ |
kadonotakashi | 0:8fdf9a60065b | 55 | #define SPI_CLOCK_FREQS \ |
kadonotakashi | 0:8fdf9a60065b | 56 | { \ |
kadonotakashi | 0:8fdf9a60065b | 57 | SPI0_CLK_SRC, SPI1_CLK_SRC \ |
kadonotakashi | 0:8fdf9a60065b | 58 | } |
kadonotakashi | 0:8fdf9a60065b | 59 | |
kadonotakashi | 0:8fdf9a60065b | 60 | #endif /* _FSL_PERIPHERAL_CLOCK_H_ */ |