takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_smc.h@0:8fdf9a60065b, 2018-10-10 (annotated)

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

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kadonotakashi 0:8fdf9a60065b 1 /*
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
kadonotakashi 0:8fdf9a60065b 3 * All rights reserved.
kadonotakashi 0:8fdf9a60065b 4 *
kadonotakashi 0:8fdf9a60065b 5 * Redistribution and use in source and binary forms, with or without modification,
kadonotakashi 0:8fdf9a60065b 6 * are permitted provided that the following conditions are met:
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * o Redistributions of source code must retain the above copyright notice, this list
kadonotakashi 0:8fdf9a60065b 9 * of conditions and the following disclaimer.
kadonotakashi 0:8fdf9a60065b 10 *
kadonotakashi 0:8fdf9a60065b 11 * o Redistributions in binary form must reproduce the above copyright notice, this
kadonotakashi 0:8fdf9a60065b 12 * list of conditions and the following disclaimer in the documentation and/or
kadonotakashi 0:8fdf9a60065b 13 * other materials provided with the distribution.
kadonotakashi 0:8fdf9a60065b 14 *
kadonotakashi 0:8fdf9a60065b 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
kadonotakashi 0:8fdf9a60065b 16 * contributors may be used to endorse or promote products derived from this
kadonotakashi 0:8fdf9a60065b 17 * software without specific prior written permission.
kadonotakashi 0:8fdf9a60065b 18 *
kadonotakashi 0:8fdf9a60065b 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
kadonotakashi 0:8fdf9a60065b 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
kadonotakashi 0:8fdf9a60065b 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
kadonotakashi 0:8fdf9a60065b 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
kadonotakashi 0:8fdf9a60065b 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
kadonotakashi 0:8fdf9a60065b 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
kadonotakashi 0:8fdf9a60065b 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
kadonotakashi 0:8fdf9a60065b 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
kadonotakashi 0:8fdf9a60065b 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
kadonotakashi 0:8fdf9a60065b 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
kadonotakashi 0:8fdf9a60065b 29 */
kadonotakashi 0:8fdf9a60065b 30
kadonotakashi 0:8fdf9a60065b 31 #ifndef _FSL_SMC_H_
kadonotakashi 0:8fdf9a60065b 32 #define _FSL_SMC_H_
kadonotakashi 0:8fdf9a60065b 33
kadonotakashi 0:8fdf9a60065b 34 #include "fsl_common.h"
kadonotakashi 0:8fdf9a60065b 35
kadonotakashi 0:8fdf9a60065b 36 /*! @addtogroup smc */
kadonotakashi 0:8fdf9a60065b 37 /*! @{ */
kadonotakashi 0:8fdf9a60065b 38
kadonotakashi 0:8fdf9a60065b 39 /*! @file */
kadonotakashi 0:8fdf9a60065b 40
kadonotakashi 0:8fdf9a60065b 41 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 42 * Definitions
kadonotakashi 0:8fdf9a60065b 43 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 44
kadonotakashi 0:8fdf9a60065b 45 /*! @name Driver version */
kadonotakashi 0:8fdf9a60065b 46 /*@{*/
kadonotakashi 0:8fdf9a60065b 47 /*! @brief SMC driver version 2.0.1. */
kadonotakashi 0:8fdf9a60065b 48 #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
kadonotakashi 0:8fdf9a60065b 49 /*@}*/
kadonotakashi 0:8fdf9a60065b 50
kadonotakashi 0:8fdf9a60065b 51 /*!
kadonotakashi 0:8fdf9a60065b 52 * @brief Power Modes Protection
kadonotakashi 0:8fdf9a60065b 53 */
kadonotakashi 0:8fdf9a60065b 54 typedef enum _smc_power_mode_protection
kadonotakashi 0:8fdf9a60065b 55 {
kadonotakashi 0:8fdf9a60065b 56 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 57 kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */
kadonotakashi 0:8fdf9a60065b 58 #endif
kadonotakashi 0:8fdf9a60065b 59 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 60 kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */
kadonotakashi 0:8fdf9a60065b 61 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kadonotakashi 0:8fdf9a60065b 62 kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */
kadonotakashi 0:8fdf9a60065b 63 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kadonotakashi 0:8fdf9a60065b 64 kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */
kadonotakashi 0:8fdf9a60065b 65 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kadonotakashi 0:8fdf9a60065b 66 kSMC_AllowPowerModeAll = (0U
kadonotakashi 0:8fdf9a60065b 67 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 68 |
kadonotakashi 0:8fdf9a60065b 69 SMC_PMPROT_AVLLS_MASK
kadonotakashi 0:8fdf9a60065b 70 #endif
kadonotakashi 0:8fdf9a60065b 71 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 72 |
kadonotakashi 0:8fdf9a60065b 73 SMC_PMPROT_ALLS_MASK
kadonotakashi 0:8fdf9a60065b 74 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kadonotakashi 0:8fdf9a60065b 75 |
kadonotakashi 0:8fdf9a60065b 76 SMC_PMPROT_AVLP_MASK
kadonotakashi 0:8fdf9a60065b 77 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kadonotakashi 0:8fdf9a60065b 78 |
kadonotakashi 0:8fdf9a60065b 79 kSMC_AllowPowerModeHsrun
kadonotakashi 0:8fdf9a60065b 80 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kadonotakashi 0:8fdf9a60065b 81 ) /*!< Allow all power mode. */
kadonotakashi 0:8fdf9a60065b 82 } smc_power_mode_protection_t;
kadonotakashi 0:8fdf9a60065b 83
kadonotakashi 0:8fdf9a60065b 84 /*!
kadonotakashi 0:8fdf9a60065b 85 * @brief Power Modes in PMSTAT
kadonotakashi 0:8fdf9a60065b 86 */
kadonotakashi 0:8fdf9a60065b 87 typedef enum _smc_power_state
kadonotakashi 0:8fdf9a60065b 88 {
kadonotakashi 0:8fdf9a60065b 89 kSMC_PowerStateRun = 0x01U << 0U, /*!< 0000_0001 - Current power mode is RUN */
kadonotakashi 0:8fdf9a60065b 90 kSMC_PowerStateStop = 0x01U << 1U, /*!< 0000_0010 - Current power mode is STOP */
kadonotakashi 0:8fdf9a60065b 91 kSMC_PowerStateVlpr = 0x01U << 2U, /*!< 0000_0100 - Current power mode is VLPR */
kadonotakashi 0:8fdf9a60065b 92 kSMC_PowerStateVlpw = 0x01U << 3U, /*!< 0000_1000 - Current power mode is VLPW */
kadonotakashi 0:8fdf9a60065b 93 kSMC_PowerStateVlps = 0x01U << 4U, /*!< 0001_0000 - Current power mode is VLPS */
kadonotakashi 0:8fdf9a60065b 94 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 95 kSMC_PowerStateLls = 0x01U << 5U, /*!< 0010_0000 - Current power mode is LLS */
kadonotakashi 0:8fdf9a60065b 96 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kadonotakashi 0:8fdf9a60065b 97 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 98 kSMC_PowerStateVlls = 0x01U << 6U, /*!< 0100_0000 - Current power mode is VLLS */
kadonotakashi 0:8fdf9a60065b 99 #endif
kadonotakashi 0:8fdf9a60065b 100 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kadonotakashi 0:8fdf9a60065b 101 kSMC_PowerStateHsrun = 0x01U << 7U /*!< 1000_0000 - Current power mode is HSRUN */
kadonotakashi 0:8fdf9a60065b 102 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kadonotakashi 0:8fdf9a60065b 103 } smc_power_state_t;
kadonotakashi 0:8fdf9a60065b 104
kadonotakashi 0:8fdf9a60065b 105 /*!
kadonotakashi 0:8fdf9a60065b 106 * @brief Run mode definition
kadonotakashi 0:8fdf9a60065b 107 */
kadonotakashi 0:8fdf9a60065b 108 typedef enum _smc_run_mode
kadonotakashi 0:8fdf9a60065b 109 {
kadonotakashi 0:8fdf9a60065b 110 kSMC_RunNormal = 0U, /*!< normal RUN mode. */
kadonotakashi 0:8fdf9a60065b 111 kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */
kadonotakashi 0:8fdf9a60065b 112 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kadonotakashi 0:8fdf9a60065b 113 kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */
kadonotakashi 0:8fdf9a60065b 114 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kadonotakashi 0:8fdf9a60065b 115 } smc_run_mode_t;
kadonotakashi 0:8fdf9a60065b 116
kadonotakashi 0:8fdf9a60065b 117 /*!
kadonotakashi 0:8fdf9a60065b 118 * @brief Stop mode definition
kadonotakashi 0:8fdf9a60065b 119 */
kadonotakashi 0:8fdf9a60065b 120 typedef enum _smc_stop_mode
kadonotakashi 0:8fdf9a60065b 121 {
kadonotakashi 0:8fdf9a60065b 122 kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
kadonotakashi 0:8fdf9a60065b 123 kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */
kadonotakashi 0:8fdf9a60065b 124 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 125 kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */
kadonotakashi 0:8fdf9a60065b 126 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kadonotakashi 0:8fdf9a60065b 127 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 128 kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */
kadonotakashi 0:8fdf9a60065b 129 #endif
kadonotakashi 0:8fdf9a60065b 130 } smc_stop_mode_t;
kadonotakashi 0:8fdf9a60065b 131
kadonotakashi 0:8fdf9a60065b 132 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \
kadonotakashi 0:8fdf9a60065b 133 (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \
kadonotakashi 0:8fdf9a60065b 134 (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
kadonotakashi 0:8fdf9a60065b 135 /*!
kadonotakashi 0:8fdf9a60065b 136 * @brief VLLS/LLS stop sub mode definition
kadonotakashi 0:8fdf9a60065b 137 */
kadonotakashi 0:8fdf9a60065b 138 typedef enum _smc_stop_submode
kadonotakashi 0:8fdf9a60065b 139 {
kadonotakashi 0:8fdf9a60065b 140 kSMC_StopSub0 = 0U, /*!< Stop submode 0, for VLLS0/LLS0. */
kadonotakashi 0:8fdf9a60065b 141 kSMC_StopSub1 = 1U, /*!< Stop submode 1, for VLLS1/LLS1. */
kadonotakashi 0:8fdf9a60065b 142 kSMC_StopSub2 = 2U, /*!< Stop submode 2, for VLLS2/LLS2. */
kadonotakashi 0:8fdf9a60065b 143 kSMC_StopSub3 = 3U /*!< Stop submode 3, for VLLS3/LLS3. */
kadonotakashi 0:8fdf9a60065b 144 } smc_stop_submode_t;
kadonotakashi 0:8fdf9a60065b 145 #endif
kadonotakashi 0:8fdf9a60065b 146
kadonotakashi 0:8fdf9a60065b 147 /*!
kadonotakashi 0:8fdf9a60065b 148 * @brief Partial STOP option
kadonotakashi 0:8fdf9a60065b 149 */
kadonotakashi 0:8fdf9a60065b 150 typedef enum _smc_partial_stop_mode
kadonotakashi 0:8fdf9a60065b 151 {
kadonotakashi 0:8fdf9a60065b 152 kSMC_PartialStop = 0U, /*!< STOP - Normal Stop mode*/
kadonotakashi 0:8fdf9a60065b 153 kSMC_PartialStop1 = 1U, /*!< Partial Stop with both system and bus clocks disabled*/
kadonotakashi 0:8fdf9a60065b 154 kSMC_PartialStop2 = 2U, /*!< Partial Stop with system clock disabled and bus clock enabled*/
kadonotakashi 0:8fdf9a60065b 155 } smc_partial_stop_option_t;
kadonotakashi 0:8fdf9a60065b 156
kadonotakashi 0:8fdf9a60065b 157 /*!
kadonotakashi 0:8fdf9a60065b 158 * @brief SMC configuration status
kadonotakashi 0:8fdf9a60065b 159 */
kadonotakashi 0:8fdf9a60065b 160 enum _smc_status
kadonotakashi 0:8fdf9a60065b 161 {
kadonotakashi 0:8fdf9a60065b 162 kStatus_SMC_StopAbort = MAKE_STATUS(kStatusGroup_POWER, 0) /*!< Entering Stop mode is abort*/
kadonotakashi 0:8fdf9a60065b 163 };
kadonotakashi 0:8fdf9a60065b 164
kadonotakashi 0:8fdf9a60065b 165 #if (defined(FSL_FEATURE_SMC_HAS_VERID) && FSL_FEATURE_SMC_HAS_VERID)
kadonotakashi 0:8fdf9a60065b 166 /*!
kadonotakashi 0:8fdf9a60065b 167 * @brief IP version ID definition.
kadonotakashi 0:8fdf9a60065b 168 */
kadonotakashi 0:8fdf9a60065b 169 typedef struct _smc_version_id
kadonotakashi 0:8fdf9a60065b 170 {
kadonotakashi 0:8fdf9a60065b 171 uint16_t feature; /*!< Feature Specification Number. */
kadonotakashi 0:8fdf9a60065b 172 uint8_t minor; /*!< Minor version number. */
kadonotakashi 0:8fdf9a60065b 173 uint8_t major; /*!< Major version number. */
kadonotakashi 0:8fdf9a60065b 174 } smc_version_id_t;
kadonotakashi 0:8fdf9a60065b 175 #endif /* FSL_FEATURE_SMC_HAS_VERID */
kadonotakashi 0:8fdf9a60065b 176
kadonotakashi 0:8fdf9a60065b 177 #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
kadonotakashi 0:8fdf9a60065b 178 /*!
kadonotakashi 0:8fdf9a60065b 179 * @brief IP parameter definition.
kadonotakashi 0:8fdf9a60065b 180 */
kadonotakashi 0:8fdf9a60065b 181 typedef struct _smc_param
kadonotakashi 0:8fdf9a60065b 182 {
kadonotakashi 0:8fdf9a60065b 183 bool hsrunEnable; /*!< HSRUN mode enable. */
kadonotakashi 0:8fdf9a60065b 184 bool llsEnable; /*!< LLS mode enable. */
kadonotakashi 0:8fdf9a60065b 185 bool lls2Enable; /*!< LLS2 mode enable. */
kadonotakashi 0:8fdf9a60065b 186 bool vlls0Enable; /*!< VLLS0 mode enable. */
kadonotakashi 0:8fdf9a60065b 187 } smc_param_t;
kadonotakashi 0:8fdf9a60065b 188 #endif /* FSL_FEATURE_SMC_HAS_PARAM */
kadonotakashi 0:8fdf9a60065b 189
kadonotakashi 0:8fdf9a60065b 190 #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
kadonotakashi 0:8fdf9a60065b 191 (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
kadonotakashi 0:8fdf9a60065b 192 /*!
kadonotakashi 0:8fdf9a60065b 193 * @brief SMC Low-Leakage Stop power mode config
kadonotakashi 0:8fdf9a60065b 194 */
kadonotakashi 0:8fdf9a60065b 195 typedef struct _smc_power_mode_lls_config
kadonotakashi 0:8fdf9a60065b 196 {
kadonotakashi 0:8fdf9a60065b 197 #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
kadonotakashi 0:8fdf9a60065b 198 smc_stop_submode_t subMode; /*!< Low-leakage Stop sub-mode */
kadonotakashi 0:8fdf9a60065b 199 #endif
kadonotakashi 0:8fdf9a60065b 200 #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
kadonotakashi 0:8fdf9a60065b 201 bool enableLpoClock; /*!< Enable LPO clock in LLS mode */
kadonotakashi 0:8fdf9a60065b 202 #endif
kadonotakashi 0:8fdf9a60065b 203 } smc_power_mode_lls_config_t;
kadonotakashi 0:8fdf9a60065b 204 #endif /* (FSL_FEATURE_SMC_HAS_LLS_SUBMODE || FSL_FEATURE_SMC_HAS_LPOPO) */
kadonotakashi 0:8fdf9a60065b 205
kadonotakashi 0:8fdf9a60065b 206 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 207 /*!
kadonotakashi 0:8fdf9a60065b 208 * @brief SMC Very Low-Leakage Stop power mode config
kadonotakashi 0:8fdf9a60065b 209 */
kadonotakashi 0:8fdf9a60065b 210 typedef struct _smc_power_mode_vlls_config
kadonotakashi 0:8fdf9a60065b 211 {
kadonotakashi 0:8fdf9a60065b 212 #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) || \
kadonotakashi 0:8fdf9a60065b 213 (defined(FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) && FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM) || \
kadonotakashi 0:8fdf9a60065b 214 (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
kadonotakashi 0:8fdf9a60065b 215 smc_stop_submode_t subMode; /*!< Very Low-leakage Stop sub-mode */
kadonotakashi 0:8fdf9a60065b 216 #endif
kadonotakashi 0:8fdf9a60065b 217 #if (defined(FSL_FEATURE_SMC_HAS_PORPO) && FSL_FEATURE_SMC_HAS_PORPO)
kadonotakashi 0:8fdf9a60065b 218 bool enablePorDetectInVlls0; /*!< Enable Power on reset detect in VLLS mode */
kadonotakashi 0:8fdf9a60065b 219 #endif
kadonotakashi 0:8fdf9a60065b 220 #if (defined(FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION) && FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION)
kadonotakashi 0:8fdf9a60065b 221 bool enableRam2InVlls2; /*!< Enable RAM2 power in VLLS2 */
kadonotakashi 0:8fdf9a60065b 222 #endif
kadonotakashi 0:8fdf9a60065b 223 #if (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
kadonotakashi 0:8fdf9a60065b 224 bool enableLpoClock; /*!< Enable LPO clock in VLLS mode */
kadonotakashi 0:8fdf9a60065b 225 #endif
kadonotakashi 0:8fdf9a60065b 226 } smc_power_mode_vlls_config_t;
kadonotakashi 0:8fdf9a60065b 227 #endif
kadonotakashi 0:8fdf9a60065b 228
kadonotakashi 0:8fdf9a60065b 229 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 230 * API
kadonotakashi 0:8fdf9a60065b 231 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 232
kadonotakashi 0:8fdf9a60065b 233 #if defined(__cplusplus)
kadonotakashi 0:8fdf9a60065b 234 extern "C" {
kadonotakashi 0:8fdf9a60065b 235 #endif /* __cplusplus */
kadonotakashi 0:8fdf9a60065b 236
kadonotakashi 0:8fdf9a60065b 237 /*! @name System mode controller APIs*/
kadonotakashi 0:8fdf9a60065b 238 /*@{*/
kadonotakashi 0:8fdf9a60065b 239
kadonotakashi 0:8fdf9a60065b 240 #if (defined(FSL_FEATURE_SMC_HAS_VERID) && FSL_FEATURE_SMC_HAS_VERID)
kadonotakashi 0:8fdf9a60065b 241 /*!
kadonotakashi 0:8fdf9a60065b 242 * @brief Gets the SMC version ID.
kadonotakashi 0:8fdf9a60065b 243 *
kadonotakashi 0:8fdf9a60065b 244 * This function gets the SMC version ID, including major version number,
kadonotakashi 0:8fdf9a60065b 245 * minor version number and feature specification number.
kadonotakashi 0:8fdf9a60065b 246 *
kadonotakashi 0:8fdf9a60065b 247 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 248 * @param versionId Pointer to version ID structure.
kadonotakashi 0:8fdf9a60065b 249 */
kadonotakashi 0:8fdf9a60065b 250 static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
kadonotakashi 0:8fdf9a60065b 251 {
kadonotakashi 0:8fdf9a60065b 252 *((uint32_t *)versionId) = base->VERID;
kadonotakashi 0:8fdf9a60065b 253 }
kadonotakashi 0:8fdf9a60065b 254 #endif /* FSL_FEATURE_SMC_HAS_VERID */
kadonotakashi 0:8fdf9a60065b 255
kadonotakashi 0:8fdf9a60065b 256 #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
kadonotakashi 0:8fdf9a60065b 257 /*!
kadonotakashi 0:8fdf9a60065b 258 * @brief Gets the SMC parameter.
kadonotakashi 0:8fdf9a60065b 259 *
kadonotakashi 0:8fdf9a60065b 260 * This function gets the SMC parameter, including the enabled power mdoes.
kadonotakashi 0:8fdf9a60065b 261 *
kadonotakashi 0:8fdf9a60065b 262 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 263 * @param param Pointer to SMC param structure.
kadonotakashi 0:8fdf9a60065b 264 */
kadonotakashi 0:8fdf9a60065b 265 void SMC_GetParam(SMC_Type *base, smc_param_t *param);
kadonotakashi 0:8fdf9a60065b 266 #endif
kadonotakashi 0:8fdf9a60065b 267
kadonotakashi 0:8fdf9a60065b 268 /*!
kadonotakashi 0:8fdf9a60065b 269 * @brief Configures all power mode protection settings.
kadonotakashi 0:8fdf9a60065b 270 *
kadonotakashi 0:8fdf9a60065b 271 * This function configures the power mode protection settings for
kadonotakashi 0:8fdf9a60065b 272 * supported power modes in the specified chip family. The available power modes
kadonotakashi 0:8fdf9a60065b 273 * are defined in the smc_power_mode_protection_t. This should be done at an early
kadonotakashi 0:8fdf9a60065b 274 * system level initialization stage. See the reference manual for details.
kadonotakashi 0:8fdf9a60065b 275 * This register can only write once after the power reset.
kadonotakashi 0:8fdf9a60065b 276 *
kadonotakashi 0:8fdf9a60065b 277 * The allowed modes are passed as bit map, for example, to allow LLS and VLLS,
kadonotakashi 0:8fdf9a60065b 278 * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
kadonotakashi 0:8fdf9a60065b 279 * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
kadonotakashi 0:8fdf9a60065b 280 *
kadonotakashi 0:8fdf9a60065b 281 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 282 * @param allowedModes Bitmap of the allowed power modes.
kadonotakashi 0:8fdf9a60065b 283 */
kadonotakashi 0:8fdf9a60065b 284 static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedModes)
kadonotakashi 0:8fdf9a60065b 285 {
kadonotakashi 0:8fdf9a60065b 286 base->PMPROT = allowedModes;
kadonotakashi 0:8fdf9a60065b 287 }
kadonotakashi 0:8fdf9a60065b 288
kadonotakashi 0:8fdf9a60065b 289 /*!
kadonotakashi 0:8fdf9a60065b 290 * @brief Gets the current power mode status.
kadonotakashi 0:8fdf9a60065b 291 *
kadonotakashi 0:8fdf9a60065b 292 * This function returns the current power mode stat. Once application
kadonotakashi 0:8fdf9a60065b 293 * switches the power mode, it should always check the stat to check whether it
kadonotakashi 0:8fdf9a60065b 294 * runs into the specified mode or not. An application should check
kadonotakashi 0:8fdf9a60065b 295 * this mode before switching to a different mode. The system requires that
kadonotakashi 0:8fdf9a60065b 296 * only certain modes can switch to other specific modes. See the
kadonotakashi 0:8fdf9a60065b 297 * reference manual for details and the smc_power_state_t for information about
kadonotakashi 0:8fdf9a60065b 298 * the power stat.
kadonotakashi 0:8fdf9a60065b 299 *
kadonotakashi 0:8fdf9a60065b 300 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 301 * @return Current power mode status.
kadonotakashi 0:8fdf9a60065b 302 */
kadonotakashi 0:8fdf9a60065b 303 static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
kadonotakashi 0:8fdf9a60065b 304 {
kadonotakashi 0:8fdf9a60065b 305 return (smc_power_state_t)base->PMSTAT;
kadonotakashi 0:8fdf9a60065b 306 }
kadonotakashi 0:8fdf9a60065b 307
kadonotakashi 0:8fdf9a60065b 308 /*!
kadonotakashi 0:8fdf9a60065b 309 * @brief Configure the system to RUN power mode.
kadonotakashi 0:8fdf9a60065b 310 *
kadonotakashi 0:8fdf9a60065b 311 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 312 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 313 */
kadonotakashi 0:8fdf9a60065b 314 status_t SMC_SetPowerModeRun(SMC_Type *base);
kadonotakashi 0:8fdf9a60065b 315
kadonotakashi 0:8fdf9a60065b 316 #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kadonotakashi 0:8fdf9a60065b 317 /*!
kadonotakashi 0:8fdf9a60065b 318 * @brief Configure the system to HSRUN power mode.
kadonotakashi 0:8fdf9a60065b 319 *
kadonotakashi 0:8fdf9a60065b 320 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 321 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 322 */
kadonotakashi 0:8fdf9a60065b 323 status_t SMC_SetPowerModeHsrun(SMC_Type *base);
kadonotakashi 0:8fdf9a60065b 324 #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kadonotakashi 0:8fdf9a60065b 325
kadonotakashi 0:8fdf9a60065b 326 /*!
kadonotakashi 0:8fdf9a60065b 327 * @brief Configure the system to WAIT power mode.
kadonotakashi 0:8fdf9a60065b 328 *
kadonotakashi 0:8fdf9a60065b 329 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 330 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 331 */
kadonotakashi 0:8fdf9a60065b 332 status_t SMC_SetPowerModeWait(SMC_Type *base);
kadonotakashi 0:8fdf9a60065b 333
kadonotakashi 0:8fdf9a60065b 334 /*!
kadonotakashi 0:8fdf9a60065b 335 * @brief Configure the system to Stop power mode.
kadonotakashi 0:8fdf9a60065b 336 *
kadonotakashi 0:8fdf9a60065b 337 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 338 * @param option Partial Stop mode option.
kadonotakashi 0:8fdf9a60065b 339 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 340 */
kadonotakashi 0:8fdf9a60065b 341 status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
kadonotakashi 0:8fdf9a60065b 342
kadonotakashi 0:8fdf9a60065b 343 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
kadonotakashi 0:8fdf9a60065b 344 /*!
kadonotakashi 0:8fdf9a60065b 345 * @brief Configure the system to VLPR power mode.
kadonotakashi 0:8fdf9a60065b 346 *
kadonotakashi 0:8fdf9a60065b 347 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 348 * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
kadonotakashi 0:8fdf9a60065b 349 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 350 */
kadonotakashi 0:8fdf9a60065b 351 status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
kadonotakashi 0:8fdf9a60065b 352 #else
kadonotakashi 0:8fdf9a60065b 353 /*!
kadonotakashi 0:8fdf9a60065b 354 * @brief Configure the system to VLPR power mode.
kadonotakashi 0:8fdf9a60065b 355 *
kadonotakashi 0:8fdf9a60065b 356 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 357 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 358 */
kadonotakashi 0:8fdf9a60065b 359 status_t SMC_SetPowerModeVlpr(SMC_Type *base);
kadonotakashi 0:8fdf9a60065b 360 #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
kadonotakashi 0:8fdf9a60065b 361
kadonotakashi 0:8fdf9a60065b 362 /*!
kadonotakashi 0:8fdf9a60065b 363 * @brief Configure the system to VLPW power mode.
kadonotakashi 0:8fdf9a60065b 364 *
kadonotakashi 0:8fdf9a60065b 365 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 366 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 367 */
kadonotakashi 0:8fdf9a60065b 368 status_t SMC_SetPowerModeVlpw(SMC_Type *base);
kadonotakashi 0:8fdf9a60065b 369
kadonotakashi 0:8fdf9a60065b 370 /*!
kadonotakashi 0:8fdf9a60065b 371 * @brief Configure the system to VLPS power mode.
kadonotakashi 0:8fdf9a60065b 372 *
kadonotakashi 0:8fdf9a60065b 373 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 374 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 375 */
kadonotakashi 0:8fdf9a60065b 376 status_t SMC_SetPowerModeVlps(SMC_Type *base);
kadonotakashi 0:8fdf9a60065b 377
kadonotakashi 0:8fdf9a60065b 378 #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 379 #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
kadonotakashi 0:8fdf9a60065b 380 (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
kadonotakashi 0:8fdf9a60065b 381 /*!
kadonotakashi 0:8fdf9a60065b 382 * @brief Configure the system to LLS power mode.
kadonotakashi 0:8fdf9a60065b 383 *
kadonotakashi 0:8fdf9a60065b 384 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 385 * @param config The LLS power mode configuration structure
kadonotakashi 0:8fdf9a60065b 386 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 387 */
kadonotakashi 0:8fdf9a60065b 388 status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
kadonotakashi 0:8fdf9a60065b 389 #else
kadonotakashi 0:8fdf9a60065b 390 /*!
kadonotakashi 0:8fdf9a60065b 391 * @brief Configure the system to LLS power mode.
kadonotakashi 0:8fdf9a60065b 392 *
kadonotakashi 0:8fdf9a60065b 393 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 394 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 395 */
kadonotakashi 0:8fdf9a60065b 396 status_t SMC_SetPowerModeLls(SMC_Type *base);
kadonotakashi 0:8fdf9a60065b 397 #endif
kadonotakashi 0:8fdf9a60065b 398 #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kadonotakashi 0:8fdf9a60065b 399
kadonotakashi 0:8fdf9a60065b 400 #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kadonotakashi 0:8fdf9a60065b 401 /*!
kadonotakashi 0:8fdf9a60065b 402 * @brief Configure the system to VLLS power mode.
kadonotakashi 0:8fdf9a60065b 403 *
kadonotakashi 0:8fdf9a60065b 404 * @param base SMC peripheral base address.
kadonotakashi 0:8fdf9a60065b 405 * @param config The VLLS power mode configuration structure.
kadonotakashi 0:8fdf9a60065b 406 * @return SMC configuration error code.
kadonotakashi 0:8fdf9a60065b 407 */
kadonotakashi 0:8fdf9a60065b 408 status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config);
kadonotakashi 0:8fdf9a60065b 409 #endif /* FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE */
kadonotakashi 0:8fdf9a60065b 410
kadonotakashi 0:8fdf9a60065b 411 /*@}*/
kadonotakashi 0:8fdf9a60065b 412
kadonotakashi 0:8fdf9a60065b 413 #if defined(__cplusplus)
kadonotakashi 0:8fdf9a60065b 414 }
kadonotakashi 0:8fdf9a60065b 415 #endif /* __cplusplus */
kadonotakashi 0:8fdf9a60065b 416
kadonotakashi 0:8fdf9a60065b 417 /*! @}*/
kadonotakashi 0:8fdf9a60065b 418
kadonotakashi 0:8fdf9a60065b 419 #endif /* _FSL_SMC_H_ */