takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_gpio.c@0:8fdf9a60065b, 2018-10-10 (annotated)

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /*
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
kadonotakashi 0:8fdf9a60065b 3 * All rights reserved.
kadonotakashi 0:8fdf9a60065b 4 *
kadonotakashi 0:8fdf9a60065b 5 * Redistribution and use in source and binary forms, with or without modification,
kadonotakashi 0:8fdf9a60065b 6 * are permitted provided that the following conditions are met:
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * o Redistributions of source code must retain the above copyright notice, this list
kadonotakashi 0:8fdf9a60065b 9 * of conditions and the following disclaimer.
kadonotakashi 0:8fdf9a60065b 10 *
kadonotakashi 0:8fdf9a60065b 11 * o Redistributions in binary form must reproduce the above copyright notice, this
kadonotakashi 0:8fdf9a60065b 12 * list of conditions and the following disclaimer in the documentation and/or
kadonotakashi 0:8fdf9a60065b 13 * other materials provided with the distribution.
kadonotakashi 0:8fdf9a60065b 14 *
kadonotakashi 0:8fdf9a60065b 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
kadonotakashi 0:8fdf9a60065b 16 * contributors may be used to endorse or promote products derived from this
kadonotakashi 0:8fdf9a60065b 17 * software without specific prior written permission.
kadonotakashi 0:8fdf9a60065b 18 *
kadonotakashi 0:8fdf9a60065b 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
kadonotakashi 0:8fdf9a60065b 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
kadonotakashi 0:8fdf9a60065b 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
kadonotakashi 0:8fdf9a60065b 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
kadonotakashi 0:8fdf9a60065b 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
kadonotakashi 0:8fdf9a60065b 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
kadonotakashi 0:8fdf9a60065b 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
kadonotakashi 0:8fdf9a60065b 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
kadonotakashi 0:8fdf9a60065b 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
kadonotakashi 0:8fdf9a60065b 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
kadonotakashi 0:8fdf9a60065b 29 */
kadonotakashi 0:8fdf9a60065b 30
kadonotakashi 0:8fdf9a60065b 31 #include "fsl_gpio.h"
kadonotakashi 0:8fdf9a60065b 32
kadonotakashi 0:8fdf9a60065b 33 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 34 * Variables
kadonotakashi 0:8fdf9a60065b 35 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 36 static PORT_Type *const s_portBases[] = PORT_BASE_PTRS;
kadonotakashi 0:8fdf9a60065b 37 static GPIO_Type *const s_gpioBases[] = GPIO_BASE_PTRS;
kadonotakashi 0:8fdf9a60065b 38
kadonotakashi 0:8fdf9a60065b 39 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 40 * Prototypes
kadonotakashi 0:8fdf9a60065b 41 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 42
kadonotakashi 0:8fdf9a60065b 43 /*!
kadonotakashi 0:8fdf9a60065b 44 * @brief Gets the GPIO instance according to the GPIO base
kadonotakashi 0:8fdf9a60065b 45 *
kadonotakashi 0:8fdf9a60065b 46 * @param base GPIO peripheral base pointer(PTA, PTB, PTC, etc.)
kadonotakashi 0:8fdf9a60065b 47 * @retval GPIO instance
kadonotakashi 0:8fdf9a60065b 48 */
kadonotakashi 0:8fdf9a60065b 49 static uint32_t GPIO_GetInstance(GPIO_Type *base);
kadonotakashi 0:8fdf9a60065b 50
kadonotakashi 0:8fdf9a60065b 51 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 52 * Code
kadonotakashi 0:8fdf9a60065b 53 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 54
kadonotakashi 0:8fdf9a60065b 55 static uint32_t GPIO_GetInstance(GPIO_Type *base)
kadonotakashi 0:8fdf9a60065b 56 {
kadonotakashi 0:8fdf9a60065b 57 uint32_t instance;
kadonotakashi 0:8fdf9a60065b 58
kadonotakashi 0:8fdf9a60065b 59 /* Find the instance index from base address mappings. */
kadonotakashi 0:8fdf9a60065b 60 for (instance = 0; instance < FSL_FEATURE_SOC_GPIO_COUNT; instance++)
kadonotakashi 0:8fdf9a60065b 61 {
kadonotakashi 0:8fdf9a60065b 62 if (s_gpioBases[instance] == base)
kadonotakashi 0:8fdf9a60065b 63 {
kadonotakashi 0:8fdf9a60065b 64 break;
kadonotakashi 0:8fdf9a60065b 65 }
kadonotakashi 0:8fdf9a60065b 66 }
kadonotakashi 0:8fdf9a60065b 67
kadonotakashi 0:8fdf9a60065b 68 assert(instance < FSL_FEATURE_SOC_GPIO_COUNT);
kadonotakashi 0:8fdf9a60065b 69
kadonotakashi 0:8fdf9a60065b 70 return instance;
kadonotakashi 0:8fdf9a60065b 71 }
kadonotakashi 0:8fdf9a60065b 72
kadonotakashi 0:8fdf9a60065b 73 void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config)
kadonotakashi 0:8fdf9a60065b 74 {
kadonotakashi 0:8fdf9a60065b 75 assert(config);
kadonotakashi 0:8fdf9a60065b 76
kadonotakashi 0:8fdf9a60065b 77 if (config->pinDirection == kGPIO_DigitalInput)
kadonotakashi 0:8fdf9a60065b 78 {
kadonotakashi 0:8fdf9a60065b 79 base->PDDR &= ~(1U << pin);
kadonotakashi 0:8fdf9a60065b 80 }
kadonotakashi 0:8fdf9a60065b 81 else
kadonotakashi 0:8fdf9a60065b 82 {
kadonotakashi 0:8fdf9a60065b 83 GPIO_WritePinOutput(base, pin, config->outputLogic);
kadonotakashi 0:8fdf9a60065b 84 base->PDDR |= (1U << pin);
kadonotakashi 0:8fdf9a60065b 85 }
kadonotakashi 0:8fdf9a60065b 86 }
kadonotakashi 0:8fdf9a60065b 87
kadonotakashi 0:8fdf9a60065b 88 uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base)
kadonotakashi 0:8fdf9a60065b 89 {
kadonotakashi 0:8fdf9a60065b 90 uint8_t instance;
kadonotakashi 0:8fdf9a60065b 91 PORT_Type *portBase;
kadonotakashi 0:8fdf9a60065b 92 instance = GPIO_GetInstance(base);
kadonotakashi 0:8fdf9a60065b 93 portBase = s_portBases[instance];
kadonotakashi 0:8fdf9a60065b 94 return portBase->ISFR;
kadonotakashi 0:8fdf9a60065b 95 }
kadonotakashi 0:8fdf9a60065b 96
kadonotakashi 0:8fdf9a60065b 97 void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask)
kadonotakashi 0:8fdf9a60065b 98 {
kadonotakashi 0:8fdf9a60065b 99 uint8_t instance;
kadonotakashi 0:8fdf9a60065b 100 PORT_Type *portBase;
kadonotakashi 0:8fdf9a60065b 101 instance = GPIO_GetInstance(base);
kadonotakashi 0:8fdf9a60065b 102 portBase = s_portBases[instance];
kadonotakashi 0:8fdf9a60065b 103 portBase->ISFR = mask;
kadonotakashi 0:8fdf9a60065b 104 }
kadonotakashi 0:8fdf9a60065b 105
kadonotakashi 0:8fdf9a60065b 106 #if defined(FSL_FEATURE_SOC_FGPIO_COUNT) && FSL_FEATURE_SOC_FGPIO_COUNT
kadonotakashi 0:8fdf9a60065b 107
kadonotakashi 0:8fdf9a60065b 108 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 109 * Variables
kadonotakashi 0:8fdf9a60065b 110 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 111 static FGPIO_Type *const s_fgpioBases[] = FGPIO_BASE_PTRS;
kadonotakashi 0:8fdf9a60065b 112
kadonotakashi 0:8fdf9a60065b 113 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 114 * Prototypes
kadonotakashi 0:8fdf9a60065b 115 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 116 /*!
kadonotakashi 0:8fdf9a60065b 117 * @brief Gets the FGPIO instance according to the GPIO base
kadonotakashi 0:8fdf9a60065b 118 *
kadonotakashi 0:8fdf9a60065b 119 * @param base FGPIO peripheral base pointer(PTA, PTB, PTC, etc.)
kadonotakashi 0:8fdf9a60065b 120 * @retval FGPIO instance
kadonotakashi 0:8fdf9a60065b 121 */
kadonotakashi 0:8fdf9a60065b 122 static uint32_t FGPIO_GetInstance(FGPIO_Type *base);
kadonotakashi 0:8fdf9a60065b 123
kadonotakashi 0:8fdf9a60065b 124 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 125 * Code
kadonotakashi 0:8fdf9a60065b 126 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 127
kadonotakashi 0:8fdf9a60065b 128 static uint32_t FGPIO_GetInstance(FGPIO_Type *base)
kadonotakashi 0:8fdf9a60065b 129 {
kadonotakashi 0:8fdf9a60065b 130 uint32_t instance;
kadonotakashi 0:8fdf9a60065b 131
kadonotakashi 0:8fdf9a60065b 132 /* Find the instance index from base address mappings. */
kadonotakashi 0:8fdf9a60065b 133 for (instance = 0; instance < FSL_FEATURE_SOC_FGPIO_COUNT; instance++)
kadonotakashi 0:8fdf9a60065b 134 {
kadonotakashi 0:8fdf9a60065b 135 if (s_fgpioBases[instance] == base)
kadonotakashi 0:8fdf9a60065b 136 {
kadonotakashi 0:8fdf9a60065b 137 break;
kadonotakashi 0:8fdf9a60065b 138 }
kadonotakashi 0:8fdf9a60065b 139 }
kadonotakashi 0:8fdf9a60065b 140
kadonotakashi 0:8fdf9a60065b 141 assert(instance < FSL_FEATURE_SOC_FGPIO_COUNT);
kadonotakashi 0:8fdf9a60065b 142
kadonotakashi 0:8fdf9a60065b 143 return instance;
kadonotakashi 0:8fdf9a60065b 144 }
kadonotakashi 0:8fdf9a60065b 145
kadonotakashi 0:8fdf9a60065b 146 void FGPIO_PinInit(FGPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config)
kadonotakashi 0:8fdf9a60065b 147 {
kadonotakashi 0:8fdf9a60065b 148 assert(config);
kadonotakashi 0:8fdf9a60065b 149
kadonotakashi 0:8fdf9a60065b 150 if (config->pinDirection == kGPIO_DigitalInput)
kadonotakashi 0:8fdf9a60065b 151 {
kadonotakashi 0:8fdf9a60065b 152 base->PDDR &= ~(1U << pin);
kadonotakashi 0:8fdf9a60065b 153 }
kadonotakashi 0:8fdf9a60065b 154 else
kadonotakashi 0:8fdf9a60065b 155 {
kadonotakashi 0:8fdf9a60065b 156 FGPIO_WritePinOutput(base, pin, config->outputLogic);
kadonotakashi 0:8fdf9a60065b 157 base->PDDR |= (1U << pin);
kadonotakashi 0:8fdf9a60065b 158 }
kadonotakashi 0:8fdf9a60065b 159 }
kadonotakashi 0:8fdf9a60065b 160
kadonotakashi 0:8fdf9a60065b 161 uint32_t FGPIO_GetPinsInterruptFlags(FGPIO_Type *base)
kadonotakashi 0:8fdf9a60065b 162 {
kadonotakashi 0:8fdf9a60065b 163 uint8_t instance;
kadonotakashi 0:8fdf9a60065b 164 instance = FGPIO_GetInstance(base);
kadonotakashi 0:8fdf9a60065b 165 PORT_Type *portBase;
kadonotakashi 0:8fdf9a60065b 166 portBase = s_portBases[instance];
kadonotakashi 0:8fdf9a60065b 167 return portBase->ISFR;
kadonotakashi 0:8fdf9a60065b 168 }
kadonotakashi 0:8fdf9a60065b 169
kadonotakashi 0:8fdf9a60065b 170 void FGPIO_ClearPinsInterruptFlags(FGPIO_Type *base, uint32_t mask)
kadonotakashi 0:8fdf9a60065b 171 {
kadonotakashi 0:8fdf9a60065b 172 uint8_t instance;
kadonotakashi 0:8fdf9a60065b 173 instance = FGPIO_GetInstance(base);
kadonotakashi 0:8fdf9a60065b 174 PORT_Type *portBase;
kadonotakashi 0:8fdf9a60065b 175 portBase = s_portBases[instance];
kadonotakashi 0:8fdf9a60065b 176 portBase->ISFR = mask;
kadonotakashi 0:8fdf9a60065b 177 }
kadonotakashi 0:8fdf9a60065b 178
kadonotakashi 0:8fdf9a60065b 179 #endif /* FSL_FEATURE_SOC_FGPIO_COUNT */