Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

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kadonotakashi 0:8fdf9a60065b 1 /*
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
kadonotakashi 0:8fdf9a60065b 3 * All rights reserved.
kadonotakashi 0:8fdf9a60065b 4 *
kadonotakashi 0:8fdf9a60065b 5 * Redistribution and use in source and binary forms, with or without modification,
kadonotakashi 0:8fdf9a60065b 6 * are permitted provided that the following conditions are met:
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * o Redistributions of source code must retain the above copyright notice, this list
kadonotakashi 0:8fdf9a60065b 9 * of conditions and the following disclaimer.
kadonotakashi 0:8fdf9a60065b 10 *
kadonotakashi 0:8fdf9a60065b 11 * o Redistributions in binary form must reproduce the above copyright notice, this
kadonotakashi 0:8fdf9a60065b 12 * list of conditions and the following disclaimer in the documentation and/or
kadonotakashi 0:8fdf9a60065b 13 * other materials provided with the distribution.
kadonotakashi 0:8fdf9a60065b 14 *
kadonotakashi 0:8fdf9a60065b 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
kadonotakashi 0:8fdf9a60065b 16 * contributors may be used to endorse or promote products derived from this
kadonotakashi 0:8fdf9a60065b 17 * software without specific prior written permission.
kadonotakashi 0:8fdf9a60065b 18 *
kadonotakashi 0:8fdf9a60065b 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
kadonotakashi 0:8fdf9a60065b 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
kadonotakashi 0:8fdf9a60065b 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
kadonotakashi 0:8fdf9a60065b 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
kadonotakashi 0:8fdf9a60065b 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
kadonotakashi 0:8fdf9a60065b 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
kadonotakashi 0:8fdf9a60065b 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
kadonotakashi 0:8fdf9a60065b 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
kadonotakashi 0:8fdf9a60065b 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
kadonotakashi 0:8fdf9a60065b 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
kadonotakashi 0:8fdf9a60065b 29 */
kadonotakashi 0:8fdf9a60065b 30
kadonotakashi 0:8fdf9a60065b 31 #include "fsl_lptmr.h"
kadonotakashi 0:8fdf9a60065b 32
kadonotakashi 0:8fdf9a60065b 33 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 34 * Prototypes
kadonotakashi 0:8fdf9a60065b 35 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 36 /*!
kadonotakashi 0:8fdf9a60065b 37 * @brief Gets the instance from the base address to be used to gate or ungate the module clock
kadonotakashi 0:8fdf9a60065b 38 *
kadonotakashi 0:8fdf9a60065b 39 * @param base LPTMR peripheral base address
kadonotakashi 0:8fdf9a60065b 40 *
kadonotakashi 0:8fdf9a60065b 41 * @return The LPTMR instance
kadonotakashi 0:8fdf9a60065b 42 */
kadonotakashi 0:8fdf9a60065b 43 static uint32_t LPTMR_GetInstance(LPTMR_Type *base);
kadonotakashi 0:8fdf9a60065b 44
kadonotakashi 0:8fdf9a60065b 45 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 46 * Variables
kadonotakashi 0:8fdf9a60065b 47 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 48 /*! @brief Pointers to LPTMR bases for each instance. */
kadonotakashi 0:8fdf9a60065b 49 static LPTMR_Type *const s_lptmrBases[] = LPTMR_BASE_PTRS;
kadonotakashi 0:8fdf9a60065b 50
kadonotakashi 0:8fdf9a60065b 51 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
kadonotakashi 0:8fdf9a60065b 52 /*! @brief Pointers to LPTMR clocks for each instance. */
kadonotakashi 0:8fdf9a60065b 53 static const clock_ip_name_t s_lptmrClocks[] = LPTMR_CLOCKS;
kadonotakashi 0:8fdf9a60065b 54 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
kadonotakashi 0:8fdf9a60065b 55
kadonotakashi 0:8fdf9a60065b 56 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 57 * Code
kadonotakashi 0:8fdf9a60065b 58 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 59 static uint32_t LPTMR_GetInstance(LPTMR_Type *base)
kadonotakashi 0:8fdf9a60065b 60 {
kadonotakashi 0:8fdf9a60065b 61 uint32_t instance;
kadonotakashi 0:8fdf9a60065b 62
kadonotakashi 0:8fdf9a60065b 63 /* Find the instance index from base address mappings. */
kadonotakashi 0:8fdf9a60065b 64 for (instance = 0; instance < FSL_FEATURE_SOC_LPTMR_COUNT; instance++)
kadonotakashi 0:8fdf9a60065b 65 {
kadonotakashi 0:8fdf9a60065b 66 if (s_lptmrBases[instance] == base)
kadonotakashi 0:8fdf9a60065b 67 {
kadonotakashi 0:8fdf9a60065b 68 break;
kadonotakashi 0:8fdf9a60065b 69 }
kadonotakashi 0:8fdf9a60065b 70 }
kadonotakashi 0:8fdf9a60065b 71
kadonotakashi 0:8fdf9a60065b 72 assert(instance < FSL_FEATURE_SOC_LPTMR_COUNT);
kadonotakashi 0:8fdf9a60065b 73
kadonotakashi 0:8fdf9a60065b 74 return instance;
kadonotakashi 0:8fdf9a60065b 75 }
kadonotakashi 0:8fdf9a60065b 76
kadonotakashi 0:8fdf9a60065b 77 void LPTMR_Init(LPTMR_Type *base, const lptmr_config_t *config)
kadonotakashi 0:8fdf9a60065b 78 {
kadonotakashi 0:8fdf9a60065b 79 assert(config);
kadonotakashi 0:8fdf9a60065b 80
kadonotakashi 0:8fdf9a60065b 81 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
kadonotakashi 0:8fdf9a60065b 82 /* Ungate the LPTMR clock*/
kadonotakashi 0:8fdf9a60065b 83 CLOCK_EnableClock(s_lptmrClocks[LPTMR_GetInstance(base)]);
kadonotakashi 0:8fdf9a60065b 84 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
kadonotakashi 0:8fdf9a60065b 85
kadonotakashi 0:8fdf9a60065b 86 /* Configure the timers operation mode and input pin setup */
kadonotakashi 0:8fdf9a60065b 87 base->CSR = (LPTMR_CSR_TMS(config->timerMode) | LPTMR_CSR_TFC(config->enableFreeRunning) |
kadonotakashi 0:8fdf9a60065b 88 LPTMR_CSR_TPP(config->pinPolarity) | LPTMR_CSR_TPS(config->pinSelect));
kadonotakashi 0:8fdf9a60065b 89
kadonotakashi 0:8fdf9a60065b 90 /* Configure the prescale value and clock source */
kadonotakashi 0:8fdf9a60065b 91 base->PSR = (LPTMR_PSR_PRESCALE(config->value) | LPTMR_PSR_PBYP(config->bypassPrescaler) |
kadonotakashi 0:8fdf9a60065b 92 LPTMR_PSR_PCS(config->prescalerClockSource));
kadonotakashi 0:8fdf9a60065b 93 }
kadonotakashi 0:8fdf9a60065b 94
kadonotakashi 0:8fdf9a60065b 95 void LPTMR_Deinit(LPTMR_Type *base)
kadonotakashi 0:8fdf9a60065b 96 {
kadonotakashi 0:8fdf9a60065b 97 /* Disable the LPTMR and reset the internal logic */
kadonotakashi 0:8fdf9a60065b 98 base->CSR &= ~LPTMR_CSR_TEN_MASK;
kadonotakashi 0:8fdf9a60065b 99 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
kadonotakashi 0:8fdf9a60065b 100 /* Gate the LPTMR clock*/
kadonotakashi 0:8fdf9a60065b 101 CLOCK_DisableClock(s_lptmrClocks[LPTMR_GetInstance(base)]);
kadonotakashi 0:8fdf9a60065b 102 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
kadonotakashi 0:8fdf9a60065b 103 }
kadonotakashi 0:8fdf9a60065b 104
kadonotakashi 0:8fdf9a60065b 105 void LPTMR_GetDefaultConfig(lptmr_config_t *config)
kadonotakashi 0:8fdf9a60065b 106 {
kadonotakashi 0:8fdf9a60065b 107 assert(config);
kadonotakashi 0:8fdf9a60065b 108
kadonotakashi 0:8fdf9a60065b 109 /* Use time counter mode */
kadonotakashi 0:8fdf9a60065b 110 config->timerMode = kLPTMR_TimerModeTimeCounter;
kadonotakashi 0:8fdf9a60065b 111 /* Use input 0 as source in pulse counter mode */
kadonotakashi 0:8fdf9a60065b 112 config->pinSelect = kLPTMR_PinSelectInput_0;
kadonotakashi 0:8fdf9a60065b 113 /* Pulse input pin polarity is active-high */
kadonotakashi 0:8fdf9a60065b 114 config->pinPolarity = kLPTMR_PinPolarityActiveHigh;
kadonotakashi 0:8fdf9a60065b 115 /* Counter resets whenever TCF flag is set */
kadonotakashi 0:8fdf9a60065b 116 config->enableFreeRunning = false;
kadonotakashi 0:8fdf9a60065b 117 /* Bypass the prescaler */
kadonotakashi 0:8fdf9a60065b 118 config->bypassPrescaler = true;
kadonotakashi 0:8fdf9a60065b 119 /* LPTMR clock source */
kadonotakashi 0:8fdf9a60065b 120 config->prescalerClockSource = kLPTMR_PrescalerClock_1;
kadonotakashi 0:8fdf9a60065b 121 /* Divide the prescaler clock by 2 */
kadonotakashi 0:8fdf9a60065b 122 config->value = kLPTMR_Prescale_Glitch_0;
kadonotakashi 0:8fdf9a60065b 123 }