takashi kadono / Mbed OS Nucleo446_SSD1331

Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466

Dependencies:   ssd1331

mbed-os/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_flexio_spi_edma.c@0:8fdf9a60065b, 2018-10-10 (annotated)

Committer:
kadonotakashi
Date:
Wed Oct 10 00:33:53 2018 +0000
Revision:
0:8fdf9a60065b
how to make mbed librry

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kadonotakashi 0:8fdf9a60065b 1 /*
kadonotakashi 0:8fdf9a60065b 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
kadonotakashi 0:8fdf9a60065b 3 * All rights reserved.
kadonotakashi 0:8fdf9a60065b 4 *
kadonotakashi 0:8fdf9a60065b 5 * Redistribution and use in source and binary forms, with or without modification,
kadonotakashi 0:8fdf9a60065b 6 * are permitted provided that the following conditions are met:
kadonotakashi 0:8fdf9a60065b 7 *
kadonotakashi 0:8fdf9a60065b 8 * o Redistributions of source code must retain the above copyright notice, this list
kadonotakashi 0:8fdf9a60065b 9 * of conditions and the following disclaimer.
kadonotakashi 0:8fdf9a60065b 10 *
kadonotakashi 0:8fdf9a60065b 11 * o Redistributions in binary form must reproduce the above copyright notice, this
kadonotakashi 0:8fdf9a60065b 12 * list of conditions and the following disclaimer in the documentation and/or
kadonotakashi 0:8fdf9a60065b 13 * other materials provided with the distribution.
kadonotakashi 0:8fdf9a60065b 14 *
kadonotakashi 0:8fdf9a60065b 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
kadonotakashi 0:8fdf9a60065b 16 * contributors may be used to endorse or promote products derived from this
kadonotakashi 0:8fdf9a60065b 17 * software without specific prior written permission.
kadonotakashi 0:8fdf9a60065b 18 *
kadonotakashi 0:8fdf9a60065b 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
kadonotakashi 0:8fdf9a60065b 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
kadonotakashi 0:8fdf9a60065b 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
kadonotakashi 0:8fdf9a60065b 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
kadonotakashi 0:8fdf9a60065b 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
kadonotakashi 0:8fdf9a60065b 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
kadonotakashi 0:8fdf9a60065b 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
kadonotakashi 0:8fdf9a60065b 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
kadonotakashi 0:8fdf9a60065b 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
kadonotakashi 0:8fdf9a60065b 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
kadonotakashi 0:8fdf9a60065b 29 */
kadonotakashi 0:8fdf9a60065b 30
kadonotakashi 0:8fdf9a60065b 31 #include "fsl_flexio_spi_edma.h"
kadonotakashi 0:8fdf9a60065b 32
kadonotakashi 0:8fdf9a60065b 33 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 34 * Definitons
kadonotakashi 0:8fdf9a60065b 35 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 36 /*<! Structure definition for spi_edma_private_handle_t. The structure is private. */
kadonotakashi 0:8fdf9a60065b 37 typedef struct _flexio_spi_master_edma_private_handle
kadonotakashi 0:8fdf9a60065b 38 {
kadonotakashi 0:8fdf9a60065b 39 FLEXIO_SPI_Type *base;
kadonotakashi 0:8fdf9a60065b 40 flexio_spi_master_edma_handle_t *handle;
kadonotakashi 0:8fdf9a60065b 41 } flexio_spi_master_edma_private_handle_t;
kadonotakashi 0:8fdf9a60065b 42
kadonotakashi 0:8fdf9a60065b 43 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 44 * Prototypes
kadonotakashi 0:8fdf9a60065b 45 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 46
kadonotakashi 0:8fdf9a60065b 47 /*!
kadonotakashi 0:8fdf9a60065b 48 * @brief EDMA callback function for FLEXIO SPI send transfer.
kadonotakashi 0:8fdf9a60065b 49 *
kadonotakashi 0:8fdf9a60065b 50 * @param handle EDMA handle pointer.
kadonotakashi 0:8fdf9a60065b 51 * @param param Callback function parameter.
kadonotakashi 0:8fdf9a60065b 52 */
kadonotakashi 0:8fdf9a60065b 53 static void FLEXIO_SPI_TxEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds);
kadonotakashi 0:8fdf9a60065b 54
kadonotakashi 0:8fdf9a60065b 55 /*!
kadonotakashi 0:8fdf9a60065b 56 * @brief EDMA callback function for FLEXIO SPI receive transfer.
kadonotakashi 0:8fdf9a60065b 57 *
kadonotakashi 0:8fdf9a60065b 58 * @param handle EDMA handle pointer.
kadonotakashi 0:8fdf9a60065b 59 * @param param Callback function parameter.
kadonotakashi 0:8fdf9a60065b 60 */
kadonotakashi 0:8fdf9a60065b 61 static void FLEXIO_SPI_RxEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds);
kadonotakashi 0:8fdf9a60065b 62
kadonotakashi 0:8fdf9a60065b 63 /*!
kadonotakashi 0:8fdf9a60065b 64 * @brief EDMA config for FLEXIO SPI transfer.
kadonotakashi 0:8fdf9a60065b 65 *
kadonotakashi 0:8fdf9a60065b 66 * @param base pointer to FLEXIO_SPI_Type structure.
kadonotakashi 0:8fdf9a60065b 67 * @param handle pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
kadonotakashi 0:8fdf9a60065b 68 * @param xfer Pointer to flexio spi transfer structure.
kadonotakashi 0:8fdf9a60065b 69 */
kadonotakashi 0:8fdf9a60065b 70 static void FLEXIO_SPI_EDMAConfig(FLEXIO_SPI_Type *base,
kadonotakashi 0:8fdf9a60065b 71 flexio_spi_master_edma_handle_t *handle,
kadonotakashi 0:8fdf9a60065b 72 flexio_spi_transfer_t *xfer);
kadonotakashi 0:8fdf9a60065b 73
kadonotakashi 0:8fdf9a60065b 74 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 75 * Variables
kadonotakashi 0:8fdf9a60065b 76 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 77
kadonotakashi 0:8fdf9a60065b 78 /* Dummy data used to send */
kadonotakashi 0:8fdf9a60065b 79 static const uint16_t s_dummyData = FLEXIO_SPI_DUMMYDATA;
kadonotakashi 0:8fdf9a60065b 80
kadonotakashi 0:8fdf9a60065b 81 /*< @brief user configurable flexio spi handle count. */
kadonotakashi 0:8fdf9a60065b 82 #define FLEXIO_SPI_HANDLE_COUNT 2
kadonotakashi 0:8fdf9a60065b 83
kadonotakashi 0:8fdf9a60065b 84 /*<! Private handle only used for internally. */
kadonotakashi 0:8fdf9a60065b 85 static flexio_spi_master_edma_private_handle_t s_edmaPrivateHandle[FLEXIO_SPI_HANDLE_COUNT];
kadonotakashi 0:8fdf9a60065b 86
kadonotakashi 0:8fdf9a60065b 87 /*******************************************************************************
kadonotakashi 0:8fdf9a60065b 88 * Code
kadonotakashi 0:8fdf9a60065b 89 ******************************************************************************/
kadonotakashi 0:8fdf9a60065b 90
kadonotakashi 0:8fdf9a60065b 91 static void FLEXIO_SPI_TxEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds)
kadonotakashi 0:8fdf9a60065b 92 {
kadonotakashi 0:8fdf9a60065b 93 tcds = tcds;
kadonotakashi 0:8fdf9a60065b 94 flexio_spi_master_edma_private_handle_t *spiPrivateHandle = (flexio_spi_master_edma_private_handle_t *)param;
kadonotakashi 0:8fdf9a60065b 95
kadonotakashi 0:8fdf9a60065b 96 /* Disable Tx DMA */
kadonotakashi 0:8fdf9a60065b 97 if (transferDone)
kadonotakashi 0:8fdf9a60065b 98 {
kadonotakashi 0:8fdf9a60065b 99 FLEXIO_SPI_EnableDMA(spiPrivateHandle->base, kFLEXIO_SPI_TxDmaEnable, false);
kadonotakashi 0:8fdf9a60065b 100
kadonotakashi 0:8fdf9a60065b 101 /* change the state */
kadonotakashi 0:8fdf9a60065b 102 spiPrivateHandle->handle->txInProgress = false;
kadonotakashi 0:8fdf9a60065b 103
kadonotakashi 0:8fdf9a60065b 104 /* All finished, call the callback */
kadonotakashi 0:8fdf9a60065b 105 if ((spiPrivateHandle->handle->txInProgress == false) && (spiPrivateHandle->handle->rxInProgress == false))
kadonotakashi 0:8fdf9a60065b 106 {
kadonotakashi 0:8fdf9a60065b 107 if (spiPrivateHandle->handle->callback)
kadonotakashi 0:8fdf9a60065b 108 {
kadonotakashi 0:8fdf9a60065b 109 (spiPrivateHandle->handle->callback)(spiPrivateHandle->base, spiPrivateHandle->handle, kStatus_Success,
kadonotakashi 0:8fdf9a60065b 110 spiPrivateHandle->handle->userData);
kadonotakashi 0:8fdf9a60065b 111 }
kadonotakashi 0:8fdf9a60065b 112 }
kadonotakashi 0:8fdf9a60065b 113 }
kadonotakashi 0:8fdf9a60065b 114 }
kadonotakashi 0:8fdf9a60065b 115
kadonotakashi 0:8fdf9a60065b 116 static void FLEXIO_SPI_RxEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds)
kadonotakashi 0:8fdf9a60065b 117 {
kadonotakashi 0:8fdf9a60065b 118 tcds = tcds;
kadonotakashi 0:8fdf9a60065b 119 flexio_spi_master_edma_private_handle_t *spiPrivateHandle = (flexio_spi_master_edma_private_handle_t *)param;
kadonotakashi 0:8fdf9a60065b 120
kadonotakashi 0:8fdf9a60065b 121 if (transferDone)
kadonotakashi 0:8fdf9a60065b 122 {
kadonotakashi 0:8fdf9a60065b 123 /* Disable Rx dma */
kadonotakashi 0:8fdf9a60065b 124 FLEXIO_SPI_EnableDMA(spiPrivateHandle->base, kFLEXIO_SPI_RxDmaEnable, false);
kadonotakashi 0:8fdf9a60065b 125
kadonotakashi 0:8fdf9a60065b 126 /* change the state */
kadonotakashi 0:8fdf9a60065b 127 spiPrivateHandle->handle->rxInProgress = false;
kadonotakashi 0:8fdf9a60065b 128
kadonotakashi 0:8fdf9a60065b 129 /* All finished, call the callback */
kadonotakashi 0:8fdf9a60065b 130 if ((spiPrivateHandle->handle->txInProgress == false) && (spiPrivateHandle->handle->rxInProgress == false))
kadonotakashi 0:8fdf9a60065b 131 {
kadonotakashi 0:8fdf9a60065b 132 if (spiPrivateHandle->handle->callback)
kadonotakashi 0:8fdf9a60065b 133 {
kadonotakashi 0:8fdf9a60065b 134 (spiPrivateHandle->handle->callback)(spiPrivateHandle->base, spiPrivateHandle->handle, kStatus_Success,
kadonotakashi 0:8fdf9a60065b 135 spiPrivateHandle->handle->userData);
kadonotakashi 0:8fdf9a60065b 136 }
kadonotakashi 0:8fdf9a60065b 137 }
kadonotakashi 0:8fdf9a60065b 138 }
kadonotakashi 0:8fdf9a60065b 139 }
kadonotakashi 0:8fdf9a60065b 140
kadonotakashi 0:8fdf9a60065b 141 static void FLEXIO_SPI_EDMAConfig(FLEXIO_SPI_Type *base,
kadonotakashi 0:8fdf9a60065b 142 flexio_spi_master_edma_handle_t *handle,
kadonotakashi 0:8fdf9a60065b 143 flexio_spi_transfer_t *xfer)
kadonotakashi 0:8fdf9a60065b 144 {
kadonotakashi 0:8fdf9a60065b 145 edma_transfer_config_t xferConfig;
kadonotakashi 0:8fdf9a60065b 146 flexio_spi_shift_direction_t direction;
kadonotakashi 0:8fdf9a60065b 147 uint8_t bytesPerFrame;
kadonotakashi 0:8fdf9a60065b 148
kadonotakashi 0:8fdf9a60065b 149 /* Configure the values in handle. */
kadonotakashi 0:8fdf9a60065b 150 switch (xfer->flags)
kadonotakashi 0:8fdf9a60065b 151 {
kadonotakashi 0:8fdf9a60065b 152 case kFLEXIO_SPI_8bitMsb:
kadonotakashi 0:8fdf9a60065b 153 bytesPerFrame = 1;
kadonotakashi 0:8fdf9a60065b 154 direction = kFLEXIO_SPI_MsbFirst;
kadonotakashi 0:8fdf9a60065b 155 break;
kadonotakashi 0:8fdf9a60065b 156 case kFLEXIO_SPI_8bitLsb:
kadonotakashi 0:8fdf9a60065b 157 bytesPerFrame = 1;
kadonotakashi 0:8fdf9a60065b 158 direction = kFLEXIO_SPI_LsbFirst;
kadonotakashi 0:8fdf9a60065b 159 break;
kadonotakashi 0:8fdf9a60065b 160 case kFLEXIO_SPI_16bitMsb:
kadonotakashi 0:8fdf9a60065b 161 bytesPerFrame = 2;
kadonotakashi 0:8fdf9a60065b 162 direction = kFLEXIO_SPI_MsbFirst;
kadonotakashi 0:8fdf9a60065b 163 break;
kadonotakashi 0:8fdf9a60065b 164 case kFLEXIO_SPI_16bitLsb:
kadonotakashi 0:8fdf9a60065b 165 bytesPerFrame = 2;
kadonotakashi 0:8fdf9a60065b 166 direction = kFLEXIO_SPI_LsbFirst;
kadonotakashi 0:8fdf9a60065b 167 break;
kadonotakashi 0:8fdf9a60065b 168 default:
kadonotakashi 0:8fdf9a60065b 169 bytesPerFrame = 1U;
kadonotakashi 0:8fdf9a60065b 170 direction = kFLEXIO_SPI_MsbFirst;
kadonotakashi 0:8fdf9a60065b 171 assert(true);
kadonotakashi 0:8fdf9a60065b 172 break;
kadonotakashi 0:8fdf9a60065b 173 }
kadonotakashi 0:8fdf9a60065b 174
kadonotakashi 0:8fdf9a60065b 175 /* Save total transfer size. */
kadonotakashi 0:8fdf9a60065b 176 handle->transferSize = xfer->dataSize;
kadonotakashi 0:8fdf9a60065b 177
kadonotakashi 0:8fdf9a60065b 178 /* Configure tx transfer EDMA. */
kadonotakashi 0:8fdf9a60065b 179 xferConfig.destAddr = FLEXIO_SPI_GetTxDataRegisterAddress(base, direction);
kadonotakashi 0:8fdf9a60065b 180 xferConfig.destOffset = 0;
kadonotakashi 0:8fdf9a60065b 181 if (bytesPerFrame == 1U)
kadonotakashi 0:8fdf9a60065b 182 {
kadonotakashi 0:8fdf9a60065b 183 xferConfig.srcTransferSize = kEDMA_TransferSize1Bytes;
kadonotakashi 0:8fdf9a60065b 184 xferConfig.destTransferSize = kEDMA_TransferSize1Bytes;
kadonotakashi 0:8fdf9a60065b 185 xferConfig.minorLoopBytes = 1;
kadonotakashi 0:8fdf9a60065b 186 }
kadonotakashi 0:8fdf9a60065b 187 else
kadonotakashi 0:8fdf9a60065b 188 {
kadonotakashi 0:8fdf9a60065b 189 if (direction == kFLEXIO_SPI_MsbFirst)
kadonotakashi 0:8fdf9a60065b 190 {
kadonotakashi 0:8fdf9a60065b 191 xferConfig.destAddr -= 1U;
kadonotakashi 0:8fdf9a60065b 192 }
kadonotakashi 0:8fdf9a60065b 193 xferConfig.srcTransferSize = kEDMA_TransferSize2Bytes;
kadonotakashi 0:8fdf9a60065b 194 xferConfig.destTransferSize = kEDMA_TransferSize2Bytes;
kadonotakashi 0:8fdf9a60065b 195 xferConfig.minorLoopBytes = 2;
kadonotakashi 0:8fdf9a60065b 196 }
kadonotakashi 0:8fdf9a60065b 197
kadonotakashi 0:8fdf9a60065b 198 /* Configure DMA channel. */
kadonotakashi 0:8fdf9a60065b 199 if (xfer->txData)
kadonotakashi 0:8fdf9a60065b 200 {
kadonotakashi 0:8fdf9a60065b 201 xferConfig.srcOffset = bytesPerFrame;
kadonotakashi 0:8fdf9a60065b 202 xferConfig.srcAddr = (uint32_t)(xfer->txData);
kadonotakashi 0:8fdf9a60065b 203 }
kadonotakashi 0:8fdf9a60065b 204 else
kadonotakashi 0:8fdf9a60065b 205 {
kadonotakashi 0:8fdf9a60065b 206 /* Disable the source increasement and source set to dummyData. */
kadonotakashi 0:8fdf9a60065b 207 xferConfig.srcOffset = 0;
kadonotakashi 0:8fdf9a60065b 208 xferConfig.srcAddr = (uint32_t)(&s_dummyData);
kadonotakashi 0:8fdf9a60065b 209 }
kadonotakashi 0:8fdf9a60065b 210
kadonotakashi 0:8fdf9a60065b 211 xferConfig.majorLoopCounts = (xfer->dataSize / xferConfig.minorLoopBytes);
kadonotakashi 0:8fdf9a60065b 212
kadonotakashi 0:8fdf9a60065b 213 /* Store the initially configured eDMA minor byte transfer count into the FLEXIO SPI handle */
kadonotakashi 0:8fdf9a60065b 214 handle->nbytes = xferConfig.minorLoopBytes;
kadonotakashi 0:8fdf9a60065b 215
kadonotakashi 0:8fdf9a60065b 216 if (handle->txHandle)
kadonotakashi 0:8fdf9a60065b 217 {
kadonotakashi 0:8fdf9a60065b 218 EDMA_SubmitTransfer(handle->txHandle, &xferConfig);
kadonotakashi 0:8fdf9a60065b 219 }
kadonotakashi 0:8fdf9a60065b 220
kadonotakashi 0:8fdf9a60065b 221 /* Configure tx transfer EDMA. */
kadonotakashi 0:8fdf9a60065b 222 if (xfer->rxData)
kadonotakashi 0:8fdf9a60065b 223 {
kadonotakashi 0:8fdf9a60065b 224 xferConfig.srcAddr = FLEXIO_SPI_GetRxDataRegisterAddress(base, direction);
kadonotakashi 0:8fdf9a60065b 225 if (bytesPerFrame == 2U)
kadonotakashi 0:8fdf9a60065b 226 {
kadonotakashi 0:8fdf9a60065b 227 if (direction == kFLEXIO_SPI_LsbFirst)
kadonotakashi 0:8fdf9a60065b 228 {
kadonotakashi 0:8fdf9a60065b 229 xferConfig.srcAddr -= 1U;
kadonotakashi 0:8fdf9a60065b 230 }
kadonotakashi 0:8fdf9a60065b 231 }
kadonotakashi 0:8fdf9a60065b 232 xferConfig.srcOffset = 0;
kadonotakashi 0:8fdf9a60065b 233 xferConfig.destAddr = (uint32_t)(xfer->rxData);
kadonotakashi 0:8fdf9a60065b 234 xferConfig.destOffset = bytesPerFrame;
kadonotakashi 0:8fdf9a60065b 235 EDMA_SubmitTransfer(handle->rxHandle, &xferConfig);
kadonotakashi 0:8fdf9a60065b 236 handle->rxInProgress = true;
kadonotakashi 0:8fdf9a60065b 237 FLEXIO_SPI_EnableDMA(base, kFLEXIO_SPI_RxDmaEnable, true);
kadonotakashi 0:8fdf9a60065b 238 EDMA_StartTransfer(handle->rxHandle);
kadonotakashi 0:8fdf9a60065b 239 }
kadonotakashi 0:8fdf9a60065b 240
kadonotakashi 0:8fdf9a60065b 241 /* Always start Tx transfer. */
kadonotakashi 0:8fdf9a60065b 242 if (handle->txHandle)
kadonotakashi 0:8fdf9a60065b 243 {
kadonotakashi 0:8fdf9a60065b 244 handle->txInProgress = true;
kadonotakashi 0:8fdf9a60065b 245 FLEXIO_SPI_EnableDMA(base, kFLEXIO_SPI_TxDmaEnable, true);
kadonotakashi 0:8fdf9a60065b 246 EDMA_StartTransfer(handle->txHandle);
kadonotakashi 0:8fdf9a60065b 247 }
kadonotakashi 0:8fdf9a60065b 248 }
kadonotakashi 0:8fdf9a60065b 249
kadonotakashi 0:8fdf9a60065b 250 status_t FLEXIO_SPI_MasterTransferCreateHandleEDMA(FLEXIO_SPI_Type *base,
kadonotakashi 0:8fdf9a60065b 251 flexio_spi_master_edma_handle_t *handle,
kadonotakashi 0:8fdf9a60065b 252 flexio_spi_master_edma_transfer_callback_t callback,
kadonotakashi 0:8fdf9a60065b 253 void *userData,
kadonotakashi 0:8fdf9a60065b 254 edma_handle_t *txHandle,
kadonotakashi 0:8fdf9a60065b 255 edma_handle_t *rxHandle)
kadonotakashi 0:8fdf9a60065b 256 {
kadonotakashi 0:8fdf9a60065b 257 assert(handle);
kadonotakashi 0:8fdf9a60065b 258
kadonotakashi 0:8fdf9a60065b 259 uint8_t index = 0;
kadonotakashi 0:8fdf9a60065b 260
kadonotakashi 0:8fdf9a60065b 261 /* Find the an empty handle pointer to store the handle. */
kadonotakashi 0:8fdf9a60065b 262 for (index = 0; index < FLEXIO_SPI_HANDLE_COUNT; index++)
kadonotakashi 0:8fdf9a60065b 263 {
kadonotakashi 0:8fdf9a60065b 264 if (s_edmaPrivateHandle[index].base == NULL)
kadonotakashi 0:8fdf9a60065b 265 {
kadonotakashi 0:8fdf9a60065b 266 s_edmaPrivateHandle[index].base = base;
kadonotakashi 0:8fdf9a60065b 267 s_edmaPrivateHandle[index].handle = handle;
kadonotakashi 0:8fdf9a60065b 268 break;
kadonotakashi 0:8fdf9a60065b 269 }
kadonotakashi 0:8fdf9a60065b 270 }
kadonotakashi 0:8fdf9a60065b 271
kadonotakashi 0:8fdf9a60065b 272 if (index == FLEXIO_SPI_HANDLE_COUNT)
kadonotakashi 0:8fdf9a60065b 273 {
kadonotakashi 0:8fdf9a60065b 274 return kStatus_OutOfRange;
kadonotakashi 0:8fdf9a60065b 275 }
kadonotakashi 0:8fdf9a60065b 276
kadonotakashi 0:8fdf9a60065b 277 /* Set spi base to handle. */
kadonotakashi 0:8fdf9a60065b 278 handle->txHandle = txHandle;
kadonotakashi 0:8fdf9a60065b 279 handle->rxHandle = rxHandle;
kadonotakashi 0:8fdf9a60065b 280
kadonotakashi 0:8fdf9a60065b 281 /* Register callback and userData. */
kadonotakashi 0:8fdf9a60065b 282 handle->callback = callback;
kadonotakashi 0:8fdf9a60065b 283 handle->userData = userData;
kadonotakashi 0:8fdf9a60065b 284
kadonotakashi 0:8fdf9a60065b 285 /* Set SPI state to idle. */
kadonotakashi 0:8fdf9a60065b 286 handle->txInProgress = false;
kadonotakashi 0:8fdf9a60065b 287 handle->rxInProgress = false;
kadonotakashi 0:8fdf9a60065b 288
kadonotakashi 0:8fdf9a60065b 289 /* Install callback for Tx/Rx dma channel. */
kadonotakashi 0:8fdf9a60065b 290 if (handle->txHandle)
kadonotakashi 0:8fdf9a60065b 291 {
kadonotakashi 0:8fdf9a60065b 292 EDMA_SetCallback(handle->txHandle, FLEXIO_SPI_TxEDMACallback, &s_edmaPrivateHandle[index]);
kadonotakashi 0:8fdf9a60065b 293 }
kadonotakashi 0:8fdf9a60065b 294 if (handle->rxHandle)
kadonotakashi 0:8fdf9a60065b 295 {
kadonotakashi 0:8fdf9a60065b 296 EDMA_SetCallback(handle->rxHandle, FLEXIO_SPI_RxEDMACallback, &s_edmaPrivateHandle[index]);
kadonotakashi 0:8fdf9a60065b 297 }
kadonotakashi 0:8fdf9a60065b 298
kadonotakashi 0:8fdf9a60065b 299 return kStatus_Success;
kadonotakashi 0:8fdf9a60065b 300 }
kadonotakashi 0:8fdf9a60065b 301
kadonotakashi 0:8fdf9a60065b 302 status_t FLEXIO_SPI_MasterTransferEDMA(FLEXIO_SPI_Type *base,
kadonotakashi 0:8fdf9a60065b 303 flexio_spi_master_edma_handle_t *handle,
kadonotakashi 0:8fdf9a60065b 304 flexio_spi_transfer_t *xfer)
kadonotakashi 0:8fdf9a60065b 305 {
kadonotakashi 0:8fdf9a60065b 306 assert(handle);
kadonotakashi 0:8fdf9a60065b 307 assert(xfer);
kadonotakashi 0:8fdf9a60065b 308
kadonotakashi 0:8fdf9a60065b 309 uint32_t dataMode = 0;
kadonotakashi 0:8fdf9a60065b 310 uint16_t timerCmp = base->flexioBase->TIMCMP[base->timerIndex[0]];
kadonotakashi 0:8fdf9a60065b 311
kadonotakashi 0:8fdf9a60065b 312 timerCmp &= 0x00FFU;
kadonotakashi 0:8fdf9a60065b 313
kadonotakashi 0:8fdf9a60065b 314 /* Check if the device is busy. */
kadonotakashi 0:8fdf9a60065b 315 if ((handle->txInProgress) || (handle->rxInProgress))
kadonotakashi 0:8fdf9a60065b 316 {
kadonotakashi 0:8fdf9a60065b 317 return kStatus_FLEXIO_SPI_Busy;
kadonotakashi 0:8fdf9a60065b 318 }
kadonotakashi 0:8fdf9a60065b 319
kadonotakashi 0:8fdf9a60065b 320 /* Check if input parameter invalid. */
kadonotakashi 0:8fdf9a60065b 321 if (((xfer->txData == NULL) && (xfer->rxData == NULL)) || (xfer->dataSize == 0U))
kadonotakashi 0:8fdf9a60065b 322 {
kadonotakashi 0:8fdf9a60065b 323 return kStatus_InvalidArgument;
kadonotakashi 0:8fdf9a60065b 324 }
kadonotakashi 0:8fdf9a60065b 325
kadonotakashi 0:8fdf9a60065b 326 /* configure data mode. */
kadonotakashi 0:8fdf9a60065b 327 if ((xfer->flags == kFLEXIO_SPI_8bitMsb) || (xfer->flags == kFLEXIO_SPI_8bitLsb))
kadonotakashi 0:8fdf9a60065b 328 {
kadonotakashi 0:8fdf9a60065b 329 dataMode = (8 * 2 - 1U) << 8U;
kadonotakashi 0:8fdf9a60065b 330 }
kadonotakashi 0:8fdf9a60065b 331 else if ((xfer->flags == kFLEXIO_SPI_16bitMsb) || (xfer->flags == kFLEXIO_SPI_16bitLsb))
kadonotakashi 0:8fdf9a60065b 332 {
kadonotakashi 0:8fdf9a60065b 333 dataMode = (16 * 2 - 1U) << 8U;
kadonotakashi 0:8fdf9a60065b 334 }
kadonotakashi 0:8fdf9a60065b 335 else
kadonotakashi 0:8fdf9a60065b 336 {
kadonotakashi 0:8fdf9a60065b 337 dataMode = 8 * 2 - 1U;
kadonotakashi 0:8fdf9a60065b 338 }
kadonotakashi 0:8fdf9a60065b 339
kadonotakashi 0:8fdf9a60065b 340 dataMode |= timerCmp;
kadonotakashi 0:8fdf9a60065b 341
kadonotakashi 0:8fdf9a60065b 342 base->flexioBase->TIMCMP[base->timerIndex[0]] = dataMode;
kadonotakashi 0:8fdf9a60065b 343
kadonotakashi 0:8fdf9a60065b 344 FLEXIO_SPI_EDMAConfig(base, handle, xfer);
kadonotakashi 0:8fdf9a60065b 345
kadonotakashi 0:8fdf9a60065b 346 return kStatus_Success;
kadonotakashi 0:8fdf9a60065b 347 }
kadonotakashi 0:8fdf9a60065b 348
kadonotakashi 0:8fdf9a60065b 349 status_t FLEXIO_SPI_MasterTransferGetCountEDMA(FLEXIO_SPI_Type *base,
kadonotakashi 0:8fdf9a60065b 350 flexio_spi_master_edma_handle_t *handle,
kadonotakashi 0:8fdf9a60065b 351 size_t *count)
kadonotakashi 0:8fdf9a60065b 352 {
kadonotakashi 0:8fdf9a60065b 353 assert(handle);
kadonotakashi 0:8fdf9a60065b 354
kadonotakashi 0:8fdf9a60065b 355 if (!count)
kadonotakashi 0:8fdf9a60065b 356 {
kadonotakashi 0:8fdf9a60065b 357 return kStatus_InvalidArgument;
kadonotakashi 0:8fdf9a60065b 358 }
kadonotakashi 0:8fdf9a60065b 359
kadonotakashi 0:8fdf9a60065b 360 if (handle->rxInProgress)
kadonotakashi 0:8fdf9a60065b 361 {
kadonotakashi 0:8fdf9a60065b 362 *count = (handle->transferSize -
kadonotakashi 0:8fdf9a60065b 363 (uint32_t)handle->nbytes *
kadonotakashi 0:8fdf9a60065b 364 EDMA_GetRemainingMajorLoopCount(handle->rxHandle->base, handle->rxHandle->channel));
kadonotakashi 0:8fdf9a60065b 365 }
kadonotakashi 0:8fdf9a60065b 366 else
kadonotakashi 0:8fdf9a60065b 367 {
kadonotakashi 0:8fdf9a60065b 368 *count = (handle->transferSize -
kadonotakashi 0:8fdf9a60065b 369 (uint32_t)handle->nbytes *
kadonotakashi 0:8fdf9a60065b 370 EDMA_GetRemainingMajorLoopCount(handle->txHandle->base, handle->txHandle->channel));
kadonotakashi 0:8fdf9a60065b 371 }
kadonotakashi 0:8fdf9a60065b 372
kadonotakashi 0:8fdf9a60065b 373 return kStatus_Success;
kadonotakashi 0:8fdf9a60065b 374 }
kadonotakashi 0:8fdf9a60065b 375
kadonotakashi 0:8fdf9a60065b 376 void FLEXIO_SPI_MasterTransferAbortEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle)
kadonotakashi 0:8fdf9a60065b 377 {
kadonotakashi 0:8fdf9a60065b 378 assert(handle);
kadonotakashi 0:8fdf9a60065b 379
kadonotakashi 0:8fdf9a60065b 380 /* Disable dma. */
kadonotakashi 0:8fdf9a60065b 381 EDMA_StopTransfer(handle->txHandle);
kadonotakashi 0:8fdf9a60065b 382 EDMA_StopTransfer(handle->rxHandle);
kadonotakashi 0:8fdf9a60065b 383
kadonotakashi 0:8fdf9a60065b 384 /* Disable DMA enable bit. */
kadonotakashi 0:8fdf9a60065b 385 FLEXIO_SPI_EnableDMA(base, kFLEXIO_SPI_DmaAllEnable, false);
kadonotakashi 0:8fdf9a60065b 386
kadonotakashi 0:8fdf9a60065b 387 /* Set the handle state. */
kadonotakashi 0:8fdf9a60065b 388 handle->txInProgress = false;
kadonotakashi 0:8fdf9a60065b 389 handle->rxInProgress = false;
kadonotakashi 0:8fdf9a60065b 390 }
kadonotakashi 0:8fdf9a60065b 391
kadonotakashi 0:8fdf9a60065b 392 status_t FLEXIO_SPI_SlaveTransferEDMA(FLEXIO_SPI_Type *base,
kadonotakashi 0:8fdf9a60065b 393 flexio_spi_slave_edma_handle_t *handle,
kadonotakashi 0:8fdf9a60065b 394 flexio_spi_transfer_t *xfer)
kadonotakashi 0:8fdf9a60065b 395 {
kadonotakashi 0:8fdf9a60065b 396 assert(handle);
kadonotakashi 0:8fdf9a60065b 397 assert(xfer);
kadonotakashi 0:8fdf9a60065b 398
kadonotakashi 0:8fdf9a60065b 399 uint32_t dataMode = 0;
kadonotakashi 0:8fdf9a60065b 400
kadonotakashi 0:8fdf9a60065b 401 /* Check if the device is busy. */
kadonotakashi 0:8fdf9a60065b 402 if ((handle->txInProgress) || (handle->rxInProgress))
kadonotakashi 0:8fdf9a60065b 403 {
kadonotakashi 0:8fdf9a60065b 404 return kStatus_FLEXIO_SPI_Busy;
kadonotakashi 0:8fdf9a60065b 405 }
kadonotakashi 0:8fdf9a60065b 406
kadonotakashi 0:8fdf9a60065b 407 /* Check if input parameter invalid. */
kadonotakashi 0:8fdf9a60065b 408 if (((xfer->txData == NULL) && (xfer->rxData == NULL)) || (xfer->dataSize == 0U))
kadonotakashi 0:8fdf9a60065b 409 {
kadonotakashi 0:8fdf9a60065b 410 return kStatus_InvalidArgument;
kadonotakashi 0:8fdf9a60065b 411 }
kadonotakashi 0:8fdf9a60065b 412
kadonotakashi 0:8fdf9a60065b 413 /* configure data mode. */
kadonotakashi 0:8fdf9a60065b 414 if ((xfer->flags == kFLEXIO_SPI_8bitMsb) || (xfer->flags == kFLEXIO_SPI_8bitLsb))
kadonotakashi 0:8fdf9a60065b 415 {
kadonotakashi 0:8fdf9a60065b 416 dataMode = 8 * 2 - 1U;
kadonotakashi 0:8fdf9a60065b 417 }
kadonotakashi 0:8fdf9a60065b 418 else if ((xfer->flags == kFLEXIO_SPI_16bitMsb) || (xfer->flags == kFLEXIO_SPI_16bitLsb))
kadonotakashi 0:8fdf9a60065b 419 {
kadonotakashi 0:8fdf9a60065b 420 dataMode = 16 * 2 - 1U;
kadonotakashi 0:8fdf9a60065b 421 }
kadonotakashi 0:8fdf9a60065b 422 else
kadonotakashi 0:8fdf9a60065b 423 {
kadonotakashi 0:8fdf9a60065b 424 dataMode = 8 * 2 - 1U;
kadonotakashi 0:8fdf9a60065b 425 }
kadonotakashi 0:8fdf9a60065b 426
kadonotakashi 0:8fdf9a60065b 427 base->flexioBase->TIMCMP[base->timerIndex[0]] = dataMode;
kadonotakashi 0:8fdf9a60065b 428
kadonotakashi 0:8fdf9a60065b 429 FLEXIO_SPI_EDMAConfig(base, handle, xfer);
kadonotakashi 0:8fdf9a60065b 430
kadonotakashi 0:8fdf9a60065b 431 return kStatus_Success;
kadonotakashi 0:8fdf9a60065b 432 }