![](/media/cache/img/default_profile.jpg.50x50_q85.jpg)
Color Oled(SSD1331) connect to STMicroelectronics Nucleo-F466
mbed-os/targets/TARGET_Atmel/TARGET_SAM_CortexM4/drivers/usart/usart.c@0:8fdf9a60065b, 2018-10-10 (annotated)
- Committer:
- kadonotakashi
- Date:
- Wed Oct 10 00:33:53 2018 +0000
- Revision:
- 0:8fdf9a60065b
how to make mbed librry
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
kadonotakashi | 0:8fdf9a60065b | 1 | /** |
kadonotakashi | 0:8fdf9a60065b | 2 | * \file |
kadonotakashi | 0:8fdf9a60065b | 3 | * |
kadonotakashi | 0:8fdf9a60065b | 4 | * \brief Universal Synchronous Asynchronous Receiver Transmitter (USART) driver |
kadonotakashi | 0:8fdf9a60065b | 5 | * for SAM. |
kadonotakashi | 0:8fdf9a60065b | 6 | * |
kadonotakashi | 0:8fdf9a60065b | 7 | * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved. |
kadonotakashi | 0:8fdf9a60065b | 8 | * |
kadonotakashi | 0:8fdf9a60065b | 9 | * \asf_license_start |
kadonotakashi | 0:8fdf9a60065b | 10 | * |
kadonotakashi | 0:8fdf9a60065b | 11 | * \page License |
kadonotakashi | 0:8fdf9a60065b | 12 | * |
kadonotakashi | 0:8fdf9a60065b | 13 | * Redistribution and use in source and binary forms, with or without |
kadonotakashi | 0:8fdf9a60065b | 14 | * modification, are permitted provided that the following conditions are met: |
kadonotakashi | 0:8fdf9a60065b | 15 | * |
kadonotakashi | 0:8fdf9a60065b | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
kadonotakashi | 0:8fdf9a60065b | 17 | * this list of conditions and the following disclaimer. |
kadonotakashi | 0:8fdf9a60065b | 18 | * |
kadonotakashi | 0:8fdf9a60065b | 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
kadonotakashi | 0:8fdf9a60065b | 20 | * this list of conditions and the following disclaimer in the documentation |
kadonotakashi | 0:8fdf9a60065b | 21 | * and/or other materials provided with the distribution. |
kadonotakashi | 0:8fdf9a60065b | 22 | * |
kadonotakashi | 0:8fdf9a60065b | 23 | * 3. The name of Atmel may not be used to endorse or promote products derived |
kadonotakashi | 0:8fdf9a60065b | 24 | * from this software without specific prior written permission. |
kadonotakashi | 0:8fdf9a60065b | 25 | * |
kadonotakashi | 0:8fdf9a60065b | 26 | * 4. This software may only be redistributed and used in connection with an |
kadonotakashi | 0:8fdf9a60065b | 27 | * Atmel microcontroller product. |
kadonotakashi | 0:8fdf9a60065b | 28 | * |
kadonotakashi | 0:8fdf9a60065b | 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
kadonotakashi | 0:8fdf9a60065b | 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
kadonotakashi | 0:8fdf9a60065b | 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
kadonotakashi | 0:8fdf9a60065b | 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
kadonotakashi | 0:8fdf9a60065b | 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
kadonotakashi | 0:8fdf9a60065b | 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
kadonotakashi | 0:8fdf9a60065b | 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
kadonotakashi | 0:8fdf9a60065b | 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
kadonotakashi | 0:8fdf9a60065b | 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
kadonotakashi | 0:8fdf9a60065b | 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
kadonotakashi | 0:8fdf9a60065b | 39 | * POSSIBILITY OF SUCH DAMAGE. |
kadonotakashi | 0:8fdf9a60065b | 40 | * |
kadonotakashi | 0:8fdf9a60065b | 41 | * \asf_license_stop |
kadonotakashi | 0:8fdf9a60065b | 42 | * |
kadonotakashi | 0:8fdf9a60065b | 43 | */ |
kadonotakashi | 0:8fdf9a60065b | 44 | /* |
kadonotakashi | 0:8fdf9a60065b | 45 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
kadonotakashi | 0:8fdf9a60065b | 46 | */ |
kadonotakashi | 0:8fdf9a60065b | 47 | |
kadonotakashi | 0:8fdf9a60065b | 48 | #include "usart.h" |
kadonotakashi | 0:8fdf9a60065b | 49 | |
kadonotakashi | 0:8fdf9a60065b | 50 | /// @cond 0 |
kadonotakashi | 0:8fdf9a60065b | 51 | /**INDENT-OFF**/ |
kadonotakashi | 0:8fdf9a60065b | 52 | #ifdef __cplusplus |
kadonotakashi | 0:8fdf9a60065b | 53 | extern "C" { |
kadonotakashi | 0:8fdf9a60065b | 54 | #endif |
kadonotakashi | 0:8fdf9a60065b | 55 | /**INDENT-ON**/ |
kadonotakashi | 0:8fdf9a60065b | 56 | /// @endcond |
kadonotakashi | 0:8fdf9a60065b | 57 | |
kadonotakashi | 0:8fdf9a60065b | 58 | /** |
kadonotakashi | 0:8fdf9a60065b | 59 | * \defgroup sam_drivers_usart_group Universal Synchronous Asynchronous |
kadonotakashi | 0:8fdf9a60065b | 60 | * Receiver Transmitter (USART) |
kadonotakashi | 0:8fdf9a60065b | 61 | * |
kadonotakashi | 0:8fdf9a60065b | 62 | * The Universal Synchronous Asynchronous Receiver Transceiver (USART) |
kadonotakashi | 0:8fdf9a60065b | 63 | * provides one full duplex universal synchronous asynchronous serial link. |
kadonotakashi | 0:8fdf9a60065b | 64 | * Data frame format is widely programmable (data length, parity, number of |
kadonotakashi | 0:8fdf9a60065b | 65 | * stop bits) to support a maximum of standards. The receiver implements |
kadonotakashi | 0:8fdf9a60065b | 66 | * parity error, framing error and overrun error detection. The receiver |
kadonotakashi | 0:8fdf9a60065b | 67 | * time-out enables handling variable-length frames and the transmitter |
kadonotakashi | 0:8fdf9a60065b | 68 | * timeguard facilitates communications with slow remote devices. Multidrop |
kadonotakashi | 0:8fdf9a60065b | 69 | * communications are also supported through address bit handling in reception |
kadonotakashi | 0:8fdf9a60065b | 70 | * and transmission. The driver supports the following modes: |
kadonotakashi | 0:8fdf9a60065b | 71 | * RS232, RS485, SPI, IrDA, ISO7816, MODEM, Hardware handshaking and LIN. |
kadonotakashi | 0:8fdf9a60065b | 72 | * |
kadonotakashi | 0:8fdf9a60065b | 73 | * @{ |
kadonotakashi | 0:8fdf9a60065b | 74 | */ |
kadonotakashi | 0:8fdf9a60065b | 75 | |
kadonotakashi | 0:8fdf9a60065b | 76 | /* The write protect key value. */ |
kadonotakashi | 0:8fdf9a60065b | 77 | #ifndef US_WPMR_WPKEY_PASSWD |
kadonotakashi | 0:8fdf9a60065b | 78 | #define US_WPMR_WPKEY_PASSWD US_WPMR_WPKEY(0x555341U) |
kadonotakashi | 0:8fdf9a60065b | 79 | #endif |
kadonotakashi | 0:8fdf9a60065b | 80 | |
kadonotakashi | 0:8fdf9a60065b | 81 | #ifndef US_WPMR_WPKEY_PASSWD |
kadonotakashi | 0:8fdf9a60065b | 82 | # define US_WPMR_WPKEY_PASSWD US_WPMR_WPKEY(US_WPKEY_VALUE) |
kadonotakashi | 0:8fdf9a60065b | 83 | #endif |
kadonotakashi | 0:8fdf9a60065b | 84 | |
kadonotakashi | 0:8fdf9a60065b | 85 | /* The CD value scope programmed in MR register. */ |
kadonotakashi | 0:8fdf9a60065b | 86 | #define MIN_CD_VALUE 0x01 |
kadonotakashi | 0:8fdf9a60065b | 87 | #define MIN_CD_VALUE_SPI 0x04 |
kadonotakashi | 0:8fdf9a60065b | 88 | #define MAX_CD_VALUE US_BRGR_CD_Msk |
kadonotakashi | 0:8fdf9a60065b | 89 | |
kadonotakashi | 0:8fdf9a60065b | 90 | /* The receiver sampling divide of baudrate clock. */ |
kadonotakashi | 0:8fdf9a60065b | 91 | #define HIGH_FRQ_SAMPLE_DIV 16 |
kadonotakashi | 0:8fdf9a60065b | 92 | #define LOW_FRQ_SAMPLE_DIV 8 |
kadonotakashi | 0:8fdf9a60065b | 93 | |
kadonotakashi | 0:8fdf9a60065b | 94 | /* Max transmitter timeguard. */ |
kadonotakashi | 0:8fdf9a60065b | 95 | #define MAX_TRAN_GUARD_TIME US_TTGR_TG_Msk |
kadonotakashi | 0:8fdf9a60065b | 96 | |
kadonotakashi | 0:8fdf9a60065b | 97 | /* The non-existent parity error number. */ |
kadonotakashi | 0:8fdf9a60065b | 98 | #define USART_PARITY_ERROR 5 |
kadonotakashi | 0:8fdf9a60065b | 99 | |
kadonotakashi | 0:8fdf9a60065b | 100 | /* ISO7816 protocol type. */ |
kadonotakashi | 0:8fdf9a60065b | 101 | #define ISO7816_T_0 0 |
kadonotakashi | 0:8fdf9a60065b | 102 | #define ISO7816_T_1 1 |
kadonotakashi | 0:8fdf9a60065b | 103 | |
kadonotakashi | 0:8fdf9a60065b | 104 | /** |
kadonotakashi | 0:8fdf9a60065b | 105 | * \brief Calculate a clock divider(CD) and a fractional part (FP) for the |
kadonotakashi | 0:8fdf9a60065b | 106 | * USART asynchronous modes to generate a baudrate as close as possible to |
kadonotakashi | 0:8fdf9a60065b | 107 | * the baudrate set point. |
kadonotakashi | 0:8fdf9a60065b | 108 | * |
kadonotakashi | 0:8fdf9a60065b | 109 | * \note Baud rate calculation: Baudrate = ul_mck/(Over * (CD + FP/8)) |
kadonotakashi | 0:8fdf9a60065b | 110 | * (Over being 16 or 8). The maximal oversampling is selected if it allows to |
kadonotakashi | 0:8fdf9a60065b | 111 | * generate a baudrate close to the set point. |
kadonotakashi | 0:8fdf9a60065b | 112 | * |
kadonotakashi | 0:8fdf9a60065b | 113 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 114 | * \param baudrate Baud rate set point. |
kadonotakashi | 0:8fdf9a60065b | 115 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 116 | * |
kadonotakashi | 0:8fdf9a60065b | 117 | * \retval 0 Baud rate is successfully initialized. |
kadonotakashi | 0:8fdf9a60065b | 118 | * \retval 1 Baud rate set point is out of range for the given input clock |
kadonotakashi | 0:8fdf9a60065b | 119 | * frequency. |
kadonotakashi | 0:8fdf9a60065b | 120 | */ |
kadonotakashi | 0:8fdf9a60065b | 121 | uint32_t usart_set_async_baudrate(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 122 | uint32_t baudrate, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 123 | { |
kadonotakashi | 0:8fdf9a60065b | 124 | uint32_t over; |
kadonotakashi | 0:8fdf9a60065b | 125 | uint32_t cd_fp; |
kadonotakashi | 0:8fdf9a60065b | 126 | uint32_t cd; |
kadonotakashi | 0:8fdf9a60065b | 127 | uint32_t fp; |
kadonotakashi | 0:8fdf9a60065b | 128 | |
kadonotakashi | 0:8fdf9a60065b | 129 | /* Calculate the receiver sampling divide of baudrate clock. */ |
kadonotakashi | 0:8fdf9a60065b | 130 | if (ul_mck >= HIGH_FRQ_SAMPLE_DIV * baudrate) { |
kadonotakashi | 0:8fdf9a60065b | 131 | over = HIGH_FRQ_SAMPLE_DIV; |
kadonotakashi | 0:8fdf9a60065b | 132 | } else { |
kadonotakashi | 0:8fdf9a60065b | 133 | over = LOW_FRQ_SAMPLE_DIV; |
kadonotakashi | 0:8fdf9a60065b | 134 | } |
kadonotakashi | 0:8fdf9a60065b | 135 | |
kadonotakashi | 0:8fdf9a60065b | 136 | /* Calculate clock divider according to the fraction calculated formula. */ |
kadonotakashi | 0:8fdf9a60065b | 137 | cd_fp = (8 * ul_mck + (over * baudrate) / 2) / (over * baudrate); |
kadonotakashi | 0:8fdf9a60065b | 138 | cd = cd_fp >> 3; |
kadonotakashi | 0:8fdf9a60065b | 139 | fp = cd_fp & 0x07; |
kadonotakashi | 0:8fdf9a60065b | 140 | if (cd < MIN_CD_VALUE || cd > MAX_CD_VALUE) { |
kadonotakashi | 0:8fdf9a60065b | 141 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 142 | } |
kadonotakashi | 0:8fdf9a60065b | 143 | |
kadonotakashi | 0:8fdf9a60065b | 144 | /* Configure the OVER bit in MR register. */ |
kadonotakashi | 0:8fdf9a60065b | 145 | if (over == 8) { |
kadonotakashi | 0:8fdf9a60065b | 146 | p_usart->US_MR |= US_MR_OVER; |
kadonotakashi | 0:8fdf9a60065b | 147 | } |
kadonotakashi | 0:8fdf9a60065b | 148 | |
kadonotakashi | 0:8fdf9a60065b | 149 | /* Configure the baudrate generate register. */ |
kadonotakashi | 0:8fdf9a60065b | 150 | p_usart->US_BRGR = (cd << US_BRGR_CD_Pos) | (fp << US_BRGR_FP_Pos); |
kadonotakashi | 0:8fdf9a60065b | 151 | |
kadonotakashi | 0:8fdf9a60065b | 152 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 153 | } |
kadonotakashi | 0:8fdf9a60065b | 154 | |
kadonotakashi | 0:8fdf9a60065b | 155 | /** |
kadonotakashi | 0:8fdf9a60065b | 156 | * \brief Calculate a clock divider for the USART synchronous master modes |
kadonotakashi | 0:8fdf9a60065b | 157 | * to generate a baudrate as close as possible to the baudrate set point. |
kadonotakashi | 0:8fdf9a60065b | 158 | * |
kadonotakashi | 0:8fdf9a60065b | 159 | * \note Synchronous baudrate calculation: baudrate = ul_mck / cd |
kadonotakashi | 0:8fdf9a60065b | 160 | * |
kadonotakashi | 0:8fdf9a60065b | 161 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 162 | * \param baudrate Baud rate set point. |
kadonotakashi | 0:8fdf9a60065b | 163 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 164 | * |
kadonotakashi | 0:8fdf9a60065b | 165 | * \retval 0 Baud rate is successfully initialized. |
kadonotakashi | 0:8fdf9a60065b | 166 | * \retval 1 Baud rate set point is out of range for the given input clock |
kadonotakashi | 0:8fdf9a60065b | 167 | * frequency. |
kadonotakashi | 0:8fdf9a60065b | 168 | */ |
kadonotakashi | 0:8fdf9a60065b | 169 | static uint32_t usart_set_sync_master_baudrate(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 170 | uint32_t baudrate, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 171 | { |
kadonotakashi | 0:8fdf9a60065b | 172 | uint32_t cd; |
kadonotakashi | 0:8fdf9a60065b | 173 | |
kadonotakashi | 0:8fdf9a60065b | 174 | /* Calculate clock divider according to the formula in synchronous mode. */ |
kadonotakashi | 0:8fdf9a60065b | 175 | cd = (ul_mck + baudrate / 2) / baudrate; |
kadonotakashi | 0:8fdf9a60065b | 176 | |
kadonotakashi | 0:8fdf9a60065b | 177 | if (cd < MIN_CD_VALUE || cd > MAX_CD_VALUE) { |
kadonotakashi | 0:8fdf9a60065b | 178 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 179 | } |
kadonotakashi | 0:8fdf9a60065b | 180 | |
kadonotakashi | 0:8fdf9a60065b | 181 | /* Configure the baudrate generate register. */ |
kadonotakashi | 0:8fdf9a60065b | 182 | p_usart->US_BRGR = cd << US_BRGR_CD_Pos; |
kadonotakashi | 0:8fdf9a60065b | 183 | |
kadonotakashi | 0:8fdf9a60065b | 184 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USCLKS_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 185 | US_MR_USCLKS_MCK | US_MR_SYNC; |
kadonotakashi | 0:8fdf9a60065b | 186 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 187 | } |
kadonotakashi | 0:8fdf9a60065b | 188 | |
kadonotakashi | 0:8fdf9a60065b | 189 | /** |
kadonotakashi | 0:8fdf9a60065b | 190 | * \brief Select the SCK pin as the source of baud rate for the USART |
kadonotakashi | 0:8fdf9a60065b | 191 | * synchronous slave modes. |
kadonotakashi | 0:8fdf9a60065b | 192 | * |
kadonotakashi | 0:8fdf9a60065b | 193 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 194 | */ |
kadonotakashi | 0:8fdf9a60065b | 195 | static void usart_set_sync_slave_baudrate(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 196 | { |
kadonotakashi | 0:8fdf9a60065b | 197 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USCLKS_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 198 | US_MR_USCLKS_SCK | US_MR_SYNC; |
kadonotakashi | 0:8fdf9a60065b | 199 | } |
kadonotakashi | 0:8fdf9a60065b | 200 | |
kadonotakashi | 0:8fdf9a60065b | 201 | /** |
kadonotakashi | 0:8fdf9a60065b | 202 | * \brief Calculate a clock divider (\e CD) for the USART SPI master mode to |
kadonotakashi | 0:8fdf9a60065b | 203 | * generate a baud rate as close as possible to the baud rate set point. |
kadonotakashi | 0:8fdf9a60065b | 204 | * |
kadonotakashi | 0:8fdf9a60065b | 205 | * \note Baud rate calculation: |
kadonotakashi | 0:8fdf9a60065b | 206 | * \f$ Baudrate = \frac{SelectedClock}{CD} \f$. |
kadonotakashi | 0:8fdf9a60065b | 207 | * |
kadonotakashi | 0:8fdf9a60065b | 208 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 209 | * \param baudrate Baud rate set point. |
kadonotakashi | 0:8fdf9a60065b | 210 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 211 | * |
kadonotakashi | 0:8fdf9a60065b | 212 | * \retval 0 Baud rate is successfully initialized. |
kadonotakashi | 0:8fdf9a60065b | 213 | * \retval 1 Baud rate set point is out of range for the given input clock |
kadonotakashi | 0:8fdf9a60065b | 214 | * frequency. |
kadonotakashi | 0:8fdf9a60065b | 215 | */ |
kadonotakashi | 0:8fdf9a60065b | 216 | static uint32_t usart_set_spi_master_baudrate(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 217 | uint32_t baudrate, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 218 | { |
kadonotakashi | 0:8fdf9a60065b | 219 | uint32_t cd; |
kadonotakashi | 0:8fdf9a60065b | 220 | |
kadonotakashi | 0:8fdf9a60065b | 221 | /* Calculate the clock divider according to the formula in SPI mode. */ |
kadonotakashi | 0:8fdf9a60065b | 222 | cd = (ul_mck + baudrate / 2) / baudrate; |
kadonotakashi | 0:8fdf9a60065b | 223 | |
kadonotakashi | 0:8fdf9a60065b | 224 | if (cd < MIN_CD_VALUE_SPI || cd > MAX_CD_VALUE) { |
kadonotakashi | 0:8fdf9a60065b | 225 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 226 | } |
kadonotakashi | 0:8fdf9a60065b | 227 | |
kadonotakashi | 0:8fdf9a60065b | 228 | p_usart->US_BRGR = cd << US_BRGR_CD_Pos; |
kadonotakashi | 0:8fdf9a60065b | 229 | |
kadonotakashi | 0:8fdf9a60065b | 230 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 231 | } |
kadonotakashi | 0:8fdf9a60065b | 232 | |
kadonotakashi | 0:8fdf9a60065b | 233 | /** |
kadonotakashi | 0:8fdf9a60065b | 234 | * \brief Select the SCK pin as the source of baudrate for the USART SPI slave |
kadonotakashi | 0:8fdf9a60065b | 235 | * mode. |
kadonotakashi | 0:8fdf9a60065b | 236 | * |
kadonotakashi | 0:8fdf9a60065b | 237 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 238 | */ |
kadonotakashi | 0:8fdf9a60065b | 239 | static void usart_set_spi_slave_baudrate(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 240 | { |
kadonotakashi | 0:8fdf9a60065b | 241 | p_usart->US_MR &= ~US_MR_USCLKS_Msk; |
kadonotakashi | 0:8fdf9a60065b | 242 | p_usart->US_MR |= US_MR_USCLKS_SCK; |
kadonotakashi | 0:8fdf9a60065b | 243 | } |
kadonotakashi | 0:8fdf9a60065b | 244 | |
kadonotakashi | 0:8fdf9a60065b | 245 | /** |
kadonotakashi | 0:8fdf9a60065b | 246 | * \brief Reset the USART and disable TX and RX. |
kadonotakashi | 0:8fdf9a60065b | 247 | * |
kadonotakashi | 0:8fdf9a60065b | 248 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 249 | */ |
kadonotakashi | 0:8fdf9a60065b | 250 | void usart_reset(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 251 | { |
kadonotakashi | 0:8fdf9a60065b | 252 | /* Disable the Write Protect. */ |
kadonotakashi | 0:8fdf9a60065b | 253 | usart_disable_writeprotect(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 254 | |
kadonotakashi | 0:8fdf9a60065b | 255 | /* Reset registers that could cause unpredictable behavior after reset. */ |
kadonotakashi | 0:8fdf9a60065b | 256 | p_usart->US_MR = 0; |
kadonotakashi | 0:8fdf9a60065b | 257 | p_usart->US_RTOR = 0; |
kadonotakashi | 0:8fdf9a60065b | 258 | p_usart->US_TTGR = 0; |
kadonotakashi | 0:8fdf9a60065b | 259 | |
kadonotakashi | 0:8fdf9a60065b | 260 | /* Disable TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 261 | usart_reset_tx(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 262 | usart_reset_rx(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 263 | /* Reset status bits. */ |
kadonotakashi | 0:8fdf9a60065b | 264 | usart_reset_status(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 265 | /* Turn off RTS and DTR if exist. */ |
kadonotakashi | 0:8fdf9a60065b | 266 | usart_drive_RTS_pin_high(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 267 | #if (SAM3S || SAM4S || SAM3U || SAM4L || SAM4E) |
kadonotakashi | 0:8fdf9a60065b | 268 | usart_drive_DTR_pin_high(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 269 | #endif |
kadonotakashi | 0:8fdf9a60065b | 270 | } |
kadonotakashi | 0:8fdf9a60065b | 271 | |
kadonotakashi | 0:8fdf9a60065b | 272 | /** |
kadonotakashi | 0:8fdf9a60065b | 273 | * \brief Configure USART to work in RS232 mode. |
kadonotakashi | 0:8fdf9a60065b | 274 | * |
kadonotakashi | 0:8fdf9a60065b | 275 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 276 | * |
kadonotakashi | 0:8fdf9a60065b | 277 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 278 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 279 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 280 | * |
kadonotakashi | 0:8fdf9a60065b | 281 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 282 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 283 | */ |
kadonotakashi | 0:8fdf9a60065b | 284 | uint32_t usart_init_rs232(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 285 | const sam_usart_opt_t *p_usart_opt, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 286 | { |
kadonotakashi | 0:8fdf9a60065b | 287 | static uint32_t ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 288 | |
kadonotakashi | 0:8fdf9a60065b | 289 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 290 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 291 | |
kadonotakashi | 0:8fdf9a60065b | 292 | ul_reg_val = 0; |
kadonotakashi | 0:8fdf9a60065b | 293 | /* Check whether the input values are legal. */ |
kadonotakashi | 0:8fdf9a60065b | 294 | if (!p_usart_opt || usart_set_async_baudrate(p_usart, |
kadonotakashi | 0:8fdf9a60065b | 295 | p_usart_opt->baudrate, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 296 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 297 | } |
kadonotakashi | 0:8fdf9a60065b | 298 | |
kadonotakashi | 0:8fdf9a60065b | 299 | /* Configure the USART option. */ |
kadonotakashi | 0:8fdf9a60065b | 300 | ul_reg_val |= p_usart_opt->char_length | p_usart_opt->parity_type | |
kadonotakashi | 0:8fdf9a60065b | 301 | p_usart_opt->channel_mode | p_usart_opt->stop_bits; |
kadonotakashi | 0:8fdf9a60065b | 302 | |
kadonotakashi | 0:8fdf9a60065b | 303 | /* Configure the USART mode as normal mode. */ |
kadonotakashi | 0:8fdf9a60065b | 304 | ul_reg_val |= US_MR_USART_MODE_NORMAL; |
kadonotakashi | 0:8fdf9a60065b | 305 | |
kadonotakashi | 0:8fdf9a60065b | 306 | p_usart->US_MR |= ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 307 | |
kadonotakashi | 0:8fdf9a60065b | 308 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 309 | } |
kadonotakashi | 0:8fdf9a60065b | 310 | |
kadonotakashi | 0:8fdf9a60065b | 311 | /** |
kadonotakashi | 0:8fdf9a60065b | 312 | * \brief Configure USART to work in hardware handshaking mode. |
kadonotakashi | 0:8fdf9a60065b | 313 | * |
kadonotakashi | 0:8fdf9a60065b | 314 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 315 | * |
kadonotakashi | 0:8fdf9a60065b | 316 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 317 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 318 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 319 | * |
kadonotakashi | 0:8fdf9a60065b | 320 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 321 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 322 | */ |
kadonotakashi | 0:8fdf9a60065b | 323 | uint32_t usart_init_hw_handshaking(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 324 | const sam_usart_opt_t *p_usart_opt, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 325 | { |
kadonotakashi | 0:8fdf9a60065b | 326 | /* Initialize the USART as standard RS232. */ |
kadonotakashi | 0:8fdf9a60065b | 327 | if (usart_init_rs232(p_usart, p_usart_opt, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 328 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 329 | } |
kadonotakashi | 0:8fdf9a60065b | 330 | |
kadonotakashi | 0:8fdf9a60065b | 331 | /* Set hardware handshaking mode. */ |
kadonotakashi | 0:8fdf9a60065b | 332 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USART_MODE_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 333 | US_MR_USART_MODE_HW_HANDSHAKING; |
kadonotakashi | 0:8fdf9a60065b | 334 | |
kadonotakashi | 0:8fdf9a60065b | 335 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 336 | } |
kadonotakashi | 0:8fdf9a60065b | 337 | |
kadonotakashi | 0:8fdf9a60065b | 338 | #if (SAM3S || SAM4S || SAM3U || SAM4L || SAM4E) |
kadonotakashi | 0:8fdf9a60065b | 339 | |
kadonotakashi | 0:8fdf9a60065b | 340 | /** |
kadonotakashi | 0:8fdf9a60065b | 341 | * \brief Configure USART to work in modem mode. |
kadonotakashi | 0:8fdf9a60065b | 342 | * |
kadonotakashi | 0:8fdf9a60065b | 343 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 344 | * |
kadonotakashi | 0:8fdf9a60065b | 345 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 346 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 347 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 348 | * |
kadonotakashi | 0:8fdf9a60065b | 349 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 350 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 351 | */ |
kadonotakashi | 0:8fdf9a60065b | 352 | uint32_t usart_init_modem(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 353 | const sam_usart_opt_t *p_usart_opt, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 354 | { |
kadonotakashi | 0:8fdf9a60065b | 355 | /* |
kadonotakashi | 0:8fdf9a60065b | 356 | * SAM3S, SAM4S and SAM4E series support MODEM mode only on USART1, |
kadonotakashi | 0:8fdf9a60065b | 357 | * SAM3U and SAM4L series support MODEM mode only on USART0. |
kadonotakashi | 0:8fdf9a60065b | 358 | */ |
kadonotakashi | 0:8fdf9a60065b | 359 | #if (SAM3S || SAM4S || SAM4E) |
kadonotakashi | 0:8fdf9a60065b | 360 | #ifdef USART1 |
kadonotakashi | 0:8fdf9a60065b | 361 | if (p_usart != USART1) { |
kadonotakashi | 0:8fdf9a60065b | 362 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 363 | } |
kadonotakashi | 0:8fdf9a60065b | 364 | #endif |
kadonotakashi | 0:8fdf9a60065b | 365 | #elif (SAM3U || SAM4L) |
kadonotakashi | 0:8fdf9a60065b | 366 | if (p_usart != USART0) { |
kadonotakashi | 0:8fdf9a60065b | 367 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 368 | } |
kadonotakashi | 0:8fdf9a60065b | 369 | #endif |
kadonotakashi | 0:8fdf9a60065b | 370 | |
kadonotakashi | 0:8fdf9a60065b | 371 | /* Initialize the USART as standard RS232. */ |
kadonotakashi | 0:8fdf9a60065b | 372 | if (usart_init_rs232(p_usart, p_usart_opt, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 373 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 374 | } |
kadonotakashi | 0:8fdf9a60065b | 375 | |
kadonotakashi | 0:8fdf9a60065b | 376 | /* Set MODEM mode. */ |
kadonotakashi | 0:8fdf9a60065b | 377 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USART_MODE_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 378 | US_MR_USART_MODE_MODEM; |
kadonotakashi | 0:8fdf9a60065b | 379 | |
kadonotakashi | 0:8fdf9a60065b | 380 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 381 | } |
kadonotakashi | 0:8fdf9a60065b | 382 | #endif |
kadonotakashi | 0:8fdf9a60065b | 383 | |
kadonotakashi | 0:8fdf9a60065b | 384 | /** |
kadonotakashi | 0:8fdf9a60065b | 385 | * \brief Configure USART to work in SYNC mode and act as a master. |
kadonotakashi | 0:8fdf9a60065b | 386 | * |
kadonotakashi | 0:8fdf9a60065b | 387 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 388 | * |
kadonotakashi | 0:8fdf9a60065b | 389 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 390 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 391 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 392 | * |
kadonotakashi | 0:8fdf9a60065b | 393 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 394 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 395 | */ |
kadonotakashi | 0:8fdf9a60065b | 396 | uint32_t usart_init_sync_master(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 397 | const sam_usart_opt_t *p_usart_opt, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 398 | { |
kadonotakashi | 0:8fdf9a60065b | 399 | static uint32_t ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 400 | |
kadonotakashi | 0:8fdf9a60065b | 401 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 402 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 403 | |
kadonotakashi | 0:8fdf9a60065b | 404 | ul_reg_val = 0; |
kadonotakashi | 0:8fdf9a60065b | 405 | /* Check whether the input values are legal. */ |
kadonotakashi | 0:8fdf9a60065b | 406 | if (!p_usart_opt || usart_set_sync_master_baudrate(p_usart, |
kadonotakashi | 0:8fdf9a60065b | 407 | p_usart_opt->baudrate, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 408 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 409 | } |
kadonotakashi | 0:8fdf9a60065b | 410 | |
kadonotakashi | 0:8fdf9a60065b | 411 | /* Configure the USART option. */ |
kadonotakashi | 0:8fdf9a60065b | 412 | ul_reg_val |= p_usart_opt->char_length | p_usart_opt->parity_type | |
kadonotakashi | 0:8fdf9a60065b | 413 | p_usart_opt->channel_mode | p_usart_opt->stop_bits; |
kadonotakashi | 0:8fdf9a60065b | 414 | |
kadonotakashi | 0:8fdf9a60065b | 415 | /* Set normal mode and output clock as synchronous master. */ |
kadonotakashi | 0:8fdf9a60065b | 416 | ul_reg_val |= US_MR_USART_MODE_NORMAL | US_MR_CLKO; |
kadonotakashi | 0:8fdf9a60065b | 417 | p_usart->US_MR |= ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 418 | |
kadonotakashi | 0:8fdf9a60065b | 419 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 420 | } |
kadonotakashi | 0:8fdf9a60065b | 421 | |
kadonotakashi | 0:8fdf9a60065b | 422 | /** |
kadonotakashi | 0:8fdf9a60065b | 423 | * \brief Configure USART to work in SYNC mode and act as a slave. |
kadonotakashi | 0:8fdf9a60065b | 424 | * |
kadonotakashi | 0:8fdf9a60065b | 425 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 426 | * |
kadonotakashi | 0:8fdf9a60065b | 427 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 428 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 429 | * |
kadonotakashi | 0:8fdf9a60065b | 430 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 431 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 432 | */ |
kadonotakashi | 0:8fdf9a60065b | 433 | uint32_t usart_init_sync_slave(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 434 | const sam_usart_opt_t *p_usart_opt) |
kadonotakashi | 0:8fdf9a60065b | 435 | { |
kadonotakashi | 0:8fdf9a60065b | 436 | static uint32_t ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 437 | |
kadonotakashi | 0:8fdf9a60065b | 438 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 439 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 440 | |
kadonotakashi | 0:8fdf9a60065b | 441 | ul_reg_val = 0; |
kadonotakashi | 0:8fdf9a60065b | 442 | usart_set_sync_slave_baudrate(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 443 | |
kadonotakashi | 0:8fdf9a60065b | 444 | /* Check whether the input values are legal. */ |
kadonotakashi | 0:8fdf9a60065b | 445 | if (!p_usart_opt) { |
kadonotakashi | 0:8fdf9a60065b | 446 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 447 | } |
kadonotakashi | 0:8fdf9a60065b | 448 | |
kadonotakashi | 0:8fdf9a60065b | 449 | /* Configure the USART option. */ |
kadonotakashi | 0:8fdf9a60065b | 450 | ul_reg_val |= p_usart_opt->char_length | p_usart_opt->parity_type | |
kadonotakashi | 0:8fdf9a60065b | 451 | p_usart_opt->channel_mode | p_usart_opt->stop_bits; |
kadonotakashi | 0:8fdf9a60065b | 452 | |
kadonotakashi | 0:8fdf9a60065b | 453 | /* Set normal mode. */ |
kadonotakashi | 0:8fdf9a60065b | 454 | ul_reg_val |= US_MR_USART_MODE_NORMAL; |
kadonotakashi | 0:8fdf9a60065b | 455 | p_usart->US_MR |= ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 456 | |
kadonotakashi | 0:8fdf9a60065b | 457 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 458 | } |
kadonotakashi | 0:8fdf9a60065b | 459 | |
kadonotakashi | 0:8fdf9a60065b | 460 | /** |
kadonotakashi | 0:8fdf9a60065b | 461 | * \brief Configure USART to work in RS485 mode. |
kadonotakashi | 0:8fdf9a60065b | 462 | * |
kadonotakashi | 0:8fdf9a60065b | 463 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 464 | * |
kadonotakashi | 0:8fdf9a60065b | 465 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 466 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 467 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 468 | * |
kadonotakashi | 0:8fdf9a60065b | 469 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 470 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 471 | */ |
kadonotakashi | 0:8fdf9a60065b | 472 | uint32_t usart_init_rs485(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 473 | const sam_usart_opt_t *p_usart_opt, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 474 | { |
kadonotakashi | 0:8fdf9a60065b | 475 | /* Initialize the USART as standard RS232. */ |
kadonotakashi | 0:8fdf9a60065b | 476 | if (usart_init_rs232(p_usart, p_usart_opt, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 477 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 478 | } |
kadonotakashi | 0:8fdf9a60065b | 479 | |
kadonotakashi | 0:8fdf9a60065b | 480 | /* Set RS485 mode. */ |
kadonotakashi | 0:8fdf9a60065b | 481 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USART_MODE_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 482 | US_MR_USART_MODE_RS485; |
kadonotakashi | 0:8fdf9a60065b | 483 | |
kadonotakashi | 0:8fdf9a60065b | 484 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 485 | } |
kadonotakashi | 0:8fdf9a60065b | 486 | |
kadonotakashi | 0:8fdf9a60065b | 487 | #if (!SAMG55 && !SAMV71 && !SAMV70 && !SAME70 && !SAMS70) |
kadonotakashi | 0:8fdf9a60065b | 488 | /** |
kadonotakashi | 0:8fdf9a60065b | 489 | * \brief Configure USART to work in IrDA mode. |
kadonotakashi | 0:8fdf9a60065b | 490 | * |
kadonotakashi | 0:8fdf9a60065b | 491 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 492 | * |
kadonotakashi | 0:8fdf9a60065b | 493 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 494 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 495 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 496 | * |
kadonotakashi | 0:8fdf9a60065b | 497 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 498 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 499 | */ |
kadonotakashi | 0:8fdf9a60065b | 500 | uint32_t usart_init_irda(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 501 | const sam_usart_opt_t *p_usart_opt, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 502 | { |
kadonotakashi | 0:8fdf9a60065b | 503 | /* Initialize the USART as standard RS232. */ |
kadonotakashi | 0:8fdf9a60065b | 504 | if (usart_init_rs232(p_usart, p_usart_opt, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 505 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 506 | } |
kadonotakashi | 0:8fdf9a60065b | 507 | |
kadonotakashi | 0:8fdf9a60065b | 508 | /* Set IrDA filter. */ |
kadonotakashi | 0:8fdf9a60065b | 509 | p_usart->US_IF = p_usart_opt->irda_filter; |
kadonotakashi | 0:8fdf9a60065b | 510 | |
kadonotakashi | 0:8fdf9a60065b | 511 | /* Set IrDA mode. */ |
kadonotakashi | 0:8fdf9a60065b | 512 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USART_MODE_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 513 | US_MR_USART_MODE_IRDA; |
kadonotakashi | 0:8fdf9a60065b | 514 | |
kadonotakashi | 0:8fdf9a60065b | 515 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 516 | } |
kadonotakashi | 0:8fdf9a60065b | 517 | #endif |
kadonotakashi | 0:8fdf9a60065b | 518 | |
kadonotakashi | 0:8fdf9a60065b | 519 | #if (!SAMV71 && !SAMV70 && !SAME70 && !SAMS70) |
kadonotakashi | 0:8fdf9a60065b | 520 | /** |
kadonotakashi | 0:8fdf9a60065b | 521 | * \brief Calculate a clock divider (\e CD) for the USART ISO7816 mode to |
kadonotakashi | 0:8fdf9a60065b | 522 | * generate an ISO7816 clock as close as possible to the clock set point. |
kadonotakashi | 0:8fdf9a60065b | 523 | * |
kadonotakashi | 0:8fdf9a60065b | 524 | * \note ISO7816 clock calculation: Clock = ul_mck / cd |
kadonotakashi | 0:8fdf9a60065b | 525 | * |
kadonotakashi | 0:8fdf9a60065b | 526 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 527 | * \param clock ISO7816 clock set point. |
kadonotakashi | 0:8fdf9a60065b | 528 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 529 | * |
kadonotakashi | 0:8fdf9a60065b | 530 | * \retval 0 ISO7816 clock is successfully initialized. |
kadonotakashi | 0:8fdf9a60065b | 531 | * \retval 1 ISO7816 clock set point is out of range for the given input clock |
kadonotakashi | 0:8fdf9a60065b | 532 | * frequency. |
kadonotakashi | 0:8fdf9a60065b | 533 | */ |
kadonotakashi | 0:8fdf9a60065b | 534 | static uint32_t usart_set_iso7816_clock(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 535 | uint32_t clock, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 536 | { |
kadonotakashi | 0:8fdf9a60065b | 537 | uint32_t cd; |
kadonotakashi | 0:8fdf9a60065b | 538 | |
kadonotakashi | 0:8fdf9a60065b | 539 | /* Calculate clock divider according to the formula in ISO7816 mode. */ |
kadonotakashi | 0:8fdf9a60065b | 540 | cd = (ul_mck + clock / 2) / clock; |
kadonotakashi | 0:8fdf9a60065b | 541 | |
kadonotakashi | 0:8fdf9a60065b | 542 | if (cd < MIN_CD_VALUE || cd > MAX_CD_VALUE) { |
kadonotakashi | 0:8fdf9a60065b | 543 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 544 | } |
kadonotakashi | 0:8fdf9a60065b | 545 | |
kadonotakashi | 0:8fdf9a60065b | 546 | p_usart->US_MR = (p_usart->US_MR & ~(US_MR_USCLKS_Msk | US_MR_SYNC | |
kadonotakashi | 0:8fdf9a60065b | 547 | US_MR_OVER)) | US_MR_USCLKS_MCK | US_MR_CLKO; |
kadonotakashi | 0:8fdf9a60065b | 548 | |
kadonotakashi | 0:8fdf9a60065b | 549 | /* Configure the baudrate generate register. */ |
kadonotakashi | 0:8fdf9a60065b | 550 | p_usart->US_BRGR = cd << US_BRGR_CD_Pos; |
kadonotakashi | 0:8fdf9a60065b | 551 | |
kadonotakashi | 0:8fdf9a60065b | 552 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 553 | } |
kadonotakashi | 0:8fdf9a60065b | 554 | |
kadonotakashi | 0:8fdf9a60065b | 555 | /** |
kadonotakashi | 0:8fdf9a60065b | 556 | * \brief Configure USART to work in ISO7816 mode. |
kadonotakashi | 0:8fdf9a60065b | 557 | * |
kadonotakashi | 0:8fdf9a60065b | 558 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 559 | * |
kadonotakashi | 0:8fdf9a60065b | 560 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 561 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 562 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 563 | * |
kadonotakashi | 0:8fdf9a60065b | 564 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 565 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 566 | */ |
kadonotakashi | 0:8fdf9a60065b | 567 | uint32_t usart_init_iso7816(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 568 | const usart_iso7816_opt_t *p_usart_opt, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 569 | { |
kadonotakashi | 0:8fdf9a60065b | 570 | static uint32_t ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 571 | |
kadonotakashi | 0:8fdf9a60065b | 572 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 573 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 574 | |
kadonotakashi | 0:8fdf9a60065b | 575 | ul_reg_val = 0; |
kadonotakashi | 0:8fdf9a60065b | 576 | |
kadonotakashi | 0:8fdf9a60065b | 577 | /* Check whether the input values are legal. */ |
kadonotakashi | 0:8fdf9a60065b | 578 | if (!p_usart_opt || ((p_usart_opt->parity_type != US_MR_PAR_EVEN) && |
kadonotakashi | 0:8fdf9a60065b | 579 | (p_usart_opt->parity_type != US_MR_PAR_ODD))) { |
kadonotakashi | 0:8fdf9a60065b | 580 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 581 | } |
kadonotakashi | 0:8fdf9a60065b | 582 | |
kadonotakashi | 0:8fdf9a60065b | 583 | if (p_usart_opt->protocol_type == ISO7816_T_0) { |
kadonotakashi | 0:8fdf9a60065b | 584 | ul_reg_val |= US_MR_USART_MODE_IS07816_T_0 | US_MR_NBSTOP_2_BIT | |
kadonotakashi | 0:8fdf9a60065b | 585 | (p_usart_opt->max_iterations << US_MR_MAX_ITERATION_Pos); |
kadonotakashi | 0:8fdf9a60065b | 586 | |
kadonotakashi | 0:8fdf9a60065b | 587 | if (p_usart_opt->bit_order) { |
kadonotakashi | 0:8fdf9a60065b | 588 | ul_reg_val |= US_MR_MSBF; |
kadonotakashi | 0:8fdf9a60065b | 589 | } |
kadonotakashi | 0:8fdf9a60065b | 590 | } else if (p_usart_opt->protocol_type == ISO7816_T_1) { |
kadonotakashi | 0:8fdf9a60065b | 591 | /* |
kadonotakashi | 0:8fdf9a60065b | 592 | * Only LSBF is used in the T=1 protocol, and max_iterations field |
kadonotakashi | 0:8fdf9a60065b | 593 | * is only used in T=0 mode. |
kadonotakashi | 0:8fdf9a60065b | 594 | */ |
kadonotakashi | 0:8fdf9a60065b | 595 | if (p_usart_opt->bit_order || p_usart_opt->max_iterations) { |
kadonotakashi | 0:8fdf9a60065b | 596 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 597 | } |
kadonotakashi | 0:8fdf9a60065b | 598 | |
kadonotakashi | 0:8fdf9a60065b | 599 | /* Set USART mode to ISO7816, T=1, and always uses 1 stop bit. */ |
kadonotakashi | 0:8fdf9a60065b | 600 | ul_reg_val |= US_MR_USART_MODE_IS07816_T_1 | US_MR_NBSTOP_1_BIT; |
kadonotakashi | 0:8fdf9a60065b | 601 | } else { |
kadonotakashi | 0:8fdf9a60065b | 602 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 603 | } |
kadonotakashi | 0:8fdf9a60065b | 604 | |
kadonotakashi | 0:8fdf9a60065b | 605 | /* Set up the baudrate. */ |
kadonotakashi | 0:8fdf9a60065b | 606 | if (usart_set_iso7816_clock(p_usart, p_usart_opt->iso7816_hz, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 607 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 608 | } |
kadonotakashi | 0:8fdf9a60065b | 609 | |
kadonotakashi | 0:8fdf9a60065b | 610 | /* Set FIDI register: bit rate = iso7816_hz / fidi_ratio. */ |
kadonotakashi | 0:8fdf9a60065b | 611 | p_usart->US_FIDI = p_usart_opt->fidi_ratio; |
kadonotakashi | 0:8fdf9a60065b | 612 | |
kadonotakashi | 0:8fdf9a60065b | 613 | /* Set ISO7816 parity type in the MODE register. */ |
kadonotakashi | 0:8fdf9a60065b | 614 | ul_reg_val |= p_usart_opt->parity_type; |
kadonotakashi | 0:8fdf9a60065b | 615 | |
kadonotakashi | 0:8fdf9a60065b | 616 | if (p_usart_opt->inhibit_nack) { |
kadonotakashi | 0:8fdf9a60065b | 617 | ul_reg_val |= US_MR_INACK; |
kadonotakashi | 0:8fdf9a60065b | 618 | } |
kadonotakashi | 0:8fdf9a60065b | 619 | if (p_usart_opt->dis_suc_nack) { |
kadonotakashi | 0:8fdf9a60065b | 620 | ul_reg_val |= US_MR_DSNACK; |
kadonotakashi | 0:8fdf9a60065b | 621 | } |
kadonotakashi | 0:8fdf9a60065b | 622 | |
kadonotakashi | 0:8fdf9a60065b | 623 | p_usart->US_MR |= ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 624 | |
kadonotakashi | 0:8fdf9a60065b | 625 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 626 | } |
kadonotakashi | 0:8fdf9a60065b | 627 | |
kadonotakashi | 0:8fdf9a60065b | 628 | /** |
kadonotakashi | 0:8fdf9a60065b | 629 | * \brief Reset the ITERATION in US_CSR when the ISO7816 mode is enabled. |
kadonotakashi | 0:8fdf9a60065b | 630 | * |
kadonotakashi | 0:8fdf9a60065b | 631 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 632 | */ |
kadonotakashi | 0:8fdf9a60065b | 633 | void usart_reset_iterations(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 634 | { |
kadonotakashi | 0:8fdf9a60065b | 635 | p_usart->US_CR = US_CR_RSTIT; |
kadonotakashi | 0:8fdf9a60065b | 636 | } |
kadonotakashi | 0:8fdf9a60065b | 637 | |
kadonotakashi | 0:8fdf9a60065b | 638 | /** |
kadonotakashi | 0:8fdf9a60065b | 639 | * \brief Reset NACK in US_CSR. |
kadonotakashi | 0:8fdf9a60065b | 640 | * |
kadonotakashi | 0:8fdf9a60065b | 641 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 642 | */ |
kadonotakashi | 0:8fdf9a60065b | 643 | void usart_reset_nack(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 644 | { |
kadonotakashi | 0:8fdf9a60065b | 645 | p_usart->US_CR = US_CR_RSTNACK; |
kadonotakashi | 0:8fdf9a60065b | 646 | } |
kadonotakashi | 0:8fdf9a60065b | 647 | |
kadonotakashi | 0:8fdf9a60065b | 648 | /** |
kadonotakashi | 0:8fdf9a60065b | 649 | * \brief Check if one receive buffer is filled. |
kadonotakashi | 0:8fdf9a60065b | 650 | * |
kadonotakashi | 0:8fdf9a60065b | 651 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 652 | * |
kadonotakashi | 0:8fdf9a60065b | 653 | * \retval 1 Receive is complete. |
kadonotakashi | 0:8fdf9a60065b | 654 | * \retval 0 Receive is still pending. |
kadonotakashi | 0:8fdf9a60065b | 655 | */ |
kadonotakashi | 0:8fdf9a60065b | 656 | uint32_t usart_is_rx_buf_end(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 657 | { |
kadonotakashi | 0:8fdf9a60065b | 658 | return (p_usart->US_CSR & US_CSR_ENDRX) > 0; |
kadonotakashi | 0:8fdf9a60065b | 659 | } |
kadonotakashi | 0:8fdf9a60065b | 660 | |
kadonotakashi | 0:8fdf9a60065b | 661 | /** |
kadonotakashi | 0:8fdf9a60065b | 662 | * \brief Check if one transmit buffer is empty. |
kadonotakashi | 0:8fdf9a60065b | 663 | * |
kadonotakashi | 0:8fdf9a60065b | 664 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 665 | * |
kadonotakashi | 0:8fdf9a60065b | 666 | * \retval 1 Transmit is complete. |
kadonotakashi | 0:8fdf9a60065b | 667 | * \retval 0 Transmit is still pending. |
kadonotakashi | 0:8fdf9a60065b | 668 | */ |
kadonotakashi | 0:8fdf9a60065b | 669 | uint32_t usart_is_tx_buf_end(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 670 | { |
kadonotakashi | 0:8fdf9a60065b | 671 | return (p_usart->US_CSR & US_CSR_ENDTX) > 0; |
kadonotakashi | 0:8fdf9a60065b | 672 | } |
kadonotakashi | 0:8fdf9a60065b | 673 | |
kadonotakashi | 0:8fdf9a60065b | 674 | /** |
kadonotakashi | 0:8fdf9a60065b | 675 | * \brief Check if both receive buffers are full. |
kadonotakashi | 0:8fdf9a60065b | 676 | * |
kadonotakashi | 0:8fdf9a60065b | 677 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 678 | * |
kadonotakashi | 0:8fdf9a60065b | 679 | * \retval 1 Receive buffers are full. |
kadonotakashi | 0:8fdf9a60065b | 680 | * \retval 0 Receive buffers are not full. |
kadonotakashi | 0:8fdf9a60065b | 681 | */ |
kadonotakashi | 0:8fdf9a60065b | 682 | uint32_t usart_is_rx_buf_full(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 683 | { |
kadonotakashi | 0:8fdf9a60065b | 684 | return (p_usart->US_CSR & US_CSR_RXBUFF) > 0; |
kadonotakashi | 0:8fdf9a60065b | 685 | } |
kadonotakashi | 0:8fdf9a60065b | 686 | |
kadonotakashi | 0:8fdf9a60065b | 687 | /** |
kadonotakashi | 0:8fdf9a60065b | 688 | * \brief Check if both transmit buffers are empty. |
kadonotakashi | 0:8fdf9a60065b | 689 | * |
kadonotakashi | 0:8fdf9a60065b | 690 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 691 | * |
kadonotakashi | 0:8fdf9a60065b | 692 | * \retval 1 Transmit buffers are empty. |
kadonotakashi | 0:8fdf9a60065b | 693 | * \retval 0 Transmit buffers are not empty. |
kadonotakashi | 0:8fdf9a60065b | 694 | */ |
kadonotakashi | 0:8fdf9a60065b | 695 | uint32_t usart_is_tx_buf_empty(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 696 | { |
kadonotakashi | 0:8fdf9a60065b | 697 | return (p_usart->US_CSR & US_CSR_TXBUFE) > 0; |
kadonotakashi | 0:8fdf9a60065b | 698 | } |
kadonotakashi | 0:8fdf9a60065b | 699 | |
kadonotakashi | 0:8fdf9a60065b | 700 | /** |
kadonotakashi | 0:8fdf9a60065b | 701 | * \brief Get the total number of errors that occur during an ISO7816 transfer. |
kadonotakashi | 0:8fdf9a60065b | 702 | * |
kadonotakashi | 0:8fdf9a60065b | 703 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 704 | * |
kadonotakashi | 0:8fdf9a60065b | 705 | * \return The number of errors that occurred. |
kadonotakashi | 0:8fdf9a60065b | 706 | */ |
kadonotakashi | 0:8fdf9a60065b | 707 | uint8_t usart_get_error_number(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 708 | { |
kadonotakashi | 0:8fdf9a60065b | 709 | return (p_usart->US_NER & US_NER_NB_ERRORS_Msk); |
kadonotakashi | 0:8fdf9a60065b | 710 | } |
kadonotakashi | 0:8fdf9a60065b | 711 | |
kadonotakashi | 0:8fdf9a60065b | 712 | #endif |
kadonotakashi | 0:8fdf9a60065b | 713 | |
kadonotakashi | 0:8fdf9a60065b | 714 | /** |
kadonotakashi | 0:8fdf9a60065b | 715 | * \brief Configure USART to work in SPI mode and act as a master. |
kadonotakashi | 0:8fdf9a60065b | 716 | * |
kadonotakashi | 0:8fdf9a60065b | 717 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 718 | * |
kadonotakashi | 0:8fdf9a60065b | 719 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 720 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 721 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 722 | * |
kadonotakashi | 0:8fdf9a60065b | 723 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 724 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 725 | */ |
kadonotakashi | 0:8fdf9a60065b | 726 | uint32_t usart_init_spi_master(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 727 | const usart_spi_opt_t *p_usart_opt, uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 728 | { |
kadonotakashi | 0:8fdf9a60065b | 729 | static uint32_t ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 730 | |
kadonotakashi | 0:8fdf9a60065b | 731 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 732 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 733 | |
kadonotakashi | 0:8fdf9a60065b | 734 | ul_reg_val = 0; |
kadonotakashi | 0:8fdf9a60065b | 735 | /* Check whether the input values are legal. */ |
kadonotakashi | 0:8fdf9a60065b | 736 | if (!p_usart_opt || (p_usart_opt->spi_mode > SPI_MODE_3) || |
kadonotakashi | 0:8fdf9a60065b | 737 | usart_set_spi_master_baudrate(p_usart, p_usart_opt->baudrate, |
kadonotakashi | 0:8fdf9a60065b | 738 | ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 739 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 740 | } |
kadonotakashi | 0:8fdf9a60065b | 741 | |
kadonotakashi | 0:8fdf9a60065b | 742 | /* Configure the character length bit in MR register. */ |
kadonotakashi | 0:8fdf9a60065b | 743 | ul_reg_val |= p_usart_opt->char_length; |
kadonotakashi | 0:8fdf9a60065b | 744 | |
kadonotakashi | 0:8fdf9a60065b | 745 | /* Set SPI master mode and channel mode. */ |
kadonotakashi | 0:8fdf9a60065b | 746 | ul_reg_val |= US_MR_USART_MODE_SPI_MASTER | US_MR_CLKO | |
kadonotakashi | 0:8fdf9a60065b | 747 | p_usart_opt->channel_mode; |
kadonotakashi | 0:8fdf9a60065b | 748 | |
kadonotakashi | 0:8fdf9a60065b | 749 | switch (p_usart_opt->spi_mode) { |
kadonotakashi | 0:8fdf9a60065b | 750 | case SPI_MODE_0: |
kadonotakashi | 0:8fdf9a60065b | 751 | ul_reg_val |= US_MR_CPHA; |
kadonotakashi | 0:8fdf9a60065b | 752 | ul_reg_val &= ~US_MR_CPOL; |
kadonotakashi | 0:8fdf9a60065b | 753 | break; |
kadonotakashi | 0:8fdf9a60065b | 754 | |
kadonotakashi | 0:8fdf9a60065b | 755 | case SPI_MODE_1: |
kadonotakashi | 0:8fdf9a60065b | 756 | ul_reg_val &= ~US_MR_CPHA; |
kadonotakashi | 0:8fdf9a60065b | 757 | ul_reg_val &= ~US_MR_CPOL; |
kadonotakashi | 0:8fdf9a60065b | 758 | break; |
kadonotakashi | 0:8fdf9a60065b | 759 | |
kadonotakashi | 0:8fdf9a60065b | 760 | case SPI_MODE_2: |
kadonotakashi | 0:8fdf9a60065b | 761 | ul_reg_val |= US_MR_CPHA; |
kadonotakashi | 0:8fdf9a60065b | 762 | ul_reg_val |= US_MR_CPOL; |
kadonotakashi | 0:8fdf9a60065b | 763 | break; |
kadonotakashi | 0:8fdf9a60065b | 764 | |
kadonotakashi | 0:8fdf9a60065b | 765 | case SPI_MODE_3: |
kadonotakashi | 0:8fdf9a60065b | 766 | ul_reg_val &= ~US_MR_CPHA; |
kadonotakashi | 0:8fdf9a60065b | 767 | ul_reg_val |= US_MR_CPOL; |
kadonotakashi | 0:8fdf9a60065b | 768 | break; |
kadonotakashi | 0:8fdf9a60065b | 769 | |
kadonotakashi | 0:8fdf9a60065b | 770 | default: |
kadonotakashi | 0:8fdf9a60065b | 771 | break; |
kadonotakashi | 0:8fdf9a60065b | 772 | } |
kadonotakashi | 0:8fdf9a60065b | 773 | |
kadonotakashi | 0:8fdf9a60065b | 774 | p_usart->US_MR |= ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 775 | |
kadonotakashi | 0:8fdf9a60065b | 776 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 777 | } |
kadonotakashi | 0:8fdf9a60065b | 778 | |
kadonotakashi | 0:8fdf9a60065b | 779 | /** |
kadonotakashi | 0:8fdf9a60065b | 780 | * \brief Configure USART to work in SPI mode and act as a slave. |
kadonotakashi | 0:8fdf9a60065b | 781 | * |
kadonotakashi | 0:8fdf9a60065b | 782 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 783 | * |
kadonotakashi | 0:8fdf9a60065b | 784 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 785 | * \param p_usart_opt Pointer to sam_usart_opt_t instance. |
kadonotakashi | 0:8fdf9a60065b | 786 | * |
kadonotakashi | 0:8fdf9a60065b | 787 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 788 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 789 | */ |
kadonotakashi | 0:8fdf9a60065b | 790 | uint32_t usart_init_spi_slave(Usart *p_usart, |
kadonotakashi | 0:8fdf9a60065b | 791 | const usart_spi_opt_t *p_usart_opt) |
kadonotakashi | 0:8fdf9a60065b | 792 | { |
kadonotakashi | 0:8fdf9a60065b | 793 | static uint32_t ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 794 | |
kadonotakashi | 0:8fdf9a60065b | 795 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 796 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 797 | |
kadonotakashi | 0:8fdf9a60065b | 798 | ul_reg_val = 0; |
kadonotakashi | 0:8fdf9a60065b | 799 | usart_set_spi_slave_baudrate(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 800 | |
kadonotakashi | 0:8fdf9a60065b | 801 | /* Check whether the input values are legal. */ |
kadonotakashi | 0:8fdf9a60065b | 802 | if (!p_usart_opt || p_usart_opt->spi_mode > SPI_MODE_3) { |
kadonotakashi | 0:8fdf9a60065b | 803 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 804 | } |
kadonotakashi | 0:8fdf9a60065b | 805 | |
kadonotakashi | 0:8fdf9a60065b | 806 | /* Configure the character length bit in MR register. */ |
kadonotakashi | 0:8fdf9a60065b | 807 | ul_reg_val |= p_usart_opt->char_length; |
kadonotakashi | 0:8fdf9a60065b | 808 | |
kadonotakashi | 0:8fdf9a60065b | 809 | /* Set SPI slave mode and channel mode. */ |
kadonotakashi | 0:8fdf9a60065b | 810 | ul_reg_val |= US_MR_USART_MODE_SPI_SLAVE | p_usart_opt->channel_mode; |
kadonotakashi | 0:8fdf9a60065b | 811 | |
kadonotakashi | 0:8fdf9a60065b | 812 | switch (p_usart_opt->spi_mode) { |
kadonotakashi | 0:8fdf9a60065b | 813 | case SPI_MODE_0: |
kadonotakashi | 0:8fdf9a60065b | 814 | ul_reg_val |= US_MR_CPHA; |
kadonotakashi | 0:8fdf9a60065b | 815 | ul_reg_val &= ~US_MR_CPOL; |
kadonotakashi | 0:8fdf9a60065b | 816 | break; |
kadonotakashi | 0:8fdf9a60065b | 817 | |
kadonotakashi | 0:8fdf9a60065b | 818 | case SPI_MODE_1: |
kadonotakashi | 0:8fdf9a60065b | 819 | ul_reg_val &= ~US_MR_CPHA; |
kadonotakashi | 0:8fdf9a60065b | 820 | ul_reg_val &= ~US_MR_CPOL; |
kadonotakashi | 0:8fdf9a60065b | 821 | break; |
kadonotakashi | 0:8fdf9a60065b | 822 | |
kadonotakashi | 0:8fdf9a60065b | 823 | case SPI_MODE_2: |
kadonotakashi | 0:8fdf9a60065b | 824 | ul_reg_val |= US_MR_CPHA; |
kadonotakashi | 0:8fdf9a60065b | 825 | ul_reg_val |= US_MR_CPOL; |
kadonotakashi | 0:8fdf9a60065b | 826 | break; |
kadonotakashi | 0:8fdf9a60065b | 827 | |
kadonotakashi | 0:8fdf9a60065b | 828 | case SPI_MODE_3: |
kadonotakashi | 0:8fdf9a60065b | 829 | ul_reg_val |= US_MR_CPOL; |
kadonotakashi | 0:8fdf9a60065b | 830 | ul_reg_val &= ~US_MR_CPHA; |
kadonotakashi | 0:8fdf9a60065b | 831 | break; |
kadonotakashi | 0:8fdf9a60065b | 832 | |
kadonotakashi | 0:8fdf9a60065b | 833 | default: |
kadonotakashi | 0:8fdf9a60065b | 834 | break; |
kadonotakashi | 0:8fdf9a60065b | 835 | } |
kadonotakashi | 0:8fdf9a60065b | 836 | |
kadonotakashi | 0:8fdf9a60065b | 837 | p_usart->US_MR |= ul_reg_val; |
kadonotakashi | 0:8fdf9a60065b | 838 | |
kadonotakashi | 0:8fdf9a60065b | 839 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 840 | } |
kadonotakashi | 0:8fdf9a60065b | 841 | |
kadonotakashi | 0:8fdf9a60065b | 842 | #if (SAM3XA || SAM4L || SAMG55 || SAMV71 || SAMV70 || SAME70 || SAMS70) |
kadonotakashi | 0:8fdf9a60065b | 843 | |
kadonotakashi | 0:8fdf9a60065b | 844 | /** |
kadonotakashi | 0:8fdf9a60065b | 845 | * \brief Configure USART to work in LIN mode and act as a LIN master. |
kadonotakashi | 0:8fdf9a60065b | 846 | * |
kadonotakashi | 0:8fdf9a60065b | 847 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 848 | * |
kadonotakashi | 0:8fdf9a60065b | 849 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 850 | * \param ul_baudrate Baudrate to be used. |
kadonotakashi | 0:8fdf9a60065b | 851 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 852 | * |
kadonotakashi | 0:8fdf9a60065b | 853 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 854 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 855 | */ |
kadonotakashi | 0:8fdf9a60065b | 856 | uint32_t usart_init_lin_master(Usart *p_usart,uint32_t ul_baudrate, |
kadonotakashi | 0:8fdf9a60065b | 857 | uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 858 | { |
kadonotakashi | 0:8fdf9a60065b | 859 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 860 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 861 | |
kadonotakashi | 0:8fdf9a60065b | 862 | /* Set up the baudrate. */ |
kadonotakashi | 0:8fdf9a60065b | 863 | if (usart_set_async_baudrate(p_usart, ul_baudrate, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 864 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 865 | } |
kadonotakashi | 0:8fdf9a60065b | 866 | |
kadonotakashi | 0:8fdf9a60065b | 867 | /* Set LIN master mode. */ |
kadonotakashi | 0:8fdf9a60065b | 868 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USART_MODE_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 869 | US_MR_USART_MODE_LIN_MASTER; |
kadonotakashi | 0:8fdf9a60065b | 870 | |
kadonotakashi | 0:8fdf9a60065b | 871 | usart_enable_rx(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 872 | usart_enable_tx(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 873 | |
kadonotakashi | 0:8fdf9a60065b | 874 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 875 | } |
kadonotakashi | 0:8fdf9a60065b | 876 | |
kadonotakashi | 0:8fdf9a60065b | 877 | /** |
kadonotakashi | 0:8fdf9a60065b | 878 | * \brief Configure USART to work in LIN mode and act as a LIN slave. |
kadonotakashi | 0:8fdf9a60065b | 879 | * |
kadonotakashi | 0:8fdf9a60065b | 880 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 881 | * |
kadonotakashi | 0:8fdf9a60065b | 882 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 883 | * \param ul_baudrate Baudrate to be used. |
kadonotakashi | 0:8fdf9a60065b | 884 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 885 | * |
kadonotakashi | 0:8fdf9a60065b | 886 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 887 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 888 | */ |
kadonotakashi | 0:8fdf9a60065b | 889 | uint32_t usart_init_lin_slave(Usart *p_usart, uint32_t ul_baudrate, |
kadonotakashi | 0:8fdf9a60065b | 890 | uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 891 | { |
kadonotakashi | 0:8fdf9a60065b | 892 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 893 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 894 | |
kadonotakashi | 0:8fdf9a60065b | 895 | usart_enable_rx(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 896 | usart_enable_tx(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 897 | |
kadonotakashi | 0:8fdf9a60065b | 898 | /* Set LIN slave mode. */ |
kadonotakashi | 0:8fdf9a60065b | 899 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USART_MODE_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 900 | US_MR_USART_MODE_LIN_SLAVE; |
kadonotakashi | 0:8fdf9a60065b | 901 | |
kadonotakashi | 0:8fdf9a60065b | 902 | /* Set up the baudrate. */ |
kadonotakashi | 0:8fdf9a60065b | 903 | if (usart_set_async_baudrate(p_usart, ul_baudrate, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 904 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 905 | } |
kadonotakashi | 0:8fdf9a60065b | 906 | |
kadonotakashi | 0:8fdf9a60065b | 907 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 908 | } |
kadonotakashi | 0:8fdf9a60065b | 909 | |
kadonotakashi | 0:8fdf9a60065b | 910 | /** |
kadonotakashi | 0:8fdf9a60065b | 911 | * \brief Abort the current LIN transmission. |
kadonotakashi | 0:8fdf9a60065b | 912 | * |
kadonotakashi | 0:8fdf9a60065b | 913 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 914 | */ |
kadonotakashi | 0:8fdf9a60065b | 915 | void usart_lin_abort_tx(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 916 | { |
kadonotakashi | 0:8fdf9a60065b | 917 | p_usart->US_CR = US_CR_LINABT; |
kadonotakashi | 0:8fdf9a60065b | 918 | } |
kadonotakashi | 0:8fdf9a60065b | 919 | |
kadonotakashi | 0:8fdf9a60065b | 920 | /** |
kadonotakashi | 0:8fdf9a60065b | 921 | * \brief Send a wakeup signal on the LIN bus. |
kadonotakashi | 0:8fdf9a60065b | 922 | * |
kadonotakashi | 0:8fdf9a60065b | 923 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 924 | */ |
kadonotakashi | 0:8fdf9a60065b | 925 | void usart_lin_send_wakeup_signal(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 926 | { |
kadonotakashi | 0:8fdf9a60065b | 927 | p_usart->US_CR = US_CR_LINWKUP; |
kadonotakashi | 0:8fdf9a60065b | 928 | } |
kadonotakashi | 0:8fdf9a60065b | 929 | |
kadonotakashi | 0:8fdf9a60065b | 930 | /** |
kadonotakashi | 0:8fdf9a60065b | 931 | * \brief Configure the LIN node action, which should be one of PUBLISH, |
kadonotakashi | 0:8fdf9a60065b | 932 | * SUBSCRIBE or IGNORE. |
kadonotakashi | 0:8fdf9a60065b | 933 | * |
kadonotakashi | 0:8fdf9a60065b | 934 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 935 | * \param uc_action 0 for PUBLISH, 1 for SUBSCRIBE, 2 for IGNORE. |
kadonotakashi | 0:8fdf9a60065b | 936 | */ |
kadonotakashi | 0:8fdf9a60065b | 937 | void usart_lin_set_node_action(Usart *p_usart, uint8_t uc_action) |
kadonotakashi | 0:8fdf9a60065b | 938 | { |
kadonotakashi | 0:8fdf9a60065b | 939 | p_usart->US_LINMR = (p_usart->US_LINMR & ~US_LINMR_NACT_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 940 | (uc_action << US_LINMR_NACT_Pos); |
kadonotakashi | 0:8fdf9a60065b | 941 | } |
kadonotakashi | 0:8fdf9a60065b | 942 | |
kadonotakashi | 0:8fdf9a60065b | 943 | /** |
kadonotakashi | 0:8fdf9a60065b | 944 | * \brief Disable the parity check during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 945 | * |
kadonotakashi | 0:8fdf9a60065b | 946 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 947 | */ |
kadonotakashi | 0:8fdf9a60065b | 948 | void usart_lin_disable_parity(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 949 | { |
kadonotakashi | 0:8fdf9a60065b | 950 | p_usart->US_LINMR |= US_LINMR_PARDIS; |
kadonotakashi | 0:8fdf9a60065b | 951 | } |
kadonotakashi | 0:8fdf9a60065b | 952 | |
kadonotakashi | 0:8fdf9a60065b | 953 | /** |
kadonotakashi | 0:8fdf9a60065b | 954 | * \brief Enable the parity check during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 955 | * |
kadonotakashi | 0:8fdf9a60065b | 956 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 957 | */ |
kadonotakashi | 0:8fdf9a60065b | 958 | void usart_lin_enable_parity(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 959 | { |
kadonotakashi | 0:8fdf9a60065b | 960 | p_usart->US_LINMR &= ~US_LINMR_PARDIS; |
kadonotakashi | 0:8fdf9a60065b | 961 | } |
kadonotakashi | 0:8fdf9a60065b | 962 | |
kadonotakashi | 0:8fdf9a60065b | 963 | /** |
kadonotakashi | 0:8fdf9a60065b | 964 | * \brief Disable the checksum during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 965 | * |
kadonotakashi | 0:8fdf9a60065b | 966 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 967 | */ |
kadonotakashi | 0:8fdf9a60065b | 968 | void usart_lin_disable_checksum(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 969 | { |
kadonotakashi | 0:8fdf9a60065b | 970 | p_usart->US_LINMR |= US_LINMR_CHKDIS; |
kadonotakashi | 0:8fdf9a60065b | 971 | } |
kadonotakashi | 0:8fdf9a60065b | 972 | |
kadonotakashi | 0:8fdf9a60065b | 973 | /** |
kadonotakashi | 0:8fdf9a60065b | 974 | * \brief Enable the checksum during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 975 | * |
kadonotakashi | 0:8fdf9a60065b | 976 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 977 | */ |
kadonotakashi | 0:8fdf9a60065b | 978 | void usart_lin_enable_checksum(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 979 | { |
kadonotakashi | 0:8fdf9a60065b | 980 | p_usart->US_LINMR &= ~US_LINMR_CHKDIS; |
kadonotakashi | 0:8fdf9a60065b | 981 | } |
kadonotakashi | 0:8fdf9a60065b | 982 | |
kadonotakashi | 0:8fdf9a60065b | 983 | /** |
kadonotakashi | 0:8fdf9a60065b | 984 | * \brief Configure the checksum type during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 985 | * |
kadonotakashi | 0:8fdf9a60065b | 986 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 987 | * \param uc_type 0 for LIN 2.0 Enhanced checksum or 1 for LIN 1.3 Classic |
kadonotakashi | 0:8fdf9a60065b | 988 | * checksum. |
kadonotakashi | 0:8fdf9a60065b | 989 | */ |
kadonotakashi | 0:8fdf9a60065b | 990 | void usart_lin_set_checksum_type(Usart *p_usart, uint8_t uc_type) |
kadonotakashi | 0:8fdf9a60065b | 991 | { |
kadonotakashi | 0:8fdf9a60065b | 992 | p_usart->US_LINMR = (p_usart->US_LINMR & ~US_LINMR_CHKTYP) | |
kadonotakashi | 0:8fdf9a60065b | 993 | (uc_type << 4); |
kadonotakashi | 0:8fdf9a60065b | 994 | } |
kadonotakashi | 0:8fdf9a60065b | 995 | |
kadonotakashi | 0:8fdf9a60065b | 996 | /** |
kadonotakashi | 0:8fdf9a60065b | 997 | * \brief Configure the data length mode during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 998 | * |
kadonotakashi | 0:8fdf9a60065b | 999 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1000 | * \param uc_mode Indicate the data length type: 0 if the data length is |
kadonotakashi | 0:8fdf9a60065b | 1001 | * defined by the DLC of LIN mode register or 1 if the data length is defined |
kadonotakashi | 0:8fdf9a60065b | 1002 | * by the bit 5 and 6 of the identifier. |
kadonotakashi | 0:8fdf9a60065b | 1003 | */ |
kadonotakashi | 0:8fdf9a60065b | 1004 | void usart_lin_set_data_len_mode(Usart *p_usart, uint8_t uc_mode) |
kadonotakashi | 0:8fdf9a60065b | 1005 | { |
kadonotakashi | 0:8fdf9a60065b | 1006 | p_usart->US_LINMR = (p_usart->US_LINMR & ~US_LINMR_DLM) | |
kadonotakashi | 0:8fdf9a60065b | 1007 | (uc_mode << 5); |
kadonotakashi | 0:8fdf9a60065b | 1008 | } |
kadonotakashi | 0:8fdf9a60065b | 1009 | |
kadonotakashi | 0:8fdf9a60065b | 1010 | /** |
kadonotakashi | 0:8fdf9a60065b | 1011 | * \brief Disable the frame slot mode during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 1012 | * |
kadonotakashi | 0:8fdf9a60065b | 1013 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1014 | */ |
kadonotakashi | 0:8fdf9a60065b | 1015 | void usart_lin_disable_frame_slot(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1016 | { |
kadonotakashi | 0:8fdf9a60065b | 1017 | p_usart->US_LINMR |= US_LINMR_FSDIS; |
kadonotakashi | 0:8fdf9a60065b | 1018 | } |
kadonotakashi | 0:8fdf9a60065b | 1019 | |
kadonotakashi | 0:8fdf9a60065b | 1020 | /** |
kadonotakashi | 0:8fdf9a60065b | 1021 | * \brief Enable the frame slot mode during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 1022 | * |
kadonotakashi | 0:8fdf9a60065b | 1023 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1024 | */ |
kadonotakashi | 0:8fdf9a60065b | 1025 | void usart_lin_enable_frame_slot(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1026 | { |
kadonotakashi | 0:8fdf9a60065b | 1027 | p_usart->US_LINMR &= ~US_LINMR_FSDIS; |
kadonotakashi | 0:8fdf9a60065b | 1028 | } |
kadonotakashi | 0:8fdf9a60065b | 1029 | |
kadonotakashi | 0:8fdf9a60065b | 1030 | /** |
kadonotakashi | 0:8fdf9a60065b | 1031 | * \brief Configure the wakeup signal type during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 1032 | * |
kadonotakashi | 0:8fdf9a60065b | 1033 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1034 | * \param uc_type Indicate the checksum type: 0 if the wakeup signal is a |
kadonotakashi | 0:8fdf9a60065b | 1035 | * LIN 2.0 wakeup signal; 1 if the wakeup signal is a LIN 1.3 wakeup signal. |
kadonotakashi | 0:8fdf9a60065b | 1036 | */ |
kadonotakashi | 0:8fdf9a60065b | 1037 | void usart_lin_set_wakeup_signal_type(Usart *p_usart, uint8_t uc_type) |
kadonotakashi | 0:8fdf9a60065b | 1038 | { |
kadonotakashi | 0:8fdf9a60065b | 1039 | p_usart->US_LINMR = (p_usart->US_LINMR & ~US_LINMR_WKUPTYP) | |
kadonotakashi | 0:8fdf9a60065b | 1040 | (uc_type << 7); |
kadonotakashi | 0:8fdf9a60065b | 1041 | } |
kadonotakashi | 0:8fdf9a60065b | 1042 | |
kadonotakashi | 0:8fdf9a60065b | 1043 | /** |
kadonotakashi | 0:8fdf9a60065b | 1044 | * \brief Configure the response data length if the data length is defined by |
kadonotakashi | 0:8fdf9a60065b | 1045 | * the DLC field during the LIN communication. |
kadonotakashi | 0:8fdf9a60065b | 1046 | * |
kadonotakashi | 0:8fdf9a60065b | 1047 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1048 | * \param uc_len Indicate the response data length. |
kadonotakashi | 0:8fdf9a60065b | 1049 | */ |
kadonotakashi | 0:8fdf9a60065b | 1050 | void usart_lin_set_response_data_len(Usart *p_usart, uint8_t uc_len) |
kadonotakashi | 0:8fdf9a60065b | 1051 | { |
kadonotakashi | 0:8fdf9a60065b | 1052 | p_usart->US_LINMR = (p_usart->US_LINMR & ~US_LINMR_DLC_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 1053 | ((uc_len - 1) << US_LINMR_DLC_Pos); |
kadonotakashi | 0:8fdf9a60065b | 1054 | } |
kadonotakashi | 0:8fdf9a60065b | 1055 | |
kadonotakashi | 0:8fdf9a60065b | 1056 | /** |
kadonotakashi | 0:8fdf9a60065b | 1057 | * \brief The LIN mode register is not written by the PDC. |
kadonotakashi | 0:8fdf9a60065b | 1058 | * |
kadonotakashi | 0:8fdf9a60065b | 1059 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1060 | */ |
kadonotakashi | 0:8fdf9a60065b | 1061 | void usart_lin_disable_pdc_mode(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1062 | { |
kadonotakashi | 0:8fdf9a60065b | 1063 | p_usart->US_LINMR &= ~US_LINMR_PDCM; |
kadonotakashi | 0:8fdf9a60065b | 1064 | } |
kadonotakashi | 0:8fdf9a60065b | 1065 | |
kadonotakashi | 0:8fdf9a60065b | 1066 | /** |
kadonotakashi | 0:8fdf9a60065b | 1067 | * \brief The LIN mode register (except this flag) is written by the PDC. |
kadonotakashi | 0:8fdf9a60065b | 1068 | * |
kadonotakashi | 0:8fdf9a60065b | 1069 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1070 | */ |
kadonotakashi | 0:8fdf9a60065b | 1071 | void usart_lin_enable_pdc_mode(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1072 | { |
kadonotakashi | 0:8fdf9a60065b | 1073 | p_usart->US_LINMR |= US_LINMR_PDCM; |
kadonotakashi | 0:8fdf9a60065b | 1074 | } |
kadonotakashi | 0:8fdf9a60065b | 1075 | |
kadonotakashi | 0:8fdf9a60065b | 1076 | /** |
kadonotakashi | 0:8fdf9a60065b | 1077 | * \brief Configure the LIN identifier when USART works in LIN master mode. |
kadonotakashi | 0:8fdf9a60065b | 1078 | * |
kadonotakashi | 0:8fdf9a60065b | 1079 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1080 | * \param uc_id The identifier to be transmitted. |
kadonotakashi | 0:8fdf9a60065b | 1081 | */ |
kadonotakashi | 0:8fdf9a60065b | 1082 | void usart_lin_set_tx_identifier(Usart *p_usart, uint8_t uc_id) |
kadonotakashi | 0:8fdf9a60065b | 1083 | { |
kadonotakashi | 0:8fdf9a60065b | 1084 | p_usart->US_LINIR = (p_usart->US_LINIR & ~US_LINIR_IDCHR_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 1085 | US_LINIR_IDCHR(uc_id); |
kadonotakashi | 0:8fdf9a60065b | 1086 | } |
kadonotakashi | 0:8fdf9a60065b | 1087 | |
kadonotakashi | 0:8fdf9a60065b | 1088 | /** |
kadonotakashi | 0:8fdf9a60065b | 1089 | * \brief Read the identifier when USART works in LIN mode. |
kadonotakashi | 0:8fdf9a60065b | 1090 | * |
kadonotakashi | 0:8fdf9a60065b | 1091 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1092 | * |
kadonotakashi | 0:8fdf9a60065b | 1093 | * \return The last identifier received in LIN slave mode or the last |
kadonotakashi | 0:8fdf9a60065b | 1094 | * identifier transmitted in LIN master mode. |
kadonotakashi | 0:8fdf9a60065b | 1095 | */ |
kadonotakashi | 0:8fdf9a60065b | 1096 | uint8_t usart_lin_read_identifier(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1097 | { |
kadonotakashi | 0:8fdf9a60065b | 1098 | return (p_usart->US_LINIR & US_LINIR_IDCHR_Msk); |
kadonotakashi | 0:8fdf9a60065b | 1099 | } |
kadonotakashi | 0:8fdf9a60065b | 1100 | |
kadonotakashi | 0:8fdf9a60065b | 1101 | /** |
kadonotakashi | 0:8fdf9a60065b | 1102 | * \brief Get data length. |
kadonotakashi | 0:8fdf9a60065b | 1103 | * |
kadonotakashi | 0:8fdf9a60065b | 1104 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1105 | * |
kadonotakashi | 0:8fdf9a60065b | 1106 | * \return Data length. |
kadonotakashi | 0:8fdf9a60065b | 1107 | */ |
kadonotakashi | 0:8fdf9a60065b | 1108 | uint8_t usart_lin_get_data_length(Usart *usart) |
kadonotakashi | 0:8fdf9a60065b | 1109 | { |
kadonotakashi | 0:8fdf9a60065b | 1110 | if (usart->US_LINMR & US_LINMR_DLM) { |
kadonotakashi | 0:8fdf9a60065b | 1111 | uint8_t data_length = 1 << ((usart->US_LINIR >> |
kadonotakashi | 0:8fdf9a60065b | 1112 | (US_LINIR_IDCHR_Pos + 4)) & 0x03); |
kadonotakashi | 0:8fdf9a60065b | 1113 | return data_length; |
kadonotakashi | 0:8fdf9a60065b | 1114 | } else { |
kadonotakashi | 0:8fdf9a60065b | 1115 | return ((usart->US_LINMR & US_LINMR_DLC_Msk) >> US_LINMR_DLC_Pos) + 1; |
kadonotakashi | 0:8fdf9a60065b | 1116 | } |
kadonotakashi | 0:8fdf9a60065b | 1117 | } |
kadonotakashi | 0:8fdf9a60065b | 1118 | |
kadonotakashi | 0:8fdf9a60065b | 1119 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1120 | |
kadonotakashi | 0:8fdf9a60065b | 1121 | #if (SAMV71 || SAMV70 || SAME70 || SAMS70) |
kadonotakashi | 0:8fdf9a60065b | 1122 | /** |
kadonotakashi | 0:8fdf9a60065b | 1123 | * \brief Get identifier send status. |
kadonotakashi | 0:8fdf9a60065b | 1124 | * |
kadonotakashi | 0:8fdf9a60065b | 1125 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1126 | * |
kadonotakashi | 0:8fdf9a60065b | 1127 | * \return |
kadonotakashi | 0:8fdf9a60065b | 1128 | * 0: No LIN identifier has been sent since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1129 | * 1: :At least one LIN identifier has been sent since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1130 | */ |
kadonotakashi | 0:8fdf9a60065b | 1131 | uint8_t usart_lin_identifier_send_complete(Usart *usart) |
kadonotakashi | 0:8fdf9a60065b | 1132 | { |
kadonotakashi | 0:8fdf9a60065b | 1133 | return (usart->US_CSR & US_CSR_LINID) > 0; |
kadonotakashi | 0:8fdf9a60065b | 1134 | } |
kadonotakashi | 0:8fdf9a60065b | 1135 | |
kadonotakashi | 0:8fdf9a60065b | 1136 | /** |
kadonotakashi | 0:8fdf9a60065b | 1137 | * \brief Get identifier received status. |
kadonotakashi | 0:8fdf9a60065b | 1138 | * |
kadonotakashi | 0:8fdf9a60065b | 1139 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1140 | * |
kadonotakashi | 0:8fdf9a60065b | 1141 | * \return |
kadonotakashi | 0:8fdf9a60065b | 1142 | * 0: No LIN identifier has been reveived since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1143 | * 1: At least one LIN identifier has been received since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1144 | */ |
kadonotakashi | 0:8fdf9a60065b | 1145 | uint8_t usart_lin_identifier_reception_complete(Usart *usart) |
kadonotakashi | 0:8fdf9a60065b | 1146 | { |
kadonotakashi | 0:8fdf9a60065b | 1147 | return (usart->US_CSR & US_CSR_LINID) > 0; |
kadonotakashi | 0:8fdf9a60065b | 1148 | } |
kadonotakashi | 0:8fdf9a60065b | 1149 | |
kadonotakashi | 0:8fdf9a60065b | 1150 | /** |
kadonotakashi | 0:8fdf9a60065b | 1151 | * \brief Get transmission status. |
kadonotakashi | 0:8fdf9a60065b | 1152 | * |
kadonotakashi | 0:8fdf9a60065b | 1153 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1154 | * |
kadonotakashi | 0:8fdf9a60065b | 1155 | * \return |
kadonotakashi | 0:8fdf9a60065b | 1156 | * 0: The USART is idle or a LIN transfer is ongoing. |
kadonotakashi | 0:8fdf9a60065b | 1157 | * 1: A LIN transfer has been completed since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1158 | */ |
kadonotakashi | 0:8fdf9a60065b | 1159 | uint8_t usart_lin_tx_complete(Usart *usart) |
kadonotakashi | 0:8fdf9a60065b | 1160 | { |
kadonotakashi | 0:8fdf9a60065b | 1161 | return (usart->US_CSR & US_CSR_LINTC) > 0; |
kadonotakashi | 0:8fdf9a60065b | 1162 | } |
kadonotakashi | 0:8fdf9a60065b | 1163 | |
kadonotakashi | 0:8fdf9a60065b | 1164 | /** |
kadonotakashi | 0:8fdf9a60065b | 1165 | * \brief Configure USART to work in LON mode. |
kadonotakashi | 0:8fdf9a60065b | 1166 | * |
kadonotakashi | 0:8fdf9a60065b | 1167 | * \note By default, the transmitter and receiver aren't enabled. |
kadonotakashi | 0:8fdf9a60065b | 1168 | * |
kadonotakashi | 0:8fdf9a60065b | 1169 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1170 | * \param ul_baudrate Baudrate to be used. |
kadonotakashi | 0:8fdf9a60065b | 1171 | * \param ul_mck USART module input clock frequency. |
kadonotakashi | 0:8fdf9a60065b | 1172 | * |
kadonotakashi | 0:8fdf9a60065b | 1173 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 1174 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 1175 | */ |
kadonotakashi | 0:8fdf9a60065b | 1176 | uint32_t usart_init_lon(Usart *p_usart,uint32_t ul_baudrate, |
kadonotakashi | 0:8fdf9a60065b | 1177 | uint32_t ul_mck) |
kadonotakashi | 0:8fdf9a60065b | 1178 | { |
kadonotakashi | 0:8fdf9a60065b | 1179 | /* Reset the USART and shut down TX and RX. */ |
kadonotakashi | 0:8fdf9a60065b | 1180 | usart_reset(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 1181 | |
kadonotakashi | 0:8fdf9a60065b | 1182 | /* Set up the baudrate. */ |
kadonotakashi | 0:8fdf9a60065b | 1183 | if (usart_set_async_baudrate(p_usart, ul_baudrate, ul_mck)) { |
kadonotakashi | 0:8fdf9a60065b | 1184 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 1185 | } |
kadonotakashi | 0:8fdf9a60065b | 1186 | |
kadonotakashi | 0:8fdf9a60065b | 1187 | /* Set LIN master mode. */ |
kadonotakashi | 0:8fdf9a60065b | 1188 | p_usart->US_MR = (p_usart->US_MR & ~US_MR_USART_MODE_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 1189 | US_MR_USART_MODE_LON; |
kadonotakashi | 0:8fdf9a60065b | 1190 | |
kadonotakashi | 0:8fdf9a60065b | 1191 | usart_enable_rx(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 1192 | usart_enable_tx(p_usart); |
kadonotakashi | 0:8fdf9a60065b | 1193 | |
kadonotakashi | 0:8fdf9a60065b | 1194 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 1195 | } |
kadonotakashi | 0:8fdf9a60065b | 1196 | |
kadonotakashi | 0:8fdf9a60065b | 1197 | /** |
kadonotakashi | 0:8fdf9a60065b | 1198 | * \brief set LON parameter value. |
kadonotakashi | 0:8fdf9a60065b | 1199 | * |
kadonotakashi | 0:8fdf9a60065b | 1200 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1201 | * \param uc_type 0: LON comm_type = 1 mode, |
kadonotakashi | 0:8fdf9a60065b | 1202 | * 1: LON comm_type = 2 mode |
kadonotakashi | 0:8fdf9a60065b | 1203 | */ |
kadonotakashi | 0:8fdf9a60065b | 1204 | void usart_lon_set_comm_type(Usart *p_usart, uint8_t uc_type) |
kadonotakashi | 0:8fdf9a60065b | 1205 | { |
kadonotakashi | 0:8fdf9a60065b | 1206 | p_usart->US_LONMR = (p_usart->US_LONMR & ~US_LONMR_COMMT) | |
kadonotakashi | 0:8fdf9a60065b | 1207 | (uc_type << 0); |
kadonotakashi | 0:8fdf9a60065b | 1208 | } |
kadonotakashi | 0:8fdf9a60065b | 1209 | |
kadonotakashi | 0:8fdf9a60065b | 1210 | /** |
kadonotakashi | 0:8fdf9a60065b | 1211 | * \brief Disable LON Collision Detection Feature. |
kadonotakashi | 0:8fdf9a60065b | 1212 | * |
kadonotakashi | 0:8fdf9a60065b | 1213 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1214 | */ |
kadonotakashi | 0:8fdf9a60065b | 1215 | void usart_lon_disable_coll_detection(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1216 | { |
kadonotakashi | 0:8fdf9a60065b | 1217 | p_usart->US_LONMR |= US_LONMR_COLDET; |
kadonotakashi | 0:8fdf9a60065b | 1218 | } |
kadonotakashi | 0:8fdf9a60065b | 1219 | |
kadonotakashi | 0:8fdf9a60065b | 1220 | /** |
kadonotakashi | 0:8fdf9a60065b | 1221 | * \brief Enable LON Collision Detection Feature. |
kadonotakashi | 0:8fdf9a60065b | 1222 | * |
kadonotakashi | 0:8fdf9a60065b | 1223 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1224 | */ |
kadonotakashi | 0:8fdf9a60065b | 1225 | void usart_lon_enable_coll_detection(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1226 | { |
kadonotakashi | 0:8fdf9a60065b | 1227 | p_usart->US_LONMR &= ~US_LONMR_COLDET; |
kadonotakashi | 0:8fdf9a60065b | 1228 | } |
kadonotakashi | 0:8fdf9a60065b | 1229 | |
kadonotakashi | 0:8fdf9a60065b | 1230 | /** |
kadonotakashi | 0:8fdf9a60065b | 1231 | * \brief set Terminate Frame upon Collision Notification. |
kadonotakashi | 0:8fdf9a60065b | 1232 | * |
kadonotakashi | 0:8fdf9a60065b | 1233 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1234 | * \param uc_type 0: Do not terminate the frame in LON comm_type = 1 mode upon collision detection. |
kadonotakashi | 0:8fdf9a60065b | 1235 | * 1:Terminate the frame in LON comm_type = 1 mode upon collision detection if possible. |
kadonotakashi | 0:8fdf9a60065b | 1236 | */ |
kadonotakashi | 0:8fdf9a60065b | 1237 | void usart_lon_set_tcol(Usart *p_usart, uint8_t uc_type) |
kadonotakashi | 0:8fdf9a60065b | 1238 | { |
kadonotakashi | 0:8fdf9a60065b | 1239 | p_usart->US_LONMR = (p_usart->US_LONMR & ~US_LONMR_TCOL) | |
kadonotakashi | 0:8fdf9a60065b | 1240 | (uc_type << 2); |
kadonotakashi | 0:8fdf9a60065b | 1241 | } |
kadonotakashi | 0:8fdf9a60065b | 1242 | |
kadonotakashi | 0:8fdf9a60065b | 1243 | /** |
kadonotakashi | 0:8fdf9a60065b | 1244 | * \brief set LON Collision Detection on Frame Tail. |
kadonotakashi | 0:8fdf9a60065b | 1245 | * |
kadonotakashi | 0:8fdf9a60065b | 1246 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1247 | * \param uc_type 0: Detect collisions after CRC has been sent but prior end of transmission in LON comm_type = 1 mode. |
kadonotakashi | 0:8fdf9a60065b | 1248 | * 1: Ignore collisions after CRC has been sent but prior end of transmission in LON comm_type = 1 mode. |
kadonotakashi | 0:8fdf9a60065b | 1249 | */ |
kadonotakashi | 0:8fdf9a60065b | 1250 | void usart_lon_set_cdtail(Usart *p_usart, uint8_t uc_type) |
kadonotakashi | 0:8fdf9a60065b | 1251 | { |
kadonotakashi | 0:8fdf9a60065b | 1252 | p_usart->US_LONMR = (p_usart->US_LONMR & ~US_LONMR_CDTAIL) | |
kadonotakashi | 0:8fdf9a60065b | 1253 | (uc_type << 3); |
kadonotakashi | 0:8fdf9a60065b | 1254 | } |
kadonotakashi | 0:8fdf9a60065b | 1255 | |
kadonotakashi | 0:8fdf9a60065b | 1256 | /** |
kadonotakashi | 0:8fdf9a60065b | 1257 | * \brief set LON DMA Mode. |
kadonotakashi | 0:8fdf9a60065b | 1258 | * |
kadonotakashi | 0:8fdf9a60065b | 1259 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1260 | * \param uc_type 0: The LON data length register US_LONDL is not written by the DMA. |
kadonotakashi | 0:8fdf9a60065b | 1261 | * 1: The LON data length register US_LONDL is written by the DMA. |
kadonotakashi | 0:8fdf9a60065b | 1262 | */ |
kadonotakashi | 0:8fdf9a60065b | 1263 | void usart_lon_set_dmam(Usart *p_usart, uint8_t uc_type) |
kadonotakashi | 0:8fdf9a60065b | 1264 | { |
kadonotakashi | 0:8fdf9a60065b | 1265 | p_usart->US_LONMR = (p_usart->US_LONMR & ~US_LONMR_DMAM) | |
kadonotakashi | 0:8fdf9a60065b | 1266 | (uc_type << 4); |
kadonotakashi | 0:8fdf9a60065b | 1267 | } |
kadonotakashi | 0:8fdf9a60065b | 1268 | |
kadonotakashi | 0:8fdf9a60065b | 1269 | /** |
kadonotakashi | 0:8fdf9a60065b | 1270 | * \brief set LON Beta1 Length after Transmission. |
kadonotakashi | 0:8fdf9a60065b | 1271 | * |
kadonotakashi | 0:8fdf9a60065b | 1272 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1273 | * \param ul_len 1-16777215: LON beta1 length after transmission in tbit |
kadonotakashi | 0:8fdf9a60065b | 1274 | */ |
kadonotakashi | 0:8fdf9a60065b | 1275 | void usart_lon_set_beta1_tx_len(Usart *p_usart, uint32_t ul_len) |
kadonotakashi | 0:8fdf9a60065b | 1276 | { |
kadonotakashi | 0:8fdf9a60065b | 1277 | p_usart->US_LONB1TX = US_LONB1TX_BETA1TX(ul_len); |
kadonotakashi | 0:8fdf9a60065b | 1278 | } |
kadonotakashi | 0:8fdf9a60065b | 1279 | |
kadonotakashi | 0:8fdf9a60065b | 1280 | /** |
kadonotakashi | 0:8fdf9a60065b | 1281 | * \brief set LON Beta1 Length after Reception. |
kadonotakashi | 0:8fdf9a60065b | 1282 | * |
kadonotakashi | 0:8fdf9a60065b | 1283 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1284 | * \param ul_len 1-16777215: LON beta1 length after reception in tbit. |
kadonotakashi | 0:8fdf9a60065b | 1285 | */ |
kadonotakashi | 0:8fdf9a60065b | 1286 | void usart_lon_set_beta1_rx_len(Usart *p_usart, uint32_t ul_len) |
kadonotakashi | 0:8fdf9a60065b | 1287 | { |
kadonotakashi | 0:8fdf9a60065b | 1288 | p_usart->US_LONB1RX = US_LONB1RX_BETA1RX(ul_len); |
kadonotakashi | 0:8fdf9a60065b | 1289 | } |
kadonotakashi | 0:8fdf9a60065b | 1290 | |
kadonotakashi | 0:8fdf9a60065b | 1291 | /** |
kadonotakashi | 0:8fdf9a60065b | 1292 | * \brief set LON Priority. |
kadonotakashi | 0:8fdf9a60065b | 1293 | * |
kadonotakashi | 0:8fdf9a60065b | 1294 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1295 | * \param uc_psnb 0 -127: LON Priority Slot Number. |
kadonotakashi | 0:8fdf9a60065b | 1296 | * \param uc_nps 0 -127: LON Node Priority Slot. |
kadonotakashi | 0:8fdf9a60065b | 1297 | */ |
kadonotakashi | 0:8fdf9a60065b | 1298 | void usart_lon_set_priority(Usart *p_usart, uint8_t uc_psnb, uint8_t uc_nps) |
kadonotakashi | 0:8fdf9a60065b | 1299 | { |
kadonotakashi | 0:8fdf9a60065b | 1300 | p_usart->US_LONPRIO = US_LONPRIO_PSNB(uc_psnb) | US_LONPRIO_NPS(uc_nps); |
kadonotakashi | 0:8fdf9a60065b | 1301 | } |
kadonotakashi | 0:8fdf9a60065b | 1302 | |
kadonotakashi | 0:8fdf9a60065b | 1303 | /** |
kadonotakashi | 0:8fdf9a60065b | 1304 | * \brief set LON Indeterminate Time after Transmission. |
kadonotakashi | 0:8fdf9a60065b | 1305 | * |
kadonotakashi | 0:8fdf9a60065b | 1306 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1307 | * \param ul_time 1-16777215: LON Indeterminate Time after Transmission (comm_type = 1 mode only). |
kadonotakashi | 0:8fdf9a60065b | 1308 | */ |
kadonotakashi | 0:8fdf9a60065b | 1309 | void usart_lon_set_tx_idt(Usart *p_usart, uint32_t ul_time) |
kadonotakashi | 0:8fdf9a60065b | 1310 | { |
kadonotakashi | 0:8fdf9a60065b | 1311 | p_usart->US_IDTTX = US_IDTTX_IDTTX(ul_time); |
kadonotakashi | 0:8fdf9a60065b | 1312 | } |
kadonotakashi | 0:8fdf9a60065b | 1313 | |
kadonotakashi | 0:8fdf9a60065b | 1314 | /** |
kadonotakashi | 0:8fdf9a60065b | 1315 | * \brief set LON Indeterminate Time after Reception. |
kadonotakashi | 0:8fdf9a60065b | 1316 | * |
kadonotakashi | 0:8fdf9a60065b | 1317 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1318 | * \param ul_time 1-16777215: LON Indeterminate Time after Reception (comm_type = 1 mode only). |
kadonotakashi | 0:8fdf9a60065b | 1319 | */ |
kadonotakashi | 0:8fdf9a60065b | 1320 | void usart_lon_set_rx_idt(Usart *p_usart, uint32_t ul_time) |
kadonotakashi | 0:8fdf9a60065b | 1321 | { |
kadonotakashi | 0:8fdf9a60065b | 1322 | p_usart->US_IDTRX = US_IDTRX_IDTRX(ul_time); |
kadonotakashi | 0:8fdf9a60065b | 1323 | } |
kadonotakashi | 0:8fdf9a60065b | 1324 | |
kadonotakashi | 0:8fdf9a60065b | 1325 | /** |
kadonotakashi | 0:8fdf9a60065b | 1326 | * \brief set LON Preamble Length. |
kadonotakashi | 0:8fdf9a60065b | 1327 | * |
kadonotakashi | 0:8fdf9a60065b | 1328 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1329 | * \param ul_len 1-16383: LON preamble length in tbit(without byte-sync). |
kadonotakashi | 0:8fdf9a60065b | 1330 | */ |
kadonotakashi | 0:8fdf9a60065b | 1331 | void usart_lon_set_pre_len(Usart *p_usart, uint32_t ul_len) |
kadonotakashi | 0:8fdf9a60065b | 1332 | { |
kadonotakashi | 0:8fdf9a60065b | 1333 | p_usart->US_LONPR = US_LONPR_LONPL(ul_len); |
kadonotakashi | 0:8fdf9a60065b | 1334 | } |
kadonotakashi | 0:8fdf9a60065b | 1335 | |
kadonotakashi | 0:8fdf9a60065b | 1336 | /** |
kadonotakashi | 0:8fdf9a60065b | 1337 | * \brief set LON Data Length. |
kadonotakashi | 0:8fdf9a60065b | 1338 | * |
kadonotakashi | 0:8fdf9a60065b | 1339 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1340 | * \param uc_len 0-255: LON data length is LONDL+1 bytes. |
kadonotakashi | 0:8fdf9a60065b | 1341 | */ |
kadonotakashi | 0:8fdf9a60065b | 1342 | void usart_lon_set_data_len(Usart *p_usart, uint8_t uc_len) |
kadonotakashi | 0:8fdf9a60065b | 1343 | { |
kadonotakashi | 0:8fdf9a60065b | 1344 | p_usart->US_LONDL = US_LONDL_LONDL(uc_len); |
kadonotakashi | 0:8fdf9a60065b | 1345 | } |
kadonotakashi | 0:8fdf9a60065b | 1346 | |
kadonotakashi | 0:8fdf9a60065b | 1347 | /** |
kadonotakashi | 0:8fdf9a60065b | 1348 | * \brief set LON Priority. |
kadonotakashi | 0:8fdf9a60065b | 1349 | * |
kadonotakashi | 0:8fdf9a60065b | 1350 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1351 | * \param uc_bli LON Backlog Increment. |
kadonotakashi | 0:8fdf9a60065b | 1352 | * \param uc_altp LON Alternate Path Bit. |
kadonotakashi | 0:8fdf9a60065b | 1353 | * \param uc_pb LON Priority Bit. |
kadonotakashi | 0:8fdf9a60065b | 1354 | */ |
kadonotakashi | 0:8fdf9a60065b | 1355 | void usart_lon_set_l2hdr(Usart *p_usart, uint8_t uc_bli, uint8_t uc_altp, uint8_t uc_pb) |
kadonotakashi | 0:8fdf9a60065b | 1356 | { |
kadonotakashi | 0:8fdf9a60065b | 1357 | p_usart->US_LONL2HDR = US_LONL2HDR_BLI(uc_bli) | (uc_altp << 6) | (uc_pb << 7); |
kadonotakashi | 0:8fdf9a60065b | 1358 | } |
kadonotakashi | 0:8fdf9a60065b | 1359 | |
kadonotakashi | 0:8fdf9a60065b | 1360 | /** |
kadonotakashi | 0:8fdf9a60065b | 1361 | * \brief Check if LON Transmission End. |
kadonotakashi | 0:8fdf9a60065b | 1362 | * |
kadonotakashi | 0:8fdf9a60065b | 1363 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1364 | * |
kadonotakashi | 0:8fdf9a60065b | 1365 | * \retval 1 At least one transmission has been performed since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1366 | * \retval 0 Transmission on going or no transmission occurred since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1367 | */ |
kadonotakashi | 0:8fdf9a60065b | 1368 | uint32_t usart_lon_is_tx_end(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1369 | { |
kadonotakashi | 0:8fdf9a60065b | 1370 | return (p_usart->US_CSR & US_CSR_LTXD) > 0; |
kadonotakashi | 0:8fdf9a60065b | 1371 | } |
kadonotakashi | 0:8fdf9a60065b | 1372 | |
kadonotakashi | 0:8fdf9a60065b | 1373 | /** |
kadonotakashi | 0:8fdf9a60065b | 1374 | * \brief Check if LON Reception End. |
kadonotakashi | 0:8fdf9a60065b | 1375 | * |
kadonotakashi | 0:8fdf9a60065b | 1376 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1377 | * |
kadonotakashi | 0:8fdf9a60065b | 1378 | * \retval 1 At least one Reception has been performed since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1379 | * \retval 0 Reception on going or no Reception occurred since the last RSTSTA. |
kadonotakashi | 0:8fdf9a60065b | 1380 | */ |
kadonotakashi | 0:8fdf9a60065b | 1381 | uint32_t usart_lon_is_rx_end(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1382 | { |
kadonotakashi | 0:8fdf9a60065b | 1383 | return (p_usart->US_CSR & US_CSR_LRXD) > 0; |
kadonotakashi | 0:8fdf9a60065b | 1384 | } |
kadonotakashi | 0:8fdf9a60065b | 1385 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1386 | |
kadonotakashi | 0:8fdf9a60065b | 1387 | /** |
kadonotakashi | 0:8fdf9a60065b | 1388 | * \brief Enable USART transmitter. |
kadonotakashi | 0:8fdf9a60065b | 1389 | * |
kadonotakashi | 0:8fdf9a60065b | 1390 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1391 | */ |
kadonotakashi | 0:8fdf9a60065b | 1392 | void usart_enable_tx(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1393 | { |
kadonotakashi | 0:8fdf9a60065b | 1394 | p_usart->US_CR = US_CR_TXEN; |
kadonotakashi | 0:8fdf9a60065b | 1395 | } |
kadonotakashi | 0:8fdf9a60065b | 1396 | |
kadonotakashi | 0:8fdf9a60065b | 1397 | /** |
kadonotakashi | 0:8fdf9a60065b | 1398 | * \brief Disable USART transmitter. |
kadonotakashi | 0:8fdf9a60065b | 1399 | * |
kadonotakashi | 0:8fdf9a60065b | 1400 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1401 | */ |
kadonotakashi | 0:8fdf9a60065b | 1402 | void usart_disable_tx(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1403 | { |
kadonotakashi | 0:8fdf9a60065b | 1404 | p_usart->US_CR = US_CR_TXDIS; |
kadonotakashi | 0:8fdf9a60065b | 1405 | } |
kadonotakashi | 0:8fdf9a60065b | 1406 | |
kadonotakashi | 0:8fdf9a60065b | 1407 | /** |
kadonotakashi | 0:8fdf9a60065b | 1408 | * \brief Immediately stop and disable USART transmitter. |
kadonotakashi | 0:8fdf9a60065b | 1409 | * |
kadonotakashi | 0:8fdf9a60065b | 1410 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1411 | */ |
kadonotakashi | 0:8fdf9a60065b | 1412 | void usart_reset_tx(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1413 | { |
kadonotakashi | 0:8fdf9a60065b | 1414 | /* Reset transmitter */ |
kadonotakashi | 0:8fdf9a60065b | 1415 | p_usart->US_CR = US_CR_RSTTX | US_CR_TXDIS; |
kadonotakashi | 0:8fdf9a60065b | 1416 | } |
kadonotakashi | 0:8fdf9a60065b | 1417 | |
kadonotakashi | 0:8fdf9a60065b | 1418 | /** |
kadonotakashi | 0:8fdf9a60065b | 1419 | * \brief Configure the transmit timeguard register. |
kadonotakashi | 0:8fdf9a60065b | 1420 | * |
kadonotakashi | 0:8fdf9a60065b | 1421 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1422 | * \param timeguard The value of transmit timeguard. |
kadonotakashi | 0:8fdf9a60065b | 1423 | */ |
kadonotakashi | 0:8fdf9a60065b | 1424 | void usart_set_tx_timeguard(Usart *p_usart, uint32_t timeguard) |
kadonotakashi | 0:8fdf9a60065b | 1425 | { |
kadonotakashi | 0:8fdf9a60065b | 1426 | p_usart->US_TTGR = timeguard; |
kadonotakashi | 0:8fdf9a60065b | 1427 | } |
kadonotakashi | 0:8fdf9a60065b | 1428 | |
kadonotakashi | 0:8fdf9a60065b | 1429 | /** |
kadonotakashi | 0:8fdf9a60065b | 1430 | * \brief Enable USART receiver. |
kadonotakashi | 0:8fdf9a60065b | 1431 | * |
kadonotakashi | 0:8fdf9a60065b | 1432 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1433 | */ |
kadonotakashi | 0:8fdf9a60065b | 1434 | void usart_enable_rx(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1435 | { |
kadonotakashi | 0:8fdf9a60065b | 1436 | p_usart->US_CR = US_CR_RXEN; |
kadonotakashi | 0:8fdf9a60065b | 1437 | } |
kadonotakashi | 0:8fdf9a60065b | 1438 | |
kadonotakashi | 0:8fdf9a60065b | 1439 | /** |
kadonotakashi | 0:8fdf9a60065b | 1440 | * \brief Disable USART receiver. |
kadonotakashi | 0:8fdf9a60065b | 1441 | * |
kadonotakashi | 0:8fdf9a60065b | 1442 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1443 | */ |
kadonotakashi | 0:8fdf9a60065b | 1444 | void usart_disable_rx(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1445 | { |
kadonotakashi | 0:8fdf9a60065b | 1446 | p_usart->US_CR = US_CR_RXDIS; |
kadonotakashi | 0:8fdf9a60065b | 1447 | } |
kadonotakashi | 0:8fdf9a60065b | 1448 | |
kadonotakashi | 0:8fdf9a60065b | 1449 | /** |
kadonotakashi | 0:8fdf9a60065b | 1450 | * \brief Immediately stop and disable USART receiver. |
kadonotakashi | 0:8fdf9a60065b | 1451 | * |
kadonotakashi | 0:8fdf9a60065b | 1452 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1453 | */ |
kadonotakashi | 0:8fdf9a60065b | 1454 | void usart_reset_rx(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1455 | { |
kadonotakashi | 0:8fdf9a60065b | 1456 | /* Reset Receiver */ |
kadonotakashi | 0:8fdf9a60065b | 1457 | p_usart->US_CR = US_CR_RSTRX | US_CR_RXDIS; |
kadonotakashi | 0:8fdf9a60065b | 1458 | } |
kadonotakashi | 0:8fdf9a60065b | 1459 | |
kadonotakashi | 0:8fdf9a60065b | 1460 | /** |
kadonotakashi | 0:8fdf9a60065b | 1461 | * \brief Configure the receive timeout register. |
kadonotakashi | 0:8fdf9a60065b | 1462 | * |
kadonotakashi | 0:8fdf9a60065b | 1463 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1464 | * \param timeout The value of receive timeout. |
kadonotakashi | 0:8fdf9a60065b | 1465 | */ |
kadonotakashi | 0:8fdf9a60065b | 1466 | void usart_set_rx_timeout(Usart *p_usart, uint32_t timeout) |
kadonotakashi | 0:8fdf9a60065b | 1467 | { |
kadonotakashi | 0:8fdf9a60065b | 1468 | p_usart->US_RTOR = timeout; |
kadonotakashi | 0:8fdf9a60065b | 1469 | } |
kadonotakashi | 0:8fdf9a60065b | 1470 | |
kadonotakashi | 0:8fdf9a60065b | 1471 | /** |
kadonotakashi | 0:8fdf9a60065b | 1472 | * \brief Enable USART interrupts. |
kadonotakashi | 0:8fdf9a60065b | 1473 | * |
kadonotakashi | 0:8fdf9a60065b | 1474 | * \param p_usart Pointer to a USART peripheral. |
kadonotakashi | 0:8fdf9a60065b | 1475 | * \param ul_sources Interrupt sources bit map. |
kadonotakashi | 0:8fdf9a60065b | 1476 | */ |
kadonotakashi | 0:8fdf9a60065b | 1477 | void usart_enable_interrupt(Usart *p_usart, uint32_t ul_sources) |
kadonotakashi | 0:8fdf9a60065b | 1478 | { |
kadonotakashi | 0:8fdf9a60065b | 1479 | p_usart->US_IER = ul_sources; |
kadonotakashi | 0:8fdf9a60065b | 1480 | } |
kadonotakashi | 0:8fdf9a60065b | 1481 | |
kadonotakashi | 0:8fdf9a60065b | 1482 | /** |
kadonotakashi | 0:8fdf9a60065b | 1483 | * \brief Disable USART interrupts. |
kadonotakashi | 0:8fdf9a60065b | 1484 | * |
kadonotakashi | 0:8fdf9a60065b | 1485 | * \param p_usart Pointer to a USART peripheral. |
kadonotakashi | 0:8fdf9a60065b | 1486 | * \param ul_sources Interrupt sources bit map. |
kadonotakashi | 0:8fdf9a60065b | 1487 | */ |
kadonotakashi | 0:8fdf9a60065b | 1488 | void usart_disable_interrupt(Usart *p_usart, uint32_t ul_sources) |
kadonotakashi | 0:8fdf9a60065b | 1489 | { |
kadonotakashi | 0:8fdf9a60065b | 1490 | p_usart->US_IDR = ul_sources; |
kadonotakashi | 0:8fdf9a60065b | 1491 | } |
kadonotakashi | 0:8fdf9a60065b | 1492 | |
kadonotakashi | 0:8fdf9a60065b | 1493 | /** |
kadonotakashi | 0:8fdf9a60065b | 1494 | * \brief Read USART interrupt mask. |
kadonotakashi | 0:8fdf9a60065b | 1495 | * |
kadonotakashi | 0:8fdf9a60065b | 1496 | * \param p_usart Pointer to a USART peripheral. |
kadonotakashi | 0:8fdf9a60065b | 1497 | * |
kadonotakashi | 0:8fdf9a60065b | 1498 | * \return The interrupt mask value. |
kadonotakashi | 0:8fdf9a60065b | 1499 | */ |
kadonotakashi | 0:8fdf9a60065b | 1500 | uint32_t usart_get_interrupt_mask(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1501 | { |
kadonotakashi | 0:8fdf9a60065b | 1502 | return p_usart->US_IMR; |
kadonotakashi | 0:8fdf9a60065b | 1503 | } |
kadonotakashi | 0:8fdf9a60065b | 1504 | |
kadonotakashi | 0:8fdf9a60065b | 1505 | /** |
kadonotakashi | 0:8fdf9a60065b | 1506 | * \brief Get current status. |
kadonotakashi | 0:8fdf9a60065b | 1507 | * |
kadonotakashi | 0:8fdf9a60065b | 1508 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1509 | * |
kadonotakashi | 0:8fdf9a60065b | 1510 | * \return The current USART status. |
kadonotakashi | 0:8fdf9a60065b | 1511 | */ |
kadonotakashi | 0:8fdf9a60065b | 1512 | uint32_t usart_get_status(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1513 | { |
kadonotakashi | 0:8fdf9a60065b | 1514 | return p_usart->US_CSR; |
kadonotakashi | 0:8fdf9a60065b | 1515 | } |
kadonotakashi | 0:8fdf9a60065b | 1516 | |
kadonotakashi | 0:8fdf9a60065b | 1517 | /** |
kadonotakashi | 0:8fdf9a60065b | 1518 | * \brief Reset status bits (PARE, OVER, MANERR, UNRE and PXBRK in US_CSR). |
kadonotakashi | 0:8fdf9a60065b | 1519 | * |
kadonotakashi | 0:8fdf9a60065b | 1520 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1521 | */ |
kadonotakashi | 0:8fdf9a60065b | 1522 | void usart_reset_status(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1523 | { |
kadonotakashi | 0:8fdf9a60065b | 1524 | p_usart->US_CR = US_CR_RSTSTA; |
kadonotakashi | 0:8fdf9a60065b | 1525 | } |
kadonotakashi | 0:8fdf9a60065b | 1526 | |
kadonotakashi | 0:8fdf9a60065b | 1527 | /** |
kadonotakashi | 0:8fdf9a60065b | 1528 | * \brief Start transmission of a break. |
kadonotakashi | 0:8fdf9a60065b | 1529 | * |
kadonotakashi | 0:8fdf9a60065b | 1530 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1531 | */ |
kadonotakashi | 0:8fdf9a60065b | 1532 | void usart_start_tx_break(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1533 | { |
kadonotakashi | 0:8fdf9a60065b | 1534 | p_usart->US_CR = US_CR_STTBRK; |
kadonotakashi | 0:8fdf9a60065b | 1535 | } |
kadonotakashi | 0:8fdf9a60065b | 1536 | |
kadonotakashi | 0:8fdf9a60065b | 1537 | /** |
kadonotakashi | 0:8fdf9a60065b | 1538 | * \brief Stop transmission of a break. |
kadonotakashi | 0:8fdf9a60065b | 1539 | * |
kadonotakashi | 0:8fdf9a60065b | 1540 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1541 | */ |
kadonotakashi | 0:8fdf9a60065b | 1542 | void usart_stop_tx_break(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1543 | { |
kadonotakashi | 0:8fdf9a60065b | 1544 | p_usart->US_CR = US_CR_STPBRK; |
kadonotakashi | 0:8fdf9a60065b | 1545 | } |
kadonotakashi | 0:8fdf9a60065b | 1546 | |
kadonotakashi | 0:8fdf9a60065b | 1547 | /** |
kadonotakashi | 0:8fdf9a60065b | 1548 | * \brief Start waiting for a character before clocking the timeout count. |
kadonotakashi | 0:8fdf9a60065b | 1549 | * Reset the status bit TIMEOUT in US_CSR. |
kadonotakashi | 0:8fdf9a60065b | 1550 | * |
kadonotakashi | 0:8fdf9a60065b | 1551 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1552 | */ |
kadonotakashi | 0:8fdf9a60065b | 1553 | void usart_start_rx_timeout(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1554 | { |
kadonotakashi | 0:8fdf9a60065b | 1555 | p_usart->US_CR = US_CR_STTTO; |
kadonotakashi | 0:8fdf9a60065b | 1556 | } |
kadonotakashi | 0:8fdf9a60065b | 1557 | |
kadonotakashi | 0:8fdf9a60065b | 1558 | /** |
kadonotakashi | 0:8fdf9a60065b | 1559 | * \brief In Multidrop mode only, the next character written to the US_THR |
kadonotakashi | 0:8fdf9a60065b | 1560 | * is sent with the address bit set. |
kadonotakashi | 0:8fdf9a60065b | 1561 | * |
kadonotakashi | 0:8fdf9a60065b | 1562 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1563 | * \param ul_addr The address to be sent out. |
kadonotakashi | 0:8fdf9a60065b | 1564 | * |
kadonotakashi | 0:8fdf9a60065b | 1565 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 1566 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 1567 | */ |
kadonotakashi | 0:8fdf9a60065b | 1568 | uint32_t usart_send_address(Usart *p_usart, uint32_t ul_addr) |
kadonotakashi | 0:8fdf9a60065b | 1569 | { |
kadonotakashi | 0:8fdf9a60065b | 1570 | if ((p_usart->US_MR & US_MR_PAR_MULTIDROP) != US_MR_PAR_MULTIDROP) { |
kadonotakashi | 0:8fdf9a60065b | 1571 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 1572 | } |
kadonotakashi | 0:8fdf9a60065b | 1573 | |
kadonotakashi | 0:8fdf9a60065b | 1574 | p_usart->US_CR = US_CR_SENDA; |
kadonotakashi | 0:8fdf9a60065b | 1575 | |
kadonotakashi | 0:8fdf9a60065b | 1576 | if (usart_write(p_usart, ul_addr)) { |
kadonotakashi | 0:8fdf9a60065b | 1577 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 1578 | } else { |
kadonotakashi | 0:8fdf9a60065b | 1579 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 1580 | } |
kadonotakashi | 0:8fdf9a60065b | 1581 | } |
kadonotakashi | 0:8fdf9a60065b | 1582 | |
kadonotakashi | 0:8fdf9a60065b | 1583 | /** |
kadonotakashi | 0:8fdf9a60065b | 1584 | * \brief Restart the receive timeout. |
kadonotakashi | 0:8fdf9a60065b | 1585 | * |
kadonotakashi | 0:8fdf9a60065b | 1586 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1587 | */ |
kadonotakashi | 0:8fdf9a60065b | 1588 | void usart_restart_rx_timeout(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1589 | { |
kadonotakashi | 0:8fdf9a60065b | 1590 | p_usart->US_CR = US_CR_RETTO; |
kadonotakashi | 0:8fdf9a60065b | 1591 | } |
kadonotakashi | 0:8fdf9a60065b | 1592 | |
kadonotakashi | 0:8fdf9a60065b | 1593 | #if (SAM3S || SAM4S || SAM3U || SAM4L || SAM4E) |
kadonotakashi | 0:8fdf9a60065b | 1594 | |
kadonotakashi | 0:8fdf9a60065b | 1595 | /** |
kadonotakashi | 0:8fdf9a60065b | 1596 | * \brief Drive the pin DTR to 0. |
kadonotakashi | 0:8fdf9a60065b | 1597 | * |
kadonotakashi | 0:8fdf9a60065b | 1598 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1599 | */ |
kadonotakashi | 0:8fdf9a60065b | 1600 | void usart_drive_DTR_pin_low(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1601 | { |
kadonotakashi | 0:8fdf9a60065b | 1602 | p_usart->US_CR = US_CR_DTREN; |
kadonotakashi | 0:8fdf9a60065b | 1603 | } |
kadonotakashi | 0:8fdf9a60065b | 1604 | |
kadonotakashi | 0:8fdf9a60065b | 1605 | /** |
kadonotakashi | 0:8fdf9a60065b | 1606 | * \brief Drive the pin DTR to 1. |
kadonotakashi | 0:8fdf9a60065b | 1607 | * |
kadonotakashi | 0:8fdf9a60065b | 1608 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1609 | */ |
kadonotakashi | 0:8fdf9a60065b | 1610 | void usart_drive_DTR_pin_high(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1611 | { |
kadonotakashi | 0:8fdf9a60065b | 1612 | p_usart->US_CR = US_CR_DTRDIS; |
kadonotakashi | 0:8fdf9a60065b | 1613 | } |
kadonotakashi | 0:8fdf9a60065b | 1614 | |
kadonotakashi | 0:8fdf9a60065b | 1615 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1616 | |
kadonotakashi | 0:8fdf9a60065b | 1617 | /** |
kadonotakashi | 0:8fdf9a60065b | 1618 | * \brief Drive the pin RTS to 0. |
kadonotakashi | 0:8fdf9a60065b | 1619 | * |
kadonotakashi | 0:8fdf9a60065b | 1620 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1621 | */ |
kadonotakashi | 0:8fdf9a60065b | 1622 | void usart_drive_RTS_pin_low(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1623 | { |
kadonotakashi | 0:8fdf9a60065b | 1624 | p_usart->US_CR = US_CR_RTSEN; |
kadonotakashi | 0:8fdf9a60065b | 1625 | } |
kadonotakashi | 0:8fdf9a60065b | 1626 | |
kadonotakashi | 0:8fdf9a60065b | 1627 | /** |
kadonotakashi | 0:8fdf9a60065b | 1628 | * \brief Drive the pin RTS to 1. |
kadonotakashi | 0:8fdf9a60065b | 1629 | * |
kadonotakashi | 0:8fdf9a60065b | 1630 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1631 | */ |
kadonotakashi | 0:8fdf9a60065b | 1632 | void usart_drive_RTS_pin_high(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1633 | { |
kadonotakashi | 0:8fdf9a60065b | 1634 | p_usart->US_CR = US_CR_RTSDIS; |
kadonotakashi | 0:8fdf9a60065b | 1635 | } |
kadonotakashi | 0:8fdf9a60065b | 1636 | |
kadonotakashi | 0:8fdf9a60065b | 1637 | /** |
kadonotakashi | 0:8fdf9a60065b | 1638 | * \brief Drive the slave select line NSS (RTS pin) to 0 in SPI master mode. |
kadonotakashi | 0:8fdf9a60065b | 1639 | * |
kadonotakashi | 0:8fdf9a60065b | 1640 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1641 | */ |
kadonotakashi | 0:8fdf9a60065b | 1642 | void usart_spi_force_chip_select(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1643 | { |
kadonotakashi | 0:8fdf9a60065b | 1644 | p_usart->US_CR = US_CR_FCS; |
kadonotakashi | 0:8fdf9a60065b | 1645 | } |
kadonotakashi | 0:8fdf9a60065b | 1646 | |
kadonotakashi | 0:8fdf9a60065b | 1647 | /** |
kadonotakashi | 0:8fdf9a60065b | 1648 | * \brief Drive the slave select line NSS (RTS pin) to 1 in SPI master mode. |
kadonotakashi | 0:8fdf9a60065b | 1649 | * |
kadonotakashi | 0:8fdf9a60065b | 1650 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1651 | */ |
kadonotakashi | 0:8fdf9a60065b | 1652 | void usart_spi_release_chip_select(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1653 | { |
kadonotakashi | 0:8fdf9a60065b | 1654 | p_usart->US_CR = US_CR_RCS; |
kadonotakashi | 0:8fdf9a60065b | 1655 | } |
kadonotakashi | 0:8fdf9a60065b | 1656 | |
kadonotakashi | 0:8fdf9a60065b | 1657 | /** |
kadonotakashi | 0:8fdf9a60065b | 1658 | * \brief Check if Transmit is Ready. |
kadonotakashi | 0:8fdf9a60065b | 1659 | * Check if data have been loaded in USART_THR and are waiting to be loaded |
kadonotakashi | 0:8fdf9a60065b | 1660 | * into the Transmit Shift Register (TSR). |
kadonotakashi | 0:8fdf9a60065b | 1661 | * |
kadonotakashi | 0:8fdf9a60065b | 1662 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1663 | * |
kadonotakashi | 0:8fdf9a60065b | 1664 | * \retval 1 No data is in the Transmit Holding Register. |
kadonotakashi | 0:8fdf9a60065b | 1665 | * \retval 0 There is data in the Transmit Holding Register. |
kadonotakashi | 0:8fdf9a60065b | 1666 | */ |
kadonotakashi | 0:8fdf9a60065b | 1667 | uint32_t usart_is_tx_ready(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1668 | { |
kadonotakashi | 0:8fdf9a60065b | 1669 | return (p_usart->US_CSR & US_CSR_TXRDY) > 0; |
kadonotakashi | 0:8fdf9a60065b | 1670 | } |
kadonotakashi | 0:8fdf9a60065b | 1671 | |
kadonotakashi | 0:8fdf9a60065b | 1672 | /** |
kadonotakashi | 0:8fdf9a60065b | 1673 | * \brief Check if Transmit Holding Register is empty. |
kadonotakashi | 0:8fdf9a60065b | 1674 | * Check if the last data written in USART_THR have been loaded in TSR and the |
kadonotakashi | 0:8fdf9a60065b | 1675 | * last data loaded in TSR have been transmitted. |
kadonotakashi | 0:8fdf9a60065b | 1676 | * |
kadonotakashi | 0:8fdf9a60065b | 1677 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1678 | * |
kadonotakashi | 0:8fdf9a60065b | 1679 | * \retval 1 Transmitter is empty. |
kadonotakashi | 0:8fdf9a60065b | 1680 | * \retval 0 Transmitter is not empty. |
kadonotakashi | 0:8fdf9a60065b | 1681 | */ |
kadonotakashi | 0:8fdf9a60065b | 1682 | uint32_t usart_is_tx_empty(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1683 | { |
kadonotakashi | 0:8fdf9a60065b | 1684 | return (p_usart->US_CSR & US_CSR_TXEMPTY) > 0; |
kadonotakashi | 0:8fdf9a60065b | 1685 | } |
kadonotakashi | 0:8fdf9a60065b | 1686 | |
kadonotakashi | 0:8fdf9a60065b | 1687 | /** |
kadonotakashi | 0:8fdf9a60065b | 1688 | * \brief Check if the received data are ready. |
kadonotakashi | 0:8fdf9a60065b | 1689 | * Check if Data have been received and loaded into USART_RHR. |
kadonotakashi | 0:8fdf9a60065b | 1690 | * |
kadonotakashi | 0:8fdf9a60065b | 1691 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1692 | * |
kadonotakashi | 0:8fdf9a60065b | 1693 | * \retval 1 Some data has been received. |
kadonotakashi | 0:8fdf9a60065b | 1694 | * \retval 0 No data has been received. |
kadonotakashi | 0:8fdf9a60065b | 1695 | */ |
kadonotakashi | 0:8fdf9a60065b | 1696 | uint32_t usart_is_rx_ready(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1697 | { |
kadonotakashi | 0:8fdf9a60065b | 1698 | return (p_usart->US_CSR & US_CSR_RXRDY) > 0; |
kadonotakashi | 0:8fdf9a60065b | 1699 | } |
kadonotakashi | 0:8fdf9a60065b | 1700 | |
kadonotakashi | 0:8fdf9a60065b | 1701 | /** |
kadonotakashi | 0:8fdf9a60065b | 1702 | * \brief Write to USART Transmit Holding Register. |
kadonotakashi | 0:8fdf9a60065b | 1703 | * |
kadonotakashi | 0:8fdf9a60065b | 1704 | * \note Before writing user should check if tx is ready (or empty). |
kadonotakashi | 0:8fdf9a60065b | 1705 | * |
kadonotakashi | 0:8fdf9a60065b | 1706 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1707 | * \param c Data to be sent. |
kadonotakashi | 0:8fdf9a60065b | 1708 | * |
kadonotakashi | 0:8fdf9a60065b | 1709 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 1710 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 1711 | */ |
kadonotakashi | 0:8fdf9a60065b | 1712 | uint32_t usart_write(Usart *p_usart, uint32_t c) |
kadonotakashi | 0:8fdf9a60065b | 1713 | { |
kadonotakashi | 0:8fdf9a60065b | 1714 | if (!(p_usart->US_CSR & US_CSR_TXRDY)) { |
kadonotakashi | 0:8fdf9a60065b | 1715 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 1716 | } |
kadonotakashi | 0:8fdf9a60065b | 1717 | |
kadonotakashi | 0:8fdf9a60065b | 1718 | p_usart->US_THR = US_THR_TXCHR(c); |
kadonotakashi | 0:8fdf9a60065b | 1719 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 1720 | } |
kadonotakashi | 0:8fdf9a60065b | 1721 | |
kadonotakashi | 0:8fdf9a60065b | 1722 | /** |
kadonotakashi | 0:8fdf9a60065b | 1723 | * \brief Write to USART Transmit Holding Register. |
kadonotakashi | 0:8fdf9a60065b | 1724 | * |
kadonotakashi | 0:8fdf9a60065b | 1725 | * \note Before writing user should check if tx is ready (or empty). |
kadonotakashi | 0:8fdf9a60065b | 1726 | * |
kadonotakashi | 0:8fdf9a60065b | 1727 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1728 | * \param c Data to be sent. |
kadonotakashi | 0:8fdf9a60065b | 1729 | * |
kadonotakashi | 0:8fdf9a60065b | 1730 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 1731 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 1732 | */ |
kadonotakashi | 0:8fdf9a60065b | 1733 | uint32_t usart_putchar(Usart *p_usart, uint32_t c) |
kadonotakashi | 0:8fdf9a60065b | 1734 | { |
kadonotakashi | 0:8fdf9a60065b | 1735 | while (!(p_usart->US_CSR & US_CSR_TXRDY)) { |
kadonotakashi | 0:8fdf9a60065b | 1736 | } |
kadonotakashi | 0:8fdf9a60065b | 1737 | |
kadonotakashi | 0:8fdf9a60065b | 1738 | p_usart->US_THR = US_THR_TXCHR(c); |
kadonotakashi | 0:8fdf9a60065b | 1739 | |
kadonotakashi | 0:8fdf9a60065b | 1740 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 1741 | } |
kadonotakashi | 0:8fdf9a60065b | 1742 | |
kadonotakashi | 0:8fdf9a60065b | 1743 | /** |
kadonotakashi | 0:8fdf9a60065b | 1744 | * \brief Write one-line string through USART. |
kadonotakashi | 0:8fdf9a60065b | 1745 | * |
kadonotakashi | 0:8fdf9a60065b | 1746 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1747 | * \param string Pointer to one-line string to be sent. |
kadonotakashi | 0:8fdf9a60065b | 1748 | */ |
kadonotakashi | 0:8fdf9a60065b | 1749 | void usart_write_line(Usart *p_usart, const char *string) |
kadonotakashi | 0:8fdf9a60065b | 1750 | { |
kadonotakashi | 0:8fdf9a60065b | 1751 | while (*string != '\0') { |
kadonotakashi | 0:8fdf9a60065b | 1752 | usart_putchar(p_usart, *string++); |
kadonotakashi | 0:8fdf9a60065b | 1753 | } |
kadonotakashi | 0:8fdf9a60065b | 1754 | } |
kadonotakashi | 0:8fdf9a60065b | 1755 | |
kadonotakashi | 0:8fdf9a60065b | 1756 | /** |
kadonotakashi | 0:8fdf9a60065b | 1757 | * \brief Read from USART Receive Holding Register. |
kadonotakashi | 0:8fdf9a60065b | 1758 | * |
kadonotakashi | 0:8fdf9a60065b | 1759 | * \note Before reading user should check if rx is ready. |
kadonotakashi | 0:8fdf9a60065b | 1760 | * |
kadonotakashi | 0:8fdf9a60065b | 1761 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1762 | * \param c Pointer where the one-byte received data will be stored. |
kadonotakashi | 0:8fdf9a60065b | 1763 | * |
kadonotakashi | 0:8fdf9a60065b | 1764 | * \retval 0 on success. |
kadonotakashi | 0:8fdf9a60065b | 1765 | * \retval 1 if no data is available or errors. |
kadonotakashi | 0:8fdf9a60065b | 1766 | */ |
kadonotakashi | 0:8fdf9a60065b | 1767 | uint32_t usart_read(Usart *p_usart, uint32_t *c) |
kadonotakashi | 0:8fdf9a60065b | 1768 | { |
kadonotakashi | 0:8fdf9a60065b | 1769 | if (!(p_usart->US_CSR & US_CSR_RXRDY)) { |
kadonotakashi | 0:8fdf9a60065b | 1770 | return 1; |
kadonotakashi | 0:8fdf9a60065b | 1771 | } |
kadonotakashi | 0:8fdf9a60065b | 1772 | |
kadonotakashi | 0:8fdf9a60065b | 1773 | /* Read character */ |
kadonotakashi | 0:8fdf9a60065b | 1774 | *c = p_usart->US_RHR & US_RHR_RXCHR_Msk; |
kadonotakashi | 0:8fdf9a60065b | 1775 | |
kadonotakashi | 0:8fdf9a60065b | 1776 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 1777 | } |
kadonotakashi | 0:8fdf9a60065b | 1778 | |
kadonotakashi | 0:8fdf9a60065b | 1779 | /** |
kadonotakashi | 0:8fdf9a60065b | 1780 | * \brief Read from USART Receive Holding Register. |
kadonotakashi | 0:8fdf9a60065b | 1781 | * Before reading user should check if rx is ready. |
kadonotakashi | 0:8fdf9a60065b | 1782 | * |
kadonotakashi | 0:8fdf9a60065b | 1783 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1784 | * \param c Pointer where the one-byte received data will be stored. |
kadonotakashi | 0:8fdf9a60065b | 1785 | * |
kadonotakashi | 0:8fdf9a60065b | 1786 | * \retval 0 Data has been received. |
kadonotakashi | 0:8fdf9a60065b | 1787 | * \retval 1 on failure. |
kadonotakashi | 0:8fdf9a60065b | 1788 | */ |
kadonotakashi | 0:8fdf9a60065b | 1789 | uint32_t usart_getchar(Usart *p_usart, uint32_t *c) |
kadonotakashi | 0:8fdf9a60065b | 1790 | { |
kadonotakashi | 0:8fdf9a60065b | 1791 | /* Wait until it's not empty or timeout has reached. */ |
kadonotakashi | 0:8fdf9a60065b | 1792 | while (!(p_usart->US_CSR & US_CSR_RXRDY)) { |
kadonotakashi | 0:8fdf9a60065b | 1793 | } |
kadonotakashi | 0:8fdf9a60065b | 1794 | |
kadonotakashi | 0:8fdf9a60065b | 1795 | /* Read character */ |
kadonotakashi | 0:8fdf9a60065b | 1796 | *c = p_usart->US_RHR & US_RHR_RXCHR_Msk; |
kadonotakashi | 0:8fdf9a60065b | 1797 | |
kadonotakashi | 0:8fdf9a60065b | 1798 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 1799 | } |
kadonotakashi | 0:8fdf9a60065b | 1800 | |
kadonotakashi | 0:8fdf9a60065b | 1801 | #if (SAM3XA || SAM3U) |
kadonotakashi | 0:8fdf9a60065b | 1802 | /** |
kadonotakashi | 0:8fdf9a60065b | 1803 | * \brief Get Transmit address for DMA operation. |
kadonotakashi | 0:8fdf9a60065b | 1804 | * |
kadonotakashi | 0:8fdf9a60065b | 1805 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1806 | * |
kadonotakashi | 0:8fdf9a60065b | 1807 | * \return Transmit address for DMA access. |
kadonotakashi | 0:8fdf9a60065b | 1808 | */ |
kadonotakashi | 0:8fdf9a60065b | 1809 | uint32_t *usart_get_tx_access(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1810 | { |
kadonotakashi | 0:8fdf9a60065b | 1811 | return (uint32_t *)&(p_usart->US_THR); |
kadonotakashi | 0:8fdf9a60065b | 1812 | } |
kadonotakashi | 0:8fdf9a60065b | 1813 | |
kadonotakashi | 0:8fdf9a60065b | 1814 | /** |
kadonotakashi | 0:8fdf9a60065b | 1815 | * \brief Get Receive address for DMA operation. |
kadonotakashi | 0:8fdf9a60065b | 1816 | * |
kadonotakashi | 0:8fdf9a60065b | 1817 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1818 | * |
kadonotakashi | 0:8fdf9a60065b | 1819 | * \return Receive address for DMA access. |
kadonotakashi | 0:8fdf9a60065b | 1820 | */ |
kadonotakashi | 0:8fdf9a60065b | 1821 | uint32_t *usart_get_rx_access(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1822 | { |
kadonotakashi | 0:8fdf9a60065b | 1823 | return (uint32_t *)&(p_usart->US_RHR); |
kadonotakashi | 0:8fdf9a60065b | 1824 | } |
kadonotakashi | 0:8fdf9a60065b | 1825 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1826 | |
kadonotakashi | 0:8fdf9a60065b | 1827 | #if (!SAM4L && !SAMV71 && !SAMV70 && !SAME70 && !SAMS70) |
kadonotakashi | 0:8fdf9a60065b | 1828 | /** |
kadonotakashi | 0:8fdf9a60065b | 1829 | * \brief Get USART PDC base address. |
kadonotakashi | 0:8fdf9a60065b | 1830 | * |
kadonotakashi | 0:8fdf9a60065b | 1831 | * \param p_usart Pointer to a UART instance. |
kadonotakashi | 0:8fdf9a60065b | 1832 | * |
kadonotakashi | 0:8fdf9a60065b | 1833 | * \return USART PDC registers base for PDC driver to access. |
kadonotakashi | 0:8fdf9a60065b | 1834 | */ |
kadonotakashi | 0:8fdf9a60065b | 1835 | Pdc *usart_get_pdc_base(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1836 | { |
kadonotakashi | 0:8fdf9a60065b | 1837 | Pdc *p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1838 | |
kadonotakashi | 0:8fdf9a60065b | 1839 | p_pdc_base = (Pdc *)NULL; |
kadonotakashi | 0:8fdf9a60065b | 1840 | |
kadonotakashi | 0:8fdf9a60065b | 1841 | #ifdef PDC_USART |
kadonotakashi | 0:8fdf9a60065b | 1842 | if (p_usart == USART) { |
kadonotakashi | 0:8fdf9a60065b | 1843 | p_pdc_base = PDC_USART; |
kadonotakashi | 0:8fdf9a60065b | 1844 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1845 | } |
kadonotakashi | 0:8fdf9a60065b | 1846 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1847 | #ifdef PDC_USART0 |
kadonotakashi | 0:8fdf9a60065b | 1848 | if (p_usart == USART0) { |
kadonotakashi | 0:8fdf9a60065b | 1849 | p_pdc_base = PDC_USART0; |
kadonotakashi | 0:8fdf9a60065b | 1850 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1851 | } |
kadonotakashi | 0:8fdf9a60065b | 1852 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1853 | #ifdef PDC_USART1 |
kadonotakashi | 0:8fdf9a60065b | 1854 | else if (p_usart == USART1) { |
kadonotakashi | 0:8fdf9a60065b | 1855 | p_pdc_base = PDC_USART1; |
kadonotakashi | 0:8fdf9a60065b | 1856 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1857 | } |
kadonotakashi | 0:8fdf9a60065b | 1858 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1859 | #ifdef PDC_USART2 |
kadonotakashi | 0:8fdf9a60065b | 1860 | else if (p_usart == USART2) { |
kadonotakashi | 0:8fdf9a60065b | 1861 | p_pdc_base = PDC_USART2; |
kadonotakashi | 0:8fdf9a60065b | 1862 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1863 | } |
kadonotakashi | 0:8fdf9a60065b | 1864 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1865 | #ifdef PDC_USART3 |
kadonotakashi | 0:8fdf9a60065b | 1866 | else if (p_usart == USART3) { |
kadonotakashi | 0:8fdf9a60065b | 1867 | p_pdc_base = PDC_USART3; |
kadonotakashi | 0:8fdf9a60065b | 1868 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1869 | } |
kadonotakashi | 0:8fdf9a60065b | 1870 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1871 | #ifdef PDC_USART4 |
kadonotakashi | 0:8fdf9a60065b | 1872 | else if (p_usart == USART4) { |
kadonotakashi | 0:8fdf9a60065b | 1873 | p_pdc_base = PDC_USART4; |
kadonotakashi | 0:8fdf9a60065b | 1874 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1875 | } |
kadonotakashi | 0:8fdf9a60065b | 1876 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1877 | #ifdef PDC_USART5 |
kadonotakashi | 0:8fdf9a60065b | 1878 | else if (p_usart == USART5) { |
kadonotakashi | 0:8fdf9a60065b | 1879 | p_pdc_base = PDC_USART5; |
kadonotakashi | 0:8fdf9a60065b | 1880 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1881 | } |
kadonotakashi | 0:8fdf9a60065b | 1882 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1883 | #ifdef PDC_USART6 |
kadonotakashi | 0:8fdf9a60065b | 1884 | else if (p_usart == USART6) { |
kadonotakashi | 0:8fdf9a60065b | 1885 | p_pdc_base = PDC_USART6; |
kadonotakashi | 0:8fdf9a60065b | 1886 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1887 | } |
kadonotakashi | 0:8fdf9a60065b | 1888 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1889 | #ifdef PDC_USART7 |
kadonotakashi | 0:8fdf9a60065b | 1890 | else if (p_usart == USART7) { |
kadonotakashi | 0:8fdf9a60065b | 1891 | p_pdc_base = PDC_USART7; |
kadonotakashi | 0:8fdf9a60065b | 1892 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1893 | } |
kadonotakashi | 0:8fdf9a60065b | 1894 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1895 | |
kadonotakashi | 0:8fdf9a60065b | 1896 | return p_pdc_base; |
kadonotakashi | 0:8fdf9a60065b | 1897 | } |
kadonotakashi | 0:8fdf9a60065b | 1898 | #endif |
kadonotakashi | 0:8fdf9a60065b | 1899 | |
kadonotakashi | 0:8fdf9a60065b | 1900 | /** |
kadonotakashi | 0:8fdf9a60065b | 1901 | * \brief Enable write protect of USART registers. |
kadonotakashi | 0:8fdf9a60065b | 1902 | * |
kadonotakashi | 0:8fdf9a60065b | 1903 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1904 | */ |
kadonotakashi | 0:8fdf9a60065b | 1905 | void usart_enable_writeprotect(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1906 | { |
kadonotakashi | 0:8fdf9a60065b | 1907 | p_usart->US_WPMR = US_WPMR_WPEN | US_WPMR_WPKEY_PASSWD; |
kadonotakashi | 0:8fdf9a60065b | 1908 | } |
kadonotakashi | 0:8fdf9a60065b | 1909 | |
kadonotakashi | 0:8fdf9a60065b | 1910 | /** |
kadonotakashi | 0:8fdf9a60065b | 1911 | * \brief Disable write protect of USART registers. |
kadonotakashi | 0:8fdf9a60065b | 1912 | * |
kadonotakashi | 0:8fdf9a60065b | 1913 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1914 | */ |
kadonotakashi | 0:8fdf9a60065b | 1915 | void usart_disable_writeprotect(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1916 | { |
kadonotakashi | 0:8fdf9a60065b | 1917 | p_usart->US_WPMR = US_WPMR_WPKEY_PASSWD; |
kadonotakashi | 0:8fdf9a60065b | 1918 | } |
kadonotakashi | 0:8fdf9a60065b | 1919 | |
kadonotakashi | 0:8fdf9a60065b | 1920 | /** |
kadonotakashi | 0:8fdf9a60065b | 1921 | * \brief Get write protect status. |
kadonotakashi | 0:8fdf9a60065b | 1922 | * |
kadonotakashi | 0:8fdf9a60065b | 1923 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1924 | * |
kadonotakashi | 0:8fdf9a60065b | 1925 | * \return 0 if no write protect violation occurred, or 16-bit write protect |
kadonotakashi | 0:8fdf9a60065b | 1926 | * violation source. |
kadonotakashi | 0:8fdf9a60065b | 1927 | */ |
kadonotakashi | 0:8fdf9a60065b | 1928 | uint32_t usart_get_writeprotect_status(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 1929 | { |
kadonotakashi | 0:8fdf9a60065b | 1930 | uint32_t reg_value; |
kadonotakashi | 0:8fdf9a60065b | 1931 | |
kadonotakashi | 0:8fdf9a60065b | 1932 | reg_value = p_usart->US_WPSR; |
kadonotakashi | 0:8fdf9a60065b | 1933 | if (reg_value & US_WPSR_WPVS) { |
kadonotakashi | 0:8fdf9a60065b | 1934 | return (reg_value & US_WPSR_WPVSRC_Msk) >> US_WPSR_WPVSRC_Pos; |
kadonotakashi | 0:8fdf9a60065b | 1935 | } else { |
kadonotakashi | 0:8fdf9a60065b | 1936 | return 0; |
kadonotakashi | 0:8fdf9a60065b | 1937 | } |
kadonotakashi | 0:8fdf9a60065b | 1938 | } |
kadonotakashi | 0:8fdf9a60065b | 1939 | |
kadonotakashi | 0:8fdf9a60065b | 1940 | #if (SAM3S || SAM4S || SAM3U || SAM3XA || SAM4L || SAM4E || SAM4C || SAM4CP || SAM4CM) |
kadonotakashi | 0:8fdf9a60065b | 1941 | |
kadonotakashi | 0:8fdf9a60065b | 1942 | /** |
kadonotakashi | 0:8fdf9a60065b | 1943 | * \brief Configure the transmitter preamble length when the Manchester |
kadonotakashi | 0:8fdf9a60065b | 1944 | * encode/decode is enabled. |
kadonotakashi | 0:8fdf9a60065b | 1945 | * |
kadonotakashi | 0:8fdf9a60065b | 1946 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1947 | * \param uc_len The transmitter preamble length, which should be 0 ~ 15. |
kadonotakashi | 0:8fdf9a60065b | 1948 | */ |
kadonotakashi | 0:8fdf9a60065b | 1949 | void usart_man_set_tx_pre_len(Usart *p_usart, uint8_t uc_len) |
kadonotakashi | 0:8fdf9a60065b | 1950 | { |
kadonotakashi | 0:8fdf9a60065b | 1951 | p_usart->US_MAN = (p_usart->US_MAN & ~US_MAN_TX_PL_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 1952 | US_MAN_TX_PL(uc_len); |
kadonotakashi | 0:8fdf9a60065b | 1953 | } |
kadonotakashi | 0:8fdf9a60065b | 1954 | |
kadonotakashi | 0:8fdf9a60065b | 1955 | /** |
kadonotakashi | 0:8fdf9a60065b | 1956 | * \brief Configure the transmitter preamble pattern when the Manchester |
kadonotakashi | 0:8fdf9a60065b | 1957 | * encode/decode is enabled, which should be 0 ~ 3. |
kadonotakashi | 0:8fdf9a60065b | 1958 | * |
kadonotakashi | 0:8fdf9a60065b | 1959 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1960 | * \param uc_pattern 0 if the preamble is composed of '1's; |
kadonotakashi | 0:8fdf9a60065b | 1961 | * 1 if the preamble is composed of '0's; |
kadonotakashi | 0:8fdf9a60065b | 1962 | * 2 if the preamble is composed of '01's; |
kadonotakashi | 0:8fdf9a60065b | 1963 | * 3 if the preamble is composed of '10's. |
kadonotakashi | 0:8fdf9a60065b | 1964 | */ |
kadonotakashi | 0:8fdf9a60065b | 1965 | void usart_man_set_tx_pre_pattern(Usart *p_usart, uint8_t uc_pattern) |
kadonotakashi | 0:8fdf9a60065b | 1966 | { |
kadonotakashi | 0:8fdf9a60065b | 1967 | p_usart->US_MAN = (p_usart->US_MAN & ~US_MAN_TX_PP_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 1968 | (uc_pattern << US_MAN_TX_PP_Pos); |
kadonotakashi | 0:8fdf9a60065b | 1969 | } |
kadonotakashi | 0:8fdf9a60065b | 1970 | |
kadonotakashi | 0:8fdf9a60065b | 1971 | /** |
kadonotakashi | 0:8fdf9a60065b | 1972 | * \brief Configure the transmitter Manchester polarity when the Manchester |
kadonotakashi | 0:8fdf9a60065b | 1973 | * encode/decode is enabled. |
kadonotakashi | 0:8fdf9a60065b | 1974 | * |
kadonotakashi | 0:8fdf9a60065b | 1975 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1976 | * \param uc_polarity Indicate the transmitter Manchester polarity, which |
kadonotakashi | 0:8fdf9a60065b | 1977 | * should be 0 or 1. |
kadonotakashi | 0:8fdf9a60065b | 1978 | */ |
kadonotakashi | 0:8fdf9a60065b | 1979 | void usart_man_set_tx_polarity(Usart *p_usart, uint8_t uc_polarity) |
kadonotakashi | 0:8fdf9a60065b | 1980 | { |
kadonotakashi | 0:8fdf9a60065b | 1981 | p_usart->US_MAN = (p_usart->US_MAN & ~US_MAN_TX_MPOL) | |
kadonotakashi | 0:8fdf9a60065b | 1982 | (uc_polarity << 12); |
kadonotakashi | 0:8fdf9a60065b | 1983 | } |
kadonotakashi | 0:8fdf9a60065b | 1984 | |
kadonotakashi | 0:8fdf9a60065b | 1985 | /** |
kadonotakashi | 0:8fdf9a60065b | 1986 | * \brief Configure the detected receiver preamble length when the Manchester |
kadonotakashi | 0:8fdf9a60065b | 1987 | * encode/decode is enabled. |
kadonotakashi | 0:8fdf9a60065b | 1988 | * |
kadonotakashi | 0:8fdf9a60065b | 1989 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 1990 | * \param uc_len The detected receiver preamble length, which should be 0 ~ 15. |
kadonotakashi | 0:8fdf9a60065b | 1991 | */ |
kadonotakashi | 0:8fdf9a60065b | 1992 | void usart_man_set_rx_pre_len(Usart *p_usart, uint8_t uc_len) |
kadonotakashi | 0:8fdf9a60065b | 1993 | { |
kadonotakashi | 0:8fdf9a60065b | 1994 | p_usart->US_MAN = (p_usart->US_MAN & ~US_MAN_RX_PL_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 1995 | US_MAN_RX_PL(uc_len); |
kadonotakashi | 0:8fdf9a60065b | 1996 | } |
kadonotakashi | 0:8fdf9a60065b | 1997 | |
kadonotakashi | 0:8fdf9a60065b | 1998 | /** |
kadonotakashi | 0:8fdf9a60065b | 1999 | * \brief Configure the detected receiver preamble pattern when the Manchester |
kadonotakashi | 0:8fdf9a60065b | 2000 | * encode/decode is enabled, which should be 0 ~ 3. |
kadonotakashi | 0:8fdf9a60065b | 2001 | * |
kadonotakashi | 0:8fdf9a60065b | 2002 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 2003 | * \param uc_pattern 0 if the preamble is composed of '1's; |
kadonotakashi | 0:8fdf9a60065b | 2004 | * 1 if the preamble is composed of '0's; |
kadonotakashi | 0:8fdf9a60065b | 2005 | * 2 if the preamble is composed of '01's; |
kadonotakashi | 0:8fdf9a60065b | 2006 | * 3 if the preamble is composed of '10's. |
kadonotakashi | 0:8fdf9a60065b | 2007 | */ |
kadonotakashi | 0:8fdf9a60065b | 2008 | void usart_man_set_rx_pre_pattern(Usart *p_usart, uint8_t uc_pattern) |
kadonotakashi | 0:8fdf9a60065b | 2009 | { |
kadonotakashi | 0:8fdf9a60065b | 2010 | p_usart->US_MAN = (p_usart->US_MAN & ~US_MAN_RX_PP_Msk) | |
kadonotakashi | 0:8fdf9a60065b | 2011 | (uc_pattern << US_MAN_RX_PP_Pos); |
kadonotakashi | 0:8fdf9a60065b | 2012 | } |
kadonotakashi | 0:8fdf9a60065b | 2013 | |
kadonotakashi | 0:8fdf9a60065b | 2014 | /** |
kadonotakashi | 0:8fdf9a60065b | 2015 | * \brief Configure the receiver Manchester polarity when the Manchester |
kadonotakashi | 0:8fdf9a60065b | 2016 | * encode/decode is enabled. |
kadonotakashi | 0:8fdf9a60065b | 2017 | * |
kadonotakashi | 0:8fdf9a60065b | 2018 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 2019 | * \param uc_polarity Indicate the receiver Manchester polarity, which should |
kadonotakashi | 0:8fdf9a60065b | 2020 | * be 0 or 1. |
kadonotakashi | 0:8fdf9a60065b | 2021 | */ |
kadonotakashi | 0:8fdf9a60065b | 2022 | void usart_man_set_rx_polarity(Usart *p_usart, uint8_t uc_polarity) |
kadonotakashi | 0:8fdf9a60065b | 2023 | { |
kadonotakashi | 0:8fdf9a60065b | 2024 | p_usart->US_MAN = (p_usart->US_MAN & ~US_MAN_RX_MPOL) | |
kadonotakashi | 0:8fdf9a60065b | 2025 | (uc_polarity << 28); |
kadonotakashi | 0:8fdf9a60065b | 2026 | } |
kadonotakashi | 0:8fdf9a60065b | 2027 | |
kadonotakashi | 0:8fdf9a60065b | 2028 | /** |
kadonotakashi | 0:8fdf9a60065b | 2029 | * \brief Enable drift compensation. |
kadonotakashi | 0:8fdf9a60065b | 2030 | * |
kadonotakashi | 0:8fdf9a60065b | 2031 | * \note The 16X clock mode must be enabled. |
kadonotakashi | 0:8fdf9a60065b | 2032 | * |
kadonotakashi | 0:8fdf9a60065b | 2033 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 2034 | */ |
kadonotakashi | 0:8fdf9a60065b | 2035 | void usart_man_enable_drift_compensation(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 2036 | { |
kadonotakashi | 0:8fdf9a60065b | 2037 | p_usart->US_MAN |= US_MAN_DRIFT; |
kadonotakashi | 0:8fdf9a60065b | 2038 | } |
kadonotakashi | 0:8fdf9a60065b | 2039 | |
kadonotakashi | 0:8fdf9a60065b | 2040 | /** |
kadonotakashi | 0:8fdf9a60065b | 2041 | * \brief Disable drift compensation. |
kadonotakashi | 0:8fdf9a60065b | 2042 | * |
kadonotakashi | 0:8fdf9a60065b | 2043 | * \param p_usart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 2044 | */ |
kadonotakashi | 0:8fdf9a60065b | 2045 | void usart_man_disable_drift_compensation(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 2046 | { |
kadonotakashi | 0:8fdf9a60065b | 2047 | p_usart->US_MAN &= ~US_MAN_DRIFT; |
kadonotakashi | 0:8fdf9a60065b | 2048 | } |
kadonotakashi | 0:8fdf9a60065b | 2049 | |
kadonotakashi | 0:8fdf9a60065b | 2050 | #endif |
kadonotakashi | 0:8fdf9a60065b | 2051 | |
kadonotakashi | 0:8fdf9a60065b | 2052 | #if SAM4L |
kadonotakashi | 0:8fdf9a60065b | 2053 | |
kadonotakashi | 0:8fdf9a60065b | 2054 | uint32_t usart_get_version(Usart *p_usart) |
kadonotakashi | 0:8fdf9a60065b | 2055 | { |
kadonotakashi | 0:8fdf9a60065b | 2056 | return p_usart->US_VERSION; |
kadonotakashi | 0:8fdf9a60065b | 2057 | } |
kadonotakashi | 0:8fdf9a60065b | 2058 | |
kadonotakashi | 0:8fdf9a60065b | 2059 | #endif |
kadonotakashi | 0:8fdf9a60065b | 2060 | |
kadonotakashi | 0:8fdf9a60065b | 2061 | #if SAMG55 |
kadonotakashi | 0:8fdf9a60065b | 2062 | /** |
kadonotakashi | 0:8fdf9a60065b | 2063 | * \brief Set sleepwalking match mode. |
kadonotakashi | 0:8fdf9a60065b | 2064 | * |
kadonotakashi | 0:8fdf9a60065b | 2065 | * \param p_uart Pointer to a USART instance. |
kadonotakashi | 0:8fdf9a60065b | 2066 | * \param ul_low_value First comparison value for received character. |
kadonotakashi | 0:8fdf9a60065b | 2067 | * \param ul_high_value Second comparison value for received character. |
kadonotakashi | 0:8fdf9a60065b | 2068 | * \param cmpmode ture for start condition, false for flag only. |
kadonotakashi | 0:8fdf9a60065b | 2069 | * \param cmppar ture for parity check, false for no. |
kadonotakashi | 0:8fdf9a60065b | 2070 | */ |
kadonotakashi | 0:8fdf9a60065b | 2071 | void usart_set_sleepwalking(Usart *p_uart, uint8_t ul_low_value, |
kadonotakashi | 0:8fdf9a60065b | 2072 | bool cmpmode, bool cmppar, uint8_t ul_high_value) |
kadonotakashi | 0:8fdf9a60065b | 2073 | { |
kadonotakashi | 0:8fdf9a60065b | 2074 | Assert(ul_low_value <= ul_high_value); |
kadonotakashi | 0:8fdf9a60065b | 2075 | |
kadonotakashi | 0:8fdf9a60065b | 2076 | uint32_t temp = 0; |
kadonotakashi | 0:8fdf9a60065b | 2077 | |
kadonotakashi | 0:8fdf9a60065b | 2078 | if (cmpmode) { |
kadonotakashi | 0:8fdf9a60065b | 2079 | temp |= US_CMPR_CMPMODE_START_CONDITION; |
kadonotakashi | 0:8fdf9a60065b | 2080 | } |
kadonotakashi | 0:8fdf9a60065b | 2081 | |
kadonotakashi | 0:8fdf9a60065b | 2082 | if (cmppar) { |
kadonotakashi | 0:8fdf9a60065b | 2083 | temp |= US_CMPR_CMPPAR; |
kadonotakashi | 0:8fdf9a60065b | 2084 | } |
kadonotakashi | 0:8fdf9a60065b | 2085 | |
kadonotakashi | 0:8fdf9a60065b | 2086 | temp |= US_CMPR_VAL1(ul_low_value); |
kadonotakashi | 0:8fdf9a60065b | 2087 | |
kadonotakashi | 0:8fdf9a60065b | 2088 | temp |= US_CMPR_VAL2(ul_high_value); |
kadonotakashi | 0:8fdf9a60065b | 2089 | |
kadonotakashi | 0:8fdf9a60065b | 2090 | p_uart->US_CMPR= temp; |
kadonotakashi | 0:8fdf9a60065b | 2091 | } |
kadonotakashi | 0:8fdf9a60065b | 2092 | #endif |
kadonotakashi | 0:8fdf9a60065b | 2093 | |
kadonotakashi | 0:8fdf9a60065b | 2094 | //@} |
kadonotakashi | 0:8fdf9a60065b | 2095 | |
kadonotakashi | 0:8fdf9a60065b | 2096 | /// @cond 0 |
kadonotakashi | 0:8fdf9a60065b | 2097 | /**INDENT-OFF**/ |
kadonotakashi | 0:8fdf9a60065b | 2098 | #ifdef __cplusplus |
kadonotakashi | 0:8fdf9a60065b | 2099 | } |
kadonotakashi | 0:8fdf9a60065b | 2100 | #endif |
kadonotakashi | 0:8fdf9a60065b | 2101 | /**INDENT-ON**/ |
kadonotakashi | 0:8fdf9a60065b | 2102 | /// @endcond |