Kazuki Yamamoto / Mbed 2 deprecated uart_i2c_conv

UART to I2C master(s) converter, targetting to emulate SC18IM700(NXP) chip

Dependencies:   mbed

UART to I2C master(s) converter, targetting to emulate SC18IM700(NXP) chip

Features

up to 4x I2C master

  • for LPC824 implement, we can use up to 4 channels of I2C masters
    • 1x Fm+ and 3x Fm I2C channels
  • for LPC1768 implement, we can use up to 2 channels of I2C masters
    • 2x Fm I2C channels
  • for LPC11U35 implement, only one channel for I2C master, but program uses USB CDC class for UART communication (means no external USB-Serial converter chip)
    • 1x Fm+ I2C channels

1x SPI master

up to 2x 8bit GPIO

Tested Platforms

LPC824

LPC1768

LPC11U35

Quote:

LPC11U35 implement requires importing USBDevice library to use USBSerial class

visit https://github.com/K4zuki/tinyI2C for more information

main.cpp@36:ffbd9829c8d1, 2016-08-30 (annotated)

Committer:
k4zuki
Date:
Tue Aug 30 16:30:55 2016 +0000
Revision:
36:ffbd9829c8d1
Parent:
3:519893d7f038
Child:
78:434514b8d383
add headers and settings.h to switch 11U3x/824/1768; 11U3x requires to add USBSerial library in project

Who changed what in which revision?

UserRevisionLine numberNew contents of line
k4zuki 36:ffbd9829c8d1 1 /** uart_i2c_conv for LPC824
k4zuki 36:ffbd9829c8d1 2 */
k4zuki 36:ffbd9829c8d1 3
k4zuki 36:ffbd9829c8d1 4 #include "mbed.h"
k4zuki 36:ffbd9829c8d1 5 #include "settings.h"
k4zuki 36:ffbd9829c8d1 6 //Table 3. ASCII commands supported by SC18IM700
k4zuki 36:ffbd9829c8d1 7 //ASCII command Hex value Command function
k4zuki 36:ffbd9829c8d1 8 //[X] S 0x53 I2C-bus START
k4zuki 36:ffbd9829c8d1 9 //[X] P 0x50 I2C/SPI-bus STOP
k4zuki 36:ffbd9829c8d1 10 //[X] R 0x52 read SC18IM700 internal register
k4zuki 36:ffbd9829c8d1 11 //[X] W 0x57 write to SC18IM700 internal register
k4zuki 36:ffbd9829c8d1 12 //[?] I 0x49 read GPIO port
k4zuki 36:ffbd9829c8d1 13 //[?] O 0x4F write to GPIO port
k4zuki 36:ffbd9829c8d1 14 //[_] Z 0x5A power down
k4zuki 36:ffbd9829c8d1 15 //[X] C 0x43 change channel
k4zuki 36:ffbd9829c8d1 16 //[_] E 0x45 SPI transfer start
k4zuki 36:ffbd9829c8d1 17 //[_] V 0x__ enable VDDIO output to chip
k4zuki 36:ffbd9829c8d1 18
k4zuki 36:ffbd9829c8d1 19 /**
k4zuki 36:ffbd9829c8d1 20 "C| '0'| P"
k4zuki 36:ffbd9829c8d1 21 "C| '1'| P"
k4zuki 36:ffbd9829c8d1 22 "C| '2'| P"
k4zuki 36:ffbd9829c8d1 23 "C| '3'| P"
k4zuki 36:ffbd9829c8d1 24 "S| 0x_8 _0| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P"
k4zuki 36:ffbd9829c8d1 25 "S| 0x_8 _0| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| S| 0x_8 _1| 0x_0 _4| P"
k4zuki 36:ffbd9829c8d1 26 "S| 0x_8 _1| 0x_0 _4| P"
k4zuki 36:ffbd9829c8d1 27 "R| '0'| P"
k4zuki 36:ffbd9829c8d1 28 "R| '0'| '1'| ...| P"
k4zuki 36:ffbd9829c8d1 29 "W| '0' 0x_a _a| P"
k4zuki 36:ffbd9829c8d1 30 "W| '0' 0x_a _a| '1' 0x_b _b| ...| P"
k4zuki 36:ffbd9829c8d1 31 "I| '0'| P"
k4zuki 36:ffbd9829c8d1 32 "O| '0'| 0x_a _a| P"
k4zuki 36:ffbd9829c8d1 33 "E| 0x_0 _4| 0x_0 _0| 0x_D _E _A _D _B _E _A _F| P" //write
k4zuki 36:ffbd9829c8d1 34 "E| 0x_0 _4| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P" //write and read
k4zuki 36:ffbd9829c8d1 35 */
k4zuki 36:ffbd9829c8d1 36 int main()
k4zuki 36:ffbd9829c8d1 37 {
k4zuki 36:ffbd9829c8d1 38 I2C* dev = &dev1;
k4zuki 36:ffbd9829c8d1 39
k4zuki 36:ffbd9829c8d1 40 #ifdef isUART
k4zuki 36:ffbd9829c8d1 41 pc.baud(115200);
k4zuki 36:ffbd9829c8d1 42 #endif
k4zuki 36:ffbd9829c8d1 43 _spi.frequency(8000000);
k4zuki 36:ffbd9829c8d1 44
k4zuki 36:ffbd9829c8d1 45 bool s = false;
k4zuki 36:ffbd9829c8d1 46 dev1.frequency(400000);//800k; works around 940kHz with 200ohm pullups/ not work at 1M?
k4zuki 36:ffbd9829c8d1 47 #if defined(TARGET_SSCI824) || defined(TARGET_LP824MAX)
k4zuki 36:ffbd9829c8d1 48 dev1.frequency(800000);//800k; works around 940kHz with 200ohm pullups/ not work at 1M?
k4zuki 36:ffbd9829c8d1 49 LPC_IOCON->PIO0_11 &= ~(0x03<<8);
k4zuki 36:ffbd9829c8d1 50 LPC_IOCON->PIO0_11 |= (0x02<<8);
k4zuki 36:ffbd9829c8d1 51 LPC_IOCON->PIO0_10 &= ~(0x03<<8);
k4zuki 36:ffbd9829c8d1 52 LPC_IOCON->PIO0_10 |= (0x02<<8);
k4zuki 36:ffbd9829c8d1 53 #elif defined(TARGET_MCU_LPC11U35_501) || defined(TARGET_LPC11U35_401)
k4zuki 36:ffbd9829c8d1 54 dev1.frequency(800000);//800k; works around 940kHz with 200ohm pullups/ not work at 1M?
k4zuki 36:ffbd9829c8d1 55 LPC_IOCON->PIO0_4 &= ~(0x03<<8);
k4zuki 36:ffbd9829c8d1 56 LPC_IOCON->PIO0_4 |= (0x02<<8);
k4zuki 36:ffbd9829c8d1 57 LPC_IOCON->PIO0_5 &= ~(0x03<<8);
k4zuki 36:ffbd9829c8d1 58 LPC_IOCON->PIO0_5 |= (0x02<<8);
k4zuki 36:ffbd9829c8d1 59 #endif
k4zuki 36:ffbd9829c8d1 60
k4zuki 36:ffbd9829c8d1 61 #ifdef isI2C2
k4zuki 36:ffbd9829c8d1 62 dev2.frequency(400000);//400k
k4zuki 36:ffbd9829c8d1 63 #endif
k4zuki 36:ffbd9829c8d1 64 #ifdef isI2C3
k4zuki 36:ffbd9829c8d1 65 dev3.frequency(400000);//400k
k4zuki 36:ffbd9829c8d1 66 #endif
k4zuki 36:ffbd9829c8d1 67 #ifdef isI2C4
k4zuki 36:ffbd9829c8d1 68 dev4.frequency(400000);//400k
k4zuki 36:ffbd9829c8d1 69 #endif
k4zuki 36:ffbd9829c8d1 70 #ifdef isGPIO1
k4zuki 36:ffbd9829c8d1 71 DigitalInOut* gpio1[] = {
k4zuki 36:ffbd9829c8d1 72 &_GPIO10,
k4zuki 36:ffbd9829c8d1 73 &_GPIO11,
k4zuki 36:ffbd9829c8d1 74 &_GPIO12,
k4zuki 36:ffbd9829c8d1 75 &_GPIO13,
k4zuki 36:ffbd9829c8d1 76 &_GPIO14,
k4zuki 36:ffbd9829c8d1 77 &_GPIO15,
k4zuki 36:ffbd9829c8d1 78 &_GPIO16,
k4zuki 36:ffbd9829c8d1 79 &_GPIO17,
k4zuki 36:ffbd9829c8d1 80 };
k4zuki 36:ffbd9829c8d1 81 for(int k = 0; k < 8; k++){
k4zuki 36:ffbd9829c8d1 82 gpio1[k]->input();
k4zuki 36:ffbd9829c8d1 83 gpio1[k]->mode( PullUp );
k4zuki 36:ffbd9829c8d1 84 }
k4zuki 36:ffbd9829c8d1 85 #endif
k4zuki 36:ffbd9829c8d1 86
k4zuki 36:ffbd9829c8d1 87 DigitalInOut* gpio0[] = {
k4zuki 36:ffbd9829c8d1 88 &_GPIO00,
k4zuki 36:ffbd9829c8d1 89 &_GPIO01,
k4zuki 36:ffbd9829c8d1 90 &_GPIO02,
k4zuki 36:ffbd9829c8d1 91 &_GPIO03,
k4zuki 36:ffbd9829c8d1 92 &_GPIO04,
k4zuki 36:ffbd9829c8d1 93 &_GPIO05,
k4zuki 36:ffbd9829c8d1 94 &_GPIO06,
k4zuki 36:ffbd9829c8d1 95 &_GPIO07,
k4zuki 36:ffbd9829c8d1 96 };
k4zuki 36:ffbd9829c8d1 97 for(int k = 0; k < 8; k++){
k4zuki 36:ffbd9829c8d1 98 gpio0[k]->input();
k4zuki 36:ffbd9829c8d1 99 gpio0[k]->mode( PullUp );
k4zuki 36:ffbd9829c8d1 100 }
k4zuki 36:ffbd9829c8d1 101
k4zuki 36:ffbd9829c8d1 102 int ack = 0;
k4zuki 36:ffbd9829c8d1 103 int plength = 0;
k4zuki 36:ffbd9829c8d1 104 int recieve[256];
k4zuki 36:ffbd9829c8d1 105 char send[256];
k4zuki 36:ffbd9829c8d1 106 for(int k = 0; k < 256; k+=4){
k4zuki 36:ffbd9829c8d1 107 // cafe moca
k4zuki 36:ffbd9829c8d1 108 recieve[k+0] = send[k+0] = 0xC4;
k4zuki 36:ffbd9829c8d1 109 recieve[k+1] = send[k+1] = 0xFE;
k4zuki 36:ffbd9829c8d1 110 recieve[k+2] = send[k+2] = 0xE0;
k4zuki 36:ffbd9829c8d1 111 recieve[k+3] = send[k+3] = 0xCA;
k4zuki 36:ffbd9829c8d1 112 }
k4zuki 36:ffbd9829c8d1 113
k4zuki 36:ffbd9829c8d1 114 int read = 0;
k4zuki 36:ffbd9829c8d1 115 int address = 0;
k4zuki 36:ffbd9829c8d1 116 int data = 0;
k4zuki 36:ffbd9829c8d1 117 int _data = 0;
k4zuki 36:ffbd9829c8d1 118 int length = 0;
k4zuki 36:ffbd9829c8d1 119 int channel = 0;
k4zuki 36:ffbd9829c8d1 120 int format = 8;
k4zuki 36:ffbd9829c8d1 121 int enabled = 0;
k4zuki 36:ffbd9829c8d1 122 int disabled = 0;
k4zuki 36:ffbd9829c8d1 123 enum command_e {
k4zuki 36:ffbd9829c8d1 124 CMD_S='S',
k4zuki 36:ffbd9829c8d1 125 CMD_P='P',
k4zuki 36:ffbd9829c8d1 126 CMD_C='C',
k4zuki 36:ffbd9829c8d1 127 CMD_R='R',
k4zuki 36:ffbd9829c8d1 128 CMD_W='W',
k4zuki 36:ffbd9829c8d1 129 CMD_I='I',
k4zuki 36:ffbd9829c8d1 130 CMD_O='O',
k4zuki 36:ffbd9829c8d1 131 CMD_E='E',
k4zuki 36:ffbd9829c8d1 132 };
k4zuki 36:ffbd9829c8d1 133 enum channel_e {
k4zuki 36:ffbd9829c8d1 134 CH0 = '0',
k4zuki 36:ffbd9829c8d1 135 CH1 = '1',
k4zuki 36:ffbd9829c8d1 136 CH2 = '2',
k4zuki 36:ffbd9829c8d1 137 CH3 = '3',
k4zuki 36:ffbd9829c8d1 138 };
k4zuki 36:ffbd9829c8d1 139 enum register_e {
k4zuki 36:ffbd9829c8d1 140 CHIP_ID = '0',
k4zuki 36:ffbd9829c8d1 141 GPIO0_STAT = '1',
k4zuki 36:ffbd9829c8d1 142 GPIO1_STAT = '2',
k4zuki 36:ffbd9829c8d1 143 GPIO0_CONF = '3',
k4zuki 36:ffbd9829c8d1 144 GPIO1_CONF = '4',
k4zuki 36:ffbd9829c8d1 145 I2C_CONF = '5',
k4zuki 36:ffbd9829c8d1 146 SPI_CONF = '6',
k4zuki 36:ffbd9829c8d1 147 REG7,
k4zuki 36:ffbd9829c8d1 148 REG8,
k4zuki 36:ffbd9829c8d1 149 REG9,
k4zuki 36:ffbd9829c8d1 150 };
k4zuki 36:ffbd9829c8d1 151 // enum chipID_e {
k4zuki 36:ffbd9829c8d1 152 // ID_LPC824 = '0',
k4zuki 36:ffbd9829c8d1 153 // ID_LPC1768 = '1',
k4zuki 36:ffbd9829c8d1 154 // ID_LPC11UXX = '2',
k4zuki 36:ffbd9829c8d1 155 // };
k4zuki 36:ffbd9829c8d1 156 // static const uint8_t chip_id=ID_LPC824;
k4zuki 36:ffbd9829c8d1 157 static uint8_t registers[]={
k4zuki 36:ffbd9829c8d1 158 chip_id,
k4zuki 36:ffbd9829c8d1 159 0x00,
k4zuki 36:ffbd9829c8d1 160 0x00,
k4zuki 36:ffbd9829c8d1 161 0x00,
k4zuki 36:ffbd9829c8d1 162 0x00,
k4zuki 36:ffbd9829c8d1 163 0xFF,
k4zuki 36:ffbd9829c8d1 164 0x70,
k4zuki 36:ffbd9829c8d1 165 REG7,
k4zuki 36:ffbd9829c8d1 166 REG8,
k4zuki 36:ffbd9829c8d1 167 REG9,
k4zuki 36:ffbd9829c8d1 168 };
k4zuki 36:ffbd9829c8d1 169
k4zuki 36:ffbd9829c8d1 170 int i=0;
k4zuki 36:ffbd9829c8d1 171 while(1) {
k4zuki 36:ffbd9829c8d1 172 i=0;
k4zuki 36:ffbd9829c8d1 173 length=0;
k4zuki 36:ffbd9829c8d1 174 while(true) {
k4zuki 36:ffbd9829c8d1 175 read = pc.getc();
k4zuki 36:ffbd9829c8d1 176 recieve[i] = read;
k4zuki 36:ffbd9829c8d1 177 i++;
k4zuki 36:ffbd9829c8d1 178 if(read == 'P') {
k4zuki 36:ffbd9829c8d1 179 plength = i;
k4zuki 36:ffbd9829c8d1 180 break;
k4zuki 36:ffbd9829c8d1 181 }
k4zuki 36:ffbd9829c8d1 182 }
k4zuki 36:ffbd9829c8d1 183 i=0;
k4zuki 36:ffbd9829c8d1 184 while(i < plength) {
k4zuki 36:ffbd9829c8d1 185 switch(recieve[i]) {
k4zuki 36:ffbd9829c8d1 186 case CMD_C:
k4zuki 36:ffbd9829c8d1 187 {
k4zuki 36:ffbd9829c8d1 188 s = false;
k4zuki 36:ffbd9829c8d1 189 channel=recieve[i+1];
k4zuki 36:ffbd9829c8d1 190 switch(channel) {
k4zuki 36:ffbd9829c8d1 191 case CH0:
k4zuki 36:ffbd9829c8d1 192 {
k4zuki 36:ffbd9829c8d1 193 channel = CH0;
k4zuki 36:ffbd9829c8d1 194 dev = &dev1;
k4zuki 36:ffbd9829c8d1 195 break;
k4zuki 36:ffbd9829c8d1 196 }
k4zuki 36:ffbd9829c8d1 197 #ifdef isI2C2
k4zuki 36:ffbd9829c8d1 198 case CH1:
k4zuki 36:ffbd9829c8d1 199 {
k4zuki 36:ffbd9829c8d1 200 channel = CH1;
k4zuki 36:ffbd9829c8d1 201 dev = &dev2;
k4zuki 36:ffbd9829c8d1 202 break;
k4zuki 36:ffbd9829c8d1 203 }
k4zuki 36:ffbd9829c8d1 204 #endif
k4zuki 36:ffbd9829c8d1 205 #ifdef isI2C3
k4zuki 36:ffbd9829c8d1 206 case CH2:
k4zuki 36:ffbd9829c8d1 207 {
k4zuki 36:ffbd9829c8d1 208 channel = CH2;
k4zuki 36:ffbd9829c8d1 209 dev = &dev3;
k4zuki 36:ffbd9829c8d1 210 break;
k4zuki 36:ffbd9829c8d1 211 }
k4zuki 36:ffbd9829c8d1 212 #endif
k4zuki 36:ffbd9829c8d1 213 #ifdef isI2C4
k4zuki 36:ffbd9829c8d1 214 case CH3:
k4zuki 36:ffbd9829c8d1 215 {
k4zuki 36:ffbd9829c8d1 216 channel = CH3;
k4zuki 36:ffbd9829c8d1 217 dev = &dev4;
k4zuki 36:ffbd9829c8d1 218 break;
k4zuki 36:ffbd9829c8d1 219 }
k4zuki 36:ffbd9829c8d1 220 #endif
k4zuki 36:ffbd9829c8d1 221 default:
k4zuki 36:ffbd9829c8d1 222 {
k4zuki 36:ffbd9829c8d1 223 channel = CH0;
k4zuki 36:ffbd9829c8d1 224 dev = &dev1;
k4zuki 36:ffbd9829c8d1 225 break;
k4zuki 36:ffbd9829c8d1 226 }
k4zuki 36:ffbd9829c8d1 227 }
k4zuki 36:ffbd9829c8d1 228 i += 2;
k4zuki 36:ffbd9829c8d1 229 break;
k4zuki 36:ffbd9829c8d1 230 }
k4zuki 36:ffbd9829c8d1 231 case CMD_S:
k4zuki 36:ffbd9829c8d1 232 {
k4zuki 36:ffbd9829c8d1 233 s = true;
k4zuki 36:ffbd9829c8d1 234 ack = plength - 2 - (i+1) + (recieve[i+2] & 0x01);
k4zuki 36:ffbd9829c8d1 235 if(ack >= 4){ //valid packet
k4zuki 36:ffbd9829c8d1 236 address = 0xff & (recieve[i+1] << 4 | (recieve[i+2] & 0x0F));
k4zuki 36:ffbd9829c8d1 237 length = 0xff & (recieve[i+3] << 4 | (recieve[i+4] & 0x0F));
k4zuki 36:ffbd9829c8d1 238
k4zuki 36:ffbd9829c8d1 239 if(address & 0x01) { //read
k4zuki 36:ffbd9829c8d1 240 ack = dev->read(address, send, length, false); //added
k4zuki 36:ffbd9829c8d1 241 send[length] = ack;
k4zuki 36:ffbd9829c8d1 242 length += 1;
k4zuki 36:ffbd9829c8d1 243 i += 5;
k4zuki 36:ffbd9829c8d1 244 } else { // write
k4zuki 36:ffbd9829c8d1 245 for(int j = 0; j < (length * 2); j+=2) {
k4zuki 36:ffbd9829c8d1 246 ack = 0xff&((recieve[5+j] << 4) | (recieve[6+j] & 0x0F));
k4zuki 36:ffbd9829c8d1 247 *(send+(j/2)) = ack; //added
k4zuki 36:ffbd9829c8d1 248 }
k4zuki 36:ffbd9829c8d1 249 ack = dev->write(address, send, length, true); //added
k4zuki 36:ffbd9829c8d1 250 i += (5 + length * 2);
k4zuki 36:ffbd9829c8d1 251 send[0] = ack;
k4zuki 36:ffbd9829c8d1 252 length = 1;
k4zuki 36:ffbd9829c8d1 253 }
k4zuki 36:ffbd9829c8d1 254 }else{
k4zuki 36:ffbd9829c8d1 255 pc.printf("bad packet! %d, %d, %02X, %d\n\r",plength,i,recieve[(i+2)]&0x0F,ack);
k4zuki 36:ffbd9829c8d1 256 s = false;
k4zuki 36:ffbd9829c8d1 257 i = plength;
k4zuki 36:ffbd9829c8d1 258 }
k4zuki 36:ffbd9829c8d1 259 break;
k4zuki 36:ffbd9829c8d1 260 }
k4zuki 36:ffbd9829c8d1 261 case CMD_P:
k4zuki 36:ffbd9829c8d1 262 {
k4zuki 36:ffbd9829c8d1 263 if(s){
k4zuki 36:ffbd9829c8d1 264 dev->stop();
k4zuki 36:ffbd9829c8d1 265 s = false;
k4zuki 36:ffbd9829c8d1 266 if(send[length-1] == 0){
k4zuki 36:ffbd9829c8d1 267 pc.printf("ACK,");
k4zuki 36:ffbd9829c8d1 268 }else{
k4zuki 36:ffbd9829c8d1 269 pc.printf("NAK,");
k4zuki 36:ffbd9829c8d1 270 }
k4zuki 36:ffbd9829c8d1 271 length--;
k4zuki 36:ffbd9829c8d1 272 }
k4zuki 36:ffbd9829c8d1 273 i = plength;
k4zuki 36:ffbd9829c8d1 274 for(int j=0; j<length; j++) {
k4zuki 36:ffbd9829c8d1 275 pc.printf("%02X,",send[j]);
k4zuki 36:ffbd9829c8d1 276 }
k4zuki 36:ffbd9829c8d1 277 pc.printf("ok\n\r");
k4zuki 36:ffbd9829c8d1 278 break;
k4zuki 36:ffbd9829c8d1 279 }
k4zuki 36:ffbd9829c8d1 280 case CMD_R:
k4zuki 36:ffbd9829c8d1 281 {
k4zuki 36:ffbd9829c8d1 282 s = false;
k4zuki 36:ffbd9829c8d1 283 length = plength - 2;
k4zuki 36:ffbd9829c8d1 284 if(length < 1){
k4zuki 36:ffbd9829c8d1 285 pc.printf("bad packet! %d\n\r",length);
k4zuki 36:ffbd9829c8d1 286 i = plength + 1;
k4zuki 36:ffbd9829c8d1 287 length = 0;
k4zuki 36:ffbd9829c8d1 288 }else{
k4zuki 36:ffbd9829c8d1 289 for(int j = 0; j < length; j++){
k4zuki 36:ffbd9829c8d1 290 address = recieve[i+1+j];
k4zuki 36:ffbd9829c8d1 291 switch(address){
k4zuki 36:ffbd9829c8d1 292 case CHIP_ID:
k4zuki 36:ffbd9829c8d1 293 {
k4zuki 36:ffbd9829c8d1 294 data = chip_id;
k4zuki 36:ffbd9829c8d1 295 break;
k4zuki 36:ffbd9829c8d1 296 }
k4zuki 36:ffbd9829c8d1 297 case GPIO0_STAT:
k4zuki 36:ffbd9829c8d1 298 {
k4zuki 36:ffbd9829c8d1 299 for(int k = 0; k < 8; k++){
k4zuki 36:ffbd9829c8d1 300 _data = gpio0[k]->read();
k4zuki 36:ffbd9829c8d1 301 data |= (_data << k);
k4zuki 36:ffbd9829c8d1 302 }
k4zuki 36:ffbd9829c8d1 303 registers[GPIO0_STAT-'0'] = data;
k4zuki 36:ffbd9829c8d1 304 break;
k4zuki 36:ffbd9829c8d1 305 }
k4zuki 36:ffbd9829c8d1 306 case GPIO0_CONF:
k4zuki 36:ffbd9829c8d1 307 {
k4zuki 36:ffbd9829c8d1 308 data = registers[GPIO0_CONF-'0'];
k4zuki 36:ffbd9829c8d1 309 break;
k4zuki 36:ffbd9829c8d1 310 }
k4zuki 36:ffbd9829c8d1 311 #ifdef isGPIO1
k4zuki 36:ffbd9829c8d1 312 case GPIO1_STAT:
k4zuki 36:ffbd9829c8d1 313 {
k4zuki 36:ffbd9829c8d1 314 for(int k = 0; k < 8; k++){
k4zuki 36:ffbd9829c8d1 315 _data = gpio1[k]->read();
k4zuki 36:ffbd9829c8d1 316 data |= (_data << k);
k4zuki 36:ffbd9829c8d1 317 }
k4zuki 36:ffbd9829c8d1 318 registers[GPIO1_STAT-'0'] = data;
k4zuki 36:ffbd9829c8d1 319 break;
k4zuki 36:ffbd9829c8d1 320 }
k4zuki 36:ffbd9829c8d1 321 case GPIO1_CONF:
k4zuki 36:ffbd9829c8d1 322 {
k4zuki 36:ffbd9829c8d1 323 data = registers[GPIO1_CONF-'0'];
k4zuki 36:ffbd9829c8d1 324 break;
k4zuki 36:ffbd9829c8d1 325 }
k4zuki 36:ffbd9829c8d1 326 #endif
k4zuki 36:ffbd9829c8d1 327 case I2C_CONF:
k4zuki 36:ffbd9829c8d1 328 {
k4zuki 36:ffbd9829c8d1 329 data = registers[I2C_CONF-'0'];
k4zuki 36:ffbd9829c8d1 330 break;
k4zuki 36:ffbd9829c8d1 331 }
k4zuki 36:ffbd9829c8d1 332 case SPI_CONF:
k4zuki 36:ffbd9829c8d1 333 {
k4zuki 36:ffbd9829c8d1 334 data = registers[SPI_CONF-'0'];
k4zuki 36:ffbd9829c8d1 335 break;
k4zuki 36:ffbd9829c8d1 336 }
k4zuki 36:ffbd9829c8d1 337 default:
k4zuki 36:ffbd9829c8d1 338 {
k4zuki 36:ffbd9829c8d1 339 data = 0xAA;
k4zuki 36:ffbd9829c8d1 340 break;
k4zuki 36:ffbd9829c8d1 341 }
k4zuki 36:ffbd9829c8d1 342 }
k4zuki 36:ffbd9829c8d1 343 send[j] = (char)data;
k4zuki 36:ffbd9829c8d1 344 data = 0;
k4zuki 36:ffbd9829c8d1 345 }
k4zuki 36:ffbd9829c8d1 346 i += (length+1);
k4zuki 36:ffbd9829c8d1 347 }
k4zuki 36:ffbd9829c8d1 348 break;
k4zuki 36:ffbd9829c8d1 349 }
k4zuki 36:ffbd9829c8d1 350 case CMD_W:
k4zuki 36:ffbd9829c8d1 351 {
k4zuki 36:ffbd9829c8d1 352 s = false;
k4zuki 36:ffbd9829c8d1 353 length = plength - 2;
k4zuki 36:ffbd9829c8d1 354 if(length < 3){
k4zuki 36:ffbd9829c8d1 355 pc.printf("bad packet! %d\n\r",length);
k4zuki 36:ffbd9829c8d1 356 i = plength + 1;
k4zuki 36:ffbd9829c8d1 357 length = 0;
k4zuki 36:ffbd9829c8d1 358 }else{
k4zuki 36:ffbd9829c8d1 359 for(int j = 0; j < length; j +=3){
k4zuki 36:ffbd9829c8d1 360 address = recieve[i+1+j];
k4zuki 36:ffbd9829c8d1 361 data = 0xff & (recieve[i+2+j] << 4 | (recieve[i+3+j] & 0x0F));
k4zuki 36:ffbd9829c8d1 362 _data = 0;
k4zuki 36:ffbd9829c8d1 363 switch(address){
k4zuki 36:ffbd9829c8d1 364 case CHIP_ID:
k4zuki 36:ffbd9829c8d1 365 {
k4zuki 36:ffbd9829c8d1 366 //READ ONLY: do nothing
k4zuki 36:ffbd9829c8d1 367 data = registers[CHIP_ID-'0'];
k4zuki 36:ffbd9829c8d1 368 break;
k4zuki 36:ffbd9829c8d1 369 }
k4zuki 36:ffbd9829c8d1 370 case GPIO0_STAT:
k4zuki 36:ffbd9829c8d1 371 {
k4zuki 36:ffbd9829c8d1 372 _data = registers[GPIO0_CONF-'0'];
k4zuki 36:ffbd9829c8d1 373 for(int k=0; k<8; k++){
k4zuki 36:ffbd9829c8d1 374 if(_data&0x01){ // output
k4zuki 36:ffbd9829c8d1 375 gpio0[k]->write((data>>k)&0x01);
k4zuki 36:ffbd9829c8d1 376 }else{ // input
k4zuki 36:ffbd9829c8d1 377 ; // do nothing
k4zuki 36:ffbd9829c8d1 378 }
k4zuki 36:ffbd9829c8d1 379 _data >>= 1;
k4zuki 36:ffbd9829c8d1 380 }
k4zuki 36:ffbd9829c8d1 381 break;
k4zuki 36:ffbd9829c8d1 382 }
k4zuki 36:ffbd9829c8d1 383 case GPIO0_CONF:
k4zuki 36:ffbd9829c8d1 384 {
k4zuki 36:ffbd9829c8d1 385 registers[GPIO0_CONF-'0'] = data;
k4zuki 36:ffbd9829c8d1 386 for(int k = 0; k < 8; k++){
k4zuki 36:ffbd9829c8d1 387 if(data & 0x01){//output
k4zuki 36:ffbd9829c8d1 388 gpio0[k]->output();
k4zuki 36:ffbd9829c8d1 389 }else{//input
k4zuki 36:ffbd9829c8d1 390 gpio0[k]->input();
k4zuki 36:ffbd9829c8d1 391 gpio0[k]->mode(PullUp);
k4zuki 36:ffbd9829c8d1 392 }
k4zuki 36:ffbd9829c8d1 393 data >>= 1;
k4zuki 36:ffbd9829c8d1 394 }
k4zuki 36:ffbd9829c8d1 395 data = registers[GPIO0_CONF-'0'];
k4zuki 36:ffbd9829c8d1 396 break;
k4zuki 36:ffbd9829c8d1 397 }
k4zuki 36:ffbd9829c8d1 398 #ifdef isGPIO1
k4zuki 36:ffbd9829c8d1 399 case GPIO1_STAT:
k4zuki 36:ffbd9829c8d1 400 {
k4zuki 36:ffbd9829c8d1 401 _data = registers[GPIO1_CONF-'0'];
k4zuki 36:ffbd9829c8d1 402 for(int k = 0; k < 8; k++){
k4zuki 36:ffbd9829c8d1 403 if(_data & 0x01){ // output
k4zuki 36:ffbd9829c8d1 404 gpio1[k]->write((data>>k)&0x01);
k4zuki 36:ffbd9829c8d1 405 }else{ // input
k4zuki 36:ffbd9829c8d1 406 ; // do nothing
k4zuki 36:ffbd9829c8d1 407 }
k4zuki 36:ffbd9829c8d1 408 _data >>= 1;
k4zuki 36:ffbd9829c8d1 409 }
k4zuki 36:ffbd9829c8d1 410 break;
k4zuki 36:ffbd9829c8d1 411 }
k4zuki 36:ffbd9829c8d1 412 case GPIO1_CONF:
k4zuki 36:ffbd9829c8d1 413 {
k4zuki 36:ffbd9829c8d1 414 registers[GPIO1_CONF-'0'] = data;
k4zuki 36:ffbd9829c8d1 415 for(int k = 0; k < 6; k++){
k4zuki 36:ffbd9829c8d1 416 if(data & 0x01){//output
k4zuki 36:ffbd9829c8d1 417 gpio1[k]->output();
k4zuki 36:ffbd9829c8d1 418 }else{//input
k4zuki 36:ffbd9829c8d1 419 gpio1[k]->input();
k4zuki 36:ffbd9829c8d1 420 gpio1[k]->mode(PullUp);
k4zuki 36:ffbd9829c8d1 421 }
k4zuki 36:ffbd9829c8d1 422 data >>= 1;
k4zuki 36:ffbd9829c8d1 423 }
k4zuki 36:ffbd9829c8d1 424 data = registers[GPIO1_CONF-'0'];
k4zuki 36:ffbd9829c8d1 425 break;
k4zuki 36:ffbd9829c8d1 426 }
k4zuki 36:ffbd9829c8d1 427 #endif
k4zuki 36:ffbd9829c8d1 428 case I2C_CONF:
k4zuki 36:ffbd9829c8d1 429 {
k4zuki 36:ffbd9829c8d1 430 registers[I2C_CONF-'0'] = data;
k4zuki 36:ffbd9829c8d1 431 #if defined(TARGET_LPC1768)
k4zuki 36:ffbd9829c8d1 432 dev1.frequency(100000 * ((0x03 & (data >> 6)) + 1));
k4zuki 36:ffbd9829c8d1 433 #else
k4zuki 36:ffbd9829c8d1 434 dev1.frequency(200000 * ((0x03 & (data >> 6)) + 1));
k4zuki 36:ffbd9829c8d1 435 #endif
k4zuki 36:ffbd9829c8d1 436 #ifdef isI2C2
k4zuki 36:ffbd9829c8d1 437 dev2.frequency(100000 * ((0x03 & (data >> 4)) + 1));
k4zuki 36:ffbd9829c8d1 438 #endif
k4zuki 36:ffbd9829c8d1 439 #ifdef isI2C3
k4zuki 36:ffbd9829c8d1 440 dev3.frequency(100000 * ((0x03 & (data >> 2)) + 1));
k4zuki 36:ffbd9829c8d1 441 #endif
k4zuki 36:ffbd9829c8d1 442 #ifdef isI2C4
k4zuki 36:ffbd9829c8d1 443 dev4.frequency(100000 * ((0x03 & (data >> 0)) + 1));
k4zuki 36:ffbd9829c8d1 444 #endif
k4zuki 36:ffbd9829c8d1 445 break;
k4zuki 36:ffbd9829c8d1 446 }
k4zuki 36:ffbd9829c8d1 447 case SPI_CONF:
k4zuki 36:ffbd9829c8d1 448 {
k4zuki 36:ffbd9829c8d1 449 registers[SPI_CONF-'0'] = data;
k4zuki 36:ffbd9829c8d1 450 format = ((data & 0x04) + 4) << 1;
k4zuki 36:ffbd9829c8d1 451 _spi.format(format, 0x03 & (data));
k4zuki 36:ffbd9829c8d1 452 _spi.frequency(1000000 * ((0x07 & (data >> 4)) + 1));
k4zuki 36:ffbd9829c8d1 453 enabled = (data & 0x08) >> 3;
k4zuki 36:ffbd9829c8d1 454 /*
k4zuki 36:ffbd9829c8d1 455 7 not used
k4zuki 36:ffbd9829c8d1 456 6:4 frequency
k4zuki 36:ffbd9829c8d1 457 3 CE pol
k4zuki 36:ffbd9829c8d1 458 2 word size(0=8bit,1=16bit)
k4zuki 36:ffbd9829c8d1 459 1:0 pol(corresponds to spi.format())
k4zuki 36:ffbd9829c8d1 460 */
k4zuki 36:ffbd9829c8d1 461 disabled = ~enabled;
k4zuki 36:ffbd9829c8d1 462 break;
k4zuki 36:ffbd9829c8d1 463 }
k4zuki 36:ffbd9829c8d1 464 default:
k4zuki 36:ffbd9829c8d1 465 {
k4zuki 36:ffbd9829c8d1 466 break;
k4zuki 36:ffbd9829c8d1 467 }
k4zuki 36:ffbd9829c8d1 468 }
k4zuki 36:ffbd9829c8d1 469 send[j/3] = data;
k4zuki 36:ffbd9829c8d1 470 }
k4zuki 36:ffbd9829c8d1 471 i += (length + 1);
k4zuki 36:ffbd9829c8d1 472 length /= 3;
k4zuki 36:ffbd9829c8d1 473 }
k4zuki 36:ffbd9829c8d1 474 break;
k4zuki 36:ffbd9829c8d1 475 }
k4zuki 36:ffbd9829c8d1 476 case CMD_I:
k4zuki 36:ffbd9829c8d1 477 {
k4zuki 36:ffbd9829c8d1 478 s = false;
k4zuki 36:ffbd9829c8d1 479 length = plength - 2;
k4zuki 36:ffbd9829c8d1 480 if(length < 1){
k4zuki 36:ffbd9829c8d1 481 pc.printf("bad packet! %d\n\r",length);
k4zuki 36:ffbd9829c8d1 482 i = plength + 1;
k4zuki 36:ffbd9829c8d1 483 length = 0;
k4zuki 36:ffbd9829c8d1 484 }else{
k4zuki 36:ffbd9829c8d1 485 for(int j=0; j<length; j++){
k4zuki 36:ffbd9829c8d1 486 address = recieve[i+1+j];
k4zuki 36:ffbd9829c8d1 487 _data=0;
k4zuki 36:ffbd9829c8d1 488 switch(address){
k4zuki 36:ffbd9829c8d1 489 case GPIO0_STAT:
k4zuki 36:ffbd9829c8d1 490 {
k4zuki 36:ffbd9829c8d1 491 for(int k=0; k<8; k++){
k4zuki 36:ffbd9829c8d1 492 _data = gpio0[k]->read();
k4zuki 36:ffbd9829c8d1 493 data |= (_data << k);
k4zuki 36:ffbd9829c8d1 494 }
k4zuki 36:ffbd9829c8d1 495 registers[GPIO0_STAT-'0'] = data;
k4zuki 36:ffbd9829c8d1 496 break;
k4zuki 36:ffbd9829c8d1 497 }
k4zuki 36:ffbd9829c8d1 498 #ifdef isGPIO1
k4zuki 36:ffbd9829c8d1 499 case GPIO1_STAT:
k4zuki 36:ffbd9829c8d1 500 {
k4zuki 36:ffbd9829c8d1 501 for(int k=0; k<8; k++){
k4zuki 36:ffbd9829c8d1 502 _data = gpio1[k]->read();
k4zuki 36:ffbd9829c8d1 503 data |= (_data << k);
k4zuki 36:ffbd9829c8d1 504 }
k4zuki 36:ffbd9829c8d1 505 registers[GPIO1_STAT-'0'] = data;
k4zuki 36:ffbd9829c8d1 506 break;
k4zuki 36:ffbd9829c8d1 507 }
k4zuki 36:ffbd9829c8d1 508 #endif
k4zuki 36:ffbd9829c8d1 509 default:
k4zuki 36:ffbd9829c8d1 510 {
k4zuki 36:ffbd9829c8d1 511 data = 0xAA;
k4zuki 36:ffbd9829c8d1 512 break;
k4zuki 36:ffbd9829c8d1 513 }
k4zuki 36:ffbd9829c8d1 514 }
k4zuki 36:ffbd9829c8d1 515 send[j] = (char)data;
k4zuki 36:ffbd9829c8d1 516 data = 0;
k4zuki 36:ffbd9829c8d1 517 }
k4zuki 36:ffbd9829c8d1 518 i += (length+1);
k4zuki 36:ffbd9829c8d1 519 }
k4zuki 36:ffbd9829c8d1 520 break;
k4zuki 36:ffbd9829c8d1 521 }
k4zuki 36:ffbd9829c8d1 522 case CMD_O:
k4zuki 36:ffbd9829c8d1 523 {
k4zuki 36:ffbd9829c8d1 524 s = false;
k4zuki 36:ffbd9829c8d1 525 length = plength - 2;
k4zuki 36:ffbd9829c8d1 526 if(length < 3){
k4zuki 36:ffbd9829c8d1 527 pc.printf("bad packet! %d\n\r",length);
k4zuki 36:ffbd9829c8d1 528 i = plength + 1;
k4zuki 36:ffbd9829c8d1 529 length = 0;
k4zuki 36:ffbd9829c8d1 530 }else{
k4zuki 36:ffbd9829c8d1 531 for(int j=0; j<length; j+=3){
k4zuki 36:ffbd9829c8d1 532 address = recieve[i+1+j];
k4zuki 36:ffbd9829c8d1 533 data = 0xff & (recieve[i+2+j] << 4 | (recieve[i+3+j] & 0x0F));
k4zuki 36:ffbd9829c8d1 534 switch(address){
k4zuki 36:ffbd9829c8d1 535 case GPIO0_STAT:
k4zuki 36:ffbd9829c8d1 536 {
k4zuki 36:ffbd9829c8d1 537 _data = registers[GPIO0_CONF-'0'];
k4zuki 36:ffbd9829c8d1 538 for(int k=0; k<8; k++){
k4zuki 36:ffbd9829c8d1 539 if(_data&0x01){ // output
k4zuki 36:ffbd9829c8d1 540 gpio0[k]->write(data&0x01);
k4zuki 36:ffbd9829c8d1 541 }else{ // input
k4zuki 36:ffbd9829c8d1 542 ; // do nothing
k4zuki 36:ffbd9829c8d1 543 }
k4zuki 36:ffbd9829c8d1 544 data >>= 1;
k4zuki 36:ffbd9829c8d1 545 _data >>= 1;
k4zuki 36:ffbd9829c8d1 546 }
k4zuki 36:ffbd9829c8d1 547 break;
k4zuki 36:ffbd9829c8d1 548 }
k4zuki 36:ffbd9829c8d1 549 #ifdef isGPIO1
k4zuki 36:ffbd9829c8d1 550 case GPIO1_STAT:
k4zuki 36:ffbd9829c8d1 551 {
k4zuki 36:ffbd9829c8d1 552 _data = registers[GPIO1_CONF-'0'];
k4zuki 36:ffbd9829c8d1 553 for(int k=0; k<8; k++){
k4zuki 36:ffbd9829c8d1 554 if(_data&0x01){ // output
k4zuki 36:ffbd9829c8d1 555 gpio1[k]->write(data&0x01);
k4zuki 36:ffbd9829c8d1 556 }else{ // input
k4zuki 36:ffbd9829c8d1 557 ; // do nothing
k4zuki 36:ffbd9829c8d1 558 }
k4zuki 36:ffbd9829c8d1 559 data >>= 1;
k4zuki 36:ffbd9829c8d1 560 _data >>= 1;
k4zuki 36:ffbd9829c8d1 561 }
k4zuki 36:ffbd9829c8d1 562 break;
k4zuki 36:ffbd9829c8d1 563 }
k4zuki 36:ffbd9829c8d1 564 #endif
k4zuki 36:ffbd9829c8d1 565 default:
k4zuki 36:ffbd9829c8d1 566 {
k4zuki 36:ffbd9829c8d1 567 break;
k4zuki 36:ffbd9829c8d1 568 }
k4zuki 36:ffbd9829c8d1 569 }
k4zuki 36:ffbd9829c8d1 570 send[j/3] = data;
k4zuki 36:ffbd9829c8d1 571 }
k4zuki 36:ffbd9829c8d1 572 }
k4zuki 36:ffbd9829c8d1 573 i += (length+1);
k4zuki 36:ffbd9829c8d1 574 length /= 3;
k4zuki 36:ffbd9829c8d1 575 // pc.printf("command O is not implemented, ");
k4zuki 36:ffbd9829c8d1 576 break;
k4zuki 36:ffbd9829c8d1 577 }
k4zuki 36:ffbd9829c8d1 578 case CMD_E:
k4zuki 36:ffbd9829c8d1 579 {
k4zuki 36:ffbd9829c8d1 580 s = false;
k4zuki 36:ffbd9829c8d1 581 /*
k4zuki 36:ffbd9829c8d1 582 "0| 1 2| 3 4| 5 6 7 8 9 10 11 12|13" //plength=14
k4zuki 36:ffbd9829c8d1 583 "E| 0x_0 _1| 0x_0 _0| 0x_D _E| P" //minimum plength=8
k4zuki 36:ffbd9829c8d1 584 "E| 0x_0 _1| 0x_0 _0| 0x_D _E|_A _D| P" //minimum plength=10(16bit)
k4zuki 36:ffbd9829c8d1 585 "E| 0x_0 _4| 0x_0 _0| 0x_D _E _A _D _B _E _A _F| P" //write
k4zuki 36:ffbd9829c8d1 586 "E| 0x_0 _4| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P" //write and read
k4zuki 36:ffbd9829c8d1 587 */
k4zuki 36:ffbd9829c8d1 588 length = plength - 2; //6
k4zuki 36:ffbd9829c8d1 589 if(length < 6){
k4zuki 36:ffbd9829c8d1 590 pc.printf("bad packet! %d\n\r",length);
k4zuki 36:ffbd9829c8d1 591 i = plength + 1;
k4zuki 36:ffbd9829c8d1 592 length = 0;
k4zuki 36:ffbd9829c8d1 593 }else{
k4zuki 36:ffbd9829c8d1 594 length = length-4; //actual data in packet
k4zuki 36:ffbd9829c8d1 595 data = 0xff & ((recieve[i+1]<<4) | (recieve[i+2]&0x0F)); // write length
k4zuki 36:ffbd9829c8d1 596 read = 0xff & ((recieve[i+3]<<4) | (recieve[i+4]&0x0F)); // read length
k4zuki 36:ffbd9829c8d1 597 switch(format){
k4zuki 36:ffbd9829c8d1 598 case 8:
k4zuki 36:ffbd9829c8d1 599 {
k4zuki 36:ffbd9829c8d1 600 _cs.write(enabled);
k4zuki 36:ffbd9829c8d1 601 for(int j = 0; j < length; j += 2){
k4zuki 36:ffbd9829c8d1 602 _data = 0xff & ((recieve[i+5+j+0]<<4) | (recieve[i+5+j+1]&0x0F));
k4zuki 36:ffbd9829c8d1 603 ack = _spi.write(_data);
k4zuki 36:ffbd9829c8d1 604 // pc.printf("s%02X,",_data);
k4zuki 36:ffbd9829c8d1 605 send[j/2] = ack;
k4zuki 36:ffbd9829c8d1 606 }
k4zuki 36:ffbd9829c8d1 607 for(int j = length; j < (length+2*read); j+=2){
k4zuki 36:ffbd9829c8d1 608 ack = _spi.write(0xAA); //dummy data to write
k4zuki 36:ffbd9829c8d1 609 // pc.printf("a%02X,",ack);
k4zuki 36:ffbd9829c8d1 610 send[j/2] = ack;
k4zuki 36:ffbd9829c8d1 611 }
k4zuki 36:ffbd9829c8d1 612 _cs.write(disabled);
k4zuki 36:ffbd9829c8d1 613 break;
k4zuki 36:ffbd9829c8d1 614 }
k4zuki 36:ffbd9829c8d1 615 case 16:
k4zuki 36:ffbd9829c8d1 616 {
k4zuki 36:ffbd9829c8d1 617 if((data%2) || (read%2)){ //invalid
k4zuki 36:ffbd9829c8d1 618 pc.printf("bad packet! %d, %d\n\r",data,read);
k4zuki 36:ffbd9829c8d1 619 i = plength + 1;
k4zuki 36:ffbd9829c8d1 620 length = 0;
k4zuki 36:ffbd9829c8d1 621 }else{
k4zuki 36:ffbd9829c8d1 622 _cs.write(enabled);
k4zuki 36:ffbd9829c8d1 623 for(int j = 0; j < length; j += 4){
k4zuki 36:ffbd9829c8d1 624 _data = 0xffff & (((recieve[i+5+j+0] & 0x0F)<<12)|
k4zuki 36:ffbd9829c8d1 625 ((recieve[i+5+j+1] & 0x0F)<<8 )|
k4zuki 36:ffbd9829c8d1 626 ((recieve[i+5+j+2] & 0x0F)<<4 )|
k4zuki 36:ffbd9829c8d1 627 ((recieve[i+5+j+3] & 0x0F)<<0 )
k4zuki 36:ffbd9829c8d1 628 );
k4zuki 36:ffbd9829c8d1 629 ack = _spi.write(_data);
k4zuki 36:ffbd9829c8d1 630 // pc.printf("s%04X,",_data);
k4zuki 36:ffbd9829c8d1 631 send[(j/2)+0] = 0xFF & (ack>>8);
k4zuki 36:ffbd9829c8d1 632 send[(j/2)+1] = 0xFF & (ack>>0);
k4zuki 36:ffbd9829c8d1 633 }
k4zuki 36:ffbd9829c8d1 634 for(int j = length; j < (length+2*read); j += 4){
k4zuki 36:ffbd9829c8d1 635 ack = _spi.write(0xAAAA); //dummy data to write
k4zuki 36:ffbd9829c8d1 636 // pc.printf("a%04X,",ack);
k4zuki 36:ffbd9829c8d1 637 send[(j/2)+0] = 0xFF & (ack>>8);
k4zuki 36:ffbd9829c8d1 638 send[(j/2)+1] = 0xFF & (ack>>0);
k4zuki 36:ffbd9829c8d1 639 }
k4zuki 36:ffbd9829c8d1 640 _cs.write(disabled);
k4zuki 36:ffbd9829c8d1 641 }
k4zuki 36:ffbd9829c8d1 642 break;
k4zuki 36:ffbd9829c8d1 643 }
k4zuki 36:ffbd9829c8d1 644 default:
k4zuki 36:ffbd9829c8d1 645 {
k4zuki 36:ffbd9829c8d1 646 pc.printf("this shold not happen %d\n\r",format);
k4zuki 36:ffbd9829c8d1 647 break;
k4zuki 36:ffbd9829c8d1 648 }
k4zuki 36:ffbd9829c8d1 649
k4zuki 36:ffbd9829c8d1 650 }
k4zuki 36:ffbd9829c8d1 651 // pc.printf("command E is for SPI transmission\n\r");
k4zuki 36:ffbd9829c8d1 652 length = read + data;
k4zuki 36:ffbd9829c8d1 653 i = (plength-1);
k4zuki 36:ffbd9829c8d1 654 }
k4zuki 36:ffbd9829c8d1 655 break;
k4zuki 36:ffbd9829c8d1 656 }
k4zuki 36:ffbd9829c8d1 657 case 'Z':
k4zuki 36:ffbd9829c8d1 658 {
k4zuki 36:ffbd9829c8d1 659 s = false;
k4zuki 36:ffbd9829c8d1 660 pc.printf("command Z is not implemented\n\r");
k4zuki 36:ffbd9829c8d1 661 i=plength;
k4zuki 36:ffbd9829c8d1 662 break;
k4zuki 36:ffbd9829c8d1 663 }
k4zuki 36:ffbd9829c8d1 664 case 'V':
k4zuki 36:ffbd9829c8d1 665 {
k4zuki 36:ffbd9829c8d1 666 s = false;
k4zuki 36:ffbd9829c8d1 667 pc.printf("command V is not implemented\n\r");
k4zuki 36:ffbd9829c8d1 668 i=plength;
k4zuki 36:ffbd9829c8d1 669 break;
k4zuki 36:ffbd9829c8d1 670 }
k4zuki 36:ffbd9829c8d1 671 default:
k4zuki 36:ffbd9829c8d1 672 {
k4zuki 36:ffbd9829c8d1 673 s = false;
k4zuki 36:ffbd9829c8d1 674 pc.printf("command %c is not implemented\n\r", recieve[i]);
k4zuki 36:ffbd9829c8d1 675 i=plength;
k4zuki 36:ffbd9829c8d1 676 break;
k4zuki 36:ffbd9829c8d1 677 }
k4zuki 36:ffbd9829c8d1 678 }
k4zuki 36:ffbd9829c8d1 679 }
k4zuki 36:ffbd9829c8d1 680 i=0;
k4zuki 36:ffbd9829c8d1 681 length=0;
k4zuki 36:ffbd9829c8d1 682 }
k4zuki 36:ffbd9829c8d1 683 }