The official mbed C/C SDK provides the software platform and libraries to build your applications.
Fork of mbed by
(01.May.2014) started sales! http://www.switch-science.com/catalog/1717/
(13.March.2014) updated to 0.5.0
This is a pin conversion PCB from mbed 1768/11U24 to arduino UNO.
- So if you have both mbed and arduino shields, I guess you would be happy with such a conversion board :)
Photos
- Board photo vvv
- Schematic photo vvv
- Functionality photo vvv
Latest eagle files
PCB >> /media/uploads/k4zuki/mbedshield050.brd
SCH >> /media/uploads/k4zuki/mbedshield050.sch
BIG changes from previous version
- Ethernet RJ45 connector is removed.
- http://mbed.org/components/Seeed-Ethernet-Shield-V20/ is the biggest hint to use Ethernet!
MostALL of components can be bought at Akizuki http://akizukidenshi.com/- But sorry, they do not send parts to abroad
- Pinout is changed!
arduino | 0.4.0 | 0.5.0 |
---|---|---|
D4 | p12 | p21 |
D5 | p11 | p22 |
MOSI_ | none | p11 |
MISO_ | none | p12 |
SCK_ | none | p13 |
This design has bug(s)
- I2C functional pin differs between 1768 and 11U24.
Fixed bugs here
- MiniUSB cable cannot be connected on mbed if you solder high-height electrolytic capacitor on C3.
- http://akizukidenshi.com/catalog/g/gP-05002/ is the solution to make this 100% AKIZUKI parts!
- the 6-pin ISP port is not inprimented in version 0.4.0
it will be fixed in later version 0.4.1/0.4.2/0.5.0This has beenfixed
I am doing some porting to use existing arduino shields but it may faster if you do it by yourself...
you can use arduino PinName "A0-A5,D0-D13" plus backside SPI port for easier porting.
To do this you have to edit PinName enum in
- "mbed/TARGET_LPC1768/PinNames.h" or
- "mbed/TARGET_LPC11U24/PinNames.h" as per your target mbed.
here is the actual list: This list includes define switch to switch pin assignment
part_of_PinNames.h
USBTX = P0_2, USBRX = P0_3, //from here mbeDshield mod D0=p27, D1=p28, D2=p14, D3=p13, #ifdef MBEDSHIELD_050 MOSI_=p11, MISO_=p12, SCK_=p13, D4=p21, D5=p22, #else D4=p12, D5=p11, #endif D6=p23, D7=p24, D8=p25, D9=p26, D10=p8, D11=p5, D12=p6, D13=p7, A0=p15, A1=p16, A2=p17, A3=p18, A4=p19, A5=p20, SDA=p9, SCL=p10, //mbeDshield mod ends here // Not connected NC = (int)0xFFFFFFFF
Diff: TARGET_LPC1768/TOOLCHAIN_GCC_CS/LPC1768.ld
- Revision:
- 66:9c8f0e3462fb
- Parent:
- 65:5798e58a58b1
--- a/TARGET_LPC1768/TOOLCHAIN_GCC_CS/LPC1768.ld Mon Aug 12 13:17:46 2013 +0300 +++ b/TARGET_LPC1768/TOOLCHAIN_GCC_CS/LPC1768.ld Mon Aug 19 13:34:54 2013 +0300 @@ -1,212 +1,212 @@ -/* Linker script for mbed LPC1768 - * - * Version:CodeSourcery Sourcery G++ Lite 2007q3-53 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. */ -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -ENTRY(__cs3_reset_cortex_m) -SEARCH_DIR(.) - -/* -ram ORIGIN: 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8 -ram LENGTH: 32KB - 0xC8 = 0x7F38 -*/ -MEMORY -{ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K - - ram (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38 - - ram1(rwx) : ORIGIN = 0x2007C000, LENGTH = 16K - ram2(rwx) : ORIGIN = 0x20080000, LENGTH = 16K -} - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_cortex_m) -EXTERN(__cs3_interrupt_vector_cortex_m) -EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_rom = .; - *(.cs3.region-head.rom) - __cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector"); - *(.rom) - *(.rom.b) - - __cs3_reset = __cs3_reset_cortex_m; - *(.cs3.reset) - /* Make sure we pulled in some reset code. */ - ASSERT (. != __cs3_reset, "No reset code"); - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >rom - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >rom - __cs3_region_size_rom = LENGTH(rom); - __cs3_region_num = 1; - - .data : - { - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram) - . = ALIGN (8); - _edata = .; - } >ram AT>rom - .bss : - { - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - *(.ram.b) - . = ALIGN (8); - _end = .; - __end = .; - } >ram AT>rom - /* This used for USB RAM section */ - .usb_ram (NOLOAD): - { - *.o (USB_RAM) - } > ram2 - .heap (NOLOAD) : - { - *(.heap) - } >ram - .stack (__cs3_stack - __cs3_stack_size) (NOLOAD): - { - *(.stack) - _estack = .; - PROVIDE(estack = .); - } >ram - - __cs3_region_init_ram = LOADADDR (.data); - __cs3_region_init_size_ram = _edata - __cs3_region_start_ram; - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} +/* Linker script for mbed LPC1768 + * + * Version:CodeSourcery Sourcery G++ Lite 2007q3-53 + * BugURL:https://support.codesourcery.com/GNUToolchain/ + * + * Copyright 2007 CodeSourcery. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. */ +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +ENTRY(__cs3_reset_cortex_m) +SEARCH_DIR(.) + +/* +ram ORIGIN: 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8 +ram LENGTH: 32KB - 0xC8 = 0x7F38 +*/ +MEMORY +{ + rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K + + ram (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38 + + ram1(rwx) : ORIGIN = 0x2007C000, LENGTH = 16K + ram2(rwx) : ORIGIN = 0x20080000, LENGTH = 16K +} + +/* These force the linker to search for particular symbols from + * the start of the link process and thus ensure the user's + * overrides are picked up + */ +EXTERN(__cs3_reset_cortex_m) +EXTERN(__cs3_interrupt_vector_cortex_m) +EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end) + +PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); +PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end); +PROVIDE(__cs3_heap_start = _end); +PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); + +SECTIONS +{ + .text : + { + CREATE_OBJECT_SYMBOLS + __cs3_region_start_rom = .; + *(.cs3.region-head.rom) + __cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m; + *(.cs3.interrupt_vector) + /* Make sure we pulled in an interrupt vector. */ + ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector"); + *(.rom) + *(.rom.b) + + __cs3_reset = __cs3_reset_cortex_m; + *(.cs3.reset) + /* Make sure we pulled in some reset code. */ + ASSERT (. != __cs3_reset, "No reset code"); + + *(.text .text.* .gnu.linkonce.t.*) + *(.plt) + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) + + *(.rodata .rodata.* .gnu.linkonce.r.*) + + *(.ARM.extab* .gnu.linkonce.armextab.*) + *(.gcc_except_table) + *(.eh_frame_hdr) + *(.eh_frame) + + . = ALIGN(4); + KEEP(*(.init)) + + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + __cs3_regions = .; + LONG (0) + LONG (__cs3_region_init_ram) + LONG (__cs3_region_start_ram) + LONG (__cs3_region_init_size_ram) + LONG (__cs3_region_zero_size_ram) + } + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } >rom + __exidx_end = .; + .text.align : + { + . = ALIGN(8); + _etext = .; + } >rom + __cs3_region_size_rom = LENGTH(rom); + __cs3_region_num = 1; + + .data : + { + __cs3_region_start_ram = .; + *(.cs3.region-head.ram) + KEEP(*(.jcr)) + *(.got.plt) *(.got) + *(.shdata) + *(.data .data.* .gnu.linkonce.d.*) + *(.ram) + . = ALIGN (8); + _edata = .; + } >ram AT>rom + .bss : + { + *(.shbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + *(.ram.b) + . = ALIGN (8); + _end = .; + __end = .; + } >ram AT>rom + /* This used for USB RAM section */ + .usb_ram (NOLOAD): + { + *.o (USB_RAM) + } > ram2 + .heap (NOLOAD) : + { + *(.heap) + } >ram + .stack (__cs3_stack - __cs3_stack_size) (NOLOAD): + { + *(.stack) + _estack = .; + PROVIDE(estack = .); + } >ram + + __cs3_region_init_ram = LOADADDR (.data); + __cs3_region_init_size_ram = _edata - __cs3_region_start_ram; + __cs3_region_zero_size_ram = _end - _edata; + __cs3_region_size_ram = LENGTH(ram); + __cs3_region_num = 1; + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } +}