Kazuki Yamamoto / at45db161d

Forked library from okini3939/at45db161d

Fork of at45db161d by Suga koubou

at45db161d.cpp@3:c2cd805585ef, 2015-10-01 (annotated)

Committer:
k4zuki
Date:
Thu Oct 01 08:39:46 2015 +0000
Revision:
3:c2cd805585ef
Parent:
2:111e8cf6f263 
additional constructor

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 0:2e953bbaf3a5 1 /**
okini3939 0:2e953bbaf3a5 2 * AT45DB161D module for arduino (C) Vincent
okini3939 0:2e953bbaf3a5 3 * SPI flash memory
okini3939 0:2e953bbaf3a5 4 * http://blog.blockos.org/?p=27
okini3939 0:2e953bbaf3a5 5 *
okini3939 0:2e953bbaf3a5 6 * bug fix by todotani
okini3939 0:2e953bbaf3a5 7 * http://todotani.cocolog-nifty.com/blog/2009/07/arduino-4cf4.html
okini3939 0:2e953bbaf3a5 8 *
okini3939 0:2e953bbaf3a5 9 * Modified for mbed, 2011 Suga.
okini3939 0:2e953bbaf3a5 10 */
okini3939 0:2e953bbaf3a5 11 #include "at45db161d.h"
okini3939 0:2e953bbaf3a5 12
okini3939 0:2e953bbaf3a5 13 /** CTOR **/
okini3939 0:2e953bbaf3a5 14 ATD45DB161D::ATD45DB161D(PinName mosi, PinName miso, PinName sclk, PinName cs)
okini3939 0:2e953bbaf3a5 15 : _spi(mosi, miso, sclk), _cs(cs)
okini3939 0:2e953bbaf3a5 16 {}
okini3939 0:2e953bbaf3a5 17
k4zuki 2:111e8cf6f263 18 ATD45DB161D::ATD45DB161D(SWSPI &spi, PinName cs)
okini3939 0:2e953bbaf3a5 19 : _spi(spi), _cs(cs)
okini3939 0:2e953bbaf3a5 20 {}
okini3939 0:2e953bbaf3a5 21
okini3939 0:2e953bbaf3a5 22 /** DTOR **/
okini3939 0:2e953bbaf3a5 23 ATD45DB161D::~ATD45DB161D()
okini3939 0:2e953bbaf3a5 24 {}
okini3939 0:2e953bbaf3a5 25
okini3939 0:2e953bbaf3a5 26 /** Setup SPI and pinout **/
okini3939 0:2e953bbaf3a5 27 void ATD45DB161D::Init()
okini3939 0:2e953bbaf3a5 28 {
k4zuki 2:111e8cf6f263 29 /* Disable device */
k4zuki 2:111e8cf6f263 30 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 31
okini3939 0:2e953bbaf3a5 32 /* Setup SPI */
okini3939 0:2e953bbaf3a5 33 _spi.format(8, 0);
okini3939 0:2e953bbaf3a5 34
okini3939 0:2e953bbaf3a5 35 }
okini3939 0:2e953bbaf3a5 36
okini3939 0:2e953bbaf3a5 37 /**
okini3939 0:2e953bbaf3a5 38 * Read status register
okini3939 0:2e953bbaf3a5 39 * @return The content of the status register
okini3939 0:2e953bbaf3a5 40 **/
okini3939 0:2e953bbaf3a5 41 uint8_t ATD45DB161D::ReadStatusRegister()
okini3939 0:2e953bbaf3a5 42 {
okini3939 0:2e953bbaf3a5 43 uint8_t status;
okini3939 0:2e953bbaf3a5 44
okini3939 0:2e953bbaf3a5 45 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 46 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 47
okini3939 0:2e953bbaf3a5 48 /* Send status read command */
okini3939 0:2e953bbaf3a5 49 spi_transfer(AT45DB161D_STATUS_REGISTER_READ);
okini3939 0:2e953bbaf3a5 50 /* Get result with a dummy write */
okini3939 0:2e953bbaf3a5 51 status = spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 52
okini3939 0:2e953bbaf3a5 53 return status;
okini3939 0:2e953bbaf3a5 54 }
okini3939 0:2e953bbaf3a5 55
okini3939 0:2e953bbaf3a5 56 /**
okini3939 0:2e953bbaf3a5 57 * Read Manufacturer and Device ID
okini3939 0:2e953bbaf3a5 58 * @note if id.extendedInfoLength is not equal to zero,
okini3939 0:2e953bbaf3a5 59 * successive calls to spi_transfer(0xff) will return
okini3939 0:2e953bbaf3a5 60 * the extended device information string bytes.
okini3939 0:2e953bbaf3a5 61 * @param id Pointer to the ID structure to initialize
okini3939 0:2e953bbaf3a5 62 **/
okini3939 0:2e953bbaf3a5 63 void ATD45DB161D::ReadManufacturerAndDeviceID(struct ATD45DB161D::ID *id)
okini3939 0:2e953bbaf3a5 64 {
okini3939 0:2e953bbaf3a5 65
okini3939 0:2e953bbaf3a5 66 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 67 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 68
okini3939 0:2e953bbaf3a5 69 /* Send status read command */
okini3939 0:2e953bbaf3a5 70 spi_transfer(AT45DB161D_READ_MANUFACTURER_AND_DEVICE_ID);
okini3939 0:2e953bbaf3a5 71
okini3939 0:2e953bbaf3a5 72 /* Manufacturer ID */
okini3939 0:2e953bbaf3a5 73 id->manufacturer = spi_transfer(0xff);
okini3939 0:2e953bbaf3a5 74 /* Device ID (part 1) */
okini3939 0:2e953bbaf3a5 75 id->device[0] = spi_transfer(0xff);
okini3939 0:2e953bbaf3a5 76 /* Device ID (part 2) */
okini3939 0:2e953bbaf3a5 77 id->device[1] = spi_transfer(0xff);
okini3939 0:2e953bbaf3a5 78 /* Extended Device Information String Length */
okini3939 0:2e953bbaf3a5 79 id->extendedInfoLength = spi_transfer(0xff);
okini3939 0:2e953bbaf3a5 80
okini3939 0:2e953bbaf3a5 81 }
okini3939 0:2e953bbaf3a5 82
okini3939 0:2e953bbaf3a5 83 /**
okini3939 0:2e953bbaf3a5 84 * Main Memory Page Read.
okini3939 0:2e953bbaf3a5 85 * A main memory page read allows the user to read data directly from
okini3939 0:2e953bbaf3a5 86 * any one of the 4096 pages in the main memory, bypassing both of the
okini3939 0:2e953bbaf3a5 87 * data buffers and leaving the contents of the buffers unchanged.
okini3939 0:2e953bbaf3a5 88 *
okini3939 0:2e953bbaf3a5 89 * @param page Page of the main memory to read
okini3939 0:2e953bbaf3a5 90 * @param offset Starting byte address within the page
okini3939 0:2e953bbaf3a5 91 **/
okini3939 0:2e953bbaf3a5 92 void ATD45DB161D::ReadMainMemoryPage(uint16_t page, uint16_t offset)
okini3939 0:2e953bbaf3a5 93 {
okini3939 0:2e953bbaf3a5 94 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 95 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 96
okini3939 0:2e953bbaf3a5 97 /* Send opcode */
okini3939 0:2e953bbaf3a5 98 spi_transfer(AT45DB161D_PAGE_READ);
okini3939 0:2e953bbaf3a5 99
okini3939 0:2e953bbaf3a5 100 /* Address (page | offset) */
okini3939 0:2e953bbaf3a5 101 spi_transfer((uint8_t)(page >> 6));
okini3939 0:2e953bbaf3a5 102 spi_transfer((uint8_t)((page << 2) | (offset >> 8)));
okini3939 0:2e953bbaf3a5 103 spi_transfer((uint8_t)(offset & 0xff));
okini3939 0:2e953bbaf3a5 104
okini3939 0:2e953bbaf3a5 105 /* 4 "don't care" bytes */
okini3939 0:2e953bbaf3a5 106 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 107 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 108 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 109 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 110 }
okini3939 0:2e953bbaf3a5 111
okini3939 0:2e953bbaf3a5 112 /**
okini3939 0:2e953bbaf3a5 113 * Continuous Array Read.
okini3939 0:2e953bbaf3a5 114 * Sequentially read a continuous stream of data.
okini3939 0:2e953bbaf3a5 115 * @param page Page of the main memory where the sequential read will start
okini3939 0:2e953bbaf3a5 116 * @param offset Starting byte address within the page
okini3939 0:2e953bbaf3a5 117 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false).
okini3939 0:2e953bbaf3a5 118 * @note The legacy mode is not currently supported
okini3939 0:2e953bbaf3a5 119 **/
okini3939 0:2e953bbaf3a5 120 void ATD45DB161D::ContinuousArrayRead(uint16_t page, uint16_t offset, uint8_t low)
okini3939 0:2e953bbaf3a5 121 {
okini3939 0:2e953bbaf3a5 122 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 123 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 124
okini3939 0:2e953bbaf3a5 125 /* Send opcode */
okini3939 0:2e953bbaf3a5 126 spi_transfer( low ? AT45DB161D_CONTINUOUS_READ_LOW_FREQ :
okini3939 0:2e953bbaf3a5 127 AT45DB161D_CONTINUOUS_READ_HIGH_FREQ );
okini3939 0:2e953bbaf3a5 128
okini3939 0:2e953bbaf3a5 129 /* Address (page | offset) */
okini3939 0:2e953bbaf3a5 130 spi_transfer((uint8_t)(page >> 6));
okini3939 0:2e953bbaf3a5 131 spi_transfer((uint8_t)((page << 2) | (offset >> 8)));
okini3939 0:2e953bbaf3a5 132 spi_transfer((uint8_t)(offset & 0xff));
okini3939 0:2e953bbaf3a5 133
okini3939 0:2e953bbaf3a5 134 if (!low) { spi_transfer(0x00); }
okini3939 0:2e953bbaf3a5 135 }
okini3939 0:2e953bbaf3a5 136
okini3939 0:2e953bbaf3a5 137
okini3939 0:2e953bbaf3a5 138 /**
okini3939 0:2e953bbaf3a5 139 * Read the content of one of the SRAM data buffers (in low or high speed mode).
okini3939 0:2e953bbaf3a5 140 * @param bufferNum Buffer to read (1 or 2)
okini3939 0:2e953bbaf3a5 141 * @param offset Starting byte within the buffer
okini3939 0:2e953bbaf3a5 142 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false).
okini3939 0:2e953bbaf3a5 143 **/
okini3939 0:2e953bbaf3a5 144 void ATD45DB161D::BufferRead(uint8_t bufferNum, uint16_t offset, uint8_t low)
okini3939 0:2e953bbaf3a5 145 {
okini3939 0:2e953bbaf3a5 146 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 147 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 148
okini3939 0:2e953bbaf3a5 149 /* Send opcode */
okini3939 0:2e953bbaf3a5 150 if(bufferNum == 1)
okini3939 0:2e953bbaf3a5 151 {
okini3939 0:2e953bbaf3a5 152 spi_transfer(low ? AT45DB161D_BUFFER_1_READ_LOW_FREQ :
okini3939 0:2e953bbaf3a5 153 AT45DB161D_BUFFER_1_READ);
okini3939 0:2e953bbaf3a5 154 }
okini3939 0:2e953bbaf3a5 155 else
okini3939 0:2e953bbaf3a5 156 {
okini3939 0:2e953bbaf3a5 157 spi_transfer(low ? AT45DB161D_BUFFER_2_READ_LOW_FREQ :
okini3939 0:2e953bbaf3a5 158 AT45DB161D_BUFFER_2_READ);
okini3939 0:2e953bbaf3a5 159
okini3939 0:2e953bbaf3a5 160 }
okini3939 0:2e953bbaf3a5 161
okini3939 0:2e953bbaf3a5 162 /* 14 "Don't care" bits */
okini3939 0:2e953bbaf3a5 163 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 164 /* Rest of the "don't care" bits + bits 8,9 of the offset */
okini3939 0:2e953bbaf3a5 165 spi_transfer((uint8_t)(offset >> 8));
okini3939 0:2e953bbaf3a5 166 /* bits 7-0 of the offset */
okini3939 0:2e953bbaf3a5 167 spi_transfer((uint8_t)(offset & 0xff));
okini3939 0:2e953bbaf3a5 168 }
okini3939 0:2e953bbaf3a5 169
okini3939 0:2e953bbaf3a5 170 /**
okini3939 0:2e953bbaf3a5 171 * Write data to one of the SRAM data buffers. Any further call to
okini3939 0:2e953bbaf3a5 172 * spi_tranfer will return bytes contained in the data buffer until
okini3939 0:2e953bbaf3a5 173 * a low-to-high transition is detected on the CS pin. If the end of
okini3939 0:2e953bbaf3a5 174 * the data buffer is reached, the device will wrap around back to the
okini3939 0:2e953bbaf3a5 175 * beginning of the buffer.
okini3939 0:2e953bbaf3a5 176 * @param bufferNum Buffer to read (1 or 2)
okini3939 0:2e953bbaf3a5 177 * @param offset Starting byte within the buffer
okini3939 0:2e953bbaf3a5 178 **/
okini3939 0:2e953bbaf3a5 179 void ATD45DB161D::BufferWrite(uint8_t bufferNum, uint16_t offset)
okini3939 0:2e953bbaf3a5 180 {
okini3939 0:2e953bbaf3a5 181 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 182 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 183
okini3939 0:2e953bbaf3a5 184 spi_transfer( (bufferNum == 1) ? AT45DB161D_BUFFER_1_WRITE :
okini3939 0:2e953bbaf3a5 185 AT45DB161D_BUFFER_2_WRITE);
okini3939 0:2e953bbaf3a5 186
okini3939 0:2e953bbaf3a5 187 /* 14 "Don't care" bits */
okini3939 0:2e953bbaf3a5 188 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 189 /* Rest of the "don't care" bits + bits 8,9 of the offset */
okini3939 0:2e953bbaf3a5 190 spi_transfer((uint8_t)(offset >> 8));
okini3939 0:2e953bbaf3a5 191 /* bits 7-0 of the offset */
okini3939 0:2e953bbaf3a5 192 spi_transfer((uint8_t)(offset & 0xff));
okini3939 0:2e953bbaf3a5 193 }
okini3939 0:2e953bbaf3a5 194
okini3939 0:2e953bbaf3a5 195 /**
okini3939 0:2e953bbaf3a5 196 * Transfer data from buffer 1 or 2 to main memory page.
okini3939 0:2e953bbaf3a5 197 * @param bufferNum Buffer to use (1 or 2)
okini3939 0:2e953bbaf3a5 198 * @param page Page where the content of the buffer will transfered
okini3939 0:2e953bbaf3a5 199 * @param erase If set the page will be first erased before the buffer transfer.
okini3939 0:2e953bbaf3a5 200 * @note If erase is equal to zero, the page must have been previously erased using one of the erase command (Page or Block Erase).
okini3939 0:2e953bbaf3a5 201 **/
okini3939 0:2e953bbaf3a5 202 void ATD45DB161D::BufferToPage(uint8_t bufferNum, uint16_t page, uint8_t erase)
okini3939 0:2e953bbaf3a5 203 {
okini3939 0:2e953bbaf3a5 204 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 205 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 206
okini3939 0:2e953bbaf3a5 207 /* Opcode */
okini3939 0:2e953bbaf3a5 208 if(erase)
okini3939 0:2e953bbaf3a5 209 {
okini3939 0:2e953bbaf3a5 210 spi_transfer( (bufferNum == 1) ? AT45DB161D_BUFFER_1_TO_PAGE_WITH_ERASE :
okini3939 0:2e953bbaf3a5 211 AT45DB161D_BUFFER_2_TO_PAGE_WITH_ERASE);
okini3939 0:2e953bbaf3a5 212 }
okini3939 0:2e953bbaf3a5 213 else
okini3939 0:2e953bbaf3a5 214 {
okini3939 0:2e953bbaf3a5 215 spi_transfer( (bufferNum == 1) ? AT45DB161D_BUFFER_1_TO_PAGE_WITHOUT_ERASE :
okini3939 0:2e953bbaf3a5 216 AT45DB161D_BUFFER_2_TO_PAGE_WITHOUT_ERASE);
okini3939 0:2e953bbaf3a5 217 }
okini3939 0:2e953bbaf3a5 218
okini3939 0:2e953bbaf3a5 219 /*
okini3939 0:2e953bbaf3a5 220 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 221 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 222 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 223 * the main memory to be written
okini3939 0:2e953bbaf3a5 224 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 225 */
okini3939 0:2e953bbaf3a5 226 spi_transfer((uint8_t)(page >> 6));
okini3939 0:2e953bbaf3a5 227 spi_transfer((uint8_t)(page << 2));
okini3939 0:2e953bbaf3a5 228 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 229
okini3939 0:2e953bbaf3a5 230 DF_CS_inactive; /* Start transfer */
okini3939 0:2e953bbaf3a5 231 DF_CS_active; /* If erase was set, the page will first be erased */
okini3939 0:2e953bbaf3a5 232
okini3939 0:2e953bbaf3a5 233 /* Wait for the end of the transfer */
okini3939 0:2e953bbaf3a5 234 while(!(ReadStatusRegister() & READY_BUSY))
okini3939 0:2e953bbaf3a5 235 {}
okini3939 0:2e953bbaf3a5 236 }
okini3939 0:2e953bbaf3a5 237
okini3939 0:2e953bbaf3a5 238 /**
okini3939 0:2e953bbaf3a5 239 * Transfer a page of data from main memory to buffer 1 or 2.
okini3939 0:2e953bbaf3a5 240 * @param page Main memory page to transfer
okini3939 0:2e953bbaf3a5 241 * @param buffer Buffer (1 or 2) where the data will be written
okini3939 0:2e953bbaf3a5 242 **/
okini3939 0:2e953bbaf3a5 243 void ATD45DB161D::PageToBuffer(uint16_t page, uint8_t bufferNum)
okini3939 0:2e953bbaf3a5 244 {
okini3939 0:2e953bbaf3a5 245 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 246 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 247
okini3939 0:2e953bbaf3a5 248 /* Send opcode */
okini3939 0:2e953bbaf3a5 249 spi_transfer((bufferNum == 1) ? AT45DB161D_TRANSFER_PAGE_TO_BUFFER_1 :
okini3939 0:2e953bbaf3a5 250 AT45DB161D_TRANSFER_PAGE_TO_BUFFER_2);
okini3939 0:2e953bbaf3a5 251
okini3939 0:2e953bbaf3a5 252 /*
okini3939 0:2e953bbaf3a5 253 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 254 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 255 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 256 * the main memory to be written
okini3939 0:2e953bbaf3a5 257 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 258 */
okini3939 0:2e953bbaf3a5 259 spi_transfer((uint8_t)(page >> 6));
okini3939 0:2e953bbaf3a5 260 spi_transfer((uint8_t)(page << 2));
okini3939 0:2e953bbaf3a5 261 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 262
okini3939 0:2e953bbaf3a5 263 DF_CS_inactive; /* Start page transfer */
okini3939 0:2e953bbaf3a5 264 DF_CS_active;
okini3939 0:2e953bbaf3a5 265
okini3939 0:2e953bbaf3a5 266 /* Wait for the end of the transfer */
okini3939 0:2e953bbaf3a5 267 while(!(ReadStatusRegister() & READY_BUSY))
okini3939 0:2e953bbaf3a5 268 {}
okini3939 0:2e953bbaf3a5 269 }
okini3939 0:2e953bbaf3a5 270
okini3939 0:2e953bbaf3a5 271 /**
okini3939 0:2e953bbaf3a5 272 * Erase a page in the main memory array.
okini3939 0:2e953bbaf3a5 273 * @param page Page to erase
okini3939 0:2e953bbaf3a5 274 **/
okini3939 0:2e953bbaf3a5 275 void ATD45DB161D::PageErase(uint16_t page)
okini3939 0:2e953bbaf3a5 276 {
okini3939 0:2e953bbaf3a5 277 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 278 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 279
okini3939 0:2e953bbaf3a5 280 /* Send opcode */
okini3939 0:2e953bbaf3a5 281 spi_transfer(AT45DB161D_PAGE_ERASE);
okini3939 0:2e953bbaf3a5 282
okini3939 0:2e953bbaf3a5 283 /*
okini3939 0:2e953bbaf3a5 284 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 285 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 286 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 287 * the main memory to be written
okini3939 0:2e953bbaf3a5 288 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 289 */
okini3939 0:2e953bbaf3a5 290 spi_transfer((uint8_t)(page >> 6));
okini3939 0:2e953bbaf3a5 291 spi_transfer((uint8_t)(page << 2));
okini3939 0:2e953bbaf3a5 292 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 293
okini3939 0:2e953bbaf3a5 294 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 295 DF_CS_active;
okini3939 0:2e953bbaf3a5 296
okini3939 0:2e953bbaf3a5 297 /* Wait for the end of the block erase operation */
okini3939 0:2e953bbaf3a5 298 while(!(ReadStatusRegister() & READY_BUSY))
okini3939 0:2e953bbaf3a5 299 {}
okini3939 0:2e953bbaf3a5 300 }
okini3939 0:2e953bbaf3a5 301
okini3939 0:2e953bbaf3a5 302 /**
okini3939 0:2e953bbaf3a5 303 * Erase a block of eight pages at one time.
okini3939 0:2e953bbaf3a5 304 * @param block Index of the block to erase
okini3939 0:2e953bbaf3a5 305 **/
okini3939 0:2e953bbaf3a5 306 void ATD45DB161D::BlockErase(uint16_t block)
okini3939 0:2e953bbaf3a5 307 {
okini3939 0:2e953bbaf3a5 308 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 309 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 310
okini3939 0:2e953bbaf3a5 311 /* Send opcode */
okini3939 0:2e953bbaf3a5 312 spi_transfer(AT45DB161D_BLOCK_ERASE);
okini3939 0:2e953bbaf3a5 313
okini3939 0:2e953bbaf3a5 314 /*
okini3939 0:2e953bbaf3a5 315 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 316 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 317 * - 9 block address bits (PA11 - PA3)
okini3939 0:2e953bbaf3a5 318 * - 13 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 319 */
okini3939 0:2e953bbaf3a5 320 spi_transfer((uint8_t)(block >> 3));
okini3939 0:2e953bbaf3a5 321 spi_transfer((uint8_t)(block << 5));
okini3939 0:2e953bbaf3a5 322 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 323
okini3939 0:2e953bbaf3a5 324 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 325 DF_CS_active;
okini3939 0:2e953bbaf3a5 326
okini3939 0:2e953bbaf3a5 327 /* Wait for the end of the block erase operation */
okini3939 0:2e953bbaf3a5 328 while(!(ReadStatusRegister() & READY_BUSY))
okini3939 0:2e953bbaf3a5 329 {}
okini3939 0:2e953bbaf3a5 330 }
okini3939 0:2e953bbaf3a5 331
okini3939 0:2e953bbaf3a5 332 /**
okini3939 0:2e953bbaf3a5 333 * Erase a sector in main memory. There are 16 sector on the
okini3939 0:2e953bbaf3a5 334 * at45db161d and only one can be erased at one time.
okini3939 0:2e953bbaf3a5 335 * @param sector Sector to erase (1-15)
okini3939 0:2e953bbaf3a5 336 **/
okini3939 0:2e953bbaf3a5 337 void ATD45DB161D::SectoreErase(uint8_t sector)
okini3939 0:2e953bbaf3a5 338 {
okini3939 0:2e953bbaf3a5 339 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 340 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 341
okini3939 0:2e953bbaf3a5 342 /* Send opcode */
okini3939 0:2e953bbaf3a5 343 spi_transfer(AT45DB161D_SECTOR_ERASE);
okini3939 0:2e953bbaf3a5 344
okini3939 0:2e953bbaf3a5 345 /*
okini3939 0:2e953bbaf3a5 346 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 347 */
okini3939 0:2e953bbaf3a5 348 if((sector == 0x0a) || (sector == 0x0b))
okini3939 0:2e953bbaf3a5 349 {
okini3939 0:2e953bbaf3a5 350 /*
okini3939 0:2e953bbaf3a5 351 * - 11 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 352 * -
okini3939 0:2e953bbaf3a5 353 * - 12 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 354 */
okini3939 0:2e953bbaf3a5 355 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 356 spi_transfer(((sector & 0x01) << 4));
okini3939 0:2e953bbaf3a5 357 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 358 }
okini3939 0:2e953bbaf3a5 359 else
okini3939 0:2e953bbaf3a5 360 {
okini3939 0:2e953bbaf3a5 361 /*
okini3939 0:2e953bbaf3a5 362 * - 2 don't care bits
okini3939 0:2e953bbaf3a5 363 * - 4 sector number bits
okini3939 0:2e953bbaf3a5 364 * - 18 don't care bits
okini3939 0:2e953bbaf3a5 365 */
okini3939 0:2e953bbaf3a5 366 spi_transfer(sector << 1);
okini3939 0:2e953bbaf3a5 367 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 368 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 369 }
okini3939 0:2e953bbaf3a5 370
okini3939 0:2e953bbaf3a5 371 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 372 DF_CS_active;
okini3939 0:2e953bbaf3a5 373
okini3939 0:2e953bbaf3a5 374 /* Wait for the end of the block erase operation */
okini3939 0:2e953bbaf3a5 375 while(!(ReadStatusRegister() & READY_BUSY))
okini3939 0:2e953bbaf3a5 376 {}
okini3939 0:2e953bbaf3a5 377 }
okini3939 0:2e953bbaf3a5 378
okini3939 0:2e953bbaf3a5 379 /**
okini3939 0:2e953bbaf3a5 380 * Erase the entire chip memory. Sectors proteced or locked down will
okini3939 0:2e953bbaf3a5 381 * not be erased.
okini3939 0:2e953bbaf3a5 382 **/
okini3939 0:2e953bbaf3a5 383 void ATD45DB161D::ChipErase()
okini3939 0:2e953bbaf3a5 384 {
okini3939 0:2e953bbaf3a5 385 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 386 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 387
okini3939 0:2e953bbaf3a5 388 /* Send chip erase sequence */
okini3939 0:2e953bbaf3a5 389 spi_transfer(AT45DB161D_CHIP_ERASE_0);
okini3939 0:2e953bbaf3a5 390 spi_transfer(AT45DB161D_CHIP_ERASE_1);
okini3939 0:2e953bbaf3a5 391 spi_transfer(AT45DB161D_CHIP_ERASE_2);
okini3939 0:2e953bbaf3a5 392 spi_transfer(AT45DB161D_CHIP_ERASE_3);
okini3939 0:2e953bbaf3a5 393
okini3939 0:2e953bbaf3a5 394 DF_CS_inactive; /* Start chip erase */
okini3939 0:2e953bbaf3a5 395 DF_CS_active;
okini3939 0:2e953bbaf3a5 396
okini3939 0:2e953bbaf3a5 397 /* Wait for the end of the chip erase operation */
okini3939 0:2e953bbaf3a5 398 while(!(ReadStatusRegister() & READY_BUSY))
okini3939 0:2e953bbaf3a5 399 {}
okini3939 0:2e953bbaf3a5 400 }
okini3939 0:2e953bbaf3a5 401
okini3939 0:2e953bbaf3a5 402 /**
okini3939 0:2e953bbaf3a5 403 * This a combination of Buffer Write and Buffer to Page with
okini3939 0:2e953bbaf3a5 404 * Built-in Erase.
okini3939 0:2e953bbaf3a5 405 * @note You must call EndAndWait in order to start transfering data from buffer to page
okini3939 0:2e953bbaf3a5 406 * @param page Page where the content of the buffer will transfered
okini3939 0:2e953bbaf3a5 407 * @param offset Starting byte address within the buffer
okini3939 0:2e953bbaf3a5 408 * @param bufferNum Buffer to use (1 or 2)
okini3939 0:2e953bbaf3a5 409 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 410 **/
okini3939 0:2e953bbaf3a5 411 void ATD45DB161D::BeginPageWriteThroughBuffer(uint16_t page, uint16_t offset, uint8_t bufferNum)
okini3939 0:2e953bbaf3a5 412 {
okini3939 0:2e953bbaf3a5 413 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 414 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 415
okini3939 0:2e953bbaf3a5 416 /* Send opcode */
okini3939 0:2e953bbaf3a5 417 spi_transfer((bufferNum == 1) ? AT45DB161D_PAGE_THROUGH_BUFFER_1 :
okini3939 0:2e953bbaf3a5 418 AT45DB161D_PAGE_THROUGH_BUFFER_2);
okini3939 0:2e953bbaf3a5 419
okini3939 0:2e953bbaf3a5 420 /* Address */
okini3939 0:2e953bbaf3a5 421 spi_transfer((uint8_t)(page >> 6));
okini3939 0:2e953bbaf3a5 422 spi_transfer((uint8_t)((page << 2) | (offset >> 8)));
okini3939 0:2e953bbaf3a5 423 spi_transfer((uint8_t)offset);
okini3939 0:2e953bbaf3a5 424 }
okini3939 0:2e953bbaf3a5 425
okini3939 0:2e953bbaf3a5 426 /**
okini3939 0:2e953bbaf3a5 427 * Perform a low-to-high transition on the CS pin and then poll
okini3939 0:2e953bbaf3a5 428 * the status register to check if the dataflash is busy.
okini3939 0:2e953bbaf3a5 429 **/
okini3939 0:2e953bbaf3a5 430 void ATD45DB161D::EndAndWait()
okini3939 0:2e953bbaf3a5 431 {
okini3939 0:2e953bbaf3a5 432 DF_CS_inactive; /* End current operation */
okini3939 0:2e953bbaf3a5 433 DF_CS_active; /* Some internal operation may occur
okini3939 0:2e953bbaf3a5 434 * (buffer to page transfer, page erase, etc... ) */
okini3939 0:2e953bbaf3a5 435
okini3939 0:2e953bbaf3a5 436 /* Wait for the chip to be ready */
okini3939 0:2e953bbaf3a5 437 while(!(ReadStatusRegister() & READY_BUSY))
okini3939 0:2e953bbaf3a5 438 {}
okini3939 0:2e953bbaf3a5 439
okini3939 0:2e953bbaf3a5 440 DF_CS_inactive; /* Release SPI Bus */
okini3939 0:2e953bbaf3a5 441 }
okini3939 0:2e953bbaf3a5 442
okini3939 0:2e953bbaf3a5 443 /**
okini3939 0:2e953bbaf3a5 444 * Compare a page of data in main memory to the data in buffer 1 or 2.
okini3939 0:2e953bbaf3a5 445 * @param page Page to test
okini3939 0:2e953bbaf3a5 446 * @param bufferNum Buffer number
okini3939 0:2e953bbaf3a5 447 * @return
okini3939 0:2e953bbaf3a5 448 * - 1 if the page and the buffer contains the same data
okini3939 0:2e953bbaf3a5 449 * - 0 else
okini3939 0:2e953bbaf3a5 450 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 451 **/
okini3939 0:2e953bbaf3a5 452 int8_t ATD45DB161D::ComparePageToBuffer(uint16_t page, uint8_t bufferNum)
okini3939 0:2e953bbaf3a5 453 {
okini3939 0:2e953bbaf3a5 454 uint8_t status;
okini3939 0:2e953bbaf3a5 455
okini3939 0:2e953bbaf3a5 456 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 457 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 458
okini3939 0:2e953bbaf3a5 459 /* Send opcode */
okini3939 0:2e953bbaf3a5 460 spi_transfer((bufferNum == 1) ? AT45DB161D_COMPARE_PAGE_TO_BUFFER_1 :
okini3939 0:2e953bbaf3a5 461 AT45DB161D_COMPARE_PAGE_TO_BUFFER_2);
okini3939 0:2e953bbaf3a5 462
okini3939 0:2e953bbaf3a5 463 /* Page address */
okini3939 0:2e953bbaf3a5 464 spi_transfer((uint8_t)(page >> 6));
okini3939 0:2e953bbaf3a5 465 spi_transfer((uint8_t)(page << 2));
okini3939 0:2e953bbaf3a5 466 spi_transfer(0x00);
okini3939 0:2e953bbaf3a5 467
okini3939 0:2e953bbaf3a5 468 DF_CS_inactive; /* Start comparaison */
okini3939 0:2e953bbaf3a5 469 DF_CS_active;
okini3939 0:2e953bbaf3a5 470
okini3939 0:2e953bbaf3a5 471 /* Wait for the end of the comparaison and get the result */
okini3939 0:2e953bbaf3a5 472 while(!((status = ReadStatusRegister()) & READY_BUSY))
okini3939 0:2e953bbaf3a5 473 {}
okini3939 0:2e953bbaf3a5 474
okini3939 0:2e953bbaf3a5 475 // return ((status & COMPARE) == COMPARE);
okini3939 0:2e953bbaf3a5 476 return ((status & COMPARE) ? 0 : 1);
okini3939 0:2e953bbaf3a5 477 }
okini3939 0:2e953bbaf3a5 478
okini3939 0:2e953bbaf3a5 479 /**
okini3939 0:2e953bbaf3a5 480 * Put the device into the lowest power consumption mode.
okini3939 0:2e953bbaf3a5 481 * Once the device has entered the Deep Power-down mode, all
okini3939 0:2e953bbaf3a5 482 * instructions are ignored except the Resume from Deep
okini3939 0:2e953bbaf3a5 483 * Power-down command.
okini3939 0:2e953bbaf3a5 484 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 485 **/
okini3939 0:2e953bbaf3a5 486 void ATD45DB161D::DeepPowerDown()
okini3939 0:2e953bbaf3a5 487 {
okini3939 0:2e953bbaf3a5 488 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 489 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 490
okini3939 0:2e953bbaf3a5 491 /* Send opcode */
okini3939 0:2e953bbaf3a5 492 spi_transfer(AT45DB161D_DEEP_POWER_DOWN);
okini3939 0:2e953bbaf3a5 493
okini3939 0:2e953bbaf3a5 494 /* Enter Deep Power-Down mode */
okini3939 0:2e953bbaf3a5 495 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 496
okini3939 0:2e953bbaf3a5 497 /* Safety delay */
okini3939 0:2e953bbaf3a5 498 // delay(100);
okini3939 0:2e953bbaf3a5 499 wait_ms(100);
okini3939 0:2e953bbaf3a5 500 }
okini3939 0:2e953bbaf3a5 501
okini3939 0:2e953bbaf3a5 502 /**
okini3939 0:2e953bbaf3a5 503 * Takes the device out of Deep Power-down mode.
okini3939 0:2e953bbaf3a5 504 **/
okini3939 0:2e953bbaf3a5 505 void ATD45DB161D::ResumeFromDeepPowerDown()
okini3939 0:2e953bbaf3a5 506 {
okini3939 0:2e953bbaf3a5 507 DF_CS_inactive; /* Make sure to toggle CS signal in order */
okini3939 0:2e953bbaf3a5 508 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 509
okini3939 0:2e953bbaf3a5 510 /* Send opcode */
okini3939 0:2e953bbaf3a5 511 spi_transfer(AT45DB161D_RESUME_FROM_DEEP_POWER_DOWN);
okini3939 0:2e953bbaf3a5 512
okini3939 0:2e953bbaf3a5 513 /* Resume device */
okini3939 0:2e953bbaf3a5 514 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 515
okini3939 0:2e953bbaf3a5 516 /* The CS pin must stay high during t_RDPD microseconds before the device
okini3939 0:2e953bbaf3a5 517 * can receive any commands.
okini3939 0:2e953bbaf3a5 518 * On the at45db161D t_RDPD = 35 microseconds. But we will wait 100
okini3939 0:2e953bbaf3a5 519 * (just to be sure). */
okini3939 0:2e953bbaf3a5 520 // delay(100);
okini3939 0:2e953bbaf3a5 521 wait_ms(100);
okini3939 0:2e953bbaf3a5 522 }
okini3939 0:2e953bbaf3a5 523
okini3939 0:2e953bbaf3a5 524 /** **/