Kazuki Yamamoto / AkiSpiLcd

Basic library for SHARP LCD LS027B4DH01/LS027B7DH01

Dependents:   AkiSpiLcd_demo AkiSpiLcd_demo2 LCDRAM AkiSpiLcd_example

AkiSpiLcd.h@10:eed99ef09e63, 2014-09-15 (annotated)

Committer:
k4zuki
Date:
Mon Sep 15 14:12:33 2014 +0000
Revision:
10:eed99ef09e63
Parent:
9:33d5888d1fb9
Child:
11:16647ecd67ce
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
k4zuki 1:57de84d2025c 1 /** this is for SHARP LCD LS027B4DH01
k4zuki 2:01979b296ab5 2 * by Kazuki Yamamoto, or _K4ZUKI_
k4zuki 0:b3c8fdd01601 3 */
k4zuki 0:b3c8fdd01601 4
k4zuki 0:b3c8fdd01601 5 #ifndef __AKISPILCD_H__
k4zuki 0:b3c8fdd01601 6 #define __AKISPILCD_H
k4zuki 0:b3c8fdd01601 7
k4zuki 5:7061ce47a359 8 #include "mbed.h"
k4zuki 9:33d5888d1fb9 9 //#include "Ser23K256.h"
k4zuki 2:01979b296ab5 10 /** AkiSpiLcd
k4zuki 2:01979b296ab5 11 * mbed library for SHARP LCD LS027B4DH01
k4zuki 2:01979b296ab5 12 *
k4zuki 2:01979b296ab5 13 * Example:
k4zuki 2:01979b296ab5 14 * @code
k4zuki 2:01979b296ab5 15 * #include "mbed.h"
k4zuki 2:01979b296ab5 16 * #include "AkiSpiLcd.h"
k4zuki 2:01979b296ab5 17 *
k4zuki 2:01979b296ab5 18 * AkiSpiLcd LCD(MOSI_, SCK_, D2, D5);
k4zuki 2:01979b296ab5 19 * extern const uint8_t hogepic[];
k4zuki 2:01979b296ab5 20 * int main()
k4zuki 2:01979b296ab5 21 * {
k4zuki 10:eed99ef09e63 22 *
k4zuki 2:01979b296ab5 23 * wait_ms(1);
k4zuki 2:01979b296ab5 24 * LCD.cls();
k4zuki 2:01979b296ab5 25 * LCD.updateSingle(10,(uint8_t*)(hogepic+2000));
k4zuki 2:01979b296ab5 26 * LCD.updateMulti(100,(240-100),(uint8_t*)(hogepic));
k4zuki 2:01979b296ab5 27 *
k4zuki 2:01979b296ab5 28 * while(1) {
k4zuki 2:01979b296ab5 29 * for(int i=0; i<240; i++) {
k4zuki 2:01979b296ab5 30 * LCD.updateMulti(i,(240-i),(uint8_t*)(hogepic));
k4zuki 2:01979b296ab5 31 * LCD.updateMulti(0,(i),(uint8_t*)(hogepic+50*(240-i)));
k4zuki 2:01979b296ab5 32 * }
k4zuki 2:01979b296ab5 33 * }
k4zuki 2:01979b296ab5 34 * }
k4zuki 2:01979b296ab5 35 * @endcode
k4zuki 2:01979b296ab5 36 */
k4zuki 10:eed99ef09e63 37
k4zuki 10:eed99ef09e63 38 //#define RAMLINE_BASE 0x6000
k4zuki 10:eed99ef09e63 39 //#define RAMMODE_BASE 0x6100
k4zuki 10:eed99ef09e63 40 //#define SCREEN0_BASE 0x0000
k4zuki 10:eed99ef09e63 41 //#define SCREEN1_BASE 0x3000
k4zuki 9:33d5888d1fb9 42 #define SCREEN0 0
k4zuki 9:33d5888d1fb9 43 #define SCREEN1 1
k4zuki 10:eed99ef09e63 44
k4zuki 0:b3c8fdd01601 45 class AkiSpiLcd
k4zuki 0:b3c8fdd01601 46 {
k4zuki 0:b3c8fdd01601 47 public:
k4zuki 10:eed99ef09e63 48 //! base address list for 23K256
k4zuki 10:eed99ef09e63 49 enum BASE_ADDR {
k4zuki 10:eed99ef09e63 50 RAMLINE_BASE = 0x6000,
k4zuki 10:eed99ef09e63 51 RAMMODE_BASE = 0x6100,
k4zuki 10:eed99ef09e63 52 SCREEN0_BASE = 0x0000,
k4zuki 10:eed99ef09e63 53 SCREEN1_BASE = 0x3000
k4zuki 10:eed99ef09e63 54 };
k4zuki 10:eed99ef09e63 55
k4zuki 10:eed99ef09e63 56 //! mode codes for 23K256
k4zuki 10:eed99ef09e63 57 enum MODE {
k4zuki 10:eed99ef09e63 58 BYTE_MODE = 0x00,
k4zuki 10:eed99ef09e63 59 SEQUENTIAL_MODE = 0x40
k4zuki 10:eed99ef09e63 60 };
k4zuki 10:eed99ef09e63 61
k4zuki 10:eed99ef09e63 62 //! command codes for 23K256
k4zuki 10:eed99ef09e63 63 enum COMMAND {
k4zuki 10:eed99ef09e63 64 READ = 0x03,
k4zuki 10:eed99ef09e63 65 WRITE = 0x02,
k4zuki 10:eed99ef09e63 66 READ_STATUS = 0x05, // called RDSR in datasheet
k4zuki 10:eed99ef09e63 67 WRITE_STATUS = 0x01 // called WRSR in datasheet
k4zuki 10:eed99ef09e63 68 };
k4zuki 10:eed99ef09e63 69
k4zuki 0:b3c8fdd01601 70 /** Constructor
k4zuki 0:b3c8fdd01601 71 * @param mosi SPI data input
k4zuki 4:844693a617dc 72 * @param mosi SPI data output
k4zuki 0:b3c8fdd01601 73 * @param sck SPI clock input
k4zuki 0:b3c8fdd01601 74 * @param cs HIGH-active chip enable input
k4zuki 0:b3c8fdd01601 75 * @param disp HIGH-active display enable input
k4zuki 0:b3c8fdd01601 76 */
k4zuki 4:844693a617dc 77 AkiSpiLcd(PinName mosi, PinName miso, PinName sck, PinName csl, PinName csr);
k4zuki 0:b3c8fdd01601 78
k4zuki 0:b3c8fdd01601 79 /** Clear screen
k4zuki 0:b3c8fdd01601 80 */
k4zuki 0:b3c8fdd01601 81 void cls();
k4zuki 0:b3c8fdd01601 82
k4zuki 0:b3c8fdd01601 83 /** Writes single line(400 bits = 50 bytes)
k4zuki 0:b3c8fdd01601 84 * @param line line number(1-240)
k4zuki 0:b3c8fdd01601 85 * @param *data pointer to data
k4zuki 0:b3c8fdd01601 86 */
k4zuki 3:f835b8daf9a0 87 void directUpdateSingle(int line, uint8_t* data);
k4zuki 0:b3c8fdd01601 88
k4zuki 0:b3c8fdd01601 89 /** Writes multi lines(400 x N bits = 50 x N bytes)
k4zuki 0:b3c8fdd01601 90 * @param line line number(1-240)
k4zuki 0:b3c8fdd01601 91 * @param length number of line to write
k4zuki 0:b3c8fdd01601 92 * @param *data pointer to data
k4zuki 0:b3c8fdd01601 93 */
k4zuki 4:844693a617dc 94 void directUpdateMulti(int startline, int length, uint8_t* data);
k4zuki 0:b3c8fdd01601 95
k4zuki 0:b3c8fdd01601 96 /** Inverting internal COM signal
k4zuki 0:b3c8fdd01601 97 */
k4zuki 0:b3c8fdd01601 98 void cominvert();
k4zuki 10:eed99ef09e63 99
k4zuki 4:844693a617dc 100 /** Reads single line (400 bits = 50 bytes) from a screen
k4zuki 4:844693a617dc 101 */
k4zuki 4:844693a617dc 102 void ramReadSingle(int line, uint8_t* buffer, int screen);
k4zuki 4:844693a617dc 103
k4zuki 4:844693a617dc 104 /** Reads multi lines(400 x N bits = 50 x N bytes) from a screen
k4zuki 4:844693a617dc 105 */
k4zuki 4:844693a617dc 106 void ramReadMulti(int startline, int length, uint8_t* buffer, int screen);
k4zuki 10:eed99ef09e63 107
k4zuki 4:844693a617dc 108 /** Writes single line (400 bits = 50 bytes) into a screen
k4zuki 3:f835b8daf9a0 109 */
k4zuki 4:844693a617dc 110 void ramWriteSingle(int line, uint8_t* data, int screen);
k4zuki 4:844693a617dc 111
k4zuki 4:844693a617dc 112 /** Writes multi lines(400 x N bits = 50 x N bytes) into a screen
k4zuki 4:844693a617dc 113 */
k4zuki 4:844693a617dc 114 void ramWriteMulti(int startline, int length, uint8_t* data, int screen);
k4zuki 10:eed99ef09e63 115
k4zuki 4:844693a617dc 116 /** copies whole data in screen into LCD
k4zuki 4:844693a617dc 117 */
k4zuki 7:0c85f23a6568 118 void ram2lcd(int startline, int length, int screen);
k4zuki 0:b3c8fdd01601 119
k4zuki 3:f835b8daf9a0 120 // /** Enables/disables display. internal memory will not flushed
k4zuki 3:f835b8daf9a0 121 // * @param disp true = display is on / false = display is off
k4zuki 3:f835b8daf9a0 122 // */
k4zuki 3:f835b8daf9a0 123 // void dispOn(bool disp);
k4zuki 2:01979b296ab5 124
k4zuki 10:eed99ef09e63 125 /** read a byte from SRAM
k4zuki 10:eed99ef09e63 126 * @param address The address to read from
k4zuki 10:eed99ef09e63 127 * @return the uint8_tacter at that address
k4zuki 10:eed99ef09e63 128 */
k4zuki 9:33d5888d1fb9 129 uint8_t ram_read(int address);
k4zuki 10:eed99ef09e63 130 /** read multiple bytes from SRAM into a buffer
k4zuki 10:eed99ef09e63 131 * @param address The SRAM address to read from
k4zuki 10:eed99ef09e63 132 * @param buffer The buffer to read into (must be big enough!)
k4zuki 10:eed99ef09e63 133 * @param count The number of bytes to read
k4zuki 10:eed99ef09e63 134 */
k4zuki 9:33d5888d1fb9 135 void ram_read(int address, uint8_t * buffer, int count);
k4zuki 10:eed99ef09e63 136 /** write a byte to SRAM
k4zuki 10:eed99ef09e63 137 * @param address The address SRAM to write to
k4zuki 10:eed99ef09e63 138 * @param byte The byte to write there
k4zuki 10:eed99ef09e63 139 */
k4zuki 9:33d5888d1fb9 140 void ram_write(int address, uint8_t byte);
k4zuki 9:33d5888d1fb9 141 /** write multiple bytes to SRAM from a buffer
k4zuki 10:eed99ef09e63 142 * @param address The SRAM address write to
k4zuki 10:eed99ef09e63 143 * @param buffer The buffer to write from
k4zuki 10:eed99ef09e63 144 * @param count The number of bytes to write
k4zuki 10:eed99ef09e63 145 */
k4zuki 9:33d5888d1fb9 146 void ram_write(int address, uint8_t * buffer, int count);
k4zuki 9:33d5888d1fb9 147
k4zuki 0:b3c8fdd01601 148 private:
k4zuki 9:33d5888d1fb9 149 // Ser23K256 _ram;
k4zuki 0:b3c8fdd01601 150 int comflag;
k4zuki 0:b3c8fdd01601 151 int modeflag;
k4zuki 0:b3c8fdd01601 152 int clearflag;
k4zuki 0:b3c8fdd01601 153 SPI _spi;
k4zuki 3:f835b8daf9a0 154 DigitalOut _csl;
k4zuki 3:f835b8daf9a0 155 DigitalOut _csr;
k4zuki 9:33d5888d1fb9 156
k4zuki 9:33d5888d1fb9 157 uint8_t ram_readStatus();
k4zuki 9:33d5888d1fb9 158 void ram_writeStatus(uint8_t status);
k4zuki 9:33d5888d1fb9 159 void ram_prepareCommand(uint8_t command, int address);
k4zuki 9:33d5888d1fb9 160 void ram_select();
k4zuki 9:33d5888d1fb9 161 void ram_deselect();
k4zuki 0:b3c8fdd01601 162 };
k4zuki 0:b3c8fdd01601 163 #endif