Kazuki Yamamoto / AkiSpiLcd

Basic library for SHARP LCD LS027B4DH01/LS027B7DH01

Dependents:   AkiSpiLcd_demo AkiSpiLcd_demo2 LCDRAM AkiSpiLcd_example

AkiSpiLcd.h@11:16647ecd67ce, 2014-09-26 (annotated)

Committer:
k4zuki
Date:
Fri Sep 26 13:48:17 2014 +0000
Revision:
11:16647ecd67ce
Parent:
10:eed99ef09e63
Child:
12:30b31d87a30e
ram2lcd fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
k4zuki 1:57de84d2025c 1 /** this is for SHARP LCD LS027B4DH01
k4zuki 2:01979b296ab5 2 * by Kazuki Yamamoto, or _K4ZUKI_
k4zuki 0:b3c8fdd01601 3 */
k4zuki 0:b3c8fdd01601 4
k4zuki 0:b3c8fdd01601 5 #ifndef __AKISPILCD_H__
k4zuki 0:b3c8fdd01601 6 #define __AKISPILCD_H
k4zuki 0:b3c8fdd01601 7
k4zuki 5:7061ce47a359 8 #include "mbed.h"
k4zuki 9:33d5888d1fb9 9 //#include "Ser23K256.h"
k4zuki 2:01979b296ab5 10 /** AkiSpiLcd
k4zuki 2:01979b296ab5 11 * mbed library for SHARP LCD LS027B4DH01
k4zuki 2:01979b296ab5 12 *
k4zuki 2:01979b296ab5 13 * Example:
k4zuki 2:01979b296ab5 14 * @code
k4zuki 2:01979b296ab5 15 * #include "mbed.h"
k4zuki 2:01979b296ab5 16 * #include "AkiSpiLcd.h"
k4zuki 2:01979b296ab5 17 *
k4zuki 2:01979b296ab5 18 * AkiSpiLcd LCD(MOSI_, SCK_, D2, D5);
k4zuki 2:01979b296ab5 19 * extern const uint8_t hogepic[];
k4zuki 2:01979b296ab5 20 * int main()
k4zuki 2:01979b296ab5 21 * {
k4zuki 10:eed99ef09e63 22 *
k4zuki 2:01979b296ab5 23 * wait_ms(1);
k4zuki 2:01979b296ab5 24 * LCD.cls();
k4zuki 2:01979b296ab5 25 * LCD.updateSingle(10,(uint8_t*)(hogepic+2000));
k4zuki 2:01979b296ab5 26 * LCD.updateMulti(100,(240-100),(uint8_t*)(hogepic));
k4zuki 2:01979b296ab5 27 *
k4zuki 2:01979b296ab5 28 * while(1) {
k4zuki 2:01979b296ab5 29 * for(int i=0; i<240; i++) {
k4zuki 2:01979b296ab5 30 * LCD.updateMulti(i,(240-i),(uint8_t*)(hogepic));
k4zuki 2:01979b296ab5 31 * LCD.updateMulti(0,(i),(uint8_t*)(hogepic+50*(240-i)));
k4zuki 2:01979b296ab5 32 * }
k4zuki 2:01979b296ab5 33 * }
k4zuki 2:01979b296ab5 34 * }
k4zuki 2:01979b296ab5 35 * @endcode
k4zuki 2:01979b296ab5 36 */
k4zuki 10:eed99ef09e63 37
k4zuki 10:eed99ef09e63 38 //#define RAMLINE_BASE 0x6000
k4zuki 10:eed99ef09e63 39 //#define RAMMODE_BASE 0x6100
k4zuki 10:eed99ef09e63 40 //#define SCREEN0_BASE 0x0000
k4zuki 10:eed99ef09e63 41 //#define SCREEN1_BASE 0x3000
k4zuki 9:33d5888d1fb9 42 #define SCREEN0 0
k4zuki 9:33d5888d1fb9 43 #define SCREEN1 1
k4zuki 10:eed99ef09e63 44
k4zuki 11:16647ecd67ce 45 const uint8_t lcd_line[240]={0x80,0x40,0xC0,0x20,0xA0,0x60,0xE0,0x10,0x90,0x50,0xD0,0x30,0xB0,0x70,0xF0,0x08,
k4zuki 11:16647ecd67ce 46 0x88,0x48,0xC8,0x28,0xA8,0x68,0xE8,0x18,0x98,0x58,0xD8,0x38,0xB8,0x78,0xF8,0x04,
k4zuki 11:16647ecd67ce 47 0x84,0x44,0xC4,0x24,0xA4,0x64,0xE4,0x14,0x94,0x54,0xD4,0x34,0xB4,0x74,0xF4,0x0C,
k4zuki 11:16647ecd67ce 48 0x8C,0x4C,0xCC,0x2C,0xAC,0x6C,0xEC,0x1C,0x9C,0x5C,0xDC,0x3C,0xBC,0x7C,0xFC,0x02,
k4zuki 11:16647ecd67ce 49 0x82,0x42,0xC2,0x22,0xA2,0x62,0xE2,0x12,0x92,0x52,0xD2,0x32,0xB2,0x72,0xF2,0x0A,
k4zuki 11:16647ecd67ce 50 0x8A,0x4A,0xCA,0x2A,0xAA,0x6A,0xEA,0x1A,0x9A,0x5A,0xDA,0x3A,0xBA,0x7A,0xFA,0x06,
k4zuki 11:16647ecd67ce 51 0x86,0x46,0xC6,0x26,0xA6,0x66,0xE6,0x16,0x96,0x56,0xD6,0x36,0xB6,0x76,0xF6,0x0E,
k4zuki 11:16647ecd67ce 52 0x8E,0x4E,0xCE,0x2E,0xAE,0x6E,0xEE,0x1E,0x9E,0x5E,0xDE,0x3E,0xBE,0x7E,0xFE,0x01,
k4zuki 11:16647ecd67ce 53 0x81,0x41,0xC1,0x21,0xA1,0x61,0xE1,0x11,0x91,0x51,0xD1,0x31,0xB1,0x71,0xF1,0x09,
k4zuki 11:16647ecd67ce 54 0x89,0x49,0xC9,0x29,0xA9,0x69,0xE9,0x19,0x99,0x59,0xD9,0x39,0xB9,0x79,0xF9,0x05,
k4zuki 11:16647ecd67ce 55 0x85,0x45,0xC5,0x25,0xA5,0x65,0xE5,0x15,0x95,0x55,0xD5,0x35,0xB5,0x75,0xF5,0x0D,
k4zuki 11:16647ecd67ce 56 0x8D,0x4D,0xCD,0x2D,0xAD,0x6D,0xED,0x1D,0x9D,0x5D,0xDD,0x3D,0xBD,0x7D,0xFD,0x03,
k4zuki 11:16647ecd67ce 57 0x83,0x43,0xC3,0x23,0xA3,0x63,0xE3,0x13,0x93,0x53,0xD3,0x33,0xB3,0x73,0xF3,0x0B,
k4zuki 11:16647ecd67ce 58 0x8B,0x4B,0xCB,0x2B,0xAB,0x6B,0xEB,0x1B,0x9B,0x5B,0xDB,0x3B,0xBB,0x7B,0xFB,0x07,
k4zuki 11:16647ecd67ce 59 0x87,0x47,0xC7,0x27,0xA7,0x67,0xE7,0x17,0x97,0x57,0xD7,0x37,0xB7,0x77,0xF7,0x0F,
k4zuki 11:16647ecd67ce 60 };
k4zuki 11:16647ecd67ce 61
k4zuki 0:b3c8fdd01601 62 class AkiSpiLcd
k4zuki 0:b3c8fdd01601 63 {
k4zuki 0:b3c8fdd01601 64 public:
k4zuki 10:eed99ef09e63 65 //! base address list for 23K256
k4zuki 10:eed99ef09e63 66 enum BASE_ADDR {
k4zuki 10:eed99ef09e63 67 RAMLINE_BASE = 0x6000,
k4zuki 10:eed99ef09e63 68 RAMMODE_BASE = 0x6100,
k4zuki 10:eed99ef09e63 69 SCREEN0_BASE = 0x0000,
k4zuki 10:eed99ef09e63 70 SCREEN1_BASE = 0x3000
k4zuki 10:eed99ef09e63 71 };
k4zuki 10:eed99ef09e63 72
k4zuki 10:eed99ef09e63 73 //! mode codes for 23K256
k4zuki 10:eed99ef09e63 74 enum MODE {
k4zuki 10:eed99ef09e63 75 BYTE_MODE = 0x00,
k4zuki 10:eed99ef09e63 76 SEQUENTIAL_MODE = 0x40
k4zuki 10:eed99ef09e63 77 };
k4zuki 10:eed99ef09e63 78
k4zuki 10:eed99ef09e63 79 //! command codes for 23K256
k4zuki 10:eed99ef09e63 80 enum COMMAND {
k4zuki 10:eed99ef09e63 81 READ = 0x03,
k4zuki 10:eed99ef09e63 82 WRITE = 0x02,
k4zuki 10:eed99ef09e63 83 READ_STATUS = 0x05, // called RDSR in datasheet
k4zuki 10:eed99ef09e63 84 WRITE_STATUS = 0x01 // called WRSR in datasheet
k4zuki 10:eed99ef09e63 85 };
k4zuki 10:eed99ef09e63 86
k4zuki 0:b3c8fdd01601 87 /** Constructor
k4zuki 0:b3c8fdd01601 88 * @param mosi SPI data input
k4zuki 4:844693a617dc 89 * @param mosi SPI data output
k4zuki 0:b3c8fdd01601 90 * @param sck SPI clock input
k4zuki 0:b3c8fdd01601 91 * @param cs HIGH-active chip enable input
k4zuki 0:b3c8fdd01601 92 * @param disp HIGH-active display enable input
k4zuki 0:b3c8fdd01601 93 */
k4zuki 4:844693a617dc 94 AkiSpiLcd(PinName mosi, PinName miso, PinName sck, PinName csl, PinName csr);
k4zuki 0:b3c8fdd01601 95
k4zuki 0:b3c8fdd01601 96 /** Clear screen
k4zuki 0:b3c8fdd01601 97 */
k4zuki 0:b3c8fdd01601 98 void cls();
k4zuki 0:b3c8fdd01601 99
k4zuki 0:b3c8fdd01601 100 /** Writes single line(400 bits = 50 bytes)
k4zuki 0:b3c8fdd01601 101 * @param line line number(1-240)
k4zuki 0:b3c8fdd01601 102 * @param *data pointer to data
k4zuki 0:b3c8fdd01601 103 */
k4zuki 3:f835b8daf9a0 104 void directUpdateSingle(int line, uint8_t* data);
k4zuki 0:b3c8fdd01601 105
k4zuki 0:b3c8fdd01601 106 /** Writes multi lines(400 x N bits = 50 x N bytes)
k4zuki 0:b3c8fdd01601 107 * @param line line number(1-240)
k4zuki 0:b3c8fdd01601 108 * @param length number of line to write
k4zuki 0:b3c8fdd01601 109 * @param *data pointer to data
k4zuki 0:b3c8fdd01601 110 */
k4zuki 4:844693a617dc 111 void directUpdateMulti(int startline, int length, uint8_t* data);
k4zuki 0:b3c8fdd01601 112
k4zuki 0:b3c8fdd01601 113 /** Inverting internal COM signal
k4zuki 0:b3c8fdd01601 114 */
k4zuki 0:b3c8fdd01601 115 void cominvert();
k4zuki 10:eed99ef09e63 116
k4zuki 4:844693a617dc 117 /** Reads single line (400 bits = 50 bytes) from a screen
k4zuki 4:844693a617dc 118 */
k4zuki 4:844693a617dc 119 void ramReadSingle(int line, uint8_t* buffer, int screen);
k4zuki 4:844693a617dc 120
k4zuki 4:844693a617dc 121 /** Reads multi lines(400 x N bits = 50 x N bytes) from a screen
k4zuki 4:844693a617dc 122 */
k4zuki 4:844693a617dc 123 void ramReadMulti(int startline, int length, uint8_t* buffer, int screen);
k4zuki 10:eed99ef09e63 124
k4zuki 4:844693a617dc 125 /** Writes single line (400 bits = 50 bytes) into a screen
k4zuki 3:f835b8daf9a0 126 */
k4zuki 4:844693a617dc 127 void ramWriteSingle(int line, uint8_t* data, int screen);
k4zuki 4:844693a617dc 128
k4zuki 4:844693a617dc 129 /** Writes multi lines(400 x N bits = 50 x N bytes) into a screen
k4zuki 4:844693a617dc 130 */
k4zuki 4:844693a617dc 131 void ramWriteMulti(int startline, int length, uint8_t* data, int screen);
k4zuki 10:eed99ef09e63 132
k4zuki 4:844693a617dc 133 /** copies whole data in screen into LCD
k4zuki 4:844693a617dc 134 */
k4zuki 7:0c85f23a6568 135 void ram2lcd(int startline, int length, int screen);
k4zuki 0:b3c8fdd01601 136
k4zuki 3:f835b8daf9a0 137 // /** Enables/disables display. internal memory will not flushed
k4zuki 3:f835b8daf9a0 138 // * @param disp true = display is on / false = display is off
k4zuki 3:f835b8daf9a0 139 // */
k4zuki 3:f835b8daf9a0 140 // void dispOn(bool disp);
k4zuki 2:01979b296ab5 141
k4zuki 10:eed99ef09e63 142 /** read a byte from SRAM
k4zuki 10:eed99ef09e63 143 * @param address The address to read from
k4zuki 10:eed99ef09e63 144 * @return the uint8_tacter at that address
k4zuki 10:eed99ef09e63 145 */
k4zuki 9:33d5888d1fb9 146 uint8_t ram_read(int address);
k4zuki 10:eed99ef09e63 147 /** read multiple bytes from SRAM into a buffer
k4zuki 10:eed99ef09e63 148 * @param address The SRAM address to read from
k4zuki 10:eed99ef09e63 149 * @param buffer The buffer to read into (must be big enough!)
k4zuki 10:eed99ef09e63 150 * @param count The number of bytes to read
k4zuki 10:eed99ef09e63 151 */
k4zuki 9:33d5888d1fb9 152 void ram_read(int address, uint8_t * buffer, int count);
k4zuki 10:eed99ef09e63 153 /** write a byte to SRAM
k4zuki 10:eed99ef09e63 154 * @param address The address SRAM to write to
k4zuki 10:eed99ef09e63 155 * @param byte The byte to write there
k4zuki 10:eed99ef09e63 156 */
k4zuki 9:33d5888d1fb9 157 void ram_write(int address, uint8_t byte);
k4zuki 9:33d5888d1fb9 158 /** write multiple bytes to SRAM from a buffer
k4zuki 10:eed99ef09e63 159 * @param address The SRAM address write to
k4zuki 10:eed99ef09e63 160 * @param buffer The buffer to write from
k4zuki 10:eed99ef09e63 161 * @param count The number of bytes to write
k4zuki 10:eed99ef09e63 162 */
k4zuki 9:33d5888d1fb9 163 void ram_write(int address, uint8_t * buffer, int count);
k4zuki 9:33d5888d1fb9 164
k4zuki 0:b3c8fdd01601 165 private:
k4zuki 9:33d5888d1fb9 166 // Ser23K256 _ram;
k4zuki 0:b3c8fdd01601 167 int comflag;
k4zuki 0:b3c8fdd01601 168 int modeflag;
k4zuki 0:b3c8fdd01601 169 int clearflag;
k4zuki 0:b3c8fdd01601 170 SPI _spi;
k4zuki 3:f835b8daf9a0 171 DigitalOut _csl;
k4zuki 3:f835b8daf9a0 172 DigitalOut _csr;
k4zuki 9:33d5888d1fb9 173
k4zuki 9:33d5888d1fb9 174 uint8_t ram_readStatus();
k4zuki 9:33d5888d1fb9 175 void ram_writeStatus(uint8_t status);
k4zuki 9:33d5888d1fb9 176 void ram_prepareCommand(uint8_t command, int address);
k4zuki 9:33d5888d1fb9 177 void ram_select();
k4zuki 9:33d5888d1fb9 178 void ram_deselect();
k4zuki 0:b3c8fdd01601 179 };
k4zuki 0:b3c8fdd01601 180 #endif