Juan Salazar / sofi7

test

Dependents:   robotic_fish_6

TARGET_LPC1768/system_LPC17xx.h@0:c792b17d9f78, 2021-12-03 (annotated)

Committer:
juansal12
Date:
Fri Dec 03 23:00:34 2021 +0000
Revision:
0:c792b17d9f78
uploaded sofi code ;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
juansal12 0:c792b17d9f78 1 /******************************************************************************
juansal12 0:c792b17d9f78 2 * @file: system_LPC17xx.h
juansal12 0:c792b17d9f78 3 * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
juansal12 0:c792b17d9f78 4 * for the NXP LPC17xx Device Series
juansal12 0:c792b17d9f78 5 * @version: V1.02
juansal12 0:c792b17d9f78 6 * @date: 27. July 2009
juansal12 0:c792b17d9f78 7 *----------------------------------------------------------------------------
juansal12 0:c792b17d9f78 8 *
juansal12 0:c792b17d9f78 9 * Copyright (C) 2009 ARM Limited. All rights reserved.
juansal12 0:c792b17d9f78 10 *
juansal12 0:c792b17d9f78 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M3
juansal12 0:c792b17d9f78 12 * processor based microcontrollers. This file can be freely distributed
juansal12 0:c792b17d9f78 13 * within development tools that are supporting such ARM based processors.
juansal12 0:c792b17d9f78 14 *
juansal12 0:c792b17d9f78 15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
juansal12 0:c792b17d9f78 16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
juansal12 0:c792b17d9f78 17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
juansal12 0:c792b17d9f78 18 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
juansal12 0:c792b17d9f78 19 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
juansal12 0:c792b17d9f78 20 *
juansal12 0:c792b17d9f78 21 ******************************************************************************/
juansal12 0:c792b17d9f78 22
juansal12 0:c792b17d9f78 23
juansal12 0:c792b17d9f78 24 #ifndef __SYSTEM_LPC17xx_H
juansal12 0:c792b17d9f78 25 #define __SYSTEM_LPC17xx_H
juansal12 0:c792b17d9f78 26
juansal12 0:c792b17d9f78 27 #ifdef __cplusplus
juansal12 0:c792b17d9f78 28 extern "C" {
juansal12 0:c792b17d9f78 29 #endif
juansal12 0:c792b17d9f78 30
juansal12 0:c792b17d9f78 31 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
juansal12 0:c792b17d9f78 32
juansal12 0:c792b17d9f78 33
juansal12 0:c792b17d9f78 34 /**
juansal12 0:c792b17d9f78 35 * Initialize the system
juansal12 0:c792b17d9f78 36 *
juansal12 0:c792b17d9f78 37 * @param none
juansal12 0:c792b17d9f78 38 * @return none
juansal12 0:c792b17d9f78 39 *
juansal12 0:c792b17d9f78 40 * @brief Setup the microcontroller system.
juansal12 0:c792b17d9f78 41 * Initialize the System and update the SystemCoreClock variable.
juansal12 0:c792b17d9f78 42 */
juansal12 0:c792b17d9f78 43 extern void SystemInit (void);
juansal12 0:c792b17d9f78 44
juansal12 0:c792b17d9f78 45 /**
juansal12 0:c792b17d9f78 46 * Update SystemCoreClock variable
juansal12 0:c792b17d9f78 47 *
juansal12 0:c792b17d9f78 48 * @param none
juansal12 0:c792b17d9f78 49 * @return none
juansal12 0:c792b17d9f78 50 *
juansal12 0:c792b17d9f78 51 * @brief Updates the SystemCoreClock with current core Clock
juansal12 0:c792b17d9f78 52 * retrieved from cpu registers.
juansal12 0:c792b17d9f78 53 */
juansal12 0:c792b17d9f78 54 extern void SystemCoreClockUpdate (void);
juansal12 0:c792b17d9f78 55
juansal12 0:c792b17d9f78 56 #ifdef __cplusplus
juansal12 0:c792b17d9f78 57 }
juansal12 0:c792b17d9f78 58 #endif
juansal12 0:c792b17d9f78 59
juansal12 0:c792b17d9f78 60 #endif /* __SYSTEM_LPC17xx_H */