Juan Salazar / sofi7

test

Dependents:   robotic_fish_6

TARGET_LPC1768/core_cmInstr.h@0:c792b17d9f78, 2021-12-03 (annotated)

Committer:
juansal12
Date:
Fri Dec 03 23:00:34 2021 +0000
Revision:
0:c792b17d9f78
uploaded sofi code ;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
juansal12 0:c792b17d9f78 1 /**************************************************************************//**
juansal12 0:c792b17d9f78 2 * @file core_cmInstr.h
juansal12 0:c792b17d9f78 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
juansal12 0:c792b17d9f78 4 * @version V3.20
juansal12 0:c792b17d9f78 5 * @date 05. March 2013
juansal12 0:c792b17d9f78 6 *
juansal12 0:c792b17d9f78 7 * @note
juansal12 0:c792b17d9f78 8 *
juansal12 0:c792b17d9f78 9 ******************************************************************************/
juansal12 0:c792b17d9f78 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
juansal12 0:c792b17d9f78 11
juansal12 0:c792b17d9f78 12 All rights reserved.
juansal12 0:c792b17d9f78 13 Redistribution and use in source and binary forms, with or without
juansal12 0:c792b17d9f78 14 modification, are permitted provided that the following conditions are met:
juansal12 0:c792b17d9f78 15 - Redistributions of source code must retain the above copyright
juansal12 0:c792b17d9f78 16 notice, this list of conditions and the following disclaimer.
juansal12 0:c792b17d9f78 17 - Redistributions in binary form must reproduce the above copyright
juansal12 0:c792b17d9f78 18 notice, this list of conditions and the following disclaimer in the
juansal12 0:c792b17d9f78 19 documentation and/or other materials provided with the distribution.
juansal12 0:c792b17d9f78 20 - Neither the name of ARM nor the names of its contributors may be used
juansal12 0:c792b17d9f78 21 to endorse or promote products derived from this software without
juansal12 0:c792b17d9f78 22 specific prior written permission.
juansal12 0:c792b17d9f78 23 *
juansal12 0:c792b17d9f78 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
juansal12 0:c792b17d9f78 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
juansal12 0:c792b17d9f78 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
juansal12 0:c792b17d9f78 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
juansal12 0:c792b17d9f78 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
juansal12 0:c792b17d9f78 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
juansal12 0:c792b17d9f78 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
juansal12 0:c792b17d9f78 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
juansal12 0:c792b17d9f78 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
juansal12 0:c792b17d9f78 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
juansal12 0:c792b17d9f78 34 POSSIBILITY OF SUCH DAMAGE.
juansal12 0:c792b17d9f78 35 ---------------------------------------------------------------------------*/
juansal12 0:c792b17d9f78 36
juansal12 0:c792b17d9f78 37
juansal12 0:c792b17d9f78 38 #ifndef __CORE_CMINSTR_H
juansal12 0:c792b17d9f78 39 #define __CORE_CMINSTR_H
juansal12 0:c792b17d9f78 40
juansal12 0:c792b17d9f78 41
juansal12 0:c792b17d9f78 42 /* ########################## Core Instruction Access ######################### */
juansal12 0:c792b17d9f78 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
juansal12 0:c792b17d9f78 44 Access to dedicated instructions
juansal12 0:c792b17d9f78 45 @{
juansal12 0:c792b17d9f78 46 */
juansal12 0:c792b17d9f78 47
juansal12 0:c792b17d9f78 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
juansal12 0:c792b17d9f78 49 /* ARM armcc specific functions */
juansal12 0:c792b17d9f78 50
juansal12 0:c792b17d9f78 51 #if (__ARMCC_VERSION < 400677)
juansal12 0:c792b17d9f78 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
juansal12 0:c792b17d9f78 53 #endif
juansal12 0:c792b17d9f78 54
juansal12 0:c792b17d9f78 55
juansal12 0:c792b17d9f78 56 /** \brief No Operation
juansal12 0:c792b17d9f78 57
juansal12 0:c792b17d9f78 58 No Operation does nothing. This instruction can be used for code alignment purposes.
juansal12 0:c792b17d9f78 59 */
juansal12 0:c792b17d9f78 60 #define __NOP __nop
juansal12 0:c792b17d9f78 61
juansal12 0:c792b17d9f78 62
juansal12 0:c792b17d9f78 63 /** \brief Wait For Interrupt
juansal12 0:c792b17d9f78 64
juansal12 0:c792b17d9f78 65 Wait For Interrupt is a hint instruction that suspends execution
juansal12 0:c792b17d9f78 66 until one of a number of events occurs.
juansal12 0:c792b17d9f78 67 */
juansal12 0:c792b17d9f78 68 #define __WFI __wfi
juansal12 0:c792b17d9f78 69
juansal12 0:c792b17d9f78 70
juansal12 0:c792b17d9f78 71 /** \brief Wait For Event
juansal12 0:c792b17d9f78 72
juansal12 0:c792b17d9f78 73 Wait For Event is a hint instruction that permits the processor to enter
juansal12 0:c792b17d9f78 74 a low-power state until one of a number of events occurs.
juansal12 0:c792b17d9f78 75 */
juansal12 0:c792b17d9f78 76 #define __WFE __wfe
juansal12 0:c792b17d9f78 77
juansal12 0:c792b17d9f78 78
juansal12 0:c792b17d9f78 79 /** \brief Send Event
juansal12 0:c792b17d9f78 80
juansal12 0:c792b17d9f78 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
juansal12 0:c792b17d9f78 82 */
juansal12 0:c792b17d9f78 83 #define __SEV __sev
juansal12 0:c792b17d9f78 84
juansal12 0:c792b17d9f78 85
juansal12 0:c792b17d9f78 86 /** \brief Instruction Synchronization Barrier
juansal12 0:c792b17d9f78 87
juansal12 0:c792b17d9f78 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
juansal12 0:c792b17d9f78 89 so that all instructions following the ISB are fetched from cache or
juansal12 0:c792b17d9f78 90 memory, after the instruction has been completed.
juansal12 0:c792b17d9f78 91 */
juansal12 0:c792b17d9f78 92 #define __ISB() __isb(0xF)
juansal12 0:c792b17d9f78 93
juansal12 0:c792b17d9f78 94
juansal12 0:c792b17d9f78 95 /** \brief Data Synchronization Barrier
juansal12 0:c792b17d9f78 96
juansal12 0:c792b17d9f78 97 This function acts as a special kind of Data Memory Barrier.
juansal12 0:c792b17d9f78 98 It completes when all explicit memory accesses before this instruction complete.
juansal12 0:c792b17d9f78 99 */
juansal12 0:c792b17d9f78 100 #define __DSB() __dsb(0xF)
juansal12 0:c792b17d9f78 101
juansal12 0:c792b17d9f78 102
juansal12 0:c792b17d9f78 103 /** \brief Data Memory Barrier
juansal12 0:c792b17d9f78 104
juansal12 0:c792b17d9f78 105 This function ensures the apparent order of the explicit memory operations before
juansal12 0:c792b17d9f78 106 and after the instruction, without ensuring their completion.
juansal12 0:c792b17d9f78 107 */
juansal12 0:c792b17d9f78 108 #define __DMB() __dmb(0xF)
juansal12 0:c792b17d9f78 109
juansal12 0:c792b17d9f78 110
juansal12 0:c792b17d9f78 111 /** \brief Reverse byte order (32 bit)
juansal12 0:c792b17d9f78 112
juansal12 0:c792b17d9f78 113 This function reverses the byte order in integer value.
juansal12 0:c792b17d9f78 114
juansal12 0:c792b17d9f78 115 \param [in] value Value to reverse
juansal12 0:c792b17d9f78 116 \return Reversed value
juansal12 0:c792b17d9f78 117 */
juansal12 0:c792b17d9f78 118 #define __REV __rev
juansal12 0:c792b17d9f78 119
juansal12 0:c792b17d9f78 120
juansal12 0:c792b17d9f78 121 /** \brief Reverse byte order (16 bit)
juansal12 0:c792b17d9f78 122
juansal12 0:c792b17d9f78 123 This function reverses the byte order in two unsigned short values.
juansal12 0:c792b17d9f78 124
juansal12 0:c792b17d9f78 125 \param [in] value Value to reverse
juansal12 0:c792b17d9f78 126 \return Reversed value
juansal12 0:c792b17d9f78 127 */
juansal12 0:c792b17d9f78 128 #ifndef __NO_EMBEDDED_ASM
juansal12 0:c792b17d9f78 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
juansal12 0:c792b17d9f78 130 {
juansal12 0:c792b17d9f78 131 rev16 r0, r0
juansal12 0:c792b17d9f78 132 bx lr
juansal12 0:c792b17d9f78 133 }
juansal12 0:c792b17d9f78 134 #endif
juansal12 0:c792b17d9f78 135
juansal12 0:c792b17d9f78 136 /** \brief Reverse byte order in signed short value
juansal12 0:c792b17d9f78 137
juansal12 0:c792b17d9f78 138 This function reverses the byte order in a signed short value with sign extension to integer.
juansal12 0:c792b17d9f78 139
juansal12 0:c792b17d9f78 140 \param [in] value Value to reverse
juansal12 0:c792b17d9f78 141 \return Reversed value
juansal12 0:c792b17d9f78 142 */
juansal12 0:c792b17d9f78 143 #ifndef __NO_EMBEDDED_ASM
juansal12 0:c792b17d9f78 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
juansal12 0:c792b17d9f78 145 {
juansal12 0:c792b17d9f78 146 revsh r0, r0
juansal12 0:c792b17d9f78 147 bx lr
juansal12 0:c792b17d9f78 148 }
juansal12 0:c792b17d9f78 149 #endif
juansal12 0:c792b17d9f78 150
juansal12 0:c792b17d9f78 151
juansal12 0:c792b17d9f78 152 /** \brief Rotate Right in unsigned value (32 bit)
juansal12 0:c792b17d9f78 153
juansal12 0:c792b17d9f78 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
juansal12 0:c792b17d9f78 155
juansal12 0:c792b17d9f78 156 \param [in] value Value to rotate
juansal12 0:c792b17d9f78 157 \param [in] value Number of Bits to rotate
juansal12 0:c792b17d9f78 158 \return Rotated value
juansal12 0:c792b17d9f78 159 */
juansal12 0:c792b17d9f78 160 #define __ROR __ror
juansal12 0:c792b17d9f78 161
juansal12 0:c792b17d9f78 162
juansal12 0:c792b17d9f78 163 /** \brief Breakpoint
juansal12 0:c792b17d9f78 164
juansal12 0:c792b17d9f78 165 This function causes the processor to enter Debug state.
juansal12 0:c792b17d9f78 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
juansal12 0:c792b17d9f78 167
juansal12 0:c792b17d9f78 168 \param [in] value is ignored by the processor.
juansal12 0:c792b17d9f78 169 If required, a debugger can use it to store additional information about the breakpoint.
juansal12 0:c792b17d9f78 170 */
juansal12 0:c792b17d9f78 171 #define __BKPT(value) __breakpoint(value)
juansal12 0:c792b17d9f78 172
juansal12 0:c792b17d9f78 173
juansal12 0:c792b17d9f78 174 #if (__CORTEX_M >= 0x03)
juansal12 0:c792b17d9f78 175
juansal12 0:c792b17d9f78 176 /** \brief Reverse bit order of value
juansal12 0:c792b17d9f78 177
juansal12 0:c792b17d9f78 178 This function reverses the bit order of the given value.
juansal12 0:c792b17d9f78 179
juansal12 0:c792b17d9f78 180 \param [in] value Value to reverse
juansal12 0:c792b17d9f78 181 \return Reversed value
juansal12 0:c792b17d9f78 182 */
juansal12 0:c792b17d9f78 183 #define __RBIT __rbit
juansal12 0:c792b17d9f78 184
juansal12 0:c792b17d9f78 185
juansal12 0:c792b17d9f78 186 /** \brief LDR Exclusive (8 bit)
juansal12 0:c792b17d9f78 187
juansal12 0:c792b17d9f78 188 This function performs a exclusive LDR command for 8 bit value.
juansal12 0:c792b17d9f78 189
juansal12 0:c792b17d9f78 190 \param [in] ptr Pointer to data
juansal12 0:c792b17d9f78 191 \return value of type uint8_t at (*ptr)
juansal12 0:c792b17d9f78 192 */
juansal12 0:c792b17d9f78 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
juansal12 0:c792b17d9f78 194
juansal12 0:c792b17d9f78 195
juansal12 0:c792b17d9f78 196 /** \brief LDR Exclusive (16 bit)
juansal12 0:c792b17d9f78 197
juansal12 0:c792b17d9f78 198 This function performs a exclusive LDR command for 16 bit values.
juansal12 0:c792b17d9f78 199
juansal12 0:c792b17d9f78 200 \param [in] ptr Pointer to data
juansal12 0:c792b17d9f78 201 \return value of type uint16_t at (*ptr)
juansal12 0:c792b17d9f78 202 */
juansal12 0:c792b17d9f78 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
juansal12 0:c792b17d9f78 204
juansal12 0:c792b17d9f78 205
juansal12 0:c792b17d9f78 206 /** \brief LDR Exclusive (32 bit)
juansal12 0:c792b17d9f78 207
juansal12 0:c792b17d9f78 208 This function performs a exclusive LDR command for 32 bit values.
juansal12 0:c792b17d9f78 209
juansal12 0:c792b17d9f78 210 \param [in] ptr Pointer to data
juansal12 0:c792b17d9f78 211 \return value of type uint32_t at (*ptr)
juansal12 0:c792b17d9f78 212 */
juansal12 0:c792b17d9f78 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
juansal12 0:c792b17d9f78 214
juansal12 0:c792b17d9f78 215
juansal12 0:c792b17d9f78 216 /** \brief STR Exclusive (8 bit)
juansal12 0:c792b17d9f78 217
juansal12 0:c792b17d9f78 218 This function performs a exclusive STR command for 8 bit values.
juansal12 0:c792b17d9f78 219
juansal12 0:c792b17d9f78 220 \param [in] value Value to store
juansal12 0:c792b17d9f78 221 \param [in] ptr Pointer to location
juansal12 0:c792b17d9f78 222 \return 0 Function succeeded
juansal12 0:c792b17d9f78 223 \return 1 Function failed
juansal12 0:c792b17d9f78 224 */
juansal12 0:c792b17d9f78 225 #define __STREXB(value, ptr) __strex(value, ptr)
juansal12 0:c792b17d9f78 226
juansal12 0:c792b17d9f78 227
juansal12 0:c792b17d9f78 228 /** \brief STR Exclusive (16 bit)
juansal12 0:c792b17d9f78 229
juansal12 0:c792b17d9f78 230 This function performs a exclusive STR command for 16 bit values.
juansal12 0:c792b17d9f78 231
juansal12 0:c792b17d9f78 232 \param [in] value Value to store
juansal12 0:c792b17d9f78 233 \param [in] ptr Pointer to location
juansal12 0:c792b17d9f78 234 \return 0 Function succeeded
juansal12 0:c792b17d9f78 235 \return 1 Function failed
juansal12 0:c792b17d9f78 236 */
juansal12 0:c792b17d9f78 237 #define __STREXH(value, ptr) __strex(value, ptr)
juansal12 0:c792b17d9f78 238
juansal12 0:c792b17d9f78 239
juansal12 0:c792b17d9f78 240 /** \brief STR Exclusive (32 bit)
juansal12 0:c792b17d9f78 241
juansal12 0:c792b17d9f78 242 This function performs a exclusive STR command for 32 bit values.
juansal12 0:c792b17d9f78 243
juansal12 0:c792b17d9f78 244 \param [in] value Value to store
juansal12 0:c792b17d9f78 245 \param [in] ptr Pointer to location
juansal12 0:c792b17d9f78 246 \return 0 Function succeeded
juansal12 0:c792b17d9f78 247 \return 1 Function failed
juansal12 0:c792b17d9f78 248 */
juansal12 0:c792b17d9f78 249 #define __STREXW(value, ptr) __strex(value, ptr)
juansal12 0:c792b17d9f78 250
juansal12 0:c792b17d9f78 251
juansal12 0:c792b17d9f78 252 /** \brief Remove the exclusive lock
juansal12 0:c792b17d9f78 253
juansal12 0:c792b17d9f78 254 This function removes the exclusive lock which is created by LDREX.
juansal12 0:c792b17d9f78 255
juansal12 0:c792b17d9f78 256 */
juansal12 0:c792b17d9f78 257 #define __CLREX __clrex
juansal12 0:c792b17d9f78 258
juansal12 0:c792b17d9f78 259
juansal12 0:c792b17d9f78 260 /** \brief Signed Saturate
juansal12 0:c792b17d9f78 261
juansal12 0:c792b17d9f78 262 This function saturates a signed value.
juansal12 0:c792b17d9f78 263
juansal12 0:c792b17d9f78 264 \param [in] value Value to be saturated
juansal12 0:c792b17d9f78 265 \param [in] sat Bit position to saturate to (1..32)
juansal12 0:c792b17d9f78 266 \return Saturated value
juansal12 0:c792b17d9f78 267 */
juansal12 0:c792b17d9f78 268 #define __SSAT __ssat
juansal12 0:c792b17d9f78 269
juansal12 0:c792b17d9f78 270
juansal12 0:c792b17d9f78 271 /** \brief Unsigned Saturate
juansal12 0:c792b17d9f78 272
juansal12 0:c792b17d9f78 273 This function saturates an unsigned value.
juansal12 0:c792b17d9f78 274
juansal12 0:c792b17d9f78 275 \param [in] value Value to be saturated
juansal12 0:c792b17d9f78 276 \param [in] sat Bit position to saturate to (0..31)
juansal12 0:c792b17d9f78 277 \return Saturated value
juansal12 0:c792b17d9f78 278 */
juansal12 0:c792b17d9f78 279 #define __USAT __usat
juansal12 0:c792b17d9f78 280
juansal12 0:c792b17d9f78 281
juansal12 0:c792b17d9f78 282 /** \brief Count leading zeros
juansal12 0:c792b17d9f78 283
juansal12 0:c792b17d9f78 284 This function counts the number of leading zeros of a data value.
juansal12 0:c792b17d9f78 285
juansal12 0:c792b17d9f78 286 \param [in] value Value to count the leading zeros
juansal12 0:c792b17d9f78 287 \return number of leading zeros in value
juansal12 0:c792b17d9f78 288 */
juansal12 0:c792b17d9f78 289 #define __CLZ __clz
juansal12 0:c792b17d9f78 290
juansal12 0:c792b17d9f78 291 #endif /* (__CORTEX_M >= 0x03) */
juansal12 0:c792b17d9f78 292
juansal12 0:c792b17d9f78 293
juansal12 0:c792b17d9f78 294
juansal12 0:c792b17d9f78 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
juansal12 0:c792b17d9f78 296 /* IAR iccarm specific functions */
juansal12 0:c792b17d9f78 297
juansal12 0:c792b17d9f78 298 #include <cmsis_iar.h>
juansal12 0:c792b17d9f78 299
juansal12 0:c792b17d9f78 300
juansal12 0:c792b17d9f78 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
juansal12 0:c792b17d9f78 302 /* TI CCS specific functions */
juansal12 0:c792b17d9f78 303
juansal12 0:c792b17d9f78 304 #include <cmsis_ccs.h>
juansal12 0:c792b17d9f78 305
juansal12 0:c792b17d9f78 306
juansal12 0:c792b17d9f78 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
juansal12 0:c792b17d9f78 308 /* GNU gcc specific functions */
juansal12 0:c792b17d9f78 309
juansal12 0:c792b17d9f78 310 /* Define macros for porting to both thumb1 and thumb2.
juansal12 0:c792b17d9f78 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
juansal12 0:c792b17d9f78 312 * Otherwise, use general registers, specified by constrant "r" */
juansal12 0:c792b17d9f78 313 #if defined (__thumb__) && !defined (__thumb2__)
juansal12 0:c792b17d9f78 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
juansal12 0:c792b17d9f78 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
juansal12 0:c792b17d9f78 316 #else
juansal12 0:c792b17d9f78 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
juansal12 0:c792b17d9f78 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
juansal12 0:c792b17d9f78 319 #endif
juansal12 0:c792b17d9f78 320
juansal12 0:c792b17d9f78 321 /** \brief No Operation
juansal12 0:c792b17d9f78 322
juansal12 0:c792b17d9f78 323 No Operation does nothing. This instruction can be used for code alignment purposes.
juansal12 0:c792b17d9f78 324 */
juansal12 0:c792b17d9f78 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
juansal12 0:c792b17d9f78 326 {
juansal12 0:c792b17d9f78 327 __ASM volatile ("nop");
juansal12 0:c792b17d9f78 328 }
juansal12 0:c792b17d9f78 329
juansal12 0:c792b17d9f78 330
juansal12 0:c792b17d9f78 331 /** \brief Wait For Interrupt
juansal12 0:c792b17d9f78 332
juansal12 0:c792b17d9f78 333 Wait For Interrupt is a hint instruction that suspends execution
juansal12 0:c792b17d9f78 334 until one of a number of events occurs.
juansal12 0:c792b17d9f78 335 */
juansal12 0:c792b17d9f78 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
juansal12 0:c792b17d9f78 337 {
juansal12 0:c792b17d9f78 338 __ASM volatile ("wfi");
juansal12 0:c792b17d9f78 339 }
juansal12 0:c792b17d9f78 340
juansal12 0:c792b17d9f78 341
juansal12 0:c792b17d9f78 342 /** \brief Wait For Event
juansal12 0:c792b17d9f78 343
juansal12 0:c792b17d9f78 344 Wait For Event is a hint instruction that permits the processor to enter
juansal12 0:c792b17d9f78 345 a low-power state until one of a number of events occurs.
juansal12 0:c792b17d9f78 346 */
juansal12 0:c792b17d9f78 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
juansal12 0:c792b17d9f78 348 {
juansal12 0:c792b17d9f78 349 __ASM volatile ("wfe");
juansal12 0:c792b17d9f78 350 }
juansal12 0:c792b17d9f78 351
juansal12 0:c792b17d9f78 352
juansal12 0:c792b17d9f78 353 /** \brief Send Event
juansal12 0:c792b17d9f78 354
juansal12 0:c792b17d9f78 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
juansal12 0:c792b17d9f78 356 */
juansal12 0:c792b17d9f78 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
juansal12 0:c792b17d9f78 358 {
juansal12 0:c792b17d9f78 359 __ASM volatile ("sev");
juansal12 0:c792b17d9f78 360 }
juansal12 0:c792b17d9f78 361
juansal12 0:c792b17d9f78 362
juansal12 0:c792b17d9f78 363 /** \brief Instruction Synchronization Barrier
juansal12 0:c792b17d9f78 364
juansal12 0:c792b17d9f78 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
juansal12 0:c792b17d9f78 366 so that all instructions following the ISB are fetched from cache or
juansal12 0:c792b17d9f78 367 memory, after the instruction has been completed.
juansal12 0:c792b17d9f78 368 */
juansal12 0:c792b17d9f78 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
juansal12 0:c792b17d9f78 370 {
juansal12 0:c792b17d9f78 371 __ASM volatile ("isb");
juansal12 0:c792b17d9f78 372 }
juansal12 0:c792b17d9f78 373
juansal12 0:c792b17d9f78 374
juansal12 0:c792b17d9f78 375 /** \brief Data Synchronization Barrier
juansal12 0:c792b17d9f78 376
juansal12 0:c792b17d9f78 377 This function acts as a special kind of Data Memory Barrier.
juansal12 0:c792b17d9f78 378 It completes when all explicit memory accesses before this instruction complete.
juansal12 0:c792b17d9f78 379 */
juansal12 0:c792b17d9f78 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
juansal12 0:c792b17d9f78 381 {
juansal12 0:c792b17d9f78 382 __ASM volatile ("dsb");
juansal12 0:c792b17d9f78 383 }
juansal12 0:c792b17d9f78 384
juansal12 0:c792b17d9f78 385
juansal12 0:c792b17d9f78 386 /** \brief Data Memory Barrier
juansal12 0:c792b17d9f78 387
juansal12 0:c792b17d9f78 388 This function ensures the apparent order of the explicit memory operations before
juansal12 0:c792b17d9f78 389 and after the instruction, without ensuring their completion.
juansal12 0:c792b17d9f78 390 */
juansal12 0:c792b17d9f78 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
juansal12 0:c792b17d9f78 392 {
juansal12 0:c792b17d9f78 393 __ASM volatile ("dmb");
juansal12 0:c792b17d9f78 394 }
juansal12 0:c792b17d9f78 395
juansal12 0:c792b17d9f78 396
juansal12 0:c792b17d9f78 397 /** \brief Reverse byte order (32 bit)
juansal12 0:c792b17d9f78 398
juansal12 0:c792b17d9f78 399 This function reverses the byte order in integer value.
juansal12 0:c792b17d9f78 400
juansal12 0:c792b17d9f78 401 \param [in] value Value to reverse
juansal12 0:c792b17d9f78 402 \return Reversed value
juansal12 0:c792b17d9f78 403 */
juansal12 0:c792b17d9f78 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
juansal12 0:c792b17d9f78 405 {
juansal12 0:c792b17d9f78 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
juansal12 0:c792b17d9f78 407 return __builtin_bswap32(value);
juansal12 0:c792b17d9f78 408 #else
juansal12 0:c792b17d9f78 409 uint32_t result;
juansal12 0:c792b17d9f78 410
juansal12 0:c792b17d9f78 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
juansal12 0:c792b17d9f78 412 return(result);
juansal12 0:c792b17d9f78 413 #endif
juansal12 0:c792b17d9f78 414 }
juansal12 0:c792b17d9f78 415
juansal12 0:c792b17d9f78 416
juansal12 0:c792b17d9f78 417 /** \brief Reverse byte order (16 bit)
juansal12 0:c792b17d9f78 418
juansal12 0:c792b17d9f78 419 This function reverses the byte order in two unsigned short values.
juansal12 0:c792b17d9f78 420
juansal12 0:c792b17d9f78 421 \param [in] value Value to reverse
juansal12 0:c792b17d9f78 422 \return Reversed value
juansal12 0:c792b17d9f78 423 */
juansal12 0:c792b17d9f78 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
juansal12 0:c792b17d9f78 425 {
juansal12 0:c792b17d9f78 426 uint32_t result;
juansal12 0:c792b17d9f78 427
juansal12 0:c792b17d9f78 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
juansal12 0:c792b17d9f78 429 return(result);
juansal12 0:c792b17d9f78 430 }
juansal12 0:c792b17d9f78 431
juansal12 0:c792b17d9f78 432
juansal12 0:c792b17d9f78 433 /** \brief Reverse byte order in signed short value
juansal12 0:c792b17d9f78 434
juansal12 0:c792b17d9f78 435 This function reverses the byte order in a signed short value with sign extension to integer.
juansal12 0:c792b17d9f78 436
juansal12 0:c792b17d9f78 437 \param [in] value Value to reverse
juansal12 0:c792b17d9f78 438 \return Reversed value
juansal12 0:c792b17d9f78 439 */
juansal12 0:c792b17d9f78 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
juansal12 0:c792b17d9f78 441 {
juansal12 0:c792b17d9f78 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
juansal12 0:c792b17d9f78 443 return (short)__builtin_bswap16(value);
juansal12 0:c792b17d9f78 444 #else
juansal12 0:c792b17d9f78 445 uint32_t result;
juansal12 0:c792b17d9f78 446
juansal12 0:c792b17d9f78 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
juansal12 0:c792b17d9f78 448 return(result);
juansal12 0:c792b17d9f78 449 #endif
juansal12 0:c792b17d9f78 450 }
juansal12 0:c792b17d9f78 451
juansal12 0:c792b17d9f78 452
juansal12 0:c792b17d9f78 453 /** \brief Rotate Right in unsigned value (32 bit)
juansal12 0:c792b17d9f78 454
juansal12 0:c792b17d9f78 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
juansal12 0:c792b17d9f78 456
juansal12 0:c792b17d9f78 457 \param [in] value Value to rotate
juansal12 0:c792b17d9f78 458 \param [in] value Number of Bits to rotate
juansal12 0:c792b17d9f78 459 \return Rotated value
juansal12 0:c792b17d9f78 460 */
juansal12 0:c792b17d9f78 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
juansal12 0:c792b17d9f78 462 {
juansal12 0:c792b17d9f78 463 return (op1 >> op2) | (op1 << (32 - op2));
juansal12 0:c792b17d9f78 464 }
juansal12 0:c792b17d9f78 465
juansal12 0:c792b17d9f78 466
juansal12 0:c792b17d9f78 467 /** \brief Breakpoint
juansal12 0:c792b17d9f78 468
juansal12 0:c792b17d9f78 469 This function causes the processor to enter Debug state.
juansal12 0:c792b17d9f78 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
juansal12 0:c792b17d9f78 471
juansal12 0:c792b17d9f78 472 \param [in] value is ignored by the processor.
juansal12 0:c792b17d9f78 473 If required, a debugger can use it to store additional information about the breakpoint.
juansal12 0:c792b17d9f78 474 */
juansal12 0:c792b17d9f78 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
juansal12 0:c792b17d9f78 476
juansal12 0:c792b17d9f78 477
juansal12 0:c792b17d9f78 478 #if (__CORTEX_M >= 0x03)
juansal12 0:c792b17d9f78 479
juansal12 0:c792b17d9f78 480 /** \brief Reverse bit order of value
juansal12 0:c792b17d9f78 481
juansal12 0:c792b17d9f78 482 This function reverses the bit order of the given value.
juansal12 0:c792b17d9f78 483
juansal12 0:c792b17d9f78 484 \param [in] value Value to reverse
juansal12 0:c792b17d9f78 485 \return Reversed value
juansal12 0:c792b17d9f78 486 */
juansal12 0:c792b17d9f78 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
juansal12 0:c792b17d9f78 488 {
juansal12 0:c792b17d9f78 489 uint32_t result;
juansal12 0:c792b17d9f78 490
juansal12 0:c792b17d9f78 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
juansal12 0:c792b17d9f78 492 return(result);
juansal12 0:c792b17d9f78 493 }
juansal12 0:c792b17d9f78 494
juansal12 0:c792b17d9f78 495
juansal12 0:c792b17d9f78 496 /** \brief LDR Exclusive (8 bit)
juansal12 0:c792b17d9f78 497
juansal12 0:c792b17d9f78 498 This function performs a exclusive LDR command for 8 bit value.
juansal12 0:c792b17d9f78 499
juansal12 0:c792b17d9f78 500 \param [in] ptr Pointer to data
juansal12 0:c792b17d9f78 501 \return value of type uint8_t at (*ptr)
juansal12 0:c792b17d9f78 502 */
juansal12 0:c792b17d9f78 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
juansal12 0:c792b17d9f78 504 {
juansal12 0:c792b17d9f78 505 uint32_t result;
juansal12 0:c792b17d9f78 506
juansal12 0:c792b17d9f78 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
juansal12 0:c792b17d9f78 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
juansal12 0:c792b17d9f78 509 #else
juansal12 0:c792b17d9f78 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
juansal12 0:c792b17d9f78 511 accepted by assembler. So has to use following less efficient pattern.
juansal12 0:c792b17d9f78 512 */
juansal12 0:c792b17d9f78 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
juansal12 0:c792b17d9f78 514 #endif
juansal12 0:c792b17d9f78 515 return(result);
juansal12 0:c792b17d9f78 516 }
juansal12 0:c792b17d9f78 517
juansal12 0:c792b17d9f78 518
juansal12 0:c792b17d9f78 519 /** \brief LDR Exclusive (16 bit)
juansal12 0:c792b17d9f78 520
juansal12 0:c792b17d9f78 521 This function performs a exclusive LDR command for 16 bit values.
juansal12 0:c792b17d9f78 522
juansal12 0:c792b17d9f78 523 \param [in] ptr Pointer to data
juansal12 0:c792b17d9f78 524 \return value of type uint16_t at (*ptr)
juansal12 0:c792b17d9f78 525 */
juansal12 0:c792b17d9f78 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
juansal12 0:c792b17d9f78 527 {
juansal12 0:c792b17d9f78 528 uint32_t result;
juansal12 0:c792b17d9f78 529
juansal12 0:c792b17d9f78 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
juansal12 0:c792b17d9f78 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
juansal12 0:c792b17d9f78 532 #else
juansal12 0:c792b17d9f78 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
juansal12 0:c792b17d9f78 534 accepted by assembler. So has to use following less efficient pattern.
juansal12 0:c792b17d9f78 535 */
juansal12 0:c792b17d9f78 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
juansal12 0:c792b17d9f78 537 #endif
juansal12 0:c792b17d9f78 538 return(result);
juansal12 0:c792b17d9f78 539 }
juansal12 0:c792b17d9f78 540
juansal12 0:c792b17d9f78 541
juansal12 0:c792b17d9f78 542 /** \brief LDR Exclusive (32 bit)
juansal12 0:c792b17d9f78 543
juansal12 0:c792b17d9f78 544 This function performs a exclusive LDR command for 32 bit values.
juansal12 0:c792b17d9f78 545
juansal12 0:c792b17d9f78 546 \param [in] ptr Pointer to data
juansal12 0:c792b17d9f78 547 \return value of type uint32_t at (*ptr)
juansal12 0:c792b17d9f78 548 */
juansal12 0:c792b17d9f78 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
juansal12 0:c792b17d9f78 550 {
juansal12 0:c792b17d9f78 551 uint32_t result;
juansal12 0:c792b17d9f78 552
juansal12 0:c792b17d9f78 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
juansal12 0:c792b17d9f78 554 return(result);
juansal12 0:c792b17d9f78 555 }
juansal12 0:c792b17d9f78 556
juansal12 0:c792b17d9f78 557
juansal12 0:c792b17d9f78 558 /** \brief STR Exclusive (8 bit)
juansal12 0:c792b17d9f78 559
juansal12 0:c792b17d9f78 560 This function performs a exclusive STR command for 8 bit values.
juansal12 0:c792b17d9f78 561
juansal12 0:c792b17d9f78 562 \param [in] value Value to store
juansal12 0:c792b17d9f78 563 \param [in] ptr Pointer to location
juansal12 0:c792b17d9f78 564 \return 0 Function succeeded
juansal12 0:c792b17d9f78 565 \return 1 Function failed
juansal12 0:c792b17d9f78 566 */
juansal12 0:c792b17d9f78 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
juansal12 0:c792b17d9f78 568 {
juansal12 0:c792b17d9f78 569 uint32_t result;
juansal12 0:c792b17d9f78 570
juansal12 0:c792b17d9f78 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
juansal12 0:c792b17d9f78 572 return(result);
juansal12 0:c792b17d9f78 573 }
juansal12 0:c792b17d9f78 574
juansal12 0:c792b17d9f78 575
juansal12 0:c792b17d9f78 576 /** \brief STR Exclusive (16 bit)
juansal12 0:c792b17d9f78 577
juansal12 0:c792b17d9f78 578 This function performs a exclusive STR command for 16 bit values.
juansal12 0:c792b17d9f78 579
juansal12 0:c792b17d9f78 580 \param [in] value Value to store
juansal12 0:c792b17d9f78 581 \param [in] ptr Pointer to location
juansal12 0:c792b17d9f78 582 \return 0 Function succeeded
juansal12 0:c792b17d9f78 583 \return 1 Function failed
juansal12 0:c792b17d9f78 584 */
juansal12 0:c792b17d9f78 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
juansal12 0:c792b17d9f78 586 {
juansal12 0:c792b17d9f78 587 uint32_t result;
juansal12 0:c792b17d9f78 588
juansal12 0:c792b17d9f78 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
juansal12 0:c792b17d9f78 590 return(result);
juansal12 0:c792b17d9f78 591 }
juansal12 0:c792b17d9f78 592
juansal12 0:c792b17d9f78 593
juansal12 0:c792b17d9f78 594 /** \brief STR Exclusive (32 bit)
juansal12 0:c792b17d9f78 595
juansal12 0:c792b17d9f78 596 This function performs a exclusive STR command for 32 bit values.
juansal12 0:c792b17d9f78 597
juansal12 0:c792b17d9f78 598 \param [in] value Value to store
juansal12 0:c792b17d9f78 599 \param [in] ptr Pointer to location
juansal12 0:c792b17d9f78 600 \return 0 Function succeeded
juansal12 0:c792b17d9f78 601 \return 1 Function failed
juansal12 0:c792b17d9f78 602 */
juansal12 0:c792b17d9f78 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
juansal12 0:c792b17d9f78 604 {
juansal12 0:c792b17d9f78 605 uint32_t result;
juansal12 0:c792b17d9f78 606
juansal12 0:c792b17d9f78 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
juansal12 0:c792b17d9f78 608 return(result);
juansal12 0:c792b17d9f78 609 }
juansal12 0:c792b17d9f78 610
juansal12 0:c792b17d9f78 611
juansal12 0:c792b17d9f78 612 /** \brief Remove the exclusive lock
juansal12 0:c792b17d9f78 613
juansal12 0:c792b17d9f78 614 This function removes the exclusive lock which is created by LDREX.
juansal12 0:c792b17d9f78 615
juansal12 0:c792b17d9f78 616 */
juansal12 0:c792b17d9f78 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
juansal12 0:c792b17d9f78 618 {
juansal12 0:c792b17d9f78 619 __ASM volatile ("clrex" ::: "memory");
juansal12 0:c792b17d9f78 620 }
juansal12 0:c792b17d9f78 621
juansal12 0:c792b17d9f78 622
juansal12 0:c792b17d9f78 623 /** \brief Signed Saturate
juansal12 0:c792b17d9f78 624
juansal12 0:c792b17d9f78 625 This function saturates a signed value.
juansal12 0:c792b17d9f78 626
juansal12 0:c792b17d9f78 627 \param [in] value Value to be saturated
juansal12 0:c792b17d9f78 628 \param [in] sat Bit position to saturate to (1..32)
juansal12 0:c792b17d9f78 629 \return Saturated value
juansal12 0:c792b17d9f78 630 */
juansal12 0:c792b17d9f78 631 #define __SSAT(ARG1,ARG2) \
juansal12 0:c792b17d9f78 632 ({ \
juansal12 0:c792b17d9f78 633 uint32_t __RES, __ARG1 = (ARG1); \
juansal12 0:c792b17d9f78 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
juansal12 0:c792b17d9f78 635 __RES; \
juansal12 0:c792b17d9f78 636 })
juansal12 0:c792b17d9f78 637
juansal12 0:c792b17d9f78 638
juansal12 0:c792b17d9f78 639 /** \brief Unsigned Saturate
juansal12 0:c792b17d9f78 640
juansal12 0:c792b17d9f78 641 This function saturates an unsigned value.
juansal12 0:c792b17d9f78 642
juansal12 0:c792b17d9f78 643 \param [in] value Value to be saturated
juansal12 0:c792b17d9f78 644 \param [in] sat Bit position to saturate to (0..31)
juansal12 0:c792b17d9f78 645 \return Saturated value
juansal12 0:c792b17d9f78 646 */
juansal12 0:c792b17d9f78 647 #define __USAT(ARG1,ARG2) \
juansal12 0:c792b17d9f78 648 ({ \
juansal12 0:c792b17d9f78 649 uint32_t __RES, __ARG1 = (ARG1); \
juansal12 0:c792b17d9f78 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
juansal12 0:c792b17d9f78 651 __RES; \
juansal12 0:c792b17d9f78 652 })
juansal12 0:c792b17d9f78 653
juansal12 0:c792b17d9f78 654
juansal12 0:c792b17d9f78 655 /** \brief Count leading zeros
juansal12 0:c792b17d9f78 656
juansal12 0:c792b17d9f78 657 This function counts the number of leading zeros of a data value.
juansal12 0:c792b17d9f78 658
juansal12 0:c792b17d9f78 659 \param [in] value Value to count the leading zeros
juansal12 0:c792b17d9f78 660 \return number of leading zeros in value
juansal12 0:c792b17d9f78 661 */
juansal12 0:c792b17d9f78 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
juansal12 0:c792b17d9f78 663 {
juansal12 0:c792b17d9f78 664 uint32_t result;
juansal12 0:c792b17d9f78 665
juansal12 0:c792b17d9f78 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
juansal12 0:c792b17d9f78 667 return(result);
juansal12 0:c792b17d9f78 668 }
juansal12 0:c792b17d9f78 669
juansal12 0:c792b17d9f78 670 #endif /* (__CORTEX_M >= 0x03) */
juansal12 0:c792b17d9f78 671
juansal12 0:c792b17d9f78 672
juansal12 0:c792b17d9f78 673
juansal12 0:c792b17d9f78 674
juansal12 0:c792b17d9f78 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
juansal12 0:c792b17d9f78 676 /* TASKING carm specific functions */
juansal12 0:c792b17d9f78 677
juansal12 0:c792b17d9f78 678 /*
juansal12 0:c792b17d9f78 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
juansal12 0:c792b17d9f78 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
juansal12 0:c792b17d9f78 681 * Including the CMSIS ones.
juansal12 0:c792b17d9f78 682 */
juansal12 0:c792b17d9f78 683
juansal12 0:c792b17d9f78 684 #endif
juansal12 0:c792b17d9f78 685
juansal12 0:c792b17d9f78 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
juansal12 0:c792b17d9f78 687
juansal12 0:c792b17d9f78 688 #endif /* __CORE_CMINSTR_H */