Juan Salazar / sofi7

test

Dependents:   robotic_fish_6

TARGET_LPC1768/core_cmFunc.h@0:c792b17d9f78, 2021-12-03 (annotated)

Committer:
juansal12
Date:
Fri Dec 03 23:00:34 2021 +0000
Revision:
0:c792b17d9f78
uploaded sofi code ;

Who changed what in which revision?

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juansal12 0:c792b17d9f78 1 /**************************************************************************//**
juansal12 0:c792b17d9f78 2 * @file core_cmFunc.h
juansal12 0:c792b17d9f78 3 * @brief CMSIS Cortex-M Core Function Access Header File
juansal12 0:c792b17d9f78 4 * @version V3.20
juansal12 0:c792b17d9f78 5 * @date 25. February 2013
juansal12 0:c792b17d9f78 6 *
juansal12 0:c792b17d9f78 7 * @note
juansal12 0:c792b17d9f78 8 *
juansal12 0:c792b17d9f78 9 ******************************************************************************/
juansal12 0:c792b17d9f78 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
juansal12 0:c792b17d9f78 11
juansal12 0:c792b17d9f78 12 All rights reserved.
juansal12 0:c792b17d9f78 13 Redistribution and use in source and binary forms, with or without
juansal12 0:c792b17d9f78 14 modification, are permitted provided that the following conditions are met:
juansal12 0:c792b17d9f78 15 - Redistributions of source code must retain the above copyright
juansal12 0:c792b17d9f78 16 notice, this list of conditions and the following disclaimer.
juansal12 0:c792b17d9f78 17 - Redistributions in binary form must reproduce the above copyright
juansal12 0:c792b17d9f78 18 notice, this list of conditions and the following disclaimer in the
juansal12 0:c792b17d9f78 19 documentation and/or other materials provided with the distribution.
juansal12 0:c792b17d9f78 20 - Neither the name of ARM nor the names of its contributors may be used
juansal12 0:c792b17d9f78 21 to endorse or promote products derived from this software without
juansal12 0:c792b17d9f78 22 specific prior written permission.
juansal12 0:c792b17d9f78 23 *
juansal12 0:c792b17d9f78 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
juansal12 0:c792b17d9f78 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
juansal12 0:c792b17d9f78 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
juansal12 0:c792b17d9f78 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
juansal12 0:c792b17d9f78 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
juansal12 0:c792b17d9f78 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
juansal12 0:c792b17d9f78 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
juansal12 0:c792b17d9f78 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
juansal12 0:c792b17d9f78 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
juansal12 0:c792b17d9f78 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
juansal12 0:c792b17d9f78 34 POSSIBILITY OF SUCH DAMAGE.
juansal12 0:c792b17d9f78 35 ---------------------------------------------------------------------------*/
juansal12 0:c792b17d9f78 36
juansal12 0:c792b17d9f78 37
juansal12 0:c792b17d9f78 38 #ifndef __CORE_CMFUNC_H
juansal12 0:c792b17d9f78 39 #define __CORE_CMFUNC_H
juansal12 0:c792b17d9f78 40
juansal12 0:c792b17d9f78 41
juansal12 0:c792b17d9f78 42 /* ########################### Core Function Access ########################### */
juansal12 0:c792b17d9f78 43 /** \ingroup CMSIS_Core_FunctionInterface
juansal12 0:c792b17d9f78 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
juansal12 0:c792b17d9f78 45 @{
juansal12 0:c792b17d9f78 46 */
juansal12 0:c792b17d9f78 47
juansal12 0:c792b17d9f78 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
juansal12 0:c792b17d9f78 49 /* ARM armcc specific functions */
juansal12 0:c792b17d9f78 50
juansal12 0:c792b17d9f78 51 #if (__ARMCC_VERSION < 400677)
juansal12 0:c792b17d9f78 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
juansal12 0:c792b17d9f78 53 #endif
juansal12 0:c792b17d9f78 54
juansal12 0:c792b17d9f78 55 /* intrinsic void __enable_irq(); */
juansal12 0:c792b17d9f78 56 /* intrinsic void __disable_irq(); */
juansal12 0:c792b17d9f78 57
juansal12 0:c792b17d9f78 58 /** \brief Get Control Register
juansal12 0:c792b17d9f78 59
juansal12 0:c792b17d9f78 60 This function returns the content of the Control Register.
juansal12 0:c792b17d9f78 61
juansal12 0:c792b17d9f78 62 \return Control Register value
juansal12 0:c792b17d9f78 63 */
juansal12 0:c792b17d9f78 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
juansal12 0:c792b17d9f78 65 {
juansal12 0:c792b17d9f78 66 register uint32_t __regControl __ASM("control");
juansal12 0:c792b17d9f78 67 return(__regControl);
juansal12 0:c792b17d9f78 68 }
juansal12 0:c792b17d9f78 69
juansal12 0:c792b17d9f78 70
juansal12 0:c792b17d9f78 71 /** \brief Set Control Register
juansal12 0:c792b17d9f78 72
juansal12 0:c792b17d9f78 73 This function writes the given value to the Control Register.
juansal12 0:c792b17d9f78 74
juansal12 0:c792b17d9f78 75 \param [in] control Control Register value to set
juansal12 0:c792b17d9f78 76 */
juansal12 0:c792b17d9f78 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
juansal12 0:c792b17d9f78 78 {
juansal12 0:c792b17d9f78 79 register uint32_t __regControl __ASM("control");
juansal12 0:c792b17d9f78 80 __regControl = control;
juansal12 0:c792b17d9f78 81 }
juansal12 0:c792b17d9f78 82
juansal12 0:c792b17d9f78 83
juansal12 0:c792b17d9f78 84 /** \brief Get IPSR Register
juansal12 0:c792b17d9f78 85
juansal12 0:c792b17d9f78 86 This function returns the content of the IPSR Register.
juansal12 0:c792b17d9f78 87
juansal12 0:c792b17d9f78 88 \return IPSR Register value
juansal12 0:c792b17d9f78 89 */
juansal12 0:c792b17d9f78 90 __STATIC_INLINE uint32_t __get_IPSR(void)
juansal12 0:c792b17d9f78 91 {
juansal12 0:c792b17d9f78 92 register uint32_t __regIPSR __ASM("ipsr");
juansal12 0:c792b17d9f78 93 return(__regIPSR);
juansal12 0:c792b17d9f78 94 }
juansal12 0:c792b17d9f78 95
juansal12 0:c792b17d9f78 96
juansal12 0:c792b17d9f78 97 /** \brief Get APSR Register
juansal12 0:c792b17d9f78 98
juansal12 0:c792b17d9f78 99 This function returns the content of the APSR Register.
juansal12 0:c792b17d9f78 100
juansal12 0:c792b17d9f78 101 \return APSR Register value
juansal12 0:c792b17d9f78 102 */
juansal12 0:c792b17d9f78 103 __STATIC_INLINE uint32_t __get_APSR(void)
juansal12 0:c792b17d9f78 104 {
juansal12 0:c792b17d9f78 105 register uint32_t __regAPSR __ASM("apsr");
juansal12 0:c792b17d9f78 106 return(__regAPSR);
juansal12 0:c792b17d9f78 107 }
juansal12 0:c792b17d9f78 108
juansal12 0:c792b17d9f78 109
juansal12 0:c792b17d9f78 110 /** \brief Get xPSR Register
juansal12 0:c792b17d9f78 111
juansal12 0:c792b17d9f78 112 This function returns the content of the xPSR Register.
juansal12 0:c792b17d9f78 113
juansal12 0:c792b17d9f78 114 \return xPSR Register value
juansal12 0:c792b17d9f78 115 */
juansal12 0:c792b17d9f78 116 __STATIC_INLINE uint32_t __get_xPSR(void)
juansal12 0:c792b17d9f78 117 {
juansal12 0:c792b17d9f78 118 register uint32_t __regXPSR __ASM("xpsr");
juansal12 0:c792b17d9f78 119 return(__regXPSR);
juansal12 0:c792b17d9f78 120 }
juansal12 0:c792b17d9f78 121
juansal12 0:c792b17d9f78 122
juansal12 0:c792b17d9f78 123 /** \brief Get Process Stack Pointer
juansal12 0:c792b17d9f78 124
juansal12 0:c792b17d9f78 125 This function returns the current value of the Process Stack Pointer (PSP).
juansal12 0:c792b17d9f78 126
juansal12 0:c792b17d9f78 127 \return PSP Register value
juansal12 0:c792b17d9f78 128 */
juansal12 0:c792b17d9f78 129 __STATIC_INLINE uint32_t __get_PSP(void)
juansal12 0:c792b17d9f78 130 {
juansal12 0:c792b17d9f78 131 register uint32_t __regProcessStackPointer __ASM("psp");
juansal12 0:c792b17d9f78 132 return(__regProcessStackPointer);
juansal12 0:c792b17d9f78 133 }
juansal12 0:c792b17d9f78 134
juansal12 0:c792b17d9f78 135
juansal12 0:c792b17d9f78 136 /** \brief Set Process Stack Pointer
juansal12 0:c792b17d9f78 137
juansal12 0:c792b17d9f78 138 This function assigns the given value to the Process Stack Pointer (PSP).
juansal12 0:c792b17d9f78 139
juansal12 0:c792b17d9f78 140 \param [in] topOfProcStack Process Stack Pointer value to set
juansal12 0:c792b17d9f78 141 */
juansal12 0:c792b17d9f78 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
juansal12 0:c792b17d9f78 143 {
juansal12 0:c792b17d9f78 144 register uint32_t __regProcessStackPointer __ASM("psp");
juansal12 0:c792b17d9f78 145 __regProcessStackPointer = topOfProcStack;
juansal12 0:c792b17d9f78 146 }
juansal12 0:c792b17d9f78 147
juansal12 0:c792b17d9f78 148
juansal12 0:c792b17d9f78 149 /** \brief Get Main Stack Pointer
juansal12 0:c792b17d9f78 150
juansal12 0:c792b17d9f78 151 This function returns the current value of the Main Stack Pointer (MSP).
juansal12 0:c792b17d9f78 152
juansal12 0:c792b17d9f78 153 \return MSP Register value
juansal12 0:c792b17d9f78 154 */
juansal12 0:c792b17d9f78 155 __STATIC_INLINE uint32_t __get_MSP(void)
juansal12 0:c792b17d9f78 156 {
juansal12 0:c792b17d9f78 157 register uint32_t __regMainStackPointer __ASM("msp");
juansal12 0:c792b17d9f78 158 return(__regMainStackPointer);
juansal12 0:c792b17d9f78 159 }
juansal12 0:c792b17d9f78 160
juansal12 0:c792b17d9f78 161
juansal12 0:c792b17d9f78 162 /** \brief Set Main Stack Pointer
juansal12 0:c792b17d9f78 163
juansal12 0:c792b17d9f78 164 This function assigns the given value to the Main Stack Pointer (MSP).
juansal12 0:c792b17d9f78 165
juansal12 0:c792b17d9f78 166 \param [in] topOfMainStack Main Stack Pointer value to set
juansal12 0:c792b17d9f78 167 */
juansal12 0:c792b17d9f78 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
juansal12 0:c792b17d9f78 169 {
juansal12 0:c792b17d9f78 170 register uint32_t __regMainStackPointer __ASM("msp");
juansal12 0:c792b17d9f78 171 __regMainStackPointer = topOfMainStack;
juansal12 0:c792b17d9f78 172 }
juansal12 0:c792b17d9f78 173
juansal12 0:c792b17d9f78 174
juansal12 0:c792b17d9f78 175 /** \brief Get Priority Mask
juansal12 0:c792b17d9f78 176
juansal12 0:c792b17d9f78 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
juansal12 0:c792b17d9f78 178
juansal12 0:c792b17d9f78 179 \return Priority Mask value
juansal12 0:c792b17d9f78 180 */
juansal12 0:c792b17d9f78 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
juansal12 0:c792b17d9f78 182 {
juansal12 0:c792b17d9f78 183 register uint32_t __regPriMask __ASM("primask");
juansal12 0:c792b17d9f78 184 return(__regPriMask);
juansal12 0:c792b17d9f78 185 }
juansal12 0:c792b17d9f78 186
juansal12 0:c792b17d9f78 187
juansal12 0:c792b17d9f78 188 /** \brief Set Priority Mask
juansal12 0:c792b17d9f78 189
juansal12 0:c792b17d9f78 190 This function assigns the given value to the Priority Mask Register.
juansal12 0:c792b17d9f78 191
juansal12 0:c792b17d9f78 192 \param [in] priMask Priority Mask
juansal12 0:c792b17d9f78 193 */
juansal12 0:c792b17d9f78 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
juansal12 0:c792b17d9f78 195 {
juansal12 0:c792b17d9f78 196 register uint32_t __regPriMask __ASM("primask");
juansal12 0:c792b17d9f78 197 __regPriMask = (priMask);
juansal12 0:c792b17d9f78 198 }
juansal12 0:c792b17d9f78 199
juansal12 0:c792b17d9f78 200
juansal12 0:c792b17d9f78 201 #if (__CORTEX_M >= 0x03)
juansal12 0:c792b17d9f78 202
juansal12 0:c792b17d9f78 203 /** \brief Enable FIQ
juansal12 0:c792b17d9f78 204
juansal12 0:c792b17d9f78 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
juansal12 0:c792b17d9f78 206 Can only be executed in Privileged modes.
juansal12 0:c792b17d9f78 207 */
juansal12 0:c792b17d9f78 208 #define __enable_fault_irq __enable_fiq
juansal12 0:c792b17d9f78 209
juansal12 0:c792b17d9f78 210
juansal12 0:c792b17d9f78 211 /** \brief Disable FIQ
juansal12 0:c792b17d9f78 212
juansal12 0:c792b17d9f78 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
juansal12 0:c792b17d9f78 214 Can only be executed in Privileged modes.
juansal12 0:c792b17d9f78 215 */
juansal12 0:c792b17d9f78 216 #define __disable_fault_irq __disable_fiq
juansal12 0:c792b17d9f78 217
juansal12 0:c792b17d9f78 218
juansal12 0:c792b17d9f78 219 /** \brief Get Base Priority
juansal12 0:c792b17d9f78 220
juansal12 0:c792b17d9f78 221 This function returns the current value of the Base Priority register.
juansal12 0:c792b17d9f78 222
juansal12 0:c792b17d9f78 223 \return Base Priority register value
juansal12 0:c792b17d9f78 224 */
juansal12 0:c792b17d9f78 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
juansal12 0:c792b17d9f78 226 {
juansal12 0:c792b17d9f78 227 register uint32_t __regBasePri __ASM("basepri");
juansal12 0:c792b17d9f78 228 return(__regBasePri);
juansal12 0:c792b17d9f78 229 }
juansal12 0:c792b17d9f78 230
juansal12 0:c792b17d9f78 231
juansal12 0:c792b17d9f78 232 /** \brief Set Base Priority
juansal12 0:c792b17d9f78 233
juansal12 0:c792b17d9f78 234 This function assigns the given value to the Base Priority register.
juansal12 0:c792b17d9f78 235
juansal12 0:c792b17d9f78 236 \param [in] basePri Base Priority value to set
juansal12 0:c792b17d9f78 237 */
juansal12 0:c792b17d9f78 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
juansal12 0:c792b17d9f78 239 {
juansal12 0:c792b17d9f78 240 register uint32_t __regBasePri __ASM("basepri");
juansal12 0:c792b17d9f78 241 __regBasePri = (basePri & 0xff);
juansal12 0:c792b17d9f78 242 }
juansal12 0:c792b17d9f78 243
juansal12 0:c792b17d9f78 244
juansal12 0:c792b17d9f78 245 /** \brief Get Fault Mask
juansal12 0:c792b17d9f78 246
juansal12 0:c792b17d9f78 247 This function returns the current value of the Fault Mask register.
juansal12 0:c792b17d9f78 248
juansal12 0:c792b17d9f78 249 \return Fault Mask register value
juansal12 0:c792b17d9f78 250 */
juansal12 0:c792b17d9f78 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
juansal12 0:c792b17d9f78 252 {
juansal12 0:c792b17d9f78 253 register uint32_t __regFaultMask __ASM("faultmask");
juansal12 0:c792b17d9f78 254 return(__regFaultMask);
juansal12 0:c792b17d9f78 255 }
juansal12 0:c792b17d9f78 256
juansal12 0:c792b17d9f78 257
juansal12 0:c792b17d9f78 258 /** \brief Set Fault Mask
juansal12 0:c792b17d9f78 259
juansal12 0:c792b17d9f78 260 This function assigns the given value to the Fault Mask register.
juansal12 0:c792b17d9f78 261
juansal12 0:c792b17d9f78 262 \param [in] faultMask Fault Mask value to set
juansal12 0:c792b17d9f78 263 */
juansal12 0:c792b17d9f78 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
juansal12 0:c792b17d9f78 265 {
juansal12 0:c792b17d9f78 266 register uint32_t __regFaultMask __ASM("faultmask");
juansal12 0:c792b17d9f78 267 __regFaultMask = (faultMask & (uint32_t)1);
juansal12 0:c792b17d9f78 268 }
juansal12 0:c792b17d9f78 269
juansal12 0:c792b17d9f78 270 #endif /* (__CORTEX_M >= 0x03) */
juansal12 0:c792b17d9f78 271
juansal12 0:c792b17d9f78 272
juansal12 0:c792b17d9f78 273 #if (__CORTEX_M == 0x04)
juansal12 0:c792b17d9f78 274
juansal12 0:c792b17d9f78 275 /** \brief Get FPSCR
juansal12 0:c792b17d9f78 276
juansal12 0:c792b17d9f78 277 This function returns the current value of the Floating Point Status/Control register.
juansal12 0:c792b17d9f78 278
juansal12 0:c792b17d9f78 279 \return Floating Point Status/Control register value
juansal12 0:c792b17d9f78 280 */
juansal12 0:c792b17d9f78 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
juansal12 0:c792b17d9f78 282 {
juansal12 0:c792b17d9f78 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
juansal12 0:c792b17d9f78 284 register uint32_t __regfpscr __ASM("fpscr");
juansal12 0:c792b17d9f78 285 return(__regfpscr);
juansal12 0:c792b17d9f78 286 #else
juansal12 0:c792b17d9f78 287 return(0);
juansal12 0:c792b17d9f78 288 #endif
juansal12 0:c792b17d9f78 289 }
juansal12 0:c792b17d9f78 290
juansal12 0:c792b17d9f78 291
juansal12 0:c792b17d9f78 292 /** \brief Set FPSCR
juansal12 0:c792b17d9f78 293
juansal12 0:c792b17d9f78 294 This function assigns the given value to the Floating Point Status/Control register.
juansal12 0:c792b17d9f78 295
juansal12 0:c792b17d9f78 296 \param [in] fpscr Floating Point Status/Control value to set
juansal12 0:c792b17d9f78 297 */
juansal12 0:c792b17d9f78 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
juansal12 0:c792b17d9f78 299 {
juansal12 0:c792b17d9f78 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
juansal12 0:c792b17d9f78 301 register uint32_t __regfpscr __ASM("fpscr");
juansal12 0:c792b17d9f78 302 __regfpscr = (fpscr);
juansal12 0:c792b17d9f78 303 #endif
juansal12 0:c792b17d9f78 304 }
juansal12 0:c792b17d9f78 305
juansal12 0:c792b17d9f78 306 #endif /* (__CORTEX_M == 0x04) */
juansal12 0:c792b17d9f78 307
juansal12 0:c792b17d9f78 308
juansal12 0:c792b17d9f78 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
juansal12 0:c792b17d9f78 310 /* IAR iccarm specific functions */
juansal12 0:c792b17d9f78 311
juansal12 0:c792b17d9f78 312 #include <cmsis_iar.h>
juansal12 0:c792b17d9f78 313
juansal12 0:c792b17d9f78 314
juansal12 0:c792b17d9f78 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
juansal12 0:c792b17d9f78 316 /* TI CCS specific functions */
juansal12 0:c792b17d9f78 317
juansal12 0:c792b17d9f78 318 #include <cmsis_ccs.h>
juansal12 0:c792b17d9f78 319
juansal12 0:c792b17d9f78 320
juansal12 0:c792b17d9f78 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
juansal12 0:c792b17d9f78 322 /* GNU gcc specific functions */
juansal12 0:c792b17d9f78 323
juansal12 0:c792b17d9f78 324 /** \brief Enable IRQ Interrupts
juansal12 0:c792b17d9f78 325
juansal12 0:c792b17d9f78 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
juansal12 0:c792b17d9f78 327 Can only be executed in Privileged modes.
juansal12 0:c792b17d9f78 328 */
juansal12 0:c792b17d9f78 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
juansal12 0:c792b17d9f78 330 {
juansal12 0:c792b17d9f78 331 __ASM volatile ("cpsie i" : : : "memory");
juansal12 0:c792b17d9f78 332 }
juansal12 0:c792b17d9f78 333
juansal12 0:c792b17d9f78 334
juansal12 0:c792b17d9f78 335 /** \brief Disable IRQ Interrupts
juansal12 0:c792b17d9f78 336
juansal12 0:c792b17d9f78 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
juansal12 0:c792b17d9f78 338 Can only be executed in Privileged modes.
juansal12 0:c792b17d9f78 339 */
juansal12 0:c792b17d9f78 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
juansal12 0:c792b17d9f78 341 {
juansal12 0:c792b17d9f78 342 __ASM volatile ("cpsid i" : : : "memory");
juansal12 0:c792b17d9f78 343 }
juansal12 0:c792b17d9f78 344
juansal12 0:c792b17d9f78 345
juansal12 0:c792b17d9f78 346 /** \brief Get Control Register
juansal12 0:c792b17d9f78 347
juansal12 0:c792b17d9f78 348 This function returns the content of the Control Register.
juansal12 0:c792b17d9f78 349
juansal12 0:c792b17d9f78 350 \return Control Register value
juansal12 0:c792b17d9f78 351 */
juansal12 0:c792b17d9f78 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
juansal12 0:c792b17d9f78 353 {
juansal12 0:c792b17d9f78 354 uint32_t result;
juansal12 0:c792b17d9f78 355
juansal12 0:c792b17d9f78 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
juansal12 0:c792b17d9f78 357 return(result);
juansal12 0:c792b17d9f78 358 }
juansal12 0:c792b17d9f78 359
juansal12 0:c792b17d9f78 360
juansal12 0:c792b17d9f78 361 /** \brief Set Control Register
juansal12 0:c792b17d9f78 362
juansal12 0:c792b17d9f78 363 This function writes the given value to the Control Register.
juansal12 0:c792b17d9f78 364
juansal12 0:c792b17d9f78 365 \param [in] control Control Register value to set
juansal12 0:c792b17d9f78 366 */
juansal12 0:c792b17d9f78 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
juansal12 0:c792b17d9f78 368 {
juansal12 0:c792b17d9f78 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
juansal12 0:c792b17d9f78 370 }
juansal12 0:c792b17d9f78 371
juansal12 0:c792b17d9f78 372
juansal12 0:c792b17d9f78 373 /** \brief Get IPSR Register
juansal12 0:c792b17d9f78 374
juansal12 0:c792b17d9f78 375 This function returns the content of the IPSR Register.
juansal12 0:c792b17d9f78 376
juansal12 0:c792b17d9f78 377 \return IPSR Register value
juansal12 0:c792b17d9f78 378 */
juansal12 0:c792b17d9f78 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
juansal12 0:c792b17d9f78 380 {
juansal12 0:c792b17d9f78 381 uint32_t result;
juansal12 0:c792b17d9f78 382
juansal12 0:c792b17d9f78 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
juansal12 0:c792b17d9f78 384 return(result);
juansal12 0:c792b17d9f78 385 }
juansal12 0:c792b17d9f78 386
juansal12 0:c792b17d9f78 387
juansal12 0:c792b17d9f78 388 /** \brief Get APSR Register
juansal12 0:c792b17d9f78 389
juansal12 0:c792b17d9f78 390 This function returns the content of the APSR Register.
juansal12 0:c792b17d9f78 391
juansal12 0:c792b17d9f78 392 \return APSR Register value
juansal12 0:c792b17d9f78 393 */
juansal12 0:c792b17d9f78 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
juansal12 0:c792b17d9f78 395 {
juansal12 0:c792b17d9f78 396 uint32_t result;
juansal12 0:c792b17d9f78 397
juansal12 0:c792b17d9f78 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
juansal12 0:c792b17d9f78 399 return(result);
juansal12 0:c792b17d9f78 400 }
juansal12 0:c792b17d9f78 401
juansal12 0:c792b17d9f78 402
juansal12 0:c792b17d9f78 403 /** \brief Get xPSR Register
juansal12 0:c792b17d9f78 404
juansal12 0:c792b17d9f78 405 This function returns the content of the xPSR Register.
juansal12 0:c792b17d9f78 406
juansal12 0:c792b17d9f78 407 \return xPSR Register value
juansal12 0:c792b17d9f78 408 */
juansal12 0:c792b17d9f78 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
juansal12 0:c792b17d9f78 410 {
juansal12 0:c792b17d9f78 411 uint32_t result;
juansal12 0:c792b17d9f78 412
juansal12 0:c792b17d9f78 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
juansal12 0:c792b17d9f78 414 return(result);
juansal12 0:c792b17d9f78 415 }
juansal12 0:c792b17d9f78 416
juansal12 0:c792b17d9f78 417
juansal12 0:c792b17d9f78 418 /** \brief Get Process Stack Pointer
juansal12 0:c792b17d9f78 419
juansal12 0:c792b17d9f78 420 This function returns the current value of the Process Stack Pointer (PSP).
juansal12 0:c792b17d9f78 421
juansal12 0:c792b17d9f78 422 \return PSP Register value
juansal12 0:c792b17d9f78 423 */
juansal12 0:c792b17d9f78 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
juansal12 0:c792b17d9f78 425 {
juansal12 0:c792b17d9f78 426 register uint32_t result;
juansal12 0:c792b17d9f78 427
juansal12 0:c792b17d9f78 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
juansal12 0:c792b17d9f78 429 return(result);
juansal12 0:c792b17d9f78 430 }
juansal12 0:c792b17d9f78 431
juansal12 0:c792b17d9f78 432
juansal12 0:c792b17d9f78 433 /** \brief Set Process Stack Pointer
juansal12 0:c792b17d9f78 434
juansal12 0:c792b17d9f78 435 This function assigns the given value to the Process Stack Pointer (PSP).
juansal12 0:c792b17d9f78 436
juansal12 0:c792b17d9f78 437 \param [in] topOfProcStack Process Stack Pointer value to set
juansal12 0:c792b17d9f78 438 */
juansal12 0:c792b17d9f78 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
juansal12 0:c792b17d9f78 440 {
juansal12 0:c792b17d9f78 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
juansal12 0:c792b17d9f78 442 }
juansal12 0:c792b17d9f78 443
juansal12 0:c792b17d9f78 444
juansal12 0:c792b17d9f78 445 /** \brief Get Main Stack Pointer
juansal12 0:c792b17d9f78 446
juansal12 0:c792b17d9f78 447 This function returns the current value of the Main Stack Pointer (MSP).
juansal12 0:c792b17d9f78 448
juansal12 0:c792b17d9f78 449 \return MSP Register value
juansal12 0:c792b17d9f78 450 */
juansal12 0:c792b17d9f78 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
juansal12 0:c792b17d9f78 452 {
juansal12 0:c792b17d9f78 453 register uint32_t result;
juansal12 0:c792b17d9f78 454
juansal12 0:c792b17d9f78 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
juansal12 0:c792b17d9f78 456 return(result);
juansal12 0:c792b17d9f78 457 }
juansal12 0:c792b17d9f78 458
juansal12 0:c792b17d9f78 459
juansal12 0:c792b17d9f78 460 /** \brief Set Main Stack Pointer
juansal12 0:c792b17d9f78 461
juansal12 0:c792b17d9f78 462 This function assigns the given value to the Main Stack Pointer (MSP).
juansal12 0:c792b17d9f78 463
juansal12 0:c792b17d9f78 464 \param [in] topOfMainStack Main Stack Pointer value to set
juansal12 0:c792b17d9f78 465 */
juansal12 0:c792b17d9f78 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
juansal12 0:c792b17d9f78 467 {
juansal12 0:c792b17d9f78 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
juansal12 0:c792b17d9f78 469 }
juansal12 0:c792b17d9f78 470
juansal12 0:c792b17d9f78 471
juansal12 0:c792b17d9f78 472 /** \brief Get Priority Mask
juansal12 0:c792b17d9f78 473
juansal12 0:c792b17d9f78 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
juansal12 0:c792b17d9f78 475
juansal12 0:c792b17d9f78 476 \return Priority Mask value
juansal12 0:c792b17d9f78 477 */
juansal12 0:c792b17d9f78 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
juansal12 0:c792b17d9f78 479 {
juansal12 0:c792b17d9f78 480 uint32_t result;
juansal12 0:c792b17d9f78 481
juansal12 0:c792b17d9f78 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
juansal12 0:c792b17d9f78 483 return(result);
juansal12 0:c792b17d9f78 484 }
juansal12 0:c792b17d9f78 485
juansal12 0:c792b17d9f78 486
juansal12 0:c792b17d9f78 487 /** \brief Set Priority Mask
juansal12 0:c792b17d9f78 488
juansal12 0:c792b17d9f78 489 This function assigns the given value to the Priority Mask Register.
juansal12 0:c792b17d9f78 490
juansal12 0:c792b17d9f78 491 \param [in] priMask Priority Mask
juansal12 0:c792b17d9f78 492 */
juansal12 0:c792b17d9f78 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
juansal12 0:c792b17d9f78 494 {
juansal12 0:c792b17d9f78 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
juansal12 0:c792b17d9f78 496 }
juansal12 0:c792b17d9f78 497
juansal12 0:c792b17d9f78 498
juansal12 0:c792b17d9f78 499 #if (__CORTEX_M >= 0x03)
juansal12 0:c792b17d9f78 500
juansal12 0:c792b17d9f78 501 /** \brief Enable FIQ
juansal12 0:c792b17d9f78 502
juansal12 0:c792b17d9f78 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
juansal12 0:c792b17d9f78 504 Can only be executed in Privileged modes.
juansal12 0:c792b17d9f78 505 */
juansal12 0:c792b17d9f78 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
juansal12 0:c792b17d9f78 507 {
juansal12 0:c792b17d9f78 508 __ASM volatile ("cpsie f" : : : "memory");
juansal12 0:c792b17d9f78 509 }
juansal12 0:c792b17d9f78 510
juansal12 0:c792b17d9f78 511
juansal12 0:c792b17d9f78 512 /** \brief Disable FIQ
juansal12 0:c792b17d9f78 513
juansal12 0:c792b17d9f78 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
juansal12 0:c792b17d9f78 515 Can only be executed in Privileged modes.
juansal12 0:c792b17d9f78 516 */
juansal12 0:c792b17d9f78 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
juansal12 0:c792b17d9f78 518 {
juansal12 0:c792b17d9f78 519 __ASM volatile ("cpsid f" : : : "memory");
juansal12 0:c792b17d9f78 520 }
juansal12 0:c792b17d9f78 521
juansal12 0:c792b17d9f78 522
juansal12 0:c792b17d9f78 523 /** \brief Get Base Priority
juansal12 0:c792b17d9f78 524
juansal12 0:c792b17d9f78 525 This function returns the current value of the Base Priority register.
juansal12 0:c792b17d9f78 526
juansal12 0:c792b17d9f78 527 \return Base Priority register value
juansal12 0:c792b17d9f78 528 */
juansal12 0:c792b17d9f78 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
juansal12 0:c792b17d9f78 530 {
juansal12 0:c792b17d9f78 531 uint32_t result;
juansal12 0:c792b17d9f78 532
juansal12 0:c792b17d9f78 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
juansal12 0:c792b17d9f78 534 return(result);
juansal12 0:c792b17d9f78 535 }
juansal12 0:c792b17d9f78 536
juansal12 0:c792b17d9f78 537
juansal12 0:c792b17d9f78 538 /** \brief Set Base Priority
juansal12 0:c792b17d9f78 539
juansal12 0:c792b17d9f78 540 This function assigns the given value to the Base Priority register.
juansal12 0:c792b17d9f78 541
juansal12 0:c792b17d9f78 542 \param [in] basePri Base Priority value to set
juansal12 0:c792b17d9f78 543 */
juansal12 0:c792b17d9f78 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
juansal12 0:c792b17d9f78 545 {
juansal12 0:c792b17d9f78 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
juansal12 0:c792b17d9f78 547 }
juansal12 0:c792b17d9f78 548
juansal12 0:c792b17d9f78 549
juansal12 0:c792b17d9f78 550 /** \brief Get Fault Mask
juansal12 0:c792b17d9f78 551
juansal12 0:c792b17d9f78 552 This function returns the current value of the Fault Mask register.
juansal12 0:c792b17d9f78 553
juansal12 0:c792b17d9f78 554 \return Fault Mask register value
juansal12 0:c792b17d9f78 555 */
juansal12 0:c792b17d9f78 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
juansal12 0:c792b17d9f78 557 {
juansal12 0:c792b17d9f78 558 uint32_t result;
juansal12 0:c792b17d9f78 559
juansal12 0:c792b17d9f78 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
juansal12 0:c792b17d9f78 561 return(result);
juansal12 0:c792b17d9f78 562 }
juansal12 0:c792b17d9f78 563
juansal12 0:c792b17d9f78 564
juansal12 0:c792b17d9f78 565 /** \brief Set Fault Mask
juansal12 0:c792b17d9f78 566
juansal12 0:c792b17d9f78 567 This function assigns the given value to the Fault Mask register.
juansal12 0:c792b17d9f78 568
juansal12 0:c792b17d9f78 569 \param [in] faultMask Fault Mask value to set
juansal12 0:c792b17d9f78 570 */
juansal12 0:c792b17d9f78 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
juansal12 0:c792b17d9f78 572 {
juansal12 0:c792b17d9f78 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
juansal12 0:c792b17d9f78 574 }
juansal12 0:c792b17d9f78 575
juansal12 0:c792b17d9f78 576 #endif /* (__CORTEX_M >= 0x03) */
juansal12 0:c792b17d9f78 577
juansal12 0:c792b17d9f78 578
juansal12 0:c792b17d9f78 579 #if (__CORTEX_M == 0x04)
juansal12 0:c792b17d9f78 580
juansal12 0:c792b17d9f78 581 /** \brief Get FPSCR
juansal12 0:c792b17d9f78 582
juansal12 0:c792b17d9f78 583 This function returns the current value of the Floating Point Status/Control register.
juansal12 0:c792b17d9f78 584
juansal12 0:c792b17d9f78 585 \return Floating Point Status/Control register value
juansal12 0:c792b17d9f78 586 */
juansal12 0:c792b17d9f78 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
juansal12 0:c792b17d9f78 588 {
juansal12 0:c792b17d9f78 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
juansal12 0:c792b17d9f78 590 uint32_t result;
juansal12 0:c792b17d9f78 591
juansal12 0:c792b17d9f78 592 /* Empty asm statement works as a scheduling barrier */
juansal12 0:c792b17d9f78 593 __ASM volatile ("");
juansal12 0:c792b17d9f78 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
juansal12 0:c792b17d9f78 595 __ASM volatile ("");
juansal12 0:c792b17d9f78 596 return(result);
juansal12 0:c792b17d9f78 597 #else
juansal12 0:c792b17d9f78 598 return(0);
juansal12 0:c792b17d9f78 599 #endif
juansal12 0:c792b17d9f78 600 }
juansal12 0:c792b17d9f78 601
juansal12 0:c792b17d9f78 602
juansal12 0:c792b17d9f78 603 /** \brief Set FPSCR
juansal12 0:c792b17d9f78 604
juansal12 0:c792b17d9f78 605 This function assigns the given value to the Floating Point Status/Control register.
juansal12 0:c792b17d9f78 606
juansal12 0:c792b17d9f78 607 \param [in] fpscr Floating Point Status/Control value to set
juansal12 0:c792b17d9f78 608 */
juansal12 0:c792b17d9f78 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
juansal12 0:c792b17d9f78 610 {
juansal12 0:c792b17d9f78 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
juansal12 0:c792b17d9f78 612 /* Empty asm statement works as a scheduling barrier */
juansal12 0:c792b17d9f78 613 __ASM volatile ("");
juansal12 0:c792b17d9f78 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
juansal12 0:c792b17d9f78 615 __ASM volatile ("");
juansal12 0:c792b17d9f78 616 #endif
juansal12 0:c792b17d9f78 617 }
juansal12 0:c792b17d9f78 618
juansal12 0:c792b17d9f78 619 #endif /* (__CORTEX_M == 0x04) */
juansal12 0:c792b17d9f78 620
juansal12 0:c792b17d9f78 621
juansal12 0:c792b17d9f78 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
juansal12 0:c792b17d9f78 623 /* TASKING carm specific functions */
juansal12 0:c792b17d9f78 624
juansal12 0:c792b17d9f78 625 /*
juansal12 0:c792b17d9f78 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
juansal12 0:c792b17d9f78 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
juansal12 0:c792b17d9f78 628 * Including the CMSIS ones.
juansal12 0:c792b17d9f78 629 */
juansal12 0:c792b17d9f78 630
juansal12 0:c792b17d9f78 631 #endif
juansal12 0:c792b17d9f78 632
juansal12 0:c792b17d9f78 633 /*@} end of CMSIS_Core_RegAccFunctions */
juansal12 0:c792b17d9f78 634
juansal12 0:c792b17d9f78 635
juansal12 0:c792b17d9f78 636 #endif /* __CORE_CMFUNC_H */