![](/media/cache/profiles/781397bc0630d47ab531ea850bddcf63.50x50_q85.jpg)
Assembly procedure that represents binary using the LEDs on the mbed.
binasm.s@2:a81c9bc37084, 2011-01-28 (annotated)
- Committer:
- jp
- Date:
- Fri Jan 28 02:40:35 2011 +0000
- Revision:
- 2:a81c9bc37084
- Parent:
- 0:13e4e935bed6
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
jp | 2:a81c9bc37084 | 1 | AREA |.data|, DATA, READWRITE |
jp | 2:a81c9bc37084 | 2 | EXPORT leds |
jp | 2:a81c9bc37084 | 3 | |
jp | 2:a81c9bc37084 | 4 | ;BIT MASKS FOR LED1...LED4 |
jp | 2:a81c9bc37084 | 5 | |
jp | 2:a81c9bc37084 | 6 | LED1 EQU 0x040000 |
jp | 2:a81c9bc37084 | 7 | LED2 EQU 0x100000 |
jp | 2:a81c9bc37084 | 8 | LED3 EQU 0x200000 |
jp | 2:a81c9bc37084 | 9 | LED4 EQU 0x800000 |
jp | 2:a81c9bc37084 | 10 | ALLLEDS EQU LED1 :OR: LED2 :OR: LED3 :OR: LED4 |
jp | 2:a81c9bc37084 | 11 | |
jp | 2:a81c9bc37084 | 12 | leds DCD LED1, LED2, LED3, LED4 |
jp | 2:a81c9bc37084 | 13 | |
jp | 2:a81c9bc37084 | 14 | ALIGN |
jp | 2:a81c9bc37084 | 15 | |
jp | 0:13e4e935bed6 | 16 | AREA |.text|, CODE, READONLY |
jp | 0:13e4e935bed6 | 17 | EXPORT binasm |
jp | 0:13e4e935bed6 | 18 | |
jp | 2:a81c9bc37084 | 19 | GPIO1BASE EQU 0x2009C020; GPIO port 1 base address |
jp | 2:a81c9bc37084 | 20 | GPIOSETOFF EQU 0x18 |
jp | 2:a81c9bc37084 | 21 | GPIOCLROFF EQU 0x1C |
jp | 2:a81c9bc37084 | 22 | |
jp | 0:13e4e935bed6 | 23 | binasm PROC |
jp | 0:13e4e935bed6 | 24 | PUSH {R4, LR} |
jp | 0:13e4e935bed6 | 25 | |
jp | 0:13e4e935bed6 | 26 | ; Load GPIO Port 1 base address in register R1 |
jp | 2:a81c9bc37084 | 27 | LDR R1, =GPIO1BASE |
jp | 2:a81c9bc37084 | 28 | LDR R4, =(leds+12) ; point to the last element of array |
jp | 0:13e4e935bed6 | 29 | |
jp | 0:13e4e935bed6 | 30 | ;CLEAR LEDS |
jp | 2:a81c9bc37084 | 31 | MOV R2, #ALLLEDS |
jp | 2:a81c9bc37084 | 32 | STR R2, [R1,#GPIOCLROFF] |
jp | 0:13e4e935bed6 | 33 | |
jp | 2:a81c9bc37084 | 34 | MOV R3, #4 ; COUNTER FOR LOOP |
jp | 0:13e4e935bed6 | 35 | ADD R0, R0, #1 ; INCREMENT PARAMETER BY 1 |
jp | 0:13e4e935bed6 | 36 | |
jp | 0:13e4e935bed6 | 37 | loop |
jp | 2:a81c9bc37084 | 38 | LDR R2, [R4], #-4 ; load value from the address in R4 and decrement it by 4 |
jp | 2:a81c9bc37084 | 39 | LSRS R0, R0, #1 ; shift R0 right and set carry to the shifted out bit |
jp | 0:13e4e935bed6 | 40 | |
jp | 2:a81c9bc37084 | 41 | STRCC R2, [R1,#GPIOCLROFF] ; if==0, clear LED bit |
jp | 2:a81c9bc37084 | 42 | STRCS R2, [R1,#GPIOSETOFF] ; if==1, set LED bit |
jp | 0:13e4e935bed6 | 43 | |
jp | 2:a81c9bc37084 | 44 | SUBS R3, R3, #1 |
jp | 0:13e4e935bed6 | 45 | BNE loop |
jp | 0:13e4e935bed6 | 46 | |
jp | 0:13e4e935bed6 | 47 | POP {R4, PC} |
jp | 0:13e4e935bed6 | 48 | ENDP |
jp | 0:13e4e935bed6 | 49 | |
jp | 0:13e4e935bed6 | 50 | ALIGN |
jp | 2:a81c9bc37084 | 51 | |
jp | 0:13e4e935bed6 | 52 | END |