jordan harper / Mbed 2 deprecated GameProject

Arcade style game on Nokia 5110 LCD with additional features. Includes game play song, high scores page and various settings.

Dependencies:   N5110 mbed

PowerControl/PowerControl.h@31:9e843820d76e, 2015-05-11 (annotated)

Committer:
jordaahh
Date:
Mon May 11 13:24:29 2015 +0000
Revision:
31:9e843820d76e
Parent:
22:49fa2e1e8f4b 
With reference to joystick

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jordaahh 22:49fa2e1e8f4b 1 /* mbed PowerControl Library
jordaahh 22:49fa2e1e8f4b 2 * Copyright (c) 2010 Michael Wei
jordaahh 22:49fa2e1e8f4b 3 */
jordaahh 22:49fa2e1e8f4b 4
jordaahh 22:49fa2e1e8f4b 5 #ifndef MBED_POWERCONTROL_H
jordaahh 22:49fa2e1e8f4b 6 #define MBED_POWERCONTROL_H
jordaahh 22:49fa2e1e8f4b 7
jordaahh 22:49fa2e1e8f4b 8 //shouldn't have to include, but fixes weird problems with defines
jordaahh 22:49fa2e1e8f4b 9 //#include "LPC1768/LPC17xx.h"
jordaahh 22:49fa2e1e8f4b 10
jordaahh 22:49fa2e1e8f4b 11 //System Control Register
jordaahh 22:49fa2e1e8f4b 12 // bit 0: Reserved
jordaahh 22:49fa2e1e8f4b 13 // bit 1: Sleep on Exit
jordaahh 22:49fa2e1e8f4b 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
jordaahh 22:49fa2e1e8f4b 15 // bit 2: Deep Sleep
jordaahh 22:49fa2e1e8f4b 16 #define LPC1768_SCR_SLEEPDEEP 0x4
jordaahh 22:49fa2e1e8f4b 17 // bit 3: Resereved
jordaahh 22:49fa2e1e8f4b 18 // bit 4: Send on Pending
jordaahh 22:49fa2e1e8f4b 19 #define LPC1768_SCR_SEVONPEND 0x10
jordaahh 22:49fa2e1e8f4b 20 // bit 5-31: Reserved
jordaahh 22:49fa2e1e8f4b 21
jordaahh 22:49fa2e1e8f4b 22 //Power Control Register
jordaahh 22:49fa2e1e8f4b 23 // bit 0: Power mode control bit 0 (power-down mode)
jordaahh 22:49fa2e1e8f4b 24 #define LPC1768_PCON_PM0 0x1
jordaahh 22:49fa2e1e8f4b 25 // bit 1: Power mode control bit 1 (deep power-down mode)
jordaahh 22:49fa2e1e8f4b 26 #define LPC1768_PCON_PM1 0x2
jordaahh 22:49fa2e1e8f4b 27 // bit 2: Brown-out reduced power mode
jordaahh 22:49fa2e1e8f4b 28 #define LPC1768_PCON_BODRPM 0x4
jordaahh 22:49fa2e1e8f4b 29 // bit 3: Brown-out global disable
jordaahh 22:49fa2e1e8f4b 30 #define LPC1768_PCON_BOGD 0x8
jordaahh 22:49fa2e1e8f4b 31 // bit 4: Brown-out reset disable
jordaahh 22:49fa2e1e8f4b 32 #define LPC1768_PCON_BORD 0x10
jordaahh 22:49fa2e1e8f4b 33 // bit 5-7 : Reserved
jordaahh 22:49fa2e1e8f4b 34 // bit 8: Sleep Mode Entry Flag
jordaahh 22:49fa2e1e8f4b 35 #define LPC1768_PCON_SMFLAG 0x100
jordaahh 22:49fa2e1e8f4b 36 // bit 9: Deep Sleep Entry Flag
jordaahh 22:49fa2e1e8f4b 37 #define LPC1768_PCON_DSFLAG 0x200
jordaahh 22:49fa2e1e8f4b 38 // bit 10: Power Down Entry Flag
jordaahh 22:49fa2e1e8f4b 39 #define LPC1768_PCON_PDFLAG 0x400
jordaahh 22:49fa2e1e8f4b 40 // bit 11: Deep Power Down Entry Flag
jordaahh 22:49fa2e1e8f4b 41 #define LPC1768_PCON_DPDFLAG 0x800
jordaahh 22:49fa2e1e8f4b 42 // bit 12-31: Reserved
jordaahh 22:49fa2e1e8f4b 43
jordaahh 22:49fa2e1e8f4b 44 //"Sleep Mode" (WFI).
jordaahh 22:49fa2e1e8f4b 45 inline void Sleep(void)
jordaahh 22:49fa2e1e8f4b 46 {
jordaahh 22:49fa2e1e8f4b 47 __WFI();
jordaahh 22:49fa2e1e8f4b 48 }
jordaahh 22:49fa2e1e8f4b 49
jordaahh 22:49fa2e1e8f4b 50 //"Deep Sleep" Mode
jordaahh 22:49fa2e1e8f4b 51 inline void DeepSleep(void)
jordaahh 22:49fa2e1e8f4b 52 {
jordaahh 22:49fa2e1e8f4b 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jordaahh 22:49fa2e1e8f4b 54 __WFI();
jordaahh 22:49fa2e1e8f4b 55 }
jordaahh 22:49fa2e1e8f4b 56
jordaahh 22:49fa2e1e8f4b 57 //"Power-Down" Mode
jordaahh 22:49fa2e1e8f4b 58 inline void PowerDown(void)
jordaahh 22:49fa2e1e8f4b 59 {
jordaahh 22:49fa2e1e8f4b 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jordaahh 22:49fa2e1e8f4b 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
jordaahh 22:49fa2e1e8f4b 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
jordaahh 22:49fa2e1e8f4b 63 __WFI();
jordaahh 22:49fa2e1e8f4b 64 //reset back to normal
jordaahh 22:49fa2e1e8f4b 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
jordaahh 22:49fa2e1e8f4b 66 }
jordaahh 22:49fa2e1e8f4b 67
jordaahh 22:49fa2e1e8f4b 68 //"Deep Power-Down" Mode
jordaahh 22:49fa2e1e8f4b 69 inline void DeepPowerDown(void)
jordaahh 22:49fa2e1e8f4b 70 {
jordaahh 22:49fa2e1e8f4b 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jordaahh 22:49fa2e1e8f4b 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
jordaahh 22:49fa2e1e8f4b 73 __WFI();
jordaahh 22:49fa2e1e8f4b 74 //reset back to normal
jordaahh 22:49fa2e1e8f4b 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
jordaahh 22:49fa2e1e8f4b 76 }
jordaahh 22:49fa2e1e8f4b 77
jordaahh 22:49fa2e1e8f4b 78 //shut down BOD during power-down/deep sleep
jordaahh 22:49fa2e1e8f4b 79 inline void BrownOut_ReducedPowerMode_Enable(void)
jordaahh 22:49fa2e1e8f4b 80 {
jordaahh 22:49fa2e1e8f4b 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
jordaahh 22:49fa2e1e8f4b 82 }
jordaahh 22:49fa2e1e8f4b 83
jordaahh 22:49fa2e1e8f4b 84 //turn on BOD during power-down/deep sleep
jordaahh 22:49fa2e1e8f4b 85 inline void BrownOut_ReducedPowerMode_Disable(void)
jordaahh 22:49fa2e1e8f4b 86 {
jordaahh 22:49fa2e1e8f4b 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
jordaahh 22:49fa2e1e8f4b 88 }
jordaahh 22:49fa2e1e8f4b 89
jordaahh 22:49fa2e1e8f4b 90 //turn off brown out circutry
jordaahh 22:49fa2e1e8f4b 91 inline void BrownOut_Global_Disable(void)
jordaahh 22:49fa2e1e8f4b 92 {
jordaahh 22:49fa2e1e8f4b 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
jordaahh 22:49fa2e1e8f4b 94 }
jordaahh 22:49fa2e1e8f4b 95
jordaahh 22:49fa2e1e8f4b 96 //turn on brown out circutry
jordaahh 22:49fa2e1e8f4b 97 inline void BrownOut_Global_Enable(void)
jordaahh 22:49fa2e1e8f4b 98 {
jordaahh 22:49fa2e1e8f4b 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
jordaahh 22:49fa2e1e8f4b 100 }
jordaahh 22:49fa2e1e8f4b 101
jordaahh 22:49fa2e1e8f4b 102 //turn off brown out reset circutry
jordaahh 22:49fa2e1e8f4b 103 inline void BrownOut_Reset_Disable(void)
jordaahh 22:49fa2e1e8f4b 104 {
jordaahh 22:49fa2e1e8f4b 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
jordaahh 22:49fa2e1e8f4b 106 }
jordaahh 22:49fa2e1e8f4b 107
jordaahh 22:49fa2e1e8f4b 108 //turn on brown outreset circutry
jordaahh 22:49fa2e1e8f4b 109 inline void BrownOut_Reset_Enable(void)
jordaahh 22:49fa2e1e8f4b 110 {
jordaahh 22:49fa2e1e8f4b 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
jordaahh 22:49fa2e1e8f4b 112 }
jordaahh 22:49fa2e1e8f4b 113 //Peripheral Control Register
jordaahh 22:49fa2e1e8f4b 114 // bit 0: Reserved
jordaahh 22:49fa2e1e8f4b 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
jordaahh 22:49fa2e1e8f4b 116 #define LPC1768_PCONP_PCTIM0 0x2
jordaahh 22:49fa2e1e8f4b 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
jordaahh 22:49fa2e1e8f4b 118 #define LPC1768_PCONP_PCTIM1 0x4
jordaahh 22:49fa2e1e8f4b 119 // bit 3: PCUART0: UART 0 power/clock enable
jordaahh 22:49fa2e1e8f4b 120 #define LPC1768_PCONP_PCUART0 0x8
jordaahh 22:49fa2e1e8f4b 121 // bit 4: PCUART1: UART 1 power/clock enable
jordaahh 22:49fa2e1e8f4b 122 #define LPC1768_PCONP_PCUART1 0x10
jordaahh 22:49fa2e1e8f4b 123 // bit 5: Reserved
jordaahh 22:49fa2e1e8f4b 124 // bit 6: PCPWM1: PWM 1 power/clock enable
jordaahh 22:49fa2e1e8f4b 125 #define LPC1768_PCONP_PCPWM1 0x40
jordaahh 22:49fa2e1e8f4b 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
jordaahh 22:49fa2e1e8f4b 127 #define LPC1768_PCONP_PCI2C0 0x80
jordaahh 22:49fa2e1e8f4b 128 // bit 8: PCSPI: SPI interface power/clock enable
jordaahh 22:49fa2e1e8f4b 129 #define LPC1768_PCONP_PCSPI 0x100
jordaahh 22:49fa2e1e8f4b 130 // bit 9: PCRTC: RTC power/clock enable
jordaahh 22:49fa2e1e8f4b 131 #define LPC1768_PCONP_PCRTC 0x200
jordaahh 22:49fa2e1e8f4b 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
jordaahh 22:49fa2e1e8f4b 133 #define LPC1768_PCONP_PCSSP1 0x400
jordaahh 22:49fa2e1e8f4b 134 // bit 11: Reserved
jordaahh 22:49fa2e1e8f4b 135 // bit 12: PCADC: A/D converter power/clock enable
jordaahh 22:49fa2e1e8f4b 136 #define LPC1768_PCONP_PCADC 0x1000
jordaahh 22:49fa2e1e8f4b 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
jordaahh 22:49fa2e1e8f4b 138 #define LPC1768_PCONP_PCCAN1 0x2000
jordaahh 22:49fa2e1e8f4b 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
jordaahh 22:49fa2e1e8f4b 140 #define LPC1768_PCONP_PCCAN2 0x4000
jordaahh 22:49fa2e1e8f4b 141 // bit 15: PCGPIO: GPIOs power/clock enable
jordaahh 22:49fa2e1e8f4b 142 #define LPC1768_PCONP_PCGPIO 0x8000
jordaahh 22:49fa2e1e8f4b 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
jordaahh 22:49fa2e1e8f4b 144 #define LPC1768_PCONP_PCRIT 0x10000
jordaahh 22:49fa2e1e8f4b 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
jordaahh 22:49fa2e1e8f4b 146 #define LPC1768_PCONP_PCMCPWM 0x20000
jordaahh 22:49fa2e1e8f4b 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
jordaahh 22:49fa2e1e8f4b 148 #define LPC1768_PCONP_PCQEI 0x40000
jordaahh 22:49fa2e1e8f4b 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
jordaahh 22:49fa2e1e8f4b 150 #define LPC1768_PCONP_PCI2C1 0x80000
jordaahh 22:49fa2e1e8f4b 151 // bit 20: Reserved
jordaahh 22:49fa2e1e8f4b 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
jordaahh 22:49fa2e1e8f4b 153 #define LPC1768_PCONP_PCSSP0 0x200000
jordaahh 22:49fa2e1e8f4b 154 // bit 22: PCTIM2: Timer 2 power/clock enable
jordaahh 22:49fa2e1e8f4b 155 #define LPC1768_PCONP_PCTIM2 0x400000
jordaahh 22:49fa2e1e8f4b 156 // bit 23: PCTIM3: Timer 3 power/clock enable
jordaahh 22:49fa2e1e8f4b 157 #define LPC1768_PCONP_PCQTIM3 0x800000
jordaahh 22:49fa2e1e8f4b 158 // bit 24: PCUART2: UART 2 power/clock enable
jordaahh 22:49fa2e1e8f4b 159 #define LPC1768_PCONP_PCUART2 0x1000000
jordaahh 22:49fa2e1e8f4b 160 // bit 25: PCUART3: UART 3 power/clock enable
jordaahh 22:49fa2e1e8f4b 161 #define LPC1768_PCONP_PCUART3 0x2000000
jordaahh 22:49fa2e1e8f4b 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
jordaahh 22:49fa2e1e8f4b 163 #define LPC1768_PCONP_PCI2C2 0x4000000
jordaahh 22:49fa2e1e8f4b 164 // bit 27: PCI2S: I2S interface power/clock enable
jordaahh 22:49fa2e1e8f4b 165 #define LPC1768_PCONP_PCI2S 0x8000000
jordaahh 22:49fa2e1e8f4b 166 // bit 28: Reserved
jordaahh 22:49fa2e1e8f4b 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
jordaahh 22:49fa2e1e8f4b 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
jordaahh 22:49fa2e1e8f4b 169 // bit 30: PCENET: Ethernet block power/clock enable
jordaahh 22:49fa2e1e8f4b 170 #define LPC1768_PCONP_PCENET 0x40000000
jordaahh 22:49fa2e1e8f4b 171 // bit 31: PCUSB: USB interface power/clock enable
jordaahh 22:49fa2e1e8f4b 172 #define LPC1768_PCONP_PCUSB 0x80000000
jordaahh 22:49fa2e1e8f4b 173
jordaahh 22:49fa2e1e8f4b 174 //Powers Up specified Peripheral(s)
jordaahh 22:49fa2e1e8f4b 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
jordaahh 22:49fa2e1e8f4b 176 {
jordaahh 22:49fa2e1e8f4b 177 return LPC_SC->PCONP |= bitMask;
jordaahh 22:49fa2e1e8f4b 178 }
jordaahh 22:49fa2e1e8f4b 179
jordaahh 22:49fa2e1e8f4b 180 //Powers Down specified Peripheral(s)
jordaahh 22:49fa2e1e8f4b 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
jordaahh 22:49fa2e1e8f4b 182 {
jordaahh 22:49fa2e1e8f4b 183 return LPC_SC->PCONP &= ~bitMask;
jordaahh 22:49fa2e1e8f4b 184 }
jordaahh 22:49fa2e1e8f4b 185
jordaahh 22:49fa2e1e8f4b 186 //returns if the peripheral is on or off
jordaahh 22:49fa2e1e8f4b 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
jordaahh 22:49fa2e1e8f4b 188 {
jordaahh 22:49fa2e1e8f4b 189 return (LPC_SC->PCONP & peripheral) ? true : false;
jordaahh 22:49fa2e1e8f4b 190 }
jordaahh 22:49fa2e1e8f4b 191
jordaahh 22:49fa2e1e8f4b 192 #endif