Jolyon Hill / mbed-dev

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l1xx_hal_uart.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.0
bogdanm 0:9b334a45a8ff 6 * @date 5-September-2014
bogdanm 0:9b334a45a8ff 7 * @brief UART HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + IO operation functions
bogdanm 0:9b334a45a8ff 12 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 13 * + Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 14 @verbatim
bogdanm 0:9b334a45a8ff 15 ==============================================================================
bogdanm 0:9b334a45a8ff 16 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 17 ==============================================================================
bogdanm 0:9b334a45a8ff 18 [..]
bogdanm 0:9b334a45a8ff 19 The UART HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 (#) Declare a UART_HandleTypeDef handle structure.
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
bogdanm 0:9b334a45a8ff 24 (##) Enable the USARTx interface clock.
bogdanm 0:9b334a45a8ff 25 (##) UART pins configuration:
bogdanm 0:9b334a45a8ff 26 (+++) Enable the clock for the UART GPIOs.
bogdanm 0:9b334a45a8ff 27 (+++) Configure these UART pins as alternate function pull-up.
bogdanm 0:9b334a45a8ff 28 (##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
bogdanm 0:9b334a45a8ff 29 and HAL_UART_Receive_IT() APIs):
bogdanm 0:9b334a45a8ff 30 (+++) Configure the USARTx interrupt priority.
bogdanm 0:9b334a45a8ff 31 (+++) Enable the NVIC USART IRQ handle.
bogdanm 0:9b334a45a8ff 32 (##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
bogdanm 0:9b334a45a8ff 33 and HAL_UART_Receive_DMA() APIs):
bogdanm 0:9b334a45a8ff 34 (+++) Declare a DMA handle structure for the Tx/Rx channel.
bogdanm 0:9b334a45a8ff 35 (+++) Enable the DMAx interface clock.
bogdanm 0:9b334a45a8ff 36 (+++) Configure the declared DMA handle structure with the required
bogdanm 0:9b334a45a8ff 37 Tx/Rx parameters.
bogdanm 0:9b334a45a8ff 38 (+++) Configure the DMA Tx/Rx channel.
bogdanm 0:9b334a45a8ff 39 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
bogdanm 0:9b334a45a8ff 40 (+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm 0:9b334a45a8ff 41 interrupt on the DMA Tx/Rx channel.
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
bogdanm 0:9b334a45a8ff 44 flow control and Mode(Receiver/Transmitter) in the huart Init structure.
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 (#) For the UART asynchronous mode, initialize the UART registers by calling
bogdanm 0:9b334a45a8ff 47 the HAL_UART_Init() API.
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 (#) For the UART Half duplex mode, initialize the UART registers by calling
bogdanm 0:9b334a45a8ff 50 the HAL_HalfDuplex_Init() API.
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 (#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 (#) For the Multi-Processor mode, initialize the UART registers by calling
bogdanm 0:9b334a45a8ff 55 the HAL_MultiProcessor_Init() API.
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 [..]
bogdanm 0:9b334a45a8ff 58 (@) The specific UART interrupts (Transmission complete interrupt,
bogdanm 0:9b334a45a8ff 59 RXNE interrupt and Error Interrupts) will be managed using the macros
bogdanm 0:9b334a45a8ff 60 __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
bogdanm 0:9b334a45a8ff 61 and receive process.
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 [..]
bogdanm 0:9b334a45a8ff 64 (@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
bogdanm 0:9b334a45a8ff 65 low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customed
bogdanm 0:9b334a45a8ff 66 HAL_UART_MspInit() API.
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 [..]
bogdanm 0:9b334a45a8ff 69 Three operation modes are available within this driver :
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 72 =================================
bogdanm 0:9b334a45a8ff 73 [..]
bogdanm 0:9b334a45a8ff 74 (+) Send an amount of data in blocking mode using HAL_UART_Transmit()
bogdanm 0:9b334a45a8ff 75 (+) Receive an amount of data in blocking mode using HAL_UART_Receive()
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 *** Interrupt mode IO operation ***
bogdanm 0:9b334a45a8ff 78 ===================================
bogdanm 0:9b334a45a8ff 79 [..]
bogdanm 0:9b334a45a8ff 80 (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
bogdanm 0:9b334a45a8ff 81 (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 82 add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
bogdanm 0:9b334a45a8ff 83 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 84 add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm 0:9b334a45a8ff 85 (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
bogdanm 0:9b334a45a8ff 86 (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 87 add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
bogdanm 0:9b334a45a8ff 88 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 89 add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm 0:9b334a45a8ff 90 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 91 add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 94 ==============================
bogdanm 0:9b334a45a8ff 95 [..]
bogdanm 0:9b334a45a8ff 96 (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
bogdanm 0:9b334a45a8ff 97 (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 98 add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
bogdanm 0:9b334a45a8ff 99 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 100 add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm 0:9b334a45a8ff 101 (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
bogdanm 0:9b334a45a8ff 102 (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 103 add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
bogdanm 0:9b334a45a8ff 104 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 105 add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm 0:9b334a45a8ff 106 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 107 add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm 0:9b334a45a8ff 108 (+) Pause the DMA Transfer using HAL_UART_DMAPause()
bogdanm 0:9b334a45a8ff 109 (+) Resume the DMA Transfer using HAL_UART_DMAResume()
bogdanm 0:9b334a45a8ff 110 (+) Stop the DMA Transfer using HAL_UART_DMAStop()
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 *** UART HAL driver macros list ***
bogdanm 0:9b334a45a8ff 113 =============================================
bogdanm 0:9b334a45a8ff 114 [..]
bogdanm 0:9b334a45a8ff 115 Below the list of most used macros in UART HAL driver.
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 (+) __HAL_UART_ENABLE: Enable the UART peripheral
bogdanm 0:9b334a45a8ff 118 (+) __HAL_UART_DISABLE: Disable the UART peripheral
bogdanm 0:9b334a45a8ff 119 (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
bogdanm 0:9b334a45a8ff 120 (+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
bogdanm 0:9b334a45a8ff 121 (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
bogdanm 0:9b334a45a8ff 122 (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 [..]
bogdanm 0:9b334a45a8ff 125 (@) You can refer to the UART HAL driver header file for more useful macros
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 @endverbatim
bogdanm 0:9b334a45a8ff 128 ******************************************************************************
bogdanm 0:9b334a45a8ff 129 * @attention
bogdanm 0:9b334a45a8ff 130 *
bogdanm 0:9b334a45a8ff 131 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 132 *
bogdanm 0:9b334a45a8ff 133 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 134 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 135 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 136 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 137 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 138 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 139 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 140 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 141 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 142 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 143 *
bogdanm 0:9b334a45a8ff 144 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 145 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 146 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 147 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 148 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 149 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 150 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 151 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 152 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 153 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 154 *
bogdanm 0:9b334a45a8ff 155 ******************************************************************************
bogdanm 0:9b334a45a8ff 156 */
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 159 #include "stm32l1xx_hal.h"
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 /** @addtogroup STM32L1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 162 * @{
bogdanm 0:9b334a45a8ff 163 */
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /** @defgroup UART UART HAL module driver
bogdanm 0:9b334a45a8ff 166 * @brief HAL UART module driver
bogdanm 0:9b334a45a8ff 167 * @{
bogdanm 0:9b334a45a8ff 168 */
bogdanm 0:9b334a45a8ff 169 #ifdef HAL_UART_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 172 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 173 /** @defgroup UART_Private_Constants UART Private Constants
bogdanm 0:9b334a45a8ff 174 * @{
bogdanm 0:9b334a45a8ff 175 */
bogdanm 0:9b334a45a8ff 176 #define UART_TIMEOUT_VALUE 22000
bogdanm 0:9b334a45a8ff 177 /**
bogdanm 0:9b334a45a8ff 178 * @}
bogdanm 0:9b334a45a8ff 179 */
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 182 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 183 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 184 /** @addtogroup UART_Private_Functions UART Private Functions
bogdanm 0:9b334a45a8ff 185 * @{
bogdanm 0:9b334a45a8ff 186 */
bogdanm 0:9b334a45a8ff 187 static void UART_SetConfig (UART_HandleTypeDef *huart);
bogdanm 0:9b334a45a8ff 188 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
bogdanm 0:9b334a45a8ff 189 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
bogdanm 0:9b334a45a8ff 190 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
bogdanm 0:9b334a45a8ff 191 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 192 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 193 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 194 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 195 static void UART_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 196 static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
bogdanm 0:9b334a45a8ff 197 /**
bogdanm 0:9b334a45a8ff 198 * @}
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /* Exported functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 /** @defgroup UART_Exported_Functions UART Exported Functions
bogdanm 0:9b334a45a8ff 204 * @{
bogdanm 0:9b334a45a8ff 205 */
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 208 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 209 *
bogdanm 0:9b334a45a8ff 210 @verbatim
bogdanm 0:9b334a45a8ff 211 ===============================================================================
bogdanm 0:9b334a45a8ff 212 ##### Initialization and Configuration functions #####
bogdanm 0:9b334a45a8ff 213 ===============================================================================
bogdanm 0:9b334a45a8ff 214 [..]
bogdanm 0:9b334a45a8ff 215 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
bogdanm 0:9b334a45a8ff 216 in asynchronous mode.
bogdanm 0:9b334a45a8ff 217 (+) For the asynchronous mode only these parameters can be configured:
bogdanm 0:9b334a45a8ff 218 (++) Baud Rate
bogdanm 0:9b334a45a8ff 219 (++) Word Length
bogdanm 0:9b334a45a8ff 220 (++) Stop Bit
bogdanm 0:9b334a45a8ff 221 (++) Parity: If the parity is enabled, then the MSB bit of the data written
bogdanm 0:9b334a45a8ff 222 in the data register is transmitted but is changed by the parity bit.
bogdanm 0:9b334a45a8ff 223 Depending on the frame length defined by the M bit (8-bits or 9-bits),
bogdanm 0:9b334a45a8ff 224 the possible UART frame formats are as listed in the following table:
bogdanm 0:9b334a45a8ff 225 +-------------------------------------------------------------+
bogdanm 0:9b334a45a8ff 226 | M bit | PCE bit | UART frame |
bogdanm 0:9b334a45a8ff 227 |---------------------|---------------------------------------|
bogdanm 0:9b334a45a8ff 228 | 0 | 0 | | SB | 8 bit data | STB | |
bogdanm 0:9b334a45a8ff 229 |---------|-----------|---------------------------------------|
bogdanm 0:9b334a45a8ff 230 | 0 | 1 | | SB | 7 bit data | PB | STB | |
bogdanm 0:9b334a45a8ff 231 |---------|-----------|---------------------------------------|
bogdanm 0:9b334a45a8ff 232 | 1 | 0 | | SB | 9 bit data | STB | |
bogdanm 0:9b334a45a8ff 233 |---------|-----------|---------------------------------------|
bogdanm 0:9b334a45a8ff 234 | 1 | 1 | | SB | 8 bit data | PB | STB | |
bogdanm 0:9b334a45a8ff 235 +-------------------------------------------------------------+
bogdanm 0:9b334a45a8ff 236 (++) Hardware flow control
bogdanm 0:9b334a45a8ff 237 (++) Receiver/transmitter modes
bogdanm 0:9b334a45a8ff 238 (++) Over Sampling Methode
bogdanm 0:9b334a45a8ff 239 [..]
bogdanm 0:9b334a45a8ff 240 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
bogdanm 0:9b334a45a8ff 241 follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor
bogdanm 0:9b334a45a8ff 242 configuration procedures (details for the procedures are available in reference manual (RM0038)).
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 @endverbatim
bogdanm 0:9b334a45a8ff 245 * @{
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /**
bogdanm 0:9b334a45a8ff 249 * @brief Initializes the UART mode according to the specified parameters in
bogdanm 0:9b334a45a8ff 250 * the UART_InitTypeDef and create the associated handle.
bogdanm 0:9b334a45a8ff 251 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 252 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 253 * @retval HAL status
bogdanm 0:9b334a45a8ff 254 */
bogdanm 0:9b334a45a8ff 255 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 256 {
bogdanm 0:9b334a45a8ff 257 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 258 if(huart == HAL_NULL)
bogdanm 0:9b334a45a8ff 259 {
bogdanm 0:9b334a45a8ff 260 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 261 }
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
bogdanm 0:9b334a45a8ff 264 {
bogdanm 0:9b334a45a8ff 265 /* Check the parameters */
bogdanm 0:9b334a45a8ff 266 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 267 }
bogdanm 0:9b334a45a8ff 268 else
bogdanm 0:9b334a45a8ff 269 {
bogdanm 0:9b334a45a8ff 270 /* Check the parameters */
bogdanm 0:9b334a45a8ff 271 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 272 }
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 if(huart->State == HAL_UART_STATE_RESET)
bogdanm 0:9b334a45a8ff 275 {
bogdanm 0:9b334a45a8ff 276 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 277 HAL_UART_MspInit(huart);
bogdanm 0:9b334a45a8ff 278 }
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 /* Disable the peripheral */
bogdanm 0:9b334a45a8ff 283 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 /* Set the UART Communication parameters */
bogdanm 0:9b334a45a8ff 286 UART_SetConfig(huart);
bogdanm 0:9b334a45a8ff 287
bogdanm 0:9b334a45a8ff 288 /* In asynchronous mode, the following bits must be kept cleared:
bogdanm 0:9b334a45a8ff 289 - LINEN and CLKEN bits in the USART_CR2 register,
bogdanm 0:9b334a45a8ff 290 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
bogdanm 0:9b334a45a8ff 291 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
bogdanm 0:9b334a45a8ff 292 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294 /* Enable the peripheral */
bogdanm 0:9b334a45a8ff 295 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 296
bogdanm 0:9b334a45a8ff 297 /* Initialize the UART state */
bogdanm 0:9b334a45a8ff 298 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 299 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 return HAL_OK;
bogdanm 0:9b334a45a8ff 302 }
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 /**
bogdanm 0:9b334a45a8ff 305 * @brief Initializes the half-duplex mode according to the specified
bogdanm 0:9b334a45a8ff 306 * parameters in the UART_InitTypeDef and create the associated handle.
bogdanm 0:9b334a45a8ff 307 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 308 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 309 * @retval HAL status
bogdanm 0:9b334a45a8ff 310 */
bogdanm 0:9b334a45a8ff 311 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 312 {
bogdanm 0:9b334a45a8ff 313 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 314 if(huart == HAL_NULL)
bogdanm 0:9b334a45a8ff 315 {
bogdanm 0:9b334a45a8ff 316 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 317 }
bogdanm 0:9b334a45a8ff 318
bogdanm 0:9b334a45a8ff 319 /* Check UART instance */
bogdanm 0:9b334a45a8ff 320 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 321
bogdanm 0:9b334a45a8ff 322 if(huart->State == HAL_UART_STATE_RESET)
bogdanm 0:9b334a45a8ff 323 {
bogdanm 0:9b334a45a8ff 324 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 325 HAL_UART_MspInit(huart);
bogdanm 0:9b334a45a8ff 326 }
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330 /* Disable the peripheral */
bogdanm 0:9b334a45a8ff 331 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 /* Set the UART Communication parameters */
bogdanm 0:9b334a45a8ff 334 UART_SetConfig(huart);
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 /* In half-duplex mode, the following bits must be kept cleared:
bogdanm 0:9b334a45a8ff 337 - LINEN and CLKEN bits in the USART_CR2 register,
bogdanm 0:9b334a45a8ff 338 - SCEN and IREN bits in the USART_CR3 register.*/
bogdanm 0:9b334a45a8ff 339 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
bogdanm 0:9b334a45a8ff 340 huart->Instance->CR3 &= ~(USART_CR3_IREN | USART_CR3_SCEN);
bogdanm 0:9b334a45a8ff 341
bogdanm 0:9b334a45a8ff 342 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
bogdanm 0:9b334a45a8ff 343 huart->Instance->CR3 |= USART_CR3_HDSEL;
bogdanm 0:9b334a45a8ff 344
bogdanm 0:9b334a45a8ff 345 /* Enable the peripheral */
bogdanm 0:9b334a45a8ff 346 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 /* Initialize the UART state*/
bogdanm 0:9b334a45a8ff 349 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 350 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 351
bogdanm 0:9b334a45a8ff 352 return HAL_OK;
bogdanm 0:9b334a45a8ff 353 }
bogdanm 0:9b334a45a8ff 354
bogdanm 0:9b334a45a8ff 355 /**
bogdanm 0:9b334a45a8ff 356 * @brief Initializes the LIN mode according to the specified
bogdanm 0:9b334a45a8ff 357 * parameters in the UART_InitTypeDef and create the associated handle.
bogdanm 0:9b334a45a8ff 358 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 359 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 360 * @param BreakDetectLength: Specifies the LIN break detection length.
bogdanm 0:9b334a45a8ff 361 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 362 * @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
bogdanm 0:9b334a45a8ff 363 * @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
bogdanm 0:9b334a45a8ff 364 * @retval HAL status
bogdanm 0:9b334a45a8ff 365 */
bogdanm 0:9b334a45a8ff 366 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
bogdanm 0:9b334a45a8ff 367 {
bogdanm 0:9b334a45a8ff 368 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 369 if(huart == HAL_NULL)
bogdanm 0:9b334a45a8ff 370 {
bogdanm 0:9b334a45a8ff 371 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 372 }
bogdanm 0:9b334a45a8ff 373
bogdanm 0:9b334a45a8ff 374 /* Check the LIN UART instance */
bogdanm 0:9b334a45a8ff 375 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 376 /* Check the Break detection length parameter */
bogdanm 0:9b334a45a8ff 377 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
bogdanm 0:9b334a45a8ff 378
bogdanm 0:9b334a45a8ff 379 /* LIN mode limited to 16-bit oversampling only */
bogdanm 0:9b334a45a8ff 380 if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
bogdanm 0:9b334a45a8ff 381 {
bogdanm 0:9b334a45a8ff 382 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 383 }
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385 if(huart->State == HAL_UART_STATE_RESET)
bogdanm 0:9b334a45a8ff 386 {
bogdanm 0:9b334a45a8ff 387 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 388 HAL_UART_MspInit(huart);
bogdanm 0:9b334a45a8ff 389 }
bogdanm 0:9b334a45a8ff 390
bogdanm 0:9b334a45a8ff 391 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 392
bogdanm 0:9b334a45a8ff 393 /* Disable the peripheral */
bogdanm 0:9b334a45a8ff 394 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396 /* Set the UART Communication parameters */
bogdanm 0:9b334a45a8ff 397 UART_SetConfig(huart);
bogdanm 0:9b334a45a8ff 398
bogdanm 0:9b334a45a8ff 399 /* In LIN mode, the following bits must be kept cleared:
bogdanm 0:9b334a45a8ff 400 - CLKEN bits in the USART_CR2 register,
bogdanm 0:9b334a45a8ff 401 - SCEN and IREN bits in the USART_CR3 register.*/
bogdanm 0:9b334a45a8ff 402 huart->Instance->CR2 &= ~(USART_CR2_CLKEN);
bogdanm 0:9b334a45a8ff 403 huart->Instance->CR3 &= ~(USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN);
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
bogdanm 0:9b334a45a8ff 406 huart->Instance->CR2 |= USART_CR2_LINEN;
bogdanm 0:9b334a45a8ff 407
bogdanm 0:9b334a45a8ff 408 /* Set the USART LIN Break detection length. */
bogdanm 0:9b334a45a8ff 409 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /* Enable the peripheral */
bogdanm 0:9b334a45a8ff 412 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 413
bogdanm 0:9b334a45a8ff 414 /* Initialize the UART state*/
bogdanm 0:9b334a45a8ff 415 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 416 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 417
bogdanm 0:9b334a45a8ff 418 return HAL_OK;
bogdanm 0:9b334a45a8ff 419 }
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 /**
bogdanm 0:9b334a45a8ff 422 * @brief Initializes the Multi-Processor mode according to the specified
bogdanm 0:9b334a45a8ff 423 * parameters in the UART_InitTypeDef and create the associated handle.
bogdanm 0:9b334a45a8ff 424 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 425 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 426 * @param Address: UART node address
bogdanm 0:9b334a45a8ff 427 * @param WakeUpMethod: specifies the UART wakeup method.
bogdanm 0:9b334a45a8ff 428 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 429 * @arg UART_WAKEUPMETHOD_IDLELINE: Wakeup by an idle line detection
bogdanm 0:9b334a45a8ff 430 * @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wakeup by an address mark
bogdanm 0:9b334a45a8ff 431 * @retval HAL status
bogdanm 0:9b334a45a8ff 432 */
bogdanm 0:9b334a45a8ff 433 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
bogdanm 0:9b334a45a8ff 434 {
bogdanm 0:9b334a45a8ff 435 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 436 if(huart == HAL_NULL)
bogdanm 0:9b334a45a8ff 437 {
bogdanm 0:9b334a45a8ff 438 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 439 }
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 /* Check UART instance capabilities */
bogdanm 0:9b334a45a8ff 442 assert_param(IS_UART_MULTIPROCESSOR_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 443
bogdanm 0:9b334a45a8ff 444 /* Check the Address & wake up method parameters */
bogdanm 0:9b334a45a8ff 445 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
bogdanm 0:9b334a45a8ff 446 assert_param(IS_UART_ADDRESS(Address));
bogdanm 0:9b334a45a8ff 447
bogdanm 0:9b334a45a8ff 448 if(huart->State == HAL_UART_STATE_RESET)
bogdanm 0:9b334a45a8ff 449 {
bogdanm 0:9b334a45a8ff 450 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 451 HAL_UART_MspInit(huart);
bogdanm 0:9b334a45a8ff 452 }
bogdanm 0:9b334a45a8ff 453
bogdanm 0:9b334a45a8ff 454 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456 /* Disable the peripheral */
bogdanm 0:9b334a45a8ff 457 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 458
bogdanm 0:9b334a45a8ff 459 /* Set the UART Communication parameters */
bogdanm 0:9b334a45a8ff 460 UART_SetConfig(huart);
bogdanm 0:9b334a45a8ff 461
bogdanm 0:9b334a45a8ff 462 /* In Multi-Processor mode, the following bits must be kept cleared:
bogdanm 0:9b334a45a8ff 463 - LINEN and CLKEN bits in the USART_CR2 register,
bogdanm 0:9b334a45a8ff 464 - SCEN, HDSEL and IREN bits in the USART_CR3 register */
bogdanm 0:9b334a45a8ff 465 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
bogdanm 0:9b334a45a8ff 466 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
bogdanm 0:9b334a45a8ff 467
bogdanm 0:9b334a45a8ff 468 /* Set the USART address node */
bogdanm 0:9b334a45a8ff 469 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, Address);
bogdanm 0:9b334a45a8ff 470
bogdanm 0:9b334a45a8ff 471 /* Set the wake up method by setting the WAKE bit in the CR1 register */
bogdanm 0:9b334a45a8ff 472 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 /* Enable the peripheral */
bogdanm 0:9b334a45a8ff 475 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 /* Initialize the UART state */
bogdanm 0:9b334a45a8ff 478 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 479 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 480
bogdanm 0:9b334a45a8ff 481 return HAL_OK;
bogdanm 0:9b334a45a8ff 482 }
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 /**
bogdanm 0:9b334a45a8ff 485 * @brief DeInitializes the UART peripheral.
bogdanm 0:9b334a45a8ff 486 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 487 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 488 * @retval HAL status
bogdanm 0:9b334a45a8ff 489 */
bogdanm 0:9b334a45a8ff 490 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 491 {
bogdanm 0:9b334a45a8ff 492 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 493 if(huart == HAL_NULL)
bogdanm 0:9b334a45a8ff 494 {
bogdanm 0:9b334a45a8ff 495 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 496 }
bogdanm 0:9b334a45a8ff 497
bogdanm 0:9b334a45a8ff 498 /* Check the parameters */
bogdanm 0:9b334a45a8ff 499 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 500
bogdanm 0:9b334a45a8ff 501 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 502
bogdanm 0:9b334a45a8ff 503 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 504 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 505
bogdanm 0:9b334a45a8ff 506 /* DeInit the low level hardware */
bogdanm 0:9b334a45a8ff 507 HAL_UART_MspDeInit(huart);
bogdanm 0:9b334a45a8ff 508
bogdanm 0:9b334a45a8ff 509 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 510 huart->State = HAL_UART_STATE_RESET;
bogdanm 0:9b334a45a8ff 511
bogdanm 0:9b334a45a8ff 512 /* Process Unlock */
bogdanm 0:9b334a45a8ff 513 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 514
bogdanm 0:9b334a45a8ff 515 return HAL_OK;
bogdanm 0:9b334a45a8ff 516 }
bogdanm 0:9b334a45a8ff 517
bogdanm 0:9b334a45a8ff 518 /**
bogdanm 0:9b334a45a8ff 519 * @brief UART MSP Init.
bogdanm 0:9b334a45a8ff 520 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 521 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 522 * @retval None
bogdanm 0:9b334a45a8ff 523 */
bogdanm 0:9b334a45a8ff 524 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 525 {
bogdanm 0:9b334a45a8ff 526 /* NOTE: This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 527 the HAL_UART_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 528 */
bogdanm 0:9b334a45a8ff 529 }
bogdanm 0:9b334a45a8ff 530
bogdanm 0:9b334a45a8ff 531 /**
bogdanm 0:9b334a45a8ff 532 * @brief UART MSP DeInit.
bogdanm 0:9b334a45a8ff 533 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 534 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 535 * @retval None
bogdanm 0:9b334a45a8ff 536 */
bogdanm 0:9b334a45a8ff 537 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 538 {
bogdanm 0:9b334a45a8ff 539 /* NOTE: This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 540 the HAL_UART_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 541 */
bogdanm 0:9b334a45a8ff 542 }
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544 /**
bogdanm 0:9b334a45a8ff 545 * @}
bogdanm 0:9b334a45a8ff 546 */
bogdanm 0:9b334a45a8ff 547
bogdanm 0:9b334a45a8ff 548 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
bogdanm 0:9b334a45a8ff 549 * @brief UART Transmit and Receive functions
bogdanm 0:9b334a45a8ff 550 *
bogdanm 0:9b334a45a8ff 551 @verbatim
bogdanm 0:9b334a45a8ff 552 ==============================================================================
bogdanm 0:9b334a45a8ff 553 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 554 ==============================================================================
bogdanm 0:9b334a45a8ff 555 [..]
bogdanm 0:9b334a45a8ff 556 This subsection provides a set of functions allowing to manage the UART asynchronous
bogdanm 0:9b334a45a8ff 557 and Half duplex data transfers.
bogdanm 0:9b334a45a8ff 558
bogdanm 0:9b334a45a8ff 559 (#) There are two modes of transfer:
bogdanm 0:9b334a45a8ff 560 (++) Blocking mode: The communication is performed in polling mode.
bogdanm 0:9b334a45a8ff 561 The HAL status of all data processing is returned by the same function
bogdanm 0:9b334a45a8ff 562 after finishing transfer.
bogdanm 0:9b334a45a8ff 563 (++) Non blocking mode: The communication is performed using Interrupts
bogdanm 0:9b334a45a8ff 564 or DMA, these APIs return the HAL status.
bogdanm 0:9b334a45a8ff 565 The end of the data processing will be indicated through the
bogdanm 0:9b334a45a8ff 566 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
bogdanm 0:9b334a45a8ff 567 using DMA mode.
bogdanm 0:9b334a45a8ff 568 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
bogdanm 0:9b334a45a8ff 569 will be executed respectivelly at the end of the transmit or receive process.
bogdanm 0:9b334a45a8ff 570 The HAL_UART_ErrorCallback() user callback will be executed when
bogdanm 0:9b334a45a8ff 571 a communication error is detected.
bogdanm 0:9b334a45a8ff 572
bogdanm 0:9b334a45a8ff 573 (#) Blocking mode APIs are:
bogdanm 0:9b334a45a8ff 574 (++) HAL_UART_Transmit()
bogdanm 0:9b334a45a8ff 575 (++) HAL_UART_Receive()
bogdanm 0:9b334a45a8ff 576
bogdanm 0:9b334a45a8ff 577 (#) Non Blocking mode APIs with Interrupt are:
bogdanm 0:9b334a45a8ff 578 (++) HAL_UART_Transmit_IT()
bogdanm 0:9b334a45a8ff 579 (++) HAL_UART_Receive_IT()
bogdanm 0:9b334a45a8ff 580 (++) HAL_UART_IRQHandler()
bogdanm 0:9b334a45a8ff 581
bogdanm 0:9b334a45a8ff 582 (#) Non Blocking mode functions with DMA are:
bogdanm 0:9b334a45a8ff 583 (++) HAL_UART_Transmit_DMA()
bogdanm 0:9b334a45a8ff 584 (++) HAL_UART_Receive_DMA()
bogdanm 0:9b334a45a8ff 585 (++) HAL_UART_DMAPause()
bogdanm 0:9b334a45a8ff 586 (++) HAL_UART_DMAResume()
bogdanm 0:9b334a45a8ff 587 (++) HAL_UART_DMAStop()
bogdanm 0:9b334a45a8ff 588
bogdanm 0:9b334a45a8ff 589 (#) A set of Transfer Complete Callbacks are provided in non blocking mode:
bogdanm 0:9b334a45a8ff 590 (++) HAL_UART_TxHalfCpltCallback()
bogdanm 0:9b334a45a8ff 591 (++) HAL_UART_TxCpltCallback()
bogdanm 0:9b334a45a8ff 592 (++) HAL_UART_RxHalfCpltCallback()
bogdanm 0:9b334a45a8ff 593 (++) HAL_UART_RxCpltCallback()
bogdanm 0:9b334a45a8ff 594 (++) HAL_UART_ErrorCallback()
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 [..]
bogdanm 0:9b334a45a8ff 597 (@) In the Half duplex communication, it is forbidden to run the transmit
bogdanm 0:9b334a45a8ff 598 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX
bogdanm 0:9b334a45a8ff 599 can't be useful.
bogdanm 0:9b334a45a8ff 600
bogdanm 0:9b334a45a8ff 601 @endverbatim
bogdanm 0:9b334a45a8ff 602 * @{
bogdanm 0:9b334a45a8ff 603 */
bogdanm 0:9b334a45a8ff 604
bogdanm 0:9b334a45a8ff 605 /**
bogdanm 0:9b334a45a8ff 606 * @brief Sends an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 607 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 608 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 609 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 610 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 611 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 612 * @retval HAL status
bogdanm 0:9b334a45a8ff 613 */
bogdanm 0:9b334a45a8ff 614 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 615 {
bogdanm 0:9b334a45a8ff 616 uint16_t* tmp;
bogdanm 0:9b334a45a8ff 617 uint32_t tmp1 = 0;
bogdanm 0:9b334a45a8ff 618
bogdanm 0:9b334a45a8ff 619 tmp1 = huart->State;
bogdanm 0:9b334a45a8ff 620 if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 621 {
bogdanm 0:9b334a45a8ff 622 if((pData == HAL_NULL) || (Size == 0))
bogdanm 0:9b334a45a8ff 623 {
bogdanm 0:9b334a45a8ff 624 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 625 }
bogdanm 0:9b334a45a8ff 626
bogdanm 0:9b334a45a8ff 627 /* Process Locked */
bogdanm 0:9b334a45a8ff 628 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 629
bogdanm 0:9b334a45a8ff 630 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 631 /* Check if a non-blocking receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 632 if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 633 {
bogdanm 0:9b334a45a8ff 634 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 635 }
bogdanm 0:9b334a45a8ff 636 else
bogdanm 0:9b334a45a8ff 637 {
bogdanm 0:9b334a45a8ff 638 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 639 }
bogdanm 0:9b334a45a8ff 640
bogdanm 0:9b334a45a8ff 641 huart->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 642 huart->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 643 while(huart->TxXferCount > 0)
bogdanm 0:9b334a45a8ff 644 {
bogdanm 0:9b334a45a8ff 645 huart->TxXferCount--;
bogdanm 0:9b334a45a8ff 646 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
bogdanm 0:9b334a45a8ff 647 {
bogdanm 0:9b334a45a8ff 648 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 649 {
bogdanm 0:9b334a45a8ff 650 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 651 }
bogdanm 0:9b334a45a8ff 652 tmp = (uint16_t*) pData;
bogdanm 0:9b334a45a8ff 653 huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
bogdanm 0:9b334a45a8ff 654 if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm 0:9b334a45a8ff 655 {
bogdanm 0:9b334a45a8ff 656 pData +=2;
bogdanm 0:9b334a45a8ff 657 }
bogdanm 0:9b334a45a8ff 658 else
bogdanm 0:9b334a45a8ff 659 {
bogdanm 0:9b334a45a8ff 660 pData +=1;
bogdanm 0:9b334a45a8ff 661 }
bogdanm 0:9b334a45a8ff 662 }
bogdanm 0:9b334a45a8ff 663 else
bogdanm 0:9b334a45a8ff 664 {
bogdanm 0:9b334a45a8ff 665 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 666 {
bogdanm 0:9b334a45a8ff 667 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 668 }
bogdanm 0:9b334a45a8ff 669 huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
bogdanm 0:9b334a45a8ff 670 }
bogdanm 0:9b334a45a8ff 671 }
bogdanm 0:9b334a45a8ff 672
bogdanm 0:9b334a45a8ff 673 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 674 {
bogdanm 0:9b334a45a8ff 675 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 676 }
bogdanm 0:9b334a45a8ff 677
bogdanm 0:9b334a45a8ff 678 /* Check if a non-blocking receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 679 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 680 {
bogdanm 0:9b334a45a8ff 681 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 682 }
bogdanm 0:9b334a45a8ff 683 else
bogdanm 0:9b334a45a8ff 684 {
bogdanm 0:9b334a45a8ff 685 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 686 }
bogdanm 0:9b334a45a8ff 687
bogdanm 0:9b334a45a8ff 688 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 689 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 690
bogdanm 0:9b334a45a8ff 691 return HAL_OK;
bogdanm 0:9b334a45a8ff 692 }
bogdanm 0:9b334a45a8ff 693 else
bogdanm 0:9b334a45a8ff 694 {
bogdanm 0:9b334a45a8ff 695 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 696 }
bogdanm 0:9b334a45a8ff 697 }
bogdanm 0:9b334a45a8ff 698
bogdanm 0:9b334a45a8ff 699 /**
bogdanm 0:9b334a45a8ff 700 * @brief Receives an amount of data in blocking mode.
bogdanm 0:9b334a45a8ff 701 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 702 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 703 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 704 * @param Size: Amount of data to be received
bogdanm 0:9b334a45a8ff 705 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 706 * @retval HAL status
bogdanm 0:9b334a45a8ff 707 */
bogdanm 0:9b334a45a8ff 708 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 709 {
bogdanm 0:9b334a45a8ff 710 uint16_t* tmp;
bogdanm 0:9b334a45a8ff 711 uint32_t tmp1 = 0;
bogdanm 0:9b334a45a8ff 712
bogdanm 0:9b334a45a8ff 713 tmp1 = huart->State;
bogdanm 0:9b334a45a8ff 714 if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 715 {
bogdanm 0:9b334a45a8ff 716 if((pData == HAL_NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 717 {
bogdanm 0:9b334a45a8ff 718 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 719 }
bogdanm 0:9b334a45a8ff 720
bogdanm 0:9b334a45a8ff 721 /* Process Locked */
bogdanm 0:9b334a45a8ff 722 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 723
bogdanm 0:9b334a45a8ff 724 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 725 /* Check if a non-blocking transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 726 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 727 {
bogdanm 0:9b334a45a8ff 728 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 729 }
bogdanm 0:9b334a45a8ff 730 else
bogdanm 0:9b334a45a8ff 731 {
bogdanm 0:9b334a45a8ff 732 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 733 }
bogdanm 0:9b334a45a8ff 734
bogdanm 0:9b334a45a8ff 735 huart->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 736 huart->RxXferCount = Size;
bogdanm 0:9b334a45a8ff 737
bogdanm 0:9b334a45a8ff 738 /* Check the remain data to be received */
bogdanm 0:9b334a45a8ff 739 while(huart->RxXferCount > 0)
bogdanm 0:9b334a45a8ff 740 {
bogdanm 0:9b334a45a8ff 741 huart->RxXferCount--;
bogdanm 0:9b334a45a8ff 742 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
bogdanm 0:9b334a45a8ff 743 {
bogdanm 0:9b334a45a8ff 744 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 745 {
bogdanm 0:9b334a45a8ff 746 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 747 }
bogdanm 0:9b334a45a8ff 748 tmp = (uint16_t*) pData ;
bogdanm 0:9b334a45a8ff 749 if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm 0:9b334a45a8ff 750 {
bogdanm 0:9b334a45a8ff 751 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
bogdanm 0:9b334a45a8ff 752 pData +=2;
bogdanm 0:9b334a45a8ff 753 }
bogdanm 0:9b334a45a8ff 754 else
bogdanm 0:9b334a45a8ff 755 {
bogdanm 0:9b334a45a8ff 756 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
bogdanm 0:9b334a45a8ff 757 pData +=1;
bogdanm 0:9b334a45a8ff 758 }
bogdanm 0:9b334a45a8ff 759
bogdanm 0:9b334a45a8ff 760 }
bogdanm 0:9b334a45a8ff 761 else
bogdanm 0:9b334a45a8ff 762 {
bogdanm 0:9b334a45a8ff 763 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 764 {
bogdanm 0:9b334a45a8ff 765 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 766 }
bogdanm 0:9b334a45a8ff 767 if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm 0:9b334a45a8ff 768 {
bogdanm 0:9b334a45a8ff 769 *pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
bogdanm 0:9b334a45a8ff 770 }
bogdanm 0:9b334a45a8ff 771 else
bogdanm 0:9b334a45a8ff 772 {
bogdanm 0:9b334a45a8ff 773 *pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
bogdanm 0:9b334a45a8ff 774 }
bogdanm 0:9b334a45a8ff 775
bogdanm 0:9b334a45a8ff 776 }
bogdanm 0:9b334a45a8ff 777 }
bogdanm 0:9b334a45a8ff 778
bogdanm 0:9b334a45a8ff 779 /* Check if a non-blocking transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 780 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 781 {
bogdanm 0:9b334a45a8ff 782 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 783 }
bogdanm 0:9b334a45a8ff 784 else
bogdanm 0:9b334a45a8ff 785 {
bogdanm 0:9b334a45a8ff 786 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 787 }
bogdanm 0:9b334a45a8ff 788 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 789 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 790
bogdanm 0:9b334a45a8ff 791 return HAL_OK;
bogdanm 0:9b334a45a8ff 792 }
bogdanm 0:9b334a45a8ff 793 else
bogdanm 0:9b334a45a8ff 794 {
bogdanm 0:9b334a45a8ff 795 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 796 }
bogdanm 0:9b334a45a8ff 797 }
bogdanm 0:9b334a45a8ff 798
bogdanm 0:9b334a45a8ff 799 /**
bogdanm 0:9b334a45a8ff 800 * @brief Sends an amount of data in non blocking mode.
bogdanm 0:9b334a45a8ff 801 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 802 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 803 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 804 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 805 * @retval HAL status
bogdanm 0:9b334a45a8ff 806 */
bogdanm 0:9b334a45a8ff 807 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 808 {
bogdanm 0:9b334a45a8ff 809 uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 810
bogdanm 0:9b334a45a8ff 811 tmp = huart->State;
bogdanm 0:9b334a45a8ff 812 if((tmp == HAL_UART_STATE_READY) || (tmp == HAL_UART_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 813 {
bogdanm 0:9b334a45a8ff 814 if((pData == HAL_NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 815 {
bogdanm 0:9b334a45a8ff 816 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 817 }
bogdanm 0:9b334a45a8ff 818
bogdanm 0:9b334a45a8ff 819 /* Process Locked */
bogdanm 0:9b334a45a8ff 820 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 821
bogdanm 0:9b334a45a8ff 822 huart->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 823 huart->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 824 huart->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 825
bogdanm 0:9b334a45a8ff 826 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 827 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 828 if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 829 {
bogdanm 0:9b334a45a8ff 830 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 831 }
bogdanm 0:9b334a45a8ff 832 else
bogdanm 0:9b334a45a8ff 833 {
bogdanm 0:9b334a45a8ff 834 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 835 }
bogdanm 0:9b334a45a8ff 836
bogdanm 0:9b334a45a8ff 837 /* Enable the UART Parity Error Interrupt */
bogdanm 0:9b334a45a8ff 838 __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 839
bogdanm 0:9b334a45a8ff 840 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 841 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 842
bogdanm 0:9b334a45a8ff 843 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 844 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 845
bogdanm 0:9b334a45a8ff 846 /* Enable the UART Transmit data register empty Interrupt */
bogdanm 0:9b334a45a8ff 847 __HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 848
bogdanm 0:9b334a45a8ff 849 return HAL_OK;
bogdanm 0:9b334a45a8ff 850 }
bogdanm 0:9b334a45a8ff 851 else
bogdanm 0:9b334a45a8ff 852 {
bogdanm 0:9b334a45a8ff 853 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 854 }
bogdanm 0:9b334a45a8ff 855 }
bogdanm 0:9b334a45a8ff 856
bogdanm 0:9b334a45a8ff 857 /**
bogdanm 0:9b334a45a8ff 858 * @brief Receives an amount of data in non blocking mode
bogdanm 0:9b334a45a8ff 859 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 860 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 861 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 862 * @param Size: Amount of data to be received
bogdanm 0:9b334a45a8ff 863 * @retval HAL status
bogdanm 0:9b334a45a8ff 864 */
bogdanm 0:9b334a45a8ff 865 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 866 {
bogdanm 0:9b334a45a8ff 867 uint32_t tmp = 0;
bogdanm 0:9b334a45a8ff 868
bogdanm 0:9b334a45a8ff 869 tmp = huart->State;
bogdanm 0:9b334a45a8ff 870 if((tmp == HAL_UART_STATE_READY) || (tmp == HAL_UART_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 871 {
bogdanm 0:9b334a45a8ff 872 if((pData == HAL_NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 873 {
bogdanm 0:9b334a45a8ff 874 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 875 }
bogdanm 0:9b334a45a8ff 876
bogdanm 0:9b334a45a8ff 877 /* Process Locked */
bogdanm 0:9b334a45a8ff 878 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 879
bogdanm 0:9b334a45a8ff 880 huart->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 881 huart->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 882 huart->RxXferCount = Size;
bogdanm 0:9b334a45a8ff 883
bogdanm 0:9b334a45a8ff 884 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 885 /* Check if a transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 886 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 887 {
bogdanm 0:9b334a45a8ff 888 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 889 }
bogdanm 0:9b334a45a8ff 890 else
bogdanm 0:9b334a45a8ff 891 {
bogdanm 0:9b334a45a8ff 892 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 893 }
bogdanm 0:9b334a45a8ff 894
bogdanm 0:9b334a45a8ff 895 /* Enable the UART Parity Error Interrupt */
bogdanm 0:9b334a45a8ff 896 __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 897
bogdanm 0:9b334a45a8ff 898 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 899 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 900
bogdanm 0:9b334a45a8ff 901 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 902 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 903
bogdanm 0:9b334a45a8ff 904 /* Enable the UART Data Register not empty Interrupt */
bogdanm 0:9b334a45a8ff 905 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 906
bogdanm 0:9b334a45a8ff 907 return HAL_OK;
bogdanm 0:9b334a45a8ff 908 }
bogdanm 0:9b334a45a8ff 909 else
bogdanm 0:9b334a45a8ff 910 {
bogdanm 0:9b334a45a8ff 911 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 912 }
bogdanm 0:9b334a45a8ff 913 }
bogdanm 0:9b334a45a8ff 914
bogdanm 0:9b334a45a8ff 915 /**
bogdanm 0:9b334a45a8ff 916 * @brief Sends an amount of data in non blocking mode.
bogdanm 0:9b334a45a8ff 917 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 918 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 919 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 920 * @param Size: Amount of data to be sent
bogdanm 0:9b334a45a8ff 921 * @retval HAL status
bogdanm 0:9b334a45a8ff 922 */
bogdanm 0:9b334a45a8ff 923 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 924 {
bogdanm 0:9b334a45a8ff 925 uint32_t *tmp;
bogdanm 0:9b334a45a8ff 926 uint32_t tmp1 = 0;
bogdanm 0:9b334a45a8ff 927
bogdanm 0:9b334a45a8ff 928 tmp1 = huart->State;
bogdanm 0:9b334a45a8ff 929 if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 930 {
bogdanm 0:9b334a45a8ff 931 if((pData == HAL_NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 932 {
bogdanm 0:9b334a45a8ff 933 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 934 }
bogdanm 0:9b334a45a8ff 935
bogdanm 0:9b334a45a8ff 936 /* Process Locked */
bogdanm 0:9b334a45a8ff 937 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 938
bogdanm 0:9b334a45a8ff 939 huart->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 940 huart->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 941 huart->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 942
bogdanm 0:9b334a45a8ff 943 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 944 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 945 if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 946 {
bogdanm 0:9b334a45a8ff 947 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 948 }
bogdanm 0:9b334a45a8ff 949 else
bogdanm 0:9b334a45a8ff 950 {
bogdanm 0:9b334a45a8ff 951 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 952 }
bogdanm 0:9b334a45a8ff 953
bogdanm 0:9b334a45a8ff 954 /* Set the UART DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 955 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
bogdanm 0:9b334a45a8ff 956
bogdanm 0:9b334a45a8ff 957 /* Set the UART DMA Half transfer complete callback */
bogdanm 0:9b334a45a8ff 958 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
bogdanm 0:9b334a45a8ff 959
bogdanm 0:9b334a45a8ff 960 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 961 huart->hdmatx->XferErrorCallback = UART_DMAError;
bogdanm 0:9b334a45a8ff 962
bogdanm 0:9b334a45a8ff 963 /* Enable the UART transmit DMA channel */
bogdanm 0:9b334a45a8ff 964 tmp = (uint32_t*)&pData;
bogdanm 0:9b334a45a8ff 965 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size);
bogdanm 0:9b334a45a8ff 966
bogdanm 0:9b334a45a8ff 967 /* Enable the DMA transfer for transmit request by setting the DMAT bit
bogdanm 0:9b334a45a8ff 968 in the UART CR3 register */
bogdanm 0:9b334a45a8ff 969 huart->Instance->CR3 |= USART_CR3_DMAT;
bogdanm 0:9b334a45a8ff 970
bogdanm 0:9b334a45a8ff 971 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 972 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 973
bogdanm 0:9b334a45a8ff 974 return HAL_OK;
bogdanm 0:9b334a45a8ff 975 }
bogdanm 0:9b334a45a8ff 976 else
bogdanm 0:9b334a45a8ff 977 {
bogdanm 0:9b334a45a8ff 978 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 979 }
bogdanm 0:9b334a45a8ff 980 }
bogdanm 0:9b334a45a8ff 981
bogdanm 0:9b334a45a8ff 982 /**
bogdanm 0:9b334a45a8ff 983 * @brief Receives an amount of data in non blocking mode.
bogdanm 0:9b334a45a8ff 984 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 985 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 986 * @param pData: Pointer to data buffer
bogdanm 0:9b334a45a8ff 987 * @param Size: Amount of data to be received
bogdanm 0:9b334a45a8ff 988 * @note When the UART parity is enabled (PCE = 1), the received data contain
bogdanm 0:9b334a45a8ff 989 * the parity bit (MSB position)
bogdanm 0:9b334a45a8ff 990 * @retval HAL status
bogdanm 0:9b334a45a8ff 991 */
bogdanm 0:9b334a45a8ff 992 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 993 {
bogdanm 0:9b334a45a8ff 994 uint32_t *tmp;
bogdanm 0:9b334a45a8ff 995 uint32_t tmp1 = 0;
bogdanm 0:9b334a45a8ff 996
bogdanm 0:9b334a45a8ff 997 tmp1 = huart->State;
bogdanm 0:9b334a45a8ff 998 if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 999 {
bogdanm 0:9b334a45a8ff 1000 if((pData == HAL_NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 1001 {
bogdanm 0:9b334a45a8ff 1002 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1003 }
bogdanm 0:9b334a45a8ff 1004
bogdanm 0:9b334a45a8ff 1005 /* Process Locked */
bogdanm 0:9b334a45a8ff 1006 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1007
bogdanm 0:9b334a45a8ff 1008 huart->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 1009 huart->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 1010
bogdanm 0:9b334a45a8ff 1011 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1012 /* Check if a transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 1013 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 1014 {
bogdanm 0:9b334a45a8ff 1015 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 1016 }
bogdanm 0:9b334a45a8ff 1017 else
bogdanm 0:9b334a45a8ff 1018 {
bogdanm 0:9b334a45a8ff 1019 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1020 }
bogdanm 0:9b334a45a8ff 1021
bogdanm 0:9b334a45a8ff 1022 /* Set the UART DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 1023 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
bogdanm 0:9b334a45a8ff 1024
bogdanm 0:9b334a45a8ff 1025 /* Set the UART DMA Half transfer complete callback */
bogdanm 0:9b334a45a8ff 1026 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
bogdanm 0:9b334a45a8ff 1027
bogdanm 0:9b334a45a8ff 1028 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 1029 huart->hdmarx->XferErrorCallback = UART_DMAError;
bogdanm 0:9b334a45a8ff 1030
bogdanm 0:9b334a45a8ff 1031 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 1032 tmp = (uint32_t*)&pData;
bogdanm 0:9b334a45a8ff 1033 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
bogdanm 0:9b334a45a8ff 1034
bogdanm 0:9b334a45a8ff 1035 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm 0:9b334a45a8ff 1036 in the UART CR3 register */
bogdanm 0:9b334a45a8ff 1037 huart->Instance->CR3 |= USART_CR3_DMAR;
bogdanm 0:9b334a45a8ff 1038
bogdanm 0:9b334a45a8ff 1039 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1040 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1041
bogdanm 0:9b334a45a8ff 1042 return HAL_OK;
bogdanm 0:9b334a45a8ff 1043 }
bogdanm 0:9b334a45a8ff 1044 else
bogdanm 0:9b334a45a8ff 1045 {
bogdanm 0:9b334a45a8ff 1046 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1047 }
bogdanm 0:9b334a45a8ff 1048 }
bogdanm 0:9b334a45a8ff 1049
bogdanm 0:9b334a45a8ff 1050 /**
bogdanm 0:9b334a45a8ff 1051 * @brief Pauses the DMA Transfer.
bogdanm 0:9b334a45a8ff 1052 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1053 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1054 * @retval HAL status
bogdanm 0:9b334a45a8ff 1055 */
bogdanm 0:9b334a45a8ff 1056 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1057 {
bogdanm 0:9b334a45a8ff 1058 /* Process Locked */
bogdanm 0:9b334a45a8ff 1059 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1060
bogdanm 0:9b334a45a8ff 1061 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 1062 {
bogdanm 0:9b334a45a8ff 1063 /* Disable the UART DMA Tx request */
bogdanm 0:9b334a45a8ff 1064 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm 0:9b334a45a8ff 1065 }
bogdanm 0:9b334a45a8ff 1066 else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 1067 {
bogdanm 0:9b334a45a8ff 1068 /* Disable the UART DMA Rx request */
bogdanm 0:9b334a45a8ff 1069 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm 0:9b334a45a8ff 1070 }
bogdanm 0:9b334a45a8ff 1071 else if (huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1072 {
bogdanm 0:9b334a45a8ff 1073 /* Disable the UART DMA Tx & Rx requests */
bogdanm 0:9b334a45a8ff 1074 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm 0:9b334a45a8ff 1075 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm 0:9b334a45a8ff 1076 }
bogdanm 0:9b334a45a8ff 1077 else
bogdanm 0:9b334a45a8ff 1078 {
bogdanm 0:9b334a45a8ff 1079 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1080 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1081
bogdanm 0:9b334a45a8ff 1082 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1083 }
bogdanm 0:9b334a45a8ff 1084
bogdanm 0:9b334a45a8ff 1085 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1086 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1087
bogdanm 0:9b334a45a8ff 1088 return HAL_OK;
bogdanm 0:9b334a45a8ff 1089 }
bogdanm 0:9b334a45a8ff 1090
bogdanm 0:9b334a45a8ff 1091 /**
bogdanm 0:9b334a45a8ff 1092 * @brief Resumes the DMA Transfer.
bogdanm 0:9b334a45a8ff 1093 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1094 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1095 * @retval HAL status
bogdanm 0:9b334a45a8ff 1096 */
bogdanm 0:9b334a45a8ff 1097 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1098 {
bogdanm 0:9b334a45a8ff 1099 /* Process Locked */
bogdanm 0:9b334a45a8ff 1100 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1101
bogdanm 0:9b334a45a8ff 1102 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 1103 {
bogdanm 0:9b334a45a8ff 1104 /* Enable the UART DMA Tx request */
bogdanm 0:9b334a45a8ff 1105 huart->Instance->CR3 |= USART_CR3_DMAT;
bogdanm 0:9b334a45a8ff 1106 }
bogdanm 0:9b334a45a8ff 1107 else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 1108 {
bogdanm 0:9b334a45a8ff 1109 /* Clear the Overrun flag before resumming the Rx transfer*/
bogdanm 0:9b334a45a8ff 1110 __HAL_UART_CLEAR_OREFLAG(huart);
bogdanm 0:9b334a45a8ff 1111 /* Enable the UART DMA Rx request */
bogdanm 0:9b334a45a8ff 1112 huart->Instance->CR3 |= USART_CR3_DMAR;
bogdanm 0:9b334a45a8ff 1113 }
bogdanm 0:9b334a45a8ff 1114 else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1115 {
bogdanm 0:9b334a45a8ff 1116 /* Clear the Overrun flag before resumming the Rx transfer*/
bogdanm 0:9b334a45a8ff 1117 __HAL_UART_CLEAR_OREFLAG(huart);
bogdanm 0:9b334a45a8ff 1118 /* Enable the UART DMA Tx & Rx request */
bogdanm 0:9b334a45a8ff 1119 huart->Instance->CR3 |= USART_CR3_DMAT;
bogdanm 0:9b334a45a8ff 1120 huart->Instance->CR3 |= USART_CR3_DMAR;
bogdanm 0:9b334a45a8ff 1121 }
bogdanm 0:9b334a45a8ff 1122 else
bogdanm 0:9b334a45a8ff 1123 {
bogdanm 0:9b334a45a8ff 1124 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1125 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1126
bogdanm 0:9b334a45a8ff 1127 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 1128 }
bogdanm 0:9b334a45a8ff 1129
bogdanm 0:9b334a45a8ff 1130 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1131 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1132
bogdanm 0:9b334a45a8ff 1133 return HAL_OK;
bogdanm 0:9b334a45a8ff 1134 }
bogdanm 0:9b334a45a8ff 1135
bogdanm 0:9b334a45a8ff 1136 /**
bogdanm 0:9b334a45a8ff 1137 * @brief Stops the DMA Transfer.
bogdanm 0:9b334a45a8ff 1138 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1139 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1140 * @retval HAL status
bogdanm 0:9b334a45a8ff 1141 */
bogdanm 0:9b334a45a8ff 1142 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1143 {
bogdanm 0:9b334a45a8ff 1144 /* The Lock is not implemented on this API to allow the user application
bogdanm 0:9b334a45a8ff 1145 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
bogdanm 0:9b334a45a8ff 1146 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
bogdanm 0:9b334a45a8ff 1147 and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
bogdanm 0:9b334a45a8ff 1148 */
bogdanm 0:9b334a45a8ff 1149
bogdanm 0:9b334a45a8ff 1150 /* Disable the UART Tx/Rx DMA requests */
bogdanm 0:9b334a45a8ff 1151 huart->Instance->CR3 &= ~USART_CR3_DMAT;
bogdanm 0:9b334a45a8ff 1152 huart->Instance->CR3 &= ~USART_CR3_DMAR;
bogdanm 0:9b334a45a8ff 1153
bogdanm 0:9b334a45a8ff 1154 /* Abort the UART DMA tx channel */
bogdanm 0:9b334a45a8ff 1155 if(huart->hdmatx != HAL_NULL)
bogdanm 0:9b334a45a8ff 1156 {
bogdanm 0:9b334a45a8ff 1157 HAL_DMA_Abort(huart->hdmatx);
bogdanm 0:9b334a45a8ff 1158 }
bogdanm 0:9b334a45a8ff 1159 /* Abort the UART DMA rx channel */
bogdanm 0:9b334a45a8ff 1160 if(huart->hdmarx != HAL_NULL)
bogdanm 0:9b334a45a8ff 1161 {
bogdanm 0:9b334a45a8ff 1162 HAL_DMA_Abort(huart->hdmarx);
bogdanm 0:9b334a45a8ff 1163 }
bogdanm 0:9b334a45a8ff 1164
bogdanm 0:9b334a45a8ff 1165 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1166
bogdanm 0:9b334a45a8ff 1167 return HAL_OK;
bogdanm 0:9b334a45a8ff 1168 }
bogdanm 0:9b334a45a8ff 1169
bogdanm 0:9b334a45a8ff 1170 /**
bogdanm 0:9b334a45a8ff 1171 * @brief This function handles UART interrupt request.
bogdanm 0:9b334a45a8ff 1172 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1173 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1174 * @retval None
bogdanm 0:9b334a45a8ff 1175 */
bogdanm 0:9b334a45a8ff 1176 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1177 {
bogdanm 0:9b334a45a8ff 1178 uint32_t tmp1 = 0, tmp2 = 0;
bogdanm 0:9b334a45a8ff 1179
bogdanm 0:9b334a45a8ff 1180 tmp1 = __HAL_UART_GET_FLAG(huart, UART_FLAG_PE);
bogdanm 0:9b334a45a8ff 1181 tmp2 = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 1182 /* UART parity error interrupt occurred ------------------------------------*/
bogdanm 0:9b334a45a8ff 1183 if((tmp1 != RESET) && (tmp2 != RESET))
bogdanm 0:9b334a45a8ff 1184 {
bogdanm 0:9b334a45a8ff 1185 __HAL_UART_CLEAR_PEFLAG(huart);
bogdanm 0:9b334a45a8ff 1186
bogdanm 0:9b334a45a8ff 1187 huart->ErrorCode |= HAL_UART_ERROR_PE;
bogdanm 0:9b334a45a8ff 1188 }
bogdanm 0:9b334a45a8ff 1189
bogdanm 0:9b334a45a8ff 1190 tmp1 = __HAL_UART_GET_FLAG(huart, UART_FLAG_FE);
bogdanm 0:9b334a45a8ff 1191 tmp2 = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1192 /* UART frame error interrupt occurred -------------------------------------*/
bogdanm 0:9b334a45a8ff 1193 if((tmp1 != RESET) && (tmp2 != RESET))
bogdanm 0:9b334a45a8ff 1194 {
bogdanm 0:9b334a45a8ff 1195 __HAL_UART_CLEAR_FEFLAG(huart);
bogdanm 0:9b334a45a8ff 1196
bogdanm 0:9b334a45a8ff 1197 huart->ErrorCode |= HAL_UART_ERROR_FE;
bogdanm 0:9b334a45a8ff 1198 }
bogdanm 0:9b334a45a8ff 1199
bogdanm 0:9b334a45a8ff 1200 tmp1 = __HAL_UART_GET_FLAG(huart, UART_FLAG_NE);
bogdanm 0:9b334a45a8ff 1201 tmp2 = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1202 /* UART noise error interrupt occurred -------------------------------------*/
bogdanm 0:9b334a45a8ff 1203 if((tmp1 != RESET) && (tmp2 != RESET))
bogdanm 0:9b334a45a8ff 1204 {
bogdanm 0:9b334a45a8ff 1205 __HAL_UART_CLEAR_NEFLAG(huart);
bogdanm 0:9b334a45a8ff 1206
bogdanm 0:9b334a45a8ff 1207 huart->ErrorCode |= HAL_UART_ERROR_NE;
bogdanm 0:9b334a45a8ff 1208 }
bogdanm 0:9b334a45a8ff 1209
bogdanm 0:9b334a45a8ff 1210 tmp1 = __HAL_UART_GET_FLAG(huart, UART_FLAG_ORE);
bogdanm 0:9b334a45a8ff 1211 tmp2 = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1212 /* UART Over-Run interrupt occurred ----------------------------------------*/
bogdanm 0:9b334a45a8ff 1213 if((tmp1 != RESET) && (tmp2 != RESET))
bogdanm 0:9b334a45a8ff 1214 {
bogdanm 0:9b334a45a8ff 1215 __HAL_UART_CLEAR_OREFLAG(huart);
bogdanm 0:9b334a45a8ff 1216
bogdanm 0:9b334a45a8ff 1217 huart->ErrorCode |= HAL_UART_ERROR_ORE;
bogdanm 0:9b334a45a8ff 1218 }
bogdanm 0:9b334a45a8ff 1219
bogdanm 0:9b334a45a8ff 1220 tmp1 = __HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE);
bogdanm 0:9b334a45a8ff 1221 tmp2 = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 1222 /* UART in mode Receiver ---------------------------------------------------*/
bogdanm 0:9b334a45a8ff 1223 if((tmp1 != RESET) && (tmp2 != RESET))
bogdanm 0:9b334a45a8ff 1224 {
bogdanm 0:9b334a45a8ff 1225 UART_Receive_IT(huart);
bogdanm 0:9b334a45a8ff 1226 }
bogdanm 0:9b334a45a8ff 1227
bogdanm 0:9b334a45a8ff 1228 tmp1 = __HAL_UART_GET_FLAG(huart, UART_FLAG_TXE);
bogdanm 0:9b334a45a8ff 1229 tmp2 = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 1230 /* UART in mode Transmitter ------------------------------------------------*/
bogdanm 0:9b334a45a8ff 1231 if((tmp1 != RESET) && (tmp2 != RESET))
bogdanm 0:9b334a45a8ff 1232 {
bogdanm 0:9b334a45a8ff 1233 UART_Transmit_IT(huart);
bogdanm 0:9b334a45a8ff 1234 }
bogdanm 0:9b334a45a8ff 1235
bogdanm 0:9b334a45a8ff 1236 tmp1 = __HAL_UART_GET_FLAG(huart, UART_FLAG_TC);
bogdanm 0:9b334a45a8ff 1237 tmp2 = __HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC);
bogdanm 0:9b334a45a8ff 1238 /* UART in mode Transmitter end --------------------------------------------*/
bogdanm 0:9b334a45a8ff 1239 if((tmp1 != RESET) && (tmp2 != RESET))
bogdanm 0:9b334a45a8ff 1240 {
bogdanm 0:9b334a45a8ff 1241 UART_EndTransmit_IT(huart);
bogdanm 0:9b334a45a8ff 1242 }
bogdanm 0:9b334a45a8ff 1243
bogdanm 0:9b334a45a8ff 1244 if(huart->ErrorCode != HAL_UART_ERROR_NONE)
bogdanm 0:9b334a45a8ff 1245 {
bogdanm 0:9b334a45a8ff 1246 /* Set the UART state ready to be able to start again the process */
bogdanm 0:9b334a45a8ff 1247 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1248
bogdanm 0:9b334a45a8ff 1249 HAL_UART_ErrorCallback(huart);
bogdanm 0:9b334a45a8ff 1250 }
bogdanm 0:9b334a45a8ff 1251 }
bogdanm 0:9b334a45a8ff 1252
bogdanm 0:9b334a45a8ff 1253 /**
bogdanm 0:9b334a45a8ff 1254 * @brief Tx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 1255 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1256 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1257 * @retval None
bogdanm 0:9b334a45a8ff 1258 */
bogdanm 0:9b334a45a8ff 1259 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1260 {
bogdanm 0:9b334a45a8ff 1261 /* NOTE: This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1262 the HAL_UART_TxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1263 */
bogdanm 0:9b334a45a8ff 1264 }
bogdanm 0:9b334a45a8ff 1265
bogdanm 0:9b334a45a8ff 1266 /**
bogdanm 0:9b334a45a8ff 1267 * @brief Tx Half Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 1268 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1269 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1270 * @retval None
bogdanm 0:9b334a45a8ff 1271 */
bogdanm 0:9b334a45a8ff 1272 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1273 {
bogdanm 0:9b334a45a8ff 1274 /* NOTE: This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1275 the HAL_UART_TxHalfCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1276 */
bogdanm 0:9b334a45a8ff 1277 }
bogdanm 0:9b334a45a8ff 1278
bogdanm 0:9b334a45a8ff 1279 /**
bogdanm 0:9b334a45a8ff 1280 * @brief Rx Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 1281 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1282 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1283 * @retval None
bogdanm 0:9b334a45a8ff 1284 */
bogdanm 0:9b334a45a8ff 1285 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1286 {
bogdanm 0:9b334a45a8ff 1287 /* NOTE: This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1288 the HAL_UART_RxCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1289 */
bogdanm 0:9b334a45a8ff 1290 }
bogdanm 0:9b334a45a8ff 1291
bogdanm 0:9b334a45a8ff 1292 /**
bogdanm 0:9b334a45a8ff 1293 * @brief Rx Half Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 1294 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1295 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1296 * @retval None
bogdanm 0:9b334a45a8ff 1297 */
bogdanm 0:9b334a45a8ff 1298 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1299 {
bogdanm 0:9b334a45a8ff 1300 /* NOTE: This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1301 the HAL_UART_RxHalfCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1302 */
bogdanm 0:9b334a45a8ff 1303 }
bogdanm 0:9b334a45a8ff 1304
bogdanm 0:9b334a45a8ff 1305 /**
bogdanm 0:9b334a45a8ff 1306 * @brief UART error callbacks.
bogdanm 0:9b334a45a8ff 1307 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1308 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1309 * @retval None
bogdanm 0:9b334a45a8ff 1310 */
bogdanm 0:9b334a45a8ff 1311 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1312 {
bogdanm 0:9b334a45a8ff 1313 /* NOTE: This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1314 the HAL_UART_ErrorCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1315 */
bogdanm 0:9b334a45a8ff 1316 }
bogdanm 0:9b334a45a8ff 1317
bogdanm 0:9b334a45a8ff 1318 /**
bogdanm 0:9b334a45a8ff 1319 * @}
bogdanm 0:9b334a45a8ff 1320 */
bogdanm 0:9b334a45a8ff 1321
bogdanm 0:9b334a45a8ff 1322 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
bogdanm 0:9b334a45a8ff 1323 * @brief UART control functions
bogdanm 0:9b334a45a8ff 1324 *
bogdanm 0:9b334a45a8ff 1325 @verbatim
bogdanm 0:9b334a45a8ff 1326 ==============================================================================
bogdanm 0:9b334a45a8ff 1327 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 1328 ==============================================================================
bogdanm 0:9b334a45a8ff 1329 [..]
bogdanm 0:9b334a45a8ff 1330 This subsection provides a set of functions allowing to control the UART:
bogdanm 0:9b334a45a8ff 1331 (+) HAL_LIN_SendBreak() API can be helpful to transmit the break character.
bogdanm 0:9b334a45a8ff 1332 (+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode.
bogdanm 0:9b334a45a8ff 1333 (+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software.
bogdanm 0:9b334a45a8ff 1334 (+) HAL_HalfDuplex_EnableTransmitter() API to enable the UART transmitter and disables the UART receiver in Half Duplex mode
bogdanm 0:9b334a45a8ff 1335 (+) HAL_HalfDuplex_EnableReceiver() API to enable the UART receiver and disables the UART transmitter in Half Duplex mode
bogdanm 0:9b334a45a8ff 1336
bogdanm 0:9b334a45a8ff 1337 @endverbatim
bogdanm 0:9b334a45a8ff 1338 * @{
bogdanm 0:9b334a45a8ff 1339 */
bogdanm 0:9b334a45a8ff 1340
bogdanm 0:9b334a45a8ff 1341 /**
bogdanm 0:9b334a45a8ff 1342 * @brief Transmits break characters.
bogdanm 0:9b334a45a8ff 1343 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1344 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1345 * @retval HAL status
bogdanm 0:9b334a45a8ff 1346 */
bogdanm 0:9b334a45a8ff 1347 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1348 {
bogdanm 0:9b334a45a8ff 1349 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1350 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 1351
bogdanm 0:9b334a45a8ff 1352 /* Process Locked */
bogdanm 0:9b334a45a8ff 1353 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1354
bogdanm 0:9b334a45a8ff 1355 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1356
bogdanm 0:9b334a45a8ff 1357 /* Send break characters */
bogdanm 0:9b334a45a8ff 1358 huart->Instance->CR1 |= USART_CR1_SBK;
bogdanm 0:9b334a45a8ff 1359
bogdanm 0:9b334a45a8ff 1360 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1361
bogdanm 0:9b334a45a8ff 1362 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1363 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1364
bogdanm 0:9b334a45a8ff 1365 return HAL_OK;
bogdanm 0:9b334a45a8ff 1366 }
bogdanm 0:9b334a45a8ff 1367
bogdanm 0:9b334a45a8ff 1368 /**
bogdanm 0:9b334a45a8ff 1369 * @brief Enters the UART in mute mode.
bogdanm 0:9b334a45a8ff 1370 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1371 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1372 * @retval HAL status
bogdanm 0:9b334a45a8ff 1373 */
bogdanm 0:9b334a45a8ff 1374 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1375 {
bogdanm 0:9b334a45a8ff 1376 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1377 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 1378
bogdanm 0:9b334a45a8ff 1379 /* Process Locked */
bogdanm 0:9b334a45a8ff 1380 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1381
bogdanm 0:9b334a45a8ff 1382 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1383
bogdanm 0:9b334a45a8ff 1384 /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
bogdanm 0:9b334a45a8ff 1385 huart->Instance->CR1 |= USART_CR1_RWU;
bogdanm 0:9b334a45a8ff 1386
bogdanm 0:9b334a45a8ff 1387 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1388
bogdanm 0:9b334a45a8ff 1389 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1390 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1391
bogdanm 0:9b334a45a8ff 1392 return HAL_OK;
bogdanm 0:9b334a45a8ff 1393 }
bogdanm 0:9b334a45a8ff 1394
bogdanm 0:9b334a45a8ff 1395 /**
bogdanm 0:9b334a45a8ff 1396 * @brief Exits the UART mute mode: wake up software.
bogdanm 0:9b334a45a8ff 1397 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1398 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1399 * @retval HAL status
bogdanm 0:9b334a45a8ff 1400 */
bogdanm 0:9b334a45a8ff 1401 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1402 {
bogdanm 0:9b334a45a8ff 1403 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1404 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 1405
bogdanm 0:9b334a45a8ff 1406 /* Process Locked */
bogdanm 0:9b334a45a8ff 1407 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1408
bogdanm 0:9b334a45a8ff 1409 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1410
bogdanm 0:9b334a45a8ff 1411 /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
bogdanm 0:9b334a45a8ff 1412 huart->Instance->CR1 &= (uint32_t)~((uint32_t)USART_CR1_RWU);
bogdanm 0:9b334a45a8ff 1413
bogdanm 0:9b334a45a8ff 1414 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1415
bogdanm 0:9b334a45a8ff 1416 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1417 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1418
bogdanm 0:9b334a45a8ff 1419 return HAL_OK;
bogdanm 0:9b334a45a8ff 1420 }
bogdanm 0:9b334a45a8ff 1421
bogdanm 0:9b334a45a8ff 1422 /**
bogdanm 0:9b334a45a8ff 1423 * @brief Enables the UART transmitter and disables the UART receiver.
bogdanm 0:9b334a45a8ff 1424 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1425 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1426 * @retval HAL status
bogdanm 0:9b334a45a8ff 1427 */
bogdanm 0:9b334a45a8ff 1428 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1429 {
bogdanm 0:9b334a45a8ff 1430 uint32_t tmpreg = 0x00;
bogdanm 0:9b334a45a8ff 1431
bogdanm 0:9b334a45a8ff 1432 /* Process Locked */
bogdanm 0:9b334a45a8ff 1433 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1434
bogdanm 0:9b334a45a8ff 1435 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1436
bogdanm 0:9b334a45a8ff 1437 /*-------------------------- USART CR1 Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1438 tmpreg = huart->Instance->CR1;
bogdanm 0:9b334a45a8ff 1439
bogdanm 0:9b334a45a8ff 1440 /* Clear TE and RE bits */
bogdanm 0:9b334a45a8ff 1441 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
bogdanm 0:9b334a45a8ff 1442
bogdanm 0:9b334a45a8ff 1443 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
bogdanm 0:9b334a45a8ff 1444 tmpreg |= (uint32_t)USART_CR1_TE;
bogdanm 0:9b334a45a8ff 1445
bogdanm 0:9b334a45a8ff 1446 /* Write to USART CR1 */
bogdanm 0:9b334a45a8ff 1447 huart->Instance->CR1 = (uint32_t)tmpreg;
bogdanm 0:9b334a45a8ff 1448
bogdanm 0:9b334a45a8ff 1449 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1450
bogdanm 0:9b334a45a8ff 1451 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1452 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1453
bogdanm 0:9b334a45a8ff 1454 return HAL_OK;
bogdanm 0:9b334a45a8ff 1455 }
bogdanm 0:9b334a45a8ff 1456
bogdanm 0:9b334a45a8ff 1457 /**
bogdanm 0:9b334a45a8ff 1458 * @brief Enables the UART receiver and disables the UART transmitter.
bogdanm 0:9b334a45a8ff 1459 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1460 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1461 * @retval HAL status
bogdanm 0:9b334a45a8ff 1462 */
bogdanm 0:9b334a45a8ff 1463 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1464 {
bogdanm 0:9b334a45a8ff 1465 uint32_t tmpreg = 0x00;
bogdanm 0:9b334a45a8ff 1466
bogdanm 0:9b334a45a8ff 1467 /* Process Locked */
bogdanm 0:9b334a45a8ff 1468 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1469
bogdanm 0:9b334a45a8ff 1470 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1471
bogdanm 0:9b334a45a8ff 1472 /*-------------------------- USART CR1 Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1473 tmpreg = huart->Instance->CR1;
bogdanm 0:9b334a45a8ff 1474
bogdanm 0:9b334a45a8ff 1475 /* Clear TE and RE bits */
bogdanm 0:9b334a45a8ff 1476 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
bogdanm 0:9b334a45a8ff 1477
bogdanm 0:9b334a45a8ff 1478 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
bogdanm 0:9b334a45a8ff 1479 tmpreg |= (uint32_t)USART_CR1_RE;
bogdanm 0:9b334a45a8ff 1480
bogdanm 0:9b334a45a8ff 1481 /* Write to USART CR1 */
bogdanm 0:9b334a45a8ff 1482 huart->Instance->CR1 = (uint32_t)tmpreg;
bogdanm 0:9b334a45a8ff 1483
bogdanm 0:9b334a45a8ff 1484 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1485
bogdanm 0:9b334a45a8ff 1486 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1487 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1488
bogdanm 0:9b334a45a8ff 1489 return HAL_OK;
bogdanm 0:9b334a45a8ff 1490 }
bogdanm 0:9b334a45a8ff 1491
bogdanm 0:9b334a45a8ff 1492 /**
bogdanm 0:9b334a45a8ff 1493 * @}
bogdanm 0:9b334a45a8ff 1494 */
bogdanm 0:9b334a45a8ff 1495
bogdanm 0:9b334a45a8ff 1496 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 1497 * @brief UART State and Errors functions
bogdanm 0:9b334a45a8ff 1498 *
bogdanm 0:9b334a45a8ff 1499 @verbatim
bogdanm 0:9b334a45a8ff 1500 ==============================================================================
bogdanm 0:9b334a45a8ff 1501 ##### Peripheral State and Errors functions #####
bogdanm 0:9b334a45a8ff 1502 ==============================================================================
bogdanm 0:9b334a45a8ff 1503 [..]
bogdanm 0:9b334a45a8ff 1504 This subsection provides a set of functions allowing to return the State of
bogdanm 0:9b334a45a8ff 1505 UART communication process, return Peripheral Errors occurred during communication
bogdanm 0:9b334a45a8ff 1506 process
bogdanm 0:9b334a45a8ff 1507 (+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral.
bogdanm 0:9b334a45a8ff 1508 (+) HAL_UART_GetError() check in run-time errors that could be occurred during communication.
bogdanm 0:9b334a45a8ff 1509
bogdanm 0:9b334a45a8ff 1510 @endverbatim
bogdanm 0:9b334a45a8ff 1511 * @{
bogdanm 0:9b334a45a8ff 1512 */
bogdanm 0:9b334a45a8ff 1513
bogdanm 0:9b334a45a8ff 1514 /**
bogdanm 0:9b334a45a8ff 1515 * @brief Returns the UART state.
bogdanm 0:9b334a45a8ff 1516 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1517 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1518 * @retval HAL state
bogdanm 0:9b334a45a8ff 1519 */
bogdanm 0:9b334a45a8ff 1520 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1521 {
bogdanm 0:9b334a45a8ff 1522 return huart->State;
bogdanm 0:9b334a45a8ff 1523 }
bogdanm 0:9b334a45a8ff 1524
bogdanm 0:9b334a45a8ff 1525 /**
bogdanm 0:9b334a45a8ff 1526 * @brief Return the UART error code
bogdanm 0:9b334a45a8ff 1527 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1528 * the configuration information for the specified UART.
bogdanm 0:9b334a45a8ff 1529 * @retval UART Error Code
bogdanm 0:9b334a45a8ff 1530 */
bogdanm 0:9b334a45a8ff 1531 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1532 {
bogdanm 0:9b334a45a8ff 1533 return huart->ErrorCode;
bogdanm 0:9b334a45a8ff 1534 }
bogdanm 0:9b334a45a8ff 1535
bogdanm 0:9b334a45a8ff 1536 /**
bogdanm 0:9b334a45a8ff 1537 * @}
bogdanm 0:9b334a45a8ff 1538 */
bogdanm 0:9b334a45a8ff 1539
bogdanm 0:9b334a45a8ff 1540 /**
bogdanm 0:9b334a45a8ff 1541 * @}
bogdanm 0:9b334a45a8ff 1542 */
bogdanm 0:9b334a45a8ff 1543
bogdanm 0:9b334a45a8ff 1544 /** @defgroup UART_Private_Functions UART Private Functions
bogdanm 0:9b334a45a8ff 1545 * @brief UART Private functions
bogdanm 0:9b334a45a8ff 1546 * @{
bogdanm 0:9b334a45a8ff 1547 */
bogdanm 0:9b334a45a8ff 1548 /**
bogdanm 0:9b334a45a8ff 1549 * @brief DMA UART transmit process complete callback.
bogdanm 0:9b334a45a8ff 1550 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1551 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1552 * @retval None
bogdanm 0:9b334a45a8ff 1553 */
bogdanm 0:9b334a45a8ff 1554 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1555 {
bogdanm 0:9b334a45a8ff 1556 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1557 /* DMA Normal mode*/
bogdanm 0:9b334a45a8ff 1558 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
bogdanm 0:9b334a45a8ff 1559 {
bogdanm 0:9b334a45a8ff 1560 huart->TxXferCount = 0;
bogdanm 0:9b334a45a8ff 1561
bogdanm 0:9b334a45a8ff 1562 /* Disable the DMA transfer for transmit request by setting the DMAT bit
bogdanm 0:9b334a45a8ff 1563 in the UART CR3 register */
bogdanm 0:9b334a45a8ff 1564 huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);
bogdanm 0:9b334a45a8ff 1565
bogdanm 0:9b334a45a8ff 1566 /* Wait for UART TC Flag */
bogdanm 0:9b334a45a8ff 1567 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, UART_TIMEOUT_VALUE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1568 {
bogdanm 0:9b334a45a8ff 1569 /* Timeout occurred */
bogdanm 0:9b334a45a8ff 1570 huart->State = HAL_UART_STATE_TIMEOUT;
bogdanm 0:9b334a45a8ff 1571 HAL_UART_ErrorCallback(huart);
bogdanm 0:9b334a45a8ff 1572 }
bogdanm 0:9b334a45a8ff 1573 else
bogdanm 0:9b334a45a8ff 1574 {
bogdanm 0:9b334a45a8ff 1575 /* No Timeout */
bogdanm 0:9b334a45a8ff 1576 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 1577 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1578 {
bogdanm 0:9b334a45a8ff 1579 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1580 }
bogdanm 0:9b334a45a8ff 1581 else
bogdanm 0:9b334a45a8ff 1582 {
bogdanm 0:9b334a45a8ff 1583 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1584 }
bogdanm 0:9b334a45a8ff 1585 HAL_UART_TxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1586 }
bogdanm 0:9b334a45a8ff 1587 }
bogdanm 0:9b334a45a8ff 1588 /* DMA Circular mode */
bogdanm 0:9b334a45a8ff 1589 else
bogdanm 0:9b334a45a8ff 1590 {
bogdanm 0:9b334a45a8ff 1591 HAL_UART_TxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1592 }
bogdanm 0:9b334a45a8ff 1593 }
bogdanm 0:9b334a45a8ff 1594
bogdanm 0:9b334a45a8ff 1595 /**
bogdanm 0:9b334a45a8ff 1596 * @brief DMA UART transmit process half complete callback
bogdanm 0:9b334a45a8ff 1597 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1598 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1599 * @retval None
bogdanm 0:9b334a45a8ff 1600 */
bogdanm 0:9b334a45a8ff 1601 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1602 {
bogdanm 0:9b334a45a8ff 1603 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 1604
bogdanm 0:9b334a45a8ff 1605 HAL_UART_TxHalfCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1606 }
bogdanm 0:9b334a45a8ff 1607
bogdanm 0:9b334a45a8ff 1608 /**
bogdanm 0:9b334a45a8ff 1609 * @brief DMA UART receive process complete callback.
bogdanm 0:9b334a45a8ff 1610 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1611 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1612 * @retval None
bogdanm 0:9b334a45a8ff 1613 */
bogdanm 0:9b334a45a8ff 1614 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1615 {
bogdanm 0:9b334a45a8ff 1616 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1617 /* DMA Normal mode*/
bogdanm 0:9b334a45a8ff 1618 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
bogdanm 0:9b334a45a8ff 1619 {
bogdanm 0:9b334a45a8ff 1620 huart->RxXferCount = 0;
bogdanm 0:9b334a45a8ff 1621
bogdanm 0:9b334a45a8ff 1622 /* Disable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm 0:9b334a45a8ff 1623 in the UART CR3 register */
bogdanm 0:9b334a45a8ff 1624 huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);
bogdanm 0:9b334a45a8ff 1625
bogdanm 0:9b334a45a8ff 1626 /* Check if a transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 1627 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1628 {
bogdanm 0:9b334a45a8ff 1629 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1630 }
bogdanm 0:9b334a45a8ff 1631 else
bogdanm 0:9b334a45a8ff 1632 {
bogdanm 0:9b334a45a8ff 1633 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1634 }
bogdanm 0:9b334a45a8ff 1635 }
bogdanm 0:9b334a45a8ff 1636 HAL_UART_RxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1637 }
bogdanm 0:9b334a45a8ff 1638
bogdanm 0:9b334a45a8ff 1639 /**
bogdanm 0:9b334a45a8ff 1640 * @brief DMA UART receive process half complete callback
bogdanm 0:9b334a45a8ff 1641 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1642 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1643 * @retval None
bogdanm 0:9b334a45a8ff 1644 */
bogdanm 0:9b334a45a8ff 1645 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1646 {
bogdanm 0:9b334a45a8ff 1647 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 1648
bogdanm 0:9b334a45a8ff 1649 HAL_UART_RxHalfCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1650 }
bogdanm 0:9b334a45a8ff 1651
bogdanm 0:9b334a45a8ff 1652 /**
bogdanm 0:9b334a45a8ff 1653 * @brief DMA UART communication error callback.
bogdanm 0:9b334a45a8ff 1654 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1655 * the configuration information for the specified DMA module.
bogdanm 0:9b334a45a8ff 1656 * @retval None
bogdanm 0:9b334a45a8ff 1657 */
bogdanm 0:9b334a45a8ff 1658 static void UART_DMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1659 {
bogdanm 0:9b334a45a8ff 1660 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1661 huart->RxXferCount = 0;
bogdanm 0:9b334a45a8ff 1662 huart->TxXferCount = 0;
bogdanm 0:9b334a45a8ff 1663 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1664 huart->ErrorCode |= HAL_UART_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1665 HAL_UART_ErrorCallback(huart);
bogdanm 0:9b334a45a8ff 1666 }
bogdanm 0:9b334a45a8ff 1667
bogdanm 0:9b334a45a8ff 1668 /**
bogdanm 0:9b334a45a8ff 1669 * @brief This function handles UART Communication Timeout.
bogdanm 0:9b334a45a8ff 1670 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1671 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1672 * @param Flag: specifies the UART flag to check.
bogdanm 0:9b334a45a8ff 1673 * @param Status: The new Flag status (SET or RESET).
bogdanm 0:9b334a45a8ff 1674 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 1675 * @retval HAL status
bogdanm 0:9b334a45a8ff 1676 */
bogdanm 0:9b334a45a8ff 1677 static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1678 {
bogdanm 0:9b334a45a8ff 1679 uint32_t tickstart = 0;
bogdanm 0:9b334a45a8ff 1680
bogdanm 0:9b334a45a8ff 1681 /* Get tick */
bogdanm 0:9b334a45a8ff 1682 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 1683
bogdanm 0:9b334a45a8ff 1684 /* Wait until flag is set */
bogdanm 0:9b334a45a8ff 1685 if(Status == RESET)
bogdanm 0:9b334a45a8ff 1686 {
bogdanm 0:9b334a45a8ff 1687 while(__HAL_UART_GET_FLAG(huart, Flag) == RESET)
bogdanm 0:9b334a45a8ff 1688 {
bogdanm 0:9b334a45a8ff 1689 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 1690 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 1691 {
bogdanm 0:9b334a45a8ff 1692 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 1693 {
bogdanm 0:9b334a45a8ff 1694 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm 0:9b334a45a8ff 1695 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 1696 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 1697 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 1698 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1699
bogdanm 0:9b334a45a8ff 1700 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1701
bogdanm 0:9b334a45a8ff 1702 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1703 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1704
bogdanm 0:9b334a45a8ff 1705 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1706 }
bogdanm 0:9b334a45a8ff 1707 }
bogdanm 0:9b334a45a8ff 1708 }
bogdanm 0:9b334a45a8ff 1709 }
bogdanm 0:9b334a45a8ff 1710 else
bogdanm 0:9b334a45a8ff 1711 {
bogdanm 0:9b334a45a8ff 1712 while(__HAL_UART_GET_FLAG(huart, Flag) != RESET)
bogdanm 0:9b334a45a8ff 1713 {
bogdanm 0:9b334a45a8ff 1714 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 1715 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 1716 {
bogdanm 0:9b334a45a8ff 1717 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 1718 {
bogdanm 0:9b334a45a8ff 1719 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm 0:9b334a45a8ff 1720 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 1721 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 1722 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 1723 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1724
bogdanm 0:9b334a45a8ff 1725 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1726
bogdanm 0:9b334a45a8ff 1727 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1728 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1729
bogdanm 0:9b334a45a8ff 1730 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1731 }
bogdanm 0:9b334a45a8ff 1732 }
bogdanm 0:9b334a45a8ff 1733 }
bogdanm 0:9b334a45a8ff 1734 }
bogdanm 0:9b334a45a8ff 1735 return HAL_OK;
bogdanm 0:9b334a45a8ff 1736 }
bogdanm 0:9b334a45a8ff 1737
bogdanm 0:9b334a45a8ff 1738 /**
bogdanm 0:9b334a45a8ff 1739 * @brief Sends an amount of data in non blocking mode.
bogdanm 0:9b334a45a8ff 1740 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1741 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1742 * @retval HAL status
bogdanm 0:9b334a45a8ff 1743 */
bogdanm 0:9b334a45a8ff 1744 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1745 {
bogdanm 0:9b334a45a8ff 1746 uint16_t* tmp;
bogdanm 0:9b334a45a8ff 1747 uint32_t tmp1 = 0;
bogdanm 0:9b334a45a8ff 1748
bogdanm 0:9b334a45a8ff 1749 tmp1 = huart->State;
bogdanm 0:9b334a45a8ff 1750 if((tmp1 == HAL_UART_STATE_BUSY_TX) || (tmp1 == HAL_UART_STATE_BUSY_TX_RX))
bogdanm 0:9b334a45a8ff 1751 {
bogdanm 0:9b334a45a8ff 1752 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
bogdanm 0:9b334a45a8ff 1753 {
bogdanm 0:9b334a45a8ff 1754 tmp = (uint16_t*) huart->pTxBuffPtr;
bogdanm 0:9b334a45a8ff 1755 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
bogdanm 0:9b334a45a8ff 1756 if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm 0:9b334a45a8ff 1757 {
bogdanm 0:9b334a45a8ff 1758 huart->pTxBuffPtr += 2;
bogdanm 0:9b334a45a8ff 1759 }
bogdanm 0:9b334a45a8ff 1760 else
bogdanm 0:9b334a45a8ff 1761 {
bogdanm 0:9b334a45a8ff 1762 huart->pTxBuffPtr += 1;
bogdanm 0:9b334a45a8ff 1763 }
bogdanm 0:9b334a45a8ff 1764 }
bogdanm 0:9b334a45a8ff 1765 else
bogdanm 0:9b334a45a8ff 1766 {
bogdanm 0:9b334a45a8ff 1767 huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
bogdanm 0:9b334a45a8ff 1768 }
bogdanm 0:9b334a45a8ff 1769
bogdanm 0:9b334a45a8ff 1770 if(--huart->TxXferCount == 0)
bogdanm 0:9b334a45a8ff 1771 {
bogdanm 0:9b334a45a8ff 1772 /* Disable the UART Transmit Complete Interrupt */
bogdanm 0:9b334a45a8ff 1773 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 1774
bogdanm 0:9b334a45a8ff 1775 /* Enable the UART Transmit Complete Interrupt */
bogdanm 0:9b334a45a8ff 1776 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
bogdanm 0:9b334a45a8ff 1777 }
bogdanm 0:9b334a45a8ff 1778 return HAL_OK;
bogdanm 0:9b334a45a8ff 1779 }
bogdanm 0:9b334a45a8ff 1780 else
bogdanm 0:9b334a45a8ff 1781 {
bogdanm 0:9b334a45a8ff 1782 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1783 }
bogdanm 0:9b334a45a8ff 1784 }
bogdanm 0:9b334a45a8ff 1785
bogdanm 0:9b334a45a8ff 1786
bogdanm 0:9b334a45a8ff 1787 /**
bogdanm 0:9b334a45a8ff 1788 * @brief Wraps up transmission in non blocking mode.
bogdanm 0:9b334a45a8ff 1789 * @param huart: pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1790 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1791 * @retval HAL status
bogdanm 0:9b334a45a8ff 1792 */
bogdanm 0:9b334a45a8ff 1793 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1794 {
bogdanm 0:9b334a45a8ff 1795 /* Disable the UART Transmit Complete Interrupt */
bogdanm 0:9b334a45a8ff 1796 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
bogdanm 0:9b334a45a8ff 1797
bogdanm 0:9b334a45a8ff 1798 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 1799 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1800 {
bogdanm 0:9b334a45a8ff 1801 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1802 }
bogdanm 0:9b334a45a8ff 1803 else
bogdanm 0:9b334a45a8ff 1804 {
bogdanm 0:9b334a45a8ff 1805 /* Disable the UART Parity Error Interrupt */
bogdanm 0:9b334a45a8ff 1806 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 1807
bogdanm 0:9b334a45a8ff 1808 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 1809 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1810
bogdanm 0:9b334a45a8ff 1811 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1812 }
bogdanm 0:9b334a45a8ff 1813
bogdanm 0:9b334a45a8ff 1814 HAL_UART_TxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1815
bogdanm 0:9b334a45a8ff 1816 return HAL_OK;
bogdanm 0:9b334a45a8ff 1817 }
bogdanm 0:9b334a45a8ff 1818
bogdanm 0:9b334a45a8ff 1819 /**
bogdanm 0:9b334a45a8ff 1820 * @brief Receives an amount of data in non blocking mode
bogdanm 0:9b334a45a8ff 1821 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1822 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1823 * @retval HAL status
bogdanm 0:9b334a45a8ff 1824 */
bogdanm 0:9b334a45a8ff 1825 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1826 {
bogdanm 0:9b334a45a8ff 1827 uint16_t* tmp;
bogdanm 0:9b334a45a8ff 1828 uint32_t tmp1 = 0;
bogdanm 0:9b334a45a8ff 1829
bogdanm 0:9b334a45a8ff 1830 tmp1 = huart->State;
bogdanm 0:9b334a45a8ff 1831 if((tmp1 == HAL_UART_STATE_BUSY_RX) || (tmp1 == HAL_UART_STATE_BUSY_TX_RX))
bogdanm 0:9b334a45a8ff 1832 {
bogdanm 0:9b334a45a8ff 1833 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
bogdanm 0:9b334a45a8ff 1834 {
bogdanm 0:9b334a45a8ff 1835 tmp = (uint16_t*) huart->pRxBuffPtr;
bogdanm 0:9b334a45a8ff 1836 if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm 0:9b334a45a8ff 1837 {
bogdanm 0:9b334a45a8ff 1838 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
bogdanm 0:9b334a45a8ff 1839 huart->pRxBuffPtr += 2;
bogdanm 0:9b334a45a8ff 1840 }
bogdanm 0:9b334a45a8ff 1841 else
bogdanm 0:9b334a45a8ff 1842 {
bogdanm 0:9b334a45a8ff 1843 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
bogdanm 0:9b334a45a8ff 1844 huart->pRxBuffPtr += 1;
bogdanm 0:9b334a45a8ff 1845 }
bogdanm 0:9b334a45a8ff 1846 }
bogdanm 0:9b334a45a8ff 1847 else
bogdanm 0:9b334a45a8ff 1848 {
bogdanm 0:9b334a45a8ff 1849 if(huart->Init.Parity == UART_PARITY_NONE)
bogdanm 0:9b334a45a8ff 1850 {
bogdanm 0:9b334a45a8ff 1851 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
bogdanm 0:9b334a45a8ff 1852 }
bogdanm 0:9b334a45a8ff 1853 else
bogdanm 0:9b334a45a8ff 1854 {
bogdanm 0:9b334a45a8ff 1855 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
bogdanm 0:9b334a45a8ff 1856 }
bogdanm 0:9b334a45a8ff 1857 }
bogdanm 0:9b334a45a8ff 1858
bogdanm 0:9b334a45a8ff 1859 if(--huart->RxXferCount == 0)
bogdanm 0:9b334a45a8ff 1860 {
bogdanm 0:9b334a45a8ff 1861 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 1862
bogdanm 0:9b334a45a8ff 1863 /* Check if a transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 1864 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1865 {
bogdanm 0:9b334a45a8ff 1866 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1867 }
bogdanm 0:9b334a45a8ff 1868 else
bogdanm 0:9b334a45a8ff 1869 {
bogdanm 0:9b334a45a8ff 1870 /* Disable the UART Parity Error Interrupt */
bogdanm 0:9b334a45a8ff 1871 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 1872
bogdanm 0:9b334a45a8ff 1873 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 1874 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1875
bogdanm 0:9b334a45a8ff 1876 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1877 }
bogdanm 0:9b334a45a8ff 1878 HAL_UART_RxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1879
bogdanm 0:9b334a45a8ff 1880 return HAL_OK;
bogdanm 0:9b334a45a8ff 1881 }
bogdanm 0:9b334a45a8ff 1882 return HAL_OK;
bogdanm 0:9b334a45a8ff 1883 }
bogdanm 0:9b334a45a8ff 1884 else
bogdanm 0:9b334a45a8ff 1885 {
bogdanm 0:9b334a45a8ff 1886 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1887 }
bogdanm 0:9b334a45a8ff 1888 }
bogdanm 0:9b334a45a8ff 1889
bogdanm 0:9b334a45a8ff 1890 /**
bogdanm 0:9b334a45a8ff 1891 * @brief Configures the UART peripheral.
bogdanm 0:9b334a45a8ff 1892 * @param huart: Pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1893 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1894 * @retval None
bogdanm 0:9b334a45a8ff 1895 */
bogdanm 0:9b334a45a8ff 1896 static void UART_SetConfig(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1897 {
bogdanm 0:9b334a45a8ff 1898 uint32_t tmpreg = 0x00;
bogdanm 0:9b334a45a8ff 1899
bogdanm 0:9b334a45a8ff 1900 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1901 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 1902 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1903 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
bogdanm 0:9b334a45a8ff 1904 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
bogdanm 0:9b334a45a8ff 1905 assert_param(IS_UART_PARITY(huart->Init.Parity));
bogdanm 0:9b334a45a8ff 1906 assert_param(IS_UART_MODE(huart->Init.Mode));
bogdanm 0:9b334a45a8ff 1907 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
bogdanm 0:9b334a45a8ff 1908
bogdanm 0:9b334a45a8ff 1909 /* The hardware flow control is available only for USART1, USART2, USART3 and USART6 */
bogdanm 0:9b334a45a8ff 1910 if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
bogdanm 0:9b334a45a8ff 1911 {
bogdanm 0:9b334a45a8ff 1912 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 1913 }
bogdanm 0:9b334a45a8ff 1914
bogdanm 0:9b334a45a8ff 1915 /*-------------------------- USART CR2 Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1916 /* Configure the UART Stop Bits: Set STOP[13:12] bits according
bogdanm 0:9b334a45a8ff 1917 * to huart->Init.StopBits value */
bogdanm 0:9b334a45a8ff 1918 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
bogdanm 0:9b334a45a8ff 1919
bogdanm 0:9b334a45a8ff 1920 /*-------------------------- USART CR1 Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1921 /* Configure the UART Word Length, Parity and mode:
bogdanm 0:9b334a45a8ff 1922 Set the M bits according to huart->Init.WordLength value
bogdanm 0:9b334a45a8ff 1923 Set PCE and PS bits according to huart->Init.Parity value
bogdanm 0:9b334a45a8ff 1924 Set TE and RE bits according to huart->Init.Mode value
bogdanm 0:9b334a45a8ff 1925 Set OVER8 bit according to huart->Init.OverSampling value */
bogdanm 0:9b334a45a8ff 1926 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
bogdanm 0:9b334a45a8ff 1927 MODIFY_REG(huart->Instance->CR1,
bogdanm 0:9b334a45a8ff 1928 (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
bogdanm 0:9b334a45a8ff 1929 tmpreg);
bogdanm 0:9b334a45a8ff 1930
bogdanm 0:9b334a45a8ff 1931 /*-------------------------- USART CR3 Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1932 /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
bogdanm 0:9b334a45a8ff 1933 MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
bogdanm 0:9b334a45a8ff 1934
bogdanm 0:9b334a45a8ff 1935 /* Check the Over Sampling */
bogdanm 0:9b334a45a8ff 1936 if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
bogdanm 0:9b334a45a8ff 1937 {
bogdanm 0:9b334a45a8ff 1938 /*-------------------------- USART BRR Configuration ---------------------*/
bogdanm 0:9b334a45a8ff 1939 if((huart->Instance == USART1))
bogdanm 0:9b334a45a8ff 1940 {
bogdanm 0:9b334a45a8ff 1941 huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
bogdanm 0:9b334a45a8ff 1942 }
bogdanm 0:9b334a45a8ff 1943 else
bogdanm 0:9b334a45a8ff 1944 {
bogdanm 0:9b334a45a8ff 1945 huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
bogdanm 0:9b334a45a8ff 1946 }
bogdanm 0:9b334a45a8ff 1947 }
bogdanm 0:9b334a45a8ff 1948 else
bogdanm 0:9b334a45a8ff 1949 {
bogdanm 0:9b334a45a8ff 1950 /*-------------------------- USART BRR Configuration ---------------------*/
bogdanm 0:9b334a45a8ff 1951 if((huart->Instance == USART1))
bogdanm 0:9b334a45a8ff 1952 {
bogdanm 0:9b334a45a8ff 1953 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
bogdanm 0:9b334a45a8ff 1954 }
bogdanm 0:9b334a45a8ff 1955 else
bogdanm 0:9b334a45a8ff 1956 {
bogdanm 0:9b334a45a8ff 1957 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
bogdanm 0:9b334a45a8ff 1958 }
bogdanm 0:9b334a45a8ff 1959 }
bogdanm 0:9b334a45a8ff 1960 }
bogdanm 0:9b334a45a8ff 1961 /**
bogdanm 0:9b334a45a8ff 1962 * @}
bogdanm 0:9b334a45a8ff 1963 */
bogdanm 0:9b334a45a8ff 1964
bogdanm 0:9b334a45a8ff 1965 #endif /* HAL_UART_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1966 /**
bogdanm 0:9b334a45a8ff 1967 * @}
bogdanm 0:9b334a45a8ff 1968 */
bogdanm 0:9b334a45a8ff 1969
bogdanm 0:9b334a45a8ff 1970 /**
bogdanm 0:9b334a45a8ff 1971 * @}
bogdanm 0:9b334a45a8ff 1972 */
bogdanm 0:9b334a45a8ff 1973
bogdanm 0:9b334a45a8ff 1974 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/