Jolyon Hill
/
MCP23S17
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Fork of
MCP23S17
by 
Romilly Cocking
MCP23S17.cpp@4:d501c74550a0, 2010-08-22 (annotated)
- Committer:
- romilly
- Date:
- Sun Aug 22 12:12:58 2010 +0000
- Revision:
- 4:d501c74550a0
- Parent:
- 3:089a2a754567
- Child:
- 6:7b5e59c0e71c
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| romilly | 2:6144709f1700 | 1 | /* MCP23S17 - drive the Microchip MCP23S17 16-bit Port Extender using SPI |
| romilly | 2:6144709f1700 | 2 | * Copyright (c) 2010 Romilly Cocking |
| romilly | 2:6144709f1700 | 3 | * Released under the MIT License: http://mbed.org/license/mit |
| romilly | 2:6144709f1700 | 4 | * |
| romilly | 2:6144709f1700 | 5 | * version 0.1 |
| romilly | 2:6144709f1700 | 6 | */ |
| romilly | 2:6144709f1700 | 7 | |
| romilly | 2:6144709f1700 | 8 | #include "mbed.h" |
| romilly | 2:6144709f1700 | 9 | #include "MCP23S17.h" |
| romilly | 2:6144709f1700 | 10 | |
| romilly | 2:6144709f1700 | 11 | MCP23S17::MCP23S17(SPI& spi, PinName ncs, char writeOpcode) : _spi(spi), _ncs(ncs) { |
| romilly | 2:6144709f1700 | 12 | _writeOpcode = writeOpcode; |
| romilly | 2:6144709f1700 | 13 | _readOpcode = _writeOpcode | 1; // low order bit = 1 for read |
| romilly | 2:6144709f1700 | 14 | _init(); |
| romilly | 2:6144709f1700 | 15 | } |
| romilly | 2:6144709f1700 | 16 | |
| romilly | 2:6144709f1700 | 17 | char MCP23S17::_read(char address) { |
| romilly | 2:6144709f1700 | 18 | _ncs = 0; |
| romilly | 4:d501c74550a0 | 19 | _spi.write(_readOpcode); |
| romilly | 2:6144709f1700 | 20 | _spi.write(address); |
| romilly | 2:6144709f1700 | 21 | char result = _spi.write(0); |
| romilly | 2:6144709f1700 | 22 | _ncs = 1; |
| romilly | 2:6144709f1700 | 23 | return result; |
| romilly | 2:6144709f1700 | 24 | } |
| romilly | 2:6144709f1700 | 25 | |
| romilly | 2:6144709f1700 | 26 | void MCP23S17::_write(char address, char data) { |
| romilly | 2:6144709f1700 | 27 | _ncs = 0; |
| romilly | 2:6144709f1700 | 28 | _spi.write(_writeOpcode); |
| romilly | 2:6144709f1700 | 29 | _spi.write(address); |
| romilly | 2:6144709f1700 | 30 | _spi.write(data); |
| romilly | 2:6144709f1700 | 31 | _ncs = 1; |
| romilly | 2:6144709f1700 | 32 | } |
| romilly | 2:6144709f1700 | 33 | |
| romilly | 2:6144709f1700 | 34 | void MCP23S17::_init() { |
| romilly | 2:6144709f1700 | 35 | _write(IOCON, (IOCON_BYTE_MODE | IOCON_HAEN )); // Hardware addressing on, operations toggle between A and B registers |
| romilly | 2:6144709f1700 | 36 | } |
| romilly | 2:6144709f1700 | 37 | |
| romilly | 2:6144709f1700 | 38 | void MCP23S17::directionA(char direction) { |
| romilly | 4:d501c74550a0 | 39 | _write(IODIRA, direction); |
| romilly | 2:6144709f1700 | 40 | } |
| romilly | 2:6144709f1700 | 41 | |
| romilly | 2:6144709f1700 | 42 | void MCP23S17::directionB(char direction) { |
| romilly | 4:d501c74550a0 | 43 | _write(IODIRB, direction); |
| romilly | 2:6144709f1700 | 44 | } |
| romilly | 2:6144709f1700 | 45 | |
| romilly | 4:d501c74550a0 | 46 | void MCP23S17::gpIntEnA(char interruptsEnabledMask) { |
| romilly | 4:d501c74550a0 | 47 | _write(GPINTENA, interruptsEnabledMask); |
| romilly | 4:d501c74550a0 | 48 | } |
| romilly | 3:089a2a754567 | 49 | |
| romilly | 2:6144709f1700 | 50 | void MCP23S17::outputA(char byte) { |
| romilly | 4:d501c74550a0 | 51 | _write(OLATA, byte); |
| romilly | 2:6144709f1700 | 52 | } |
| romilly | 2:6144709f1700 | 53 | |
| romilly | 2:6144709f1700 | 54 | void MCP23S17::outputB(char byte) { |
| romilly | 4:d501c74550a0 | 55 | _write(OLATB, byte); |
| romilly | 2:6144709f1700 | 56 | } |
| romilly | 2:6144709f1700 | 57 | |
| romilly | 2:6144709f1700 | 58 | char MCP23S17::inputA() { |
| romilly | 2:6144709f1700 | 59 | return _read(GPIOA); |
| romilly | 2:6144709f1700 | 60 | } |
| romilly | 2:6144709f1700 | 61 | |
| romilly | 2:6144709f1700 | 62 | char MCP23S17::inputB() { |
| romilly | 2:6144709f1700 | 63 | return _read(GPIOB); |
| romilly | 2:6144709f1700 | 64 | } |
| romilly | 2:6144709f1700 | 65 |