Revised to support JFET LoRa Module
Fork of SX1272Liby by
sx1272/sx1272-hal.cpp@4:d2e72ba5e76c, 2016-03-20 (annotated)
- Committer:
- jlcolemanmbed
- Date:
- Sun Mar 20 19:40:55 2016 +0000
- Revision:
- 4:d2e72ba5e76c
- Parent:
- 3:73a1f904eaa5
Made revisions to support JFET LoRa Module on mbed platform
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mluis | 0:45c4f0364ca4 | 1 | /* |
mluis | 0:45c4f0364ca4 | 2 | / _____) _ | | |
mluis | 0:45c4f0364ca4 | 3 | ( (____ _____ ____ _| |_ _____ ____| |__ |
mluis | 0:45c4f0364ca4 | 4 | \____ \| ___ | (_ _) ___ |/ ___) _ \ |
mluis | 0:45c4f0364ca4 | 5 | _____) ) ____| | | || |_| ____( (___| | | | |
mluis | 0:45c4f0364ca4 | 6 | (______/|_____)_|_|_| \__)_____)\____)_| |_| |
mluis | 0:45c4f0364ca4 | 7 | (C) 2015 Semtech |
mluis | 0:45c4f0364ca4 | 8 | |
mluis | 0:45c4f0364ca4 | 9 | Description: - |
mluis | 0:45c4f0364ca4 | 10 | |
mluis | 0:45c4f0364ca4 | 11 | License: Revised BSD License, see LICENSE.TXT file include in the project |
mluis | 0:45c4f0364ca4 | 12 | |
mluis | 0:45c4f0364ca4 | 13 | Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin |
mluis | 0:45c4f0364ca4 | 14 | */ |
mluis | 0:45c4f0364ca4 | 15 | #include "sx1272-hal.h" |
mluis | 0:45c4f0364ca4 | 16 | |
GregCr | 2:cd1093b6676f | 17 | const RadioRegisters_t SX1272MB2xAS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE; |
mluis | 0:45c4f0364ca4 | 18 | |
GregCr | 2:cd1093b6676f | 19 | SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events, |
mluis | 0:45c4f0364ca4 | 20 | PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset, |
mluis | 0:45c4f0364ca4 | 21 | PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5, |
mluis | 0:45c4f0364ca4 | 22 | #if defined ( TARGET_MOTE_L152RC ) |
mluis | 0:45c4f0364ca4 | 23 | PinName rfSwitchCntr1, PinName rfSwitchCntr2 ) |
dudmuck | 1:b0372ef620d0 | 24 | #elif defined ( TARGET_MTS_MDOT_F411RE ) |
dudmuck | 1:b0372ef620d0 | 25 | PinName txctl, PinName rxctl ) |
mluis | 0:45c4f0364ca4 | 26 | #else |
mluis | 0:45c4f0364ca4 | 27 | PinName antSwitch ) |
mluis | 0:45c4f0364ca4 | 28 | #endif |
tmulrooney | 3:73a1f904eaa5 | 29 | // : SX1272( events, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5 ), |
jlcolemanmbed | 4:d2e72ba5e76c | 30 | // : SX1272( events, PTD6, PTD7, PTD5, PTD4, reset, PTC2, PTB1, PTC3, PTB0, PTC4, PTC1 ), |
jlcolemanmbed | 4:d2e72ba5e76c | 31 | : SX1272( events, PTC6, PTC7, PTC5, PTC4, reset, PTC8, PTC9, PTC10, PTC11, PTD0, PTD1 ), |
mluis | 0:45c4f0364ca4 | 32 | #if defined ( TARGET_MOTE_L152RC ) |
mluis | 0:45c4f0364ca4 | 33 | RfSwitchCntr1( rfSwitchCntr1 ), |
mluis | 0:45c4f0364ca4 | 34 | RfSwitchCntr2( rfSwitchCntr2 ), |
dudmuck | 1:b0372ef620d0 | 35 | PwrAmpCntr( PD_2 ) |
dudmuck | 1:b0372ef620d0 | 36 | #elif defined ( TARGET_MTS_MDOT_F411RE ) |
dudmuck | 1:b0372ef620d0 | 37 | TxCtl ( txctl ), |
dudmuck | 1:b0372ef620d0 | 38 | RxCtl ( rxctl ) |
mluis | 0:45c4f0364ca4 | 39 | #else |
tmulrooney | 3:73a1f904eaa5 | 40 | // AntSwitch( antSwitch ), |
jlcolemanmbed | 4:d2e72ba5e76c | 41 | // AntSwitch( PTC6 ), |
jlcolemanmbed | 4:d2e72ba5e76c | 42 | AntSwitch( PTC1 ), |
mluis | 0:45c4f0364ca4 | 43 | #if( defined ( TARGET_NUCLEO_L152RE ) ) |
dudmuck | 1:b0372ef620d0 | 44 | Fake( D8 ) |
mluis | 0:45c4f0364ca4 | 45 | #else |
mluis | 0:45c4f0364ca4 | 46 | Fake( A3 ) |
mluis | 0:45c4f0364ca4 | 47 | #endif |
mluis | 0:45c4f0364ca4 | 48 | #endif |
mluis | 0:45c4f0364ca4 | 49 | { |
mluis | 0:45c4f0364ca4 | 50 | this->RadioEvents = events; |
mluis | 0:45c4f0364ca4 | 51 | |
mluis | 0:45c4f0364ca4 | 52 | Reset( ); |
mluis | 0:45c4f0364ca4 | 53 | |
mluis | 0:45c4f0364ca4 | 54 | IoInit( ); |
mluis | 0:45c4f0364ca4 | 55 | |
mluis | 0:45c4f0364ca4 | 56 | SetOpMode( RF_OPMODE_SLEEP ); |
mluis | 0:45c4f0364ca4 | 57 | |
mluis | 0:45c4f0364ca4 | 58 | IoIrqInit( dioIrq ); |
mluis | 0:45c4f0364ca4 | 59 | |
mluis | 0:45c4f0364ca4 | 60 | RadioRegistersInit( ); |
mluis | 0:45c4f0364ca4 | 61 | |
mluis | 0:45c4f0364ca4 | 62 | SetModem( MODEM_FSK ); |
mluis | 0:45c4f0364ca4 | 63 | |
mluis | 0:45c4f0364ca4 | 64 | this->settings.State = RF_IDLE ; |
mluis | 0:45c4f0364ca4 | 65 | } |
mluis | 0:45c4f0364ca4 | 66 | |
GregCr | 2:cd1093b6676f | 67 | SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events ) |
mluis | 0:45c4f0364ca4 | 68 | #if defined ( TARGET_NUCLEO_L152RE ) |
mluis | 0:45c4f0364ca4 | 69 | : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3 |
mluis | 0:45c4f0364ca4 | 70 | AntSwitch( A4 ), |
mluis | 0:45c4f0364ca4 | 71 | Fake( D8 ) |
mluis | 0:45c4f0364ca4 | 72 | #elif defined ( TARGET_MOTE_L152RC ) |
mluis | 0:45c4f0364ca4 | 73 | : SX1272( events, PB_15, PB_14, PB_13, PB_12, PC_2, PC_6, PC_10, PC_11, PC_8, PC_9, PC_12 ), |
mluis | 0:45c4f0364ca4 | 74 | RfSwitchCntr1( PC_4 ), |
mluis | 0:45c4f0364ca4 | 75 | RfSwitchCntr2( PC_13 ), |
mluis | 0:45c4f0364ca4 | 76 | PwrAmpCntr( PD_2 ) |
dudmuck | 1:b0372ef620d0 | 77 | #elif defined ( TARGET_MTS_MDOT_F411RE ) |
dudmuck | 1:b0372ef620d0 | 78 | : SX1272( events, LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1, LORA_DIO2, LORA_DIO3, LORA_DIO4, LORA_DIO5 ), |
dudmuck | 1:b0372ef620d0 | 79 | TxCtl( LORA_TXCTL ), |
dudmuck | 1:b0372ef620d0 | 80 | RxCtl( LORA_RXCTL ) |
mluis | 0:45c4f0364ca4 | 81 | #else |
tmulrooney | 3:73a1f904eaa5 | 82 | // : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ), |
tmulrooney | 3:73a1f904eaa5 | 83 | // AntSwitch( A4 ), |
jlcolemanmbed | 4:d2e72ba5e76c | 84 | : SX1272( events, PTC6, PTC7, PTC5, PTC4, A0, PTC8, PTC9, PTC10, PTC11, PTD0, PTD1 ), |
jlcolemanmbed | 4:d2e72ba5e76c | 85 | AntSwitch( PTC1 ), |
jlcolemanmbed | 4:d2e72ba5e76c | 86 | Fake( A3 ) |
mluis | 0:45c4f0364ca4 | 87 | #endif |
mluis | 0:45c4f0364ca4 | 88 | { |
mluis | 0:45c4f0364ca4 | 89 | this->RadioEvents = events; |
mluis | 0:45c4f0364ca4 | 90 | |
mluis | 0:45c4f0364ca4 | 91 | Reset( ); |
mluis | 0:45c4f0364ca4 | 92 | |
mluis | 0:45c4f0364ca4 | 93 | boardConnected = UNKNOWN; |
mluis | 0:45c4f0364ca4 | 94 | |
mluis | 0:45c4f0364ca4 | 95 | DetectBoardType( ); |
mluis | 0:45c4f0364ca4 | 96 | |
mluis | 0:45c4f0364ca4 | 97 | IoInit( ); |
mluis | 0:45c4f0364ca4 | 98 | |
mluis | 0:45c4f0364ca4 | 99 | SetOpMode( RF_OPMODE_SLEEP ); |
mluis | 0:45c4f0364ca4 | 100 | IoIrqInit( dioIrq ); |
mluis | 0:45c4f0364ca4 | 101 | |
mluis | 0:45c4f0364ca4 | 102 | RadioRegistersInit( ); |
mluis | 0:45c4f0364ca4 | 103 | |
mluis | 0:45c4f0364ca4 | 104 | SetModem( MODEM_FSK ); |
mluis | 0:45c4f0364ca4 | 105 | |
mluis | 0:45c4f0364ca4 | 106 | this->settings.State = RF_IDLE ; |
mluis | 0:45c4f0364ca4 | 107 | } |
mluis | 0:45c4f0364ca4 | 108 | |
mluis | 0:45c4f0364ca4 | 109 | //------------------------------------------------------------------------- |
mluis | 0:45c4f0364ca4 | 110 | // Board relative functions |
mluis | 0:45c4f0364ca4 | 111 | //------------------------------------------------------------------------- |
GregCr | 2:cd1093b6676f | 112 | uint8_t SX1272MB2xAS::DetectBoardType( void ) |
mluis | 0:45c4f0364ca4 | 113 | { |
mluis | 0:45c4f0364ca4 | 114 | if( boardConnected == UNKNOWN ) |
mluis | 0:45c4f0364ca4 | 115 | { |
mluis | 0:45c4f0364ca4 | 116 | #if defined ( TARGET_MOTE_L152RC ) |
mluis | 0:45c4f0364ca4 | 117 | boardConnected = NA_MOTE_72; |
dudmuck | 1:b0372ef620d0 | 118 | #elif defined ( TARGET_MTS_MDOT_F411RE ) |
dudmuck | 1:b0372ef620d0 | 119 | boardConnected = MDOT_F411RE; |
mluis | 0:45c4f0364ca4 | 120 | #else |
mluis | 0:45c4f0364ca4 | 121 | this->AntSwitch.input( ); |
mluis | 0:45c4f0364ca4 | 122 | wait_ms( 1 ); |
mluis | 0:45c4f0364ca4 | 123 | if( this->AntSwitch == 1 ) |
mluis | 0:45c4f0364ca4 | 124 | { |
mluis | 0:45c4f0364ca4 | 125 | boardConnected = SX1272MB1DCS; |
mluis | 0:45c4f0364ca4 | 126 | } |
mluis | 0:45c4f0364ca4 | 127 | else |
mluis | 0:45c4f0364ca4 | 128 | { |
GregCr | 2:cd1093b6676f | 129 | boardConnected = SX1272MB2XAS; |
mluis | 0:45c4f0364ca4 | 130 | } |
mluis | 0:45c4f0364ca4 | 131 | this->AntSwitch.output( ); |
mluis | 0:45c4f0364ca4 | 132 | wait_ms( 1 ); |
mluis | 0:45c4f0364ca4 | 133 | #endif |
mluis | 0:45c4f0364ca4 | 134 | } |
mluis | 0:45c4f0364ca4 | 135 | return ( boardConnected ); |
mluis | 0:45c4f0364ca4 | 136 | } |
mluis | 0:45c4f0364ca4 | 137 | |
GregCr | 2:cd1093b6676f | 138 | void SX1272MB2xAS::IoInit( void ) |
mluis | 0:45c4f0364ca4 | 139 | { |
mluis | 0:45c4f0364ca4 | 140 | AntSwInit( ); |
mluis | 0:45c4f0364ca4 | 141 | SpiInit( ); |
mluis | 0:45c4f0364ca4 | 142 | } |
mluis | 0:45c4f0364ca4 | 143 | |
GregCr | 2:cd1093b6676f | 144 | void SX1272MB2xAS::RadioRegistersInit( ) |
mluis | 0:45c4f0364ca4 | 145 | { |
mluis | 0:45c4f0364ca4 | 146 | uint8_t i = 0; |
mluis | 0:45c4f0364ca4 | 147 | for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ ) |
mluis | 0:45c4f0364ca4 | 148 | { |
mluis | 0:45c4f0364ca4 | 149 | SetModem( RadioRegsInit[i].Modem ); |
mluis | 0:45c4f0364ca4 | 150 | Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value ); |
mluis | 0:45c4f0364ca4 | 151 | } |
mluis | 0:45c4f0364ca4 | 152 | } |
mluis | 0:45c4f0364ca4 | 153 | |
GregCr | 2:cd1093b6676f | 154 | void SX1272MB2xAS::SpiInit( void ) |
mluis | 0:45c4f0364ca4 | 155 | { |
mluis | 0:45c4f0364ca4 | 156 | nss = 1; |
mluis | 0:45c4f0364ca4 | 157 | spi.format( 8,0 ); |
mluis | 0:45c4f0364ca4 | 158 | uint32_t frequencyToSet = 8000000; |
dudmuck | 1:b0372ef620d0 | 159 | #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_LPC11U6X ) || defined ( TARGET_MTS_MDOT_F411RE ) ) |
mluis | 0:45c4f0364ca4 | 160 | spi.frequency( frequencyToSet ); |
mluis | 0:45c4f0364ca4 | 161 | #elif( defined ( TARGET_KL25Z ) ) //busclock frequency is halved -> double the spi frequency to compensate |
mluis | 0:45c4f0364ca4 | 162 | spi.frequency( frequencyToSet * 2 ); |
mluis | 0:45c4f0364ca4 | 163 | #else |
mluis | 0:45c4f0364ca4 | 164 | #warning "Check the board's SPI frequency" |
mluis | 0:45c4f0364ca4 | 165 | #endif |
mluis | 0:45c4f0364ca4 | 166 | wait(0.1); |
mluis | 0:45c4f0364ca4 | 167 | } |
mluis | 0:45c4f0364ca4 | 168 | |
GregCr | 2:cd1093b6676f | 169 | void SX1272MB2xAS::IoIrqInit( DioIrqHandler *irqHandlers ) |
mluis | 0:45c4f0364ca4 | 170 | { |
mluis | 0:45c4f0364ca4 | 171 | #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_LPC11U6X ) ) |
mluis | 0:45c4f0364ca4 | 172 | dio0.mode( PullDown ); |
mluis | 0:45c4f0364ca4 | 173 | dio1.mode( PullDown ); |
mluis | 0:45c4f0364ca4 | 174 | dio2.mode( PullDown ); |
mluis | 0:45c4f0364ca4 | 175 | dio3.mode( PullDown ); |
mluis | 0:45c4f0364ca4 | 176 | dio4.mode( PullDown ); |
mluis | 0:45c4f0364ca4 | 177 | #endif |
GregCr | 2:cd1093b6676f | 178 | dio0.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[0] ) ); |
GregCr | 2:cd1093b6676f | 179 | dio1.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[1] ) ); |
GregCr | 2:cd1093b6676f | 180 | dio2.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[2] ) ); |
GregCr | 2:cd1093b6676f | 181 | dio3.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[3] ) ); |
GregCr | 2:cd1093b6676f | 182 | dio4.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[4] ) ); |
mluis | 0:45c4f0364ca4 | 183 | } |
mluis | 0:45c4f0364ca4 | 184 | |
GregCr | 2:cd1093b6676f | 185 | void SX1272MB2xAS::IoDeInit( void ) |
mluis | 0:45c4f0364ca4 | 186 | { |
mluis | 0:45c4f0364ca4 | 187 | //nothing |
mluis | 0:45c4f0364ca4 | 188 | } |
mluis | 0:45c4f0364ca4 | 189 | |
GregCr | 2:cd1093b6676f | 190 | uint8_t SX1272MB2xAS::GetPaSelect( uint32_t channel ) |
mluis | 0:45c4f0364ca4 | 191 | { |
dudmuck | 1:b0372ef620d0 | 192 | if( boardConnected == SX1272MB1DCS || boardConnected == MDOT_F411RE ) |
mluis | 0:45c4f0364ca4 | 193 | { |
mluis | 0:45c4f0364ca4 | 194 | return RF_PACONFIG_PASELECT_PABOOST; |
mluis | 0:45c4f0364ca4 | 195 | } |
mluis | 0:45c4f0364ca4 | 196 | else |
mluis | 0:45c4f0364ca4 | 197 | { |
mluis | 0:45c4f0364ca4 | 198 | return RF_PACONFIG_PASELECT_RFO; |
mluis | 0:45c4f0364ca4 | 199 | } |
mluis | 0:45c4f0364ca4 | 200 | } |
mluis | 0:45c4f0364ca4 | 201 | |
GregCr | 2:cd1093b6676f | 202 | void SX1272MB2xAS::SetAntSwLowPower( bool status ) |
mluis | 0:45c4f0364ca4 | 203 | { |
mluis | 0:45c4f0364ca4 | 204 | if( isRadioActive != status ) |
mluis | 0:45c4f0364ca4 | 205 | { |
mluis | 0:45c4f0364ca4 | 206 | isRadioActive = status; |
mluis | 0:45c4f0364ca4 | 207 | |
mluis | 0:45c4f0364ca4 | 208 | if( status == false ) |
mluis | 0:45c4f0364ca4 | 209 | { |
mluis | 0:45c4f0364ca4 | 210 | AntSwInit( ); |
mluis | 0:45c4f0364ca4 | 211 | } |
mluis | 0:45c4f0364ca4 | 212 | else |
mluis | 0:45c4f0364ca4 | 213 | { |
mluis | 0:45c4f0364ca4 | 214 | AntSwDeInit( ); |
mluis | 0:45c4f0364ca4 | 215 | } |
mluis | 0:45c4f0364ca4 | 216 | } |
mluis | 0:45c4f0364ca4 | 217 | } |
mluis | 0:45c4f0364ca4 | 218 | |
GregCr | 2:cd1093b6676f | 219 | void SX1272MB2xAS::AntSwInit( void ) |
mluis | 0:45c4f0364ca4 | 220 | { |
mluis | 0:45c4f0364ca4 | 221 | #if defined ( TARGET_MOTE_L152RC ) |
mluis | 0:45c4f0364ca4 | 222 | this->RfSwitchCntr1 = 0; |
mluis | 0:45c4f0364ca4 | 223 | this->RfSwitchCntr2 = 0; |
mluis | 0:45c4f0364ca4 | 224 | this->PwrAmpCntr = 0; |
dudmuck | 1:b0372ef620d0 | 225 | #elif defined ( TARGET_MTS_MDOT_F411RE ) |
dudmuck | 1:b0372ef620d0 | 226 | this->TxCtl = 0; |
dudmuck | 1:b0372ef620d0 | 227 | this->RxCtl = 0; |
mluis | 0:45c4f0364ca4 | 228 | #else |
mluis | 0:45c4f0364ca4 | 229 | this->AntSwitch = 0; |
mluis | 0:45c4f0364ca4 | 230 | #endif |
mluis | 0:45c4f0364ca4 | 231 | } |
mluis | 0:45c4f0364ca4 | 232 | |
GregCr | 2:cd1093b6676f | 233 | void SX1272MB2xAS::AntSwDeInit( void ) |
mluis | 0:45c4f0364ca4 | 234 | { |
mluis | 0:45c4f0364ca4 | 235 | #if defined ( TARGET_MOTE_L152RC ) |
mluis | 0:45c4f0364ca4 | 236 | this->RfSwitchCntr1 = 0; |
mluis | 0:45c4f0364ca4 | 237 | this->RfSwitchCntr2 = 0; |
mluis | 0:45c4f0364ca4 | 238 | this->PwrAmpCntr = 0; |
dudmuck | 1:b0372ef620d0 | 239 | #elif defined ( TARGET_MTS_MDOT_F411RE ) |
dudmuck | 1:b0372ef620d0 | 240 | this->TxCtl = 0; |
dudmuck | 1:b0372ef620d0 | 241 | this->RxCtl = 0; |
mluis | 0:45c4f0364ca4 | 242 | #else |
mluis | 0:45c4f0364ca4 | 243 | this->AntSwitch = 0; |
mluis | 0:45c4f0364ca4 | 244 | #endif |
mluis | 0:45c4f0364ca4 | 245 | } |
mluis | 0:45c4f0364ca4 | 246 | |
GregCr | 2:cd1093b6676f | 247 | void SX1272MB2xAS::SetAntSw( uint8_t rxTx ) |
mluis | 0:45c4f0364ca4 | 248 | { |
mluis | 0:45c4f0364ca4 | 249 | #if defined ( TARGET_MOTE_L152RC ) |
mluis | 0:45c4f0364ca4 | 250 | switch( this->currentOpMode ) |
mluis | 0:45c4f0364ca4 | 251 | { |
mluis | 0:45c4f0364ca4 | 252 | case RFLR_OPMODE_TRANSMITTER: |
mluis | 0:45c4f0364ca4 | 253 | if( ( Read( REG_PACONFIG ) & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST ) |
mluis | 0:45c4f0364ca4 | 254 | { |
mluis | 0:45c4f0364ca4 | 255 | this->RfSwitchCntr1 = 1; |
mluis | 0:45c4f0364ca4 | 256 | this->RfSwitchCntr2 = 0; |
mluis | 0:45c4f0364ca4 | 257 | } |
mluis | 0:45c4f0364ca4 | 258 | else |
mluis | 0:45c4f0364ca4 | 259 | { |
mluis | 0:45c4f0364ca4 | 260 | this->RfSwitchCntr1 = 0; |
mluis | 0:45c4f0364ca4 | 261 | this->RfSwitchCntr2 = 1; |
mluis | 0:45c4f0364ca4 | 262 | } |
mluis | 0:45c4f0364ca4 | 263 | break; |
mluis | 0:45c4f0364ca4 | 264 | case RFLR_OPMODE_RECEIVER: |
mluis | 0:45c4f0364ca4 | 265 | case RFLR_OPMODE_RECEIVER_SINGLE: |
mluis | 0:45c4f0364ca4 | 266 | case RFLR_OPMODE_CAD: |
mluis | 0:45c4f0364ca4 | 267 | this->RfSwitchCntr1 = 1; |
mluis | 0:45c4f0364ca4 | 268 | this->RfSwitchCntr2 = 1; |
mluis | 0:45c4f0364ca4 | 269 | break; |
mluis | 0:45c4f0364ca4 | 270 | default: |
mluis | 0:45c4f0364ca4 | 271 | this->RfSwitchCntr1 = 0; |
mluis | 0:45c4f0364ca4 | 272 | this->RfSwitchCntr2 = 0; |
mluis | 0:45c4f0364ca4 | 273 | this->PwrAmpCntr = 0; |
mluis | 0:45c4f0364ca4 | 274 | break; |
mluis | 0:45c4f0364ca4 | 275 | } |
dudmuck | 1:b0372ef620d0 | 276 | #elif defined ( TARGET_MTS_MDOT_F411RE ) |
dudmuck | 1:b0372ef620d0 | 277 | if( this->rxTx == rxTx ) |
dudmuck | 1:b0372ef620d0 | 278 | { |
dudmuck | 1:b0372ef620d0 | 279 | //no need to go further |
dudmuck | 1:b0372ef620d0 | 280 | return; |
dudmuck | 1:b0372ef620d0 | 281 | } |
dudmuck | 1:b0372ef620d0 | 282 | |
dudmuck | 1:b0372ef620d0 | 283 | /* SKY13350 */ |
dudmuck | 1:b0372ef620d0 | 284 | this->rxTx = rxTx; |
dudmuck | 1:b0372ef620d0 | 285 | |
dudmuck | 1:b0372ef620d0 | 286 | // 1: Tx, 0: Rx |
dudmuck | 1:b0372ef620d0 | 287 | if( rxTx != 0 ) |
dudmuck | 1:b0372ef620d0 | 288 | { |
dudmuck | 1:b0372ef620d0 | 289 | this->TxCtl = 1; |
dudmuck | 1:b0372ef620d0 | 290 | this->RxCtl = 0; |
dudmuck | 1:b0372ef620d0 | 291 | } |
dudmuck | 1:b0372ef620d0 | 292 | else |
dudmuck | 1:b0372ef620d0 | 293 | { |
dudmuck | 1:b0372ef620d0 | 294 | this->TxCtl = 0; |
dudmuck | 1:b0372ef620d0 | 295 | this->RxCtl = 1; |
dudmuck | 1:b0372ef620d0 | 296 | } |
mluis | 0:45c4f0364ca4 | 297 | #else |
mluis | 0:45c4f0364ca4 | 298 | if( this->rxTx == rxTx ) |
mluis | 0:45c4f0364ca4 | 299 | { |
mluis | 0:45c4f0364ca4 | 300 | //no need to go further |
mluis | 0:45c4f0364ca4 | 301 | return; |
mluis | 0:45c4f0364ca4 | 302 | } |
mluis | 0:45c4f0364ca4 | 303 | |
mluis | 0:45c4f0364ca4 | 304 | this->rxTx = rxTx; |
mluis | 0:45c4f0364ca4 | 305 | |
mluis | 0:45c4f0364ca4 | 306 | // 1: Tx, 0: Rx |
mluis | 0:45c4f0364ca4 | 307 | if( rxTx != 0 ) |
mluis | 0:45c4f0364ca4 | 308 | { |
mluis | 0:45c4f0364ca4 | 309 | this->AntSwitch = 1; |
mluis | 0:45c4f0364ca4 | 310 | } |
mluis | 0:45c4f0364ca4 | 311 | else |
mluis | 0:45c4f0364ca4 | 312 | { |
mluis | 0:45c4f0364ca4 | 313 | this->AntSwitch = 0; |
mluis | 0:45c4f0364ca4 | 314 | } |
mluis | 0:45c4f0364ca4 | 315 | #endif |
mluis | 0:45c4f0364ca4 | 316 | } |
mluis | 0:45c4f0364ca4 | 317 | |
GregCr | 2:cd1093b6676f | 318 | bool SX1272MB2xAS::CheckRfFrequency( uint32_t frequency ) |
mluis | 0:45c4f0364ca4 | 319 | { |
mluis | 0:45c4f0364ca4 | 320 | //TODO: Implement check, currently all frequencies are supported |
mluis | 0:45c4f0364ca4 | 321 | return true; |
mluis | 0:45c4f0364ca4 | 322 | } |
mluis | 0:45c4f0364ca4 | 323 | |
mluis | 0:45c4f0364ca4 | 324 | |
GregCr | 2:cd1093b6676f | 325 | void SX1272MB2xAS::Reset( void ) |
mluis | 0:45c4f0364ca4 | 326 | { |
mluis | 0:45c4f0364ca4 | 327 | reset.output(); |
mluis | 0:45c4f0364ca4 | 328 | reset = 0; |
mluis | 0:45c4f0364ca4 | 329 | wait_ms( 1 ); |
mluis | 0:45c4f0364ca4 | 330 | reset.input(); |
mluis | 0:45c4f0364ca4 | 331 | wait_ms( 6 ); |
mluis | 0:45c4f0364ca4 | 332 | } |
mluis | 0:45c4f0364ca4 | 333 | |
GregCr | 2:cd1093b6676f | 334 | void SX1272MB2xAS::Write( uint8_t addr, uint8_t data ) |
mluis | 0:45c4f0364ca4 | 335 | { |
mluis | 0:45c4f0364ca4 | 336 | Write( addr, &data, 1 ); |
mluis | 0:45c4f0364ca4 | 337 | } |
mluis | 0:45c4f0364ca4 | 338 | |
GregCr | 2:cd1093b6676f | 339 | uint8_t SX1272MB2xAS::Read( uint8_t addr ) |
mluis | 0:45c4f0364ca4 | 340 | { |
mluis | 0:45c4f0364ca4 | 341 | uint8_t data; |
mluis | 0:45c4f0364ca4 | 342 | Read( addr, &data, 1 ); |
mluis | 0:45c4f0364ca4 | 343 | return data; |
mluis | 0:45c4f0364ca4 | 344 | } |
mluis | 0:45c4f0364ca4 | 345 | |
GregCr | 2:cd1093b6676f | 346 | void SX1272MB2xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size ) |
mluis | 0:45c4f0364ca4 | 347 | { |
mluis | 0:45c4f0364ca4 | 348 | uint8_t i; |
mluis | 0:45c4f0364ca4 | 349 | |
mluis | 0:45c4f0364ca4 | 350 | nss = 0; |
mluis | 0:45c4f0364ca4 | 351 | spi.write( addr | 0x80 ); |
mluis | 0:45c4f0364ca4 | 352 | for( i = 0; i < size; i++ ) |
mluis | 0:45c4f0364ca4 | 353 | { |
mluis | 0:45c4f0364ca4 | 354 | spi.write( buffer[i] ); |
mluis | 0:45c4f0364ca4 | 355 | } |
mluis | 0:45c4f0364ca4 | 356 | nss = 1; |
mluis | 0:45c4f0364ca4 | 357 | } |
mluis | 0:45c4f0364ca4 | 358 | |
GregCr | 2:cd1093b6676f | 359 | void SX1272MB2xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size ) |
mluis | 0:45c4f0364ca4 | 360 | { |
mluis | 0:45c4f0364ca4 | 361 | uint8_t i; |
mluis | 0:45c4f0364ca4 | 362 | |
mluis | 0:45c4f0364ca4 | 363 | nss = 0; |
mluis | 0:45c4f0364ca4 | 364 | spi.write( addr & 0x7F ); |
mluis | 0:45c4f0364ca4 | 365 | for( i = 0; i < size; i++ ) |
mluis | 0:45c4f0364ca4 | 366 | { |
mluis | 0:45c4f0364ca4 | 367 | buffer[i] = spi.write( 0 ); |
mluis | 0:45c4f0364ca4 | 368 | } |
mluis | 0:45c4f0364ca4 | 369 | nss = 1; |
mluis | 0:45c4f0364ca4 | 370 | } |
mluis | 0:45c4f0364ca4 | 371 | |
GregCr | 2:cd1093b6676f | 372 | void SX1272MB2xAS::WriteFifo( uint8_t *buffer, uint8_t size ) |
mluis | 0:45c4f0364ca4 | 373 | { |
mluis | 0:45c4f0364ca4 | 374 | Write( 0, buffer, size ); |
mluis | 0:45c4f0364ca4 | 375 | } |
mluis | 0:45c4f0364ca4 | 376 | |
GregCr | 2:cd1093b6676f | 377 | void SX1272MB2xAS::ReadFifo( uint8_t *buffer, uint8_t size ) |
mluis | 0:45c4f0364ca4 | 378 | { |
mluis | 0:45c4f0364ca4 | 379 | Read( 0, buffer, size ); |
mluis | 0:45c4f0364ca4 | 380 | } |