Junichi Katsu / Mbed 2 deprecated WallbotWii

うおーるぼっとをWiiリモコンでコントロールする新しいプログラムです。 以前のものより、Wiiリモコンが早く繋がる様になりました。 It is a program which controls A with the Wii remote. ※ A Bluetooth dongle and a Wii remote control are needed.

Dependencies:   USBHost mbed FATFileSystem mbed-rtos

USBHost/mbed-rtos/rtx/rt_HAL_CM.h@0:fccb789424fc, 2013-06-10 (annotated)

Committer:
jksoft
Date:
Mon Jun 10 16:01:50 2013 +0000
Revision:
0:fccb789424fc
1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jksoft 0:fccb789424fc 1 /*----------------------------------------------------------------------------
jksoft 0:fccb789424fc 2 * RL-ARM - RTX
jksoft 0:fccb789424fc 3 *----------------------------------------------------------------------------
jksoft 0:fccb789424fc 4 * Name: RT_HAL_CM.H
jksoft 0:fccb789424fc 5 * Purpose: Hardware Abstraction Layer for Cortex-M definitions
jksoft 0:fccb789424fc 6 * Rev.: V4.60
jksoft 0:fccb789424fc 7 *----------------------------------------------------------------------------
jksoft 0:fccb789424fc 8 *
jksoft 0:fccb789424fc 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
jksoft 0:fccb789424fc 10 * All rights reserved.
jksoft 0:fccb789424fc 11 * Redistribution and use in source and binary forms, with or without
jksoft 0:fccb789424fc 12 * modification, are permitted provided that the following conditions are met:
jksoft 0:fccb789424fc 13 * - Redistributions of source code must retain the above copyright
jksoft 0:fccb789424fc 14 * notice, this list of conditions and the following disclaimer.
jksoft 0:fccb789424fc 15 * - Redistributions in binary form must reproduce the above copyright
jksoft 0:fccb789424fc 16 * notice, this list of conditions and the following disclaimer in the
jksoft 0:fccb789424fc 17 * documentation and/or other materials provided with the distribution.
jksoft 0:fccb789424fc 18 * - Neither the name of ARM nor the names of its contributors may be used
jksoft 0:fccb789424fc 19 * to endorse or promote products derived from this software without
jksoft 0:fccb789424fc 20 * specific prior written permission.
jksoft 0:fccb789424fc 21 *
jksoft 0:fccb789424fc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jksoft 0:fccb789424fc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jksoft 0:fccb789424fc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
jksoft 0:fccb789424fc 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
jksoft 0:fccb789424fc 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
jksoft 0:fccb789424fc 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
jksoft 0:fccb789424fc 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
jksoft 0:fccb789424fc 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
jksoft 0:fccb789424fc 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
jksoft 0:fccb789424fc 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
jksoft 0:fccb789424fc 32 * POSSIBILITY OF SUCH DAMAGE.
jksoft 0:fccb789424fc 33 *---------------------------------------------------------------------------*/
jksoft 0:fccb789424fc 34
jksoft 0:fccb789424fc 35 /* Definitions */
jksoft 0:fccb789424fc 36 #define INITIAL_xPSR 0x01000000
jksoft 0:fccb789424fc 37 #define DEMCR_TRCENA 0x01000000
jksoft 0:fccb789424fc 38 #define ITM_ITMENA 0x00000001
jksoft 0:fccb789424fc 39 #define MAGIC_WORD 0xE25A2EA5
jksoft 0:fccb789424fc 40
jksoft 0:fccb789424fc 41 #if defined (__CC_ARM) /* ARM Compiler */
jksoft 0:fccb789424fc 42
jksoft 0:fccb789424fc 43 #if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)
jksoft 0:fccb789424fc 44 #define __USE_EXCLUSIVE_ACCESS
jksoft 0:fccb789424fc 45 #else
jksoft 0:fccb789424fc 46 #undef __USE_EXCLUSIVE_ACCESS
jksoft 0:fccb789424fc 47 #endif
jksoft 0:fccb789424fc 48
jksoft 0:fccb789424fc 49 #elif defined (__GNUC__) /* GNU Compiler */
jksoft 0:fccb789424fc 50
jksoft 0:fccb789424fc 51 #undef __USE_EXCLUSIVE_ACCESS
jksoft 0:fccb789424fc 52
jksoft 0:fccb789424fc 53 #if defined (__CORTEX_M0)
jksoft 0:fccb789424fc 54 #define __TARGET_ARCH_6S_M 1
jksoft 0:fccb789424fc 55 #else
jksoft 0:fccb789424fc 56 #define __TARGET_ARCH_6S_M 0
jksoft 0:fccb789424fc 57 #endif
jksoft 0:fccb789424fc 58
jksoft 0:fccb789424fc 59 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
jksoft 0:fccb789424fc 60 #define __TARGET_FPU_VFP 1
jksoft 0:fccb789424fc 61 #else
jksoft 0:fccb789424fc 62 #define __TARGET_FPU_VFP 0
jksoft 0:fccb789424fc 63 #endif
jksoft 0:fccb789424fc 64
jksoft 0:fccb789424fc 65 #define __inline inline
jksoft 0:fccb789424fc 66 #define __weak __attribute__((weak))
jksoft 0:fccb789424fc 67
jksoft 0:fccb789424fc 68 #ifndef __CMSIS_GENERIC
jksoft 0:fccb789424fc 69
jksoft 0:fccb789424fc 70 __attribute__((always_inline)) static inline void __enable_irq(void)
jksoft 0:fccb789424fc 71 {
jksoft 0:fccb789424fc 72 __asm volatile ("cpsie i");
jksoft 0:fccb789424fc 73 }
jksoft 0:fccb789424fc 74
jksoft 0:fccb789424fc 75 __attribute__((always_inline)) static inline U32 __disable_irq(void)
jksoft 0:fccb789424fc 76 {
jksoft 0:fccb789424fc 77 U32 result;
jksoft 0:fccb789424fc 78
jksoft 0:fccb789424fc 79 __asm volatile ("mrs %0, primask" : "=r" (result));
jksoft 0:fccb789424fc 80 __asm volatile ("cpsid i");
jksoft 0:fccb789424fc 81 return(result & 1);
jksoft 0:fccb789424fc 82 }
jksoft 0:fccb789424fc 83
jksoft 0:fccb789424fc 84 #endif
jksoft 0:fccb789424fc 85
jksoft 0:fccb789424fc 86 __attribute__(( always_inline)) static inline U8 __clz(U32 value)
jksoft 0:fccb789424fc 87 {
jksoft 0:fccb789424fc 88 U8 result;
jksoft 0:fccb789424fc 89
jksoft 0:fccb789424fc 90 __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value));
jksoft 0:fccb789424fc 91 return(result);
jksoft 0:fccb789424fc 92 }
jksoft 0:fccb789424fc 93
jksoft 0:fccb789424fc 94 #elif defined (__ICCARM__) /* IAR Compiler */
jksoft 0:fccb789424fc 95
jksoft 0:fccb789424fc 96 #undef __USE_EXCLUSIVE_ACCESS
jksoft 0:fccb789424fc 97
jksoft 0:fccb789424fc 98 #if (__CORE__ == __ARM6M__)
jksoft 0:fccb789424fc 99 #define __TARGET_ARCH_6S_M 1
jksoft 0:fccb789424fc 100 #else
jksoft 0:fccb789424fc 101 #define __TARGET_ARCH_6S_M 0
jksoft 0:fccb789424fc 102 #endif
jksoft 0:fccb789424fc 103
jksoft 0:fccb789424fc 104 #if defined __ARMVFP__
jksoft 0:fccb789424fc 105 #define __TARGET_FPU_VFP 1
jksoft 0:fccb789424fc 106 #else
jksoft 0:fccb789424fc 107 #define __TARGET_FPU_VFP 0
jksoft 0:fccb789424fc 108 #endif
jksoft 0:fccb789424fc 109
jksoft 0:fccb789424fc 110 #define __inline inline
jksoft 0:fccb789424fc 111
jksoft 0:fccb789424fc 112 #ifndef __CMSIS_GENERIC
jksoft 0:fccb789424fc 113
jksoft 0:fccb789424fc 114 static inline void __enable_irq(void)
jksoft 0:fccb789424fc 115 {
jksoft 0:fccb789424fc 116 __asm volatile ("cpsie i");
jksoft 0:fccb789424fc 117 }
jksoft 0:fccb789424fc 118
jksoft 0:fccb789424fc 119 static inline U32 __disable_irq(void)
jksoft 0:fccb789424fc 120 {
jksoft 0:fccb789424fc 121 U32 result;
jksoft 0:fccb789424fc 122
jksoft 0:fccb789424fc 123 __asm volatile ("mrs %0, primask" : "=r" (result));
jksoft 0:fccb789424fc 124 __asm volatile ("cpsid i");
jksoft 0:fccb789424fc 125 return(result & 1);
jksoft 0:fccb789424fc 126 }
jksoft 0:fccb789424fc 127
jksoft 0:fccb789424fc 128 #endif
jksoft 0:fccb789424fc 129
jksoft 0:fccb789424fc 130 static inline U8 __clz(U32 value)
jksoft 0:fccb789424fc 131 {
jksoft 0:fccb789424fc 132 U8 result;
jksoft 0:fccb789424fc 133
jksoft 0:fccb789424fc 134 __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value));
jksoft 0:fccb789424fc 135 return(result);
jksoft 0:fccb789424fc 136 }
jksoft 0:fccb789424fc 137
jksoft 0:fccb789424fc 138 #endif
jksoft 0:fccb789424fc 139
jksoft 0:fccb789424fc 140 /* NVIC registers */
jksoft 0:fccb789424fc 141 #define NVIC_ST_CTRL (*((volatile U32 *)0xE000E010))
jksoft 0:fccb789424fc 142 #define NVIC_ST_RELOAD (*((volatile U32 *)0xE000E014))
jksoft 0:fccb789424fc 143 #define NVIC_ST_CURRENT (*((volatile U32 *)0xE000E018))
jksoft 0:fccb789424fc 144 #define NVIC_ISER ((volatile U32 *)0xE000E100)
jksoft 0:fccb789424fc 145 #define NVIC_ICER ((volatile U32 *)0xE000E180)
jksoft 0:fccb789424fc 146 #if (__TARGET_ARCH_6S_M)
jksoft 0:fccb789424fc 147 #define NVIC_IP ((volatile U32 *)0xE000E400)
jksoft 0:fccb789424fc 148 #else
jksoft 0:fccb789424fc 149 #define NVIC_IP ((volatile U8 *)0xE000E400)
jksoft 0:fccb789424fc 150 #endif
jksoft 0:fccb789424fc 151 #define NVIC_INT_CTRL (*((volatile U32 *)0xE000ED04))
jksoft 0:fccb789424fc 152 #define NVIC_AIR_CTRL (*((volatile U32 *)0xE000ED0C))
jksoft 0:fccb789424fc 153 #define NVIC_SYS_PRI2 (*((volatile U32 *)0xE000ED1C))
jksoft 0:fccb789424fc 154 #define NVIC_SYS_PRI3 (*((volatile U32 *)0xE000ED20))
jksoft 0:fccb789424fc 155
jksoft 0:fccb789424fc 156 #define OS_PEND_IRQ() NVIC_INT_CTRL = (1<<28)
jksoft 0:fccb789424fc 157 #define OS_PENDING ((NVIC_INT_CTRL >> 26) & (1<<2 | 1))
jksoft 0:fccb789424fc 158 #define OS_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_PENDING) << 25
jksoft 0:fccb789424fc 159 #define OS_PEND(fl,p) NVIC_INT_CTRL = (fl | p<<2) << 26
jksoft 0:fccb789424fc 160 #define OS_LOCK() NVIC_ST_CTRL = 0x0005
jksoft 0:fccb789424fc 161 #define OS_UNLOCK() NVIC_ST_CTRL = 0x0007
jksoft 0:fccb789424fc 162
jksoft 0:fccb789424fc 163 #define OS_X_PENDING ((NVIC_INT_CTRL >> 28) & 1)
jksoft 0:fccb789424fc 164 #define OS_X_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_X_PENDING) << 27
jksoft 0:fccb789424fc 165 #define OS_X_PEND(fl,p) NVIC_INT_CTRL = (fl | p) << 28
jksoft 0:fccb789424fc 166 #if (__TARGET_ARCH_6S_M)
jksoft 0:fccb789424fc 167 #define OS_X_INIT(n) NVIC_IP[n>>2] |= 0xFF << (8*(n & 0x03)); \
jksoft 0:fccb789424fc 168 NVIC_ISER[n>>5] = 1 << (n & 0x1F)
jksoft 0:fccb789424fc 169 #else
jksoft 0:fccb789424fc 170 #define OS_X_INIT(n) NVIC_IP[n] = 0xFF; \
jksoft 0:fccb789424fc 171 NVIC_ISER[n>>5] = 1 << (n & 0x1F)
jksoft 0:fccb789424fc 172 #endif
jksoft 0:fccb789424fc 173 #define OS_X_LOCK(n) NVIC_ICER[n>>5] = 1 << (n & 0x1F)
jksoft 0:fccb789424fc 174 #define OS_X_UNLOCK(n) NVIC_ISER[n>>5] = 1 << (n & 0x1F)
jksoft 0:fccb789424fc 175
jksoft 0:fccb789424fc 176 /* Core Debug registers */
jksoft 0:fccb789424fc 177 #define DEMCR (*((volatile U32 *)0xE000EDFC))
jksoft 0:fccb789424fc 178
jksoft 0:fccb789424fc 179 /* ITM registers */
jksoft 0:fccb789424fc 180 #define ITM_CONTROL (*((volatile U32 *)0xE0000E80))
jksoft 0:fccb789424fc 181 #define ITM_ENABLE (*((volatile U32 *)0xE0000E00))
jksoft 0:fccb789424fc 182 #define ITM_PORT30_U32 (*((volatile U32 *)0xE0000078))
jksoft 0:fccb789424fc 183 #define ITM_PORT31_U32 (*((volatile U32 *)0xE000007C))
jksoft 0:fccb789424fc 184 #define ITM_PORT31_U16 (*((volatile U16 *)0xE000007C))
jksoft 0:fccb789424fc 185 #define ITM_PORT31_U8 (*((volatile U8 *)0xE000007C))
jksoft 0:fccb789424fc 186
jksoft 0:fccb789424fc 187 /* Variables */
jksoft 0:fccb789424fc 188 extern BIT dbg_msg;
jksoft 0:fccb789424fc 189
jksoft 0:fccb789424fc 190 /* Functions */
jksoft 0:fccb789424fc 191 #ifdef __USE_EXCLUSIVE_ACCESS
jksoft 0:fccb789424fc 192 #define rt_inc(p) while(__strex((__ldrex(p)+1),p))
jksoft 0:fccb789424fc 193 #define rt_dec(p) while(__strex((__ldrex(p)-1),p))
jksoft 0:fccb789424fc 194 #else
jksoft 0:fccb789424fc 195 #define rt_inc(p) __disable_irq();(*p)++;__enable_irq();
jksoft 0:fccb789424fc 196 #define rt_dec(p) __disable_irq();(*p)--;__enable_irq();
jksoft 0:fccb789424fc 197 #endif
jksoft 0:fccb789424fc 198
jksoft 0:fccb789424fc 199 __inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {
jksoft 0:fccb789424fc 200 U32 cnt,c2;
jksoft 0:fccb789424fc 201 #ifdef __USE_EXCLUSIVE_ACCESS
jksoft 0:fccb789424fc 202 do {
jksoft 0:fccb789424fc 203 if ((cnt = __ldrex(count)) == size) {
jksoft 0:fccb789424fc 204 __clrex();
jksoft 0:fccb789424fc 205 return (cnt); }
jksoft 0:fccb789424fc 206 } while (__strex(cnt+1, count));
jksoft 0:fccb789424fc 207 do {
jksoft 0:fccb789424fc 208 c2 = (cnt = __ldrex(first)) + 1;
jksoft 0:fccb789424fc 209 if (c2 == size) c2 = 0;
jksoft 0:fccb789424fc 210 } while (__strex(c2, first));
jksoft 0:fccb789424fc 211 #else
jksoft 0:fccb789424fc 212 __disable_irq();
jksoft 0:fccb789424fc 213 if ((cnt = *count) < size) {
jksoft 0:fccb789424fc 214 *count = cnt+1;
jksoft 0:fccb789424fc 215 c2 = (cnt = *first) + 1;
jksoft 0:fccb789424fc 216 if (c2 == size) c2 = 0;
jksoft 0:fccb789424fc 217 *first = c2;
jksoft 0:fccb789424fc 218 }
jksoft 0:fccb789424fc 219 __enable_irq ();
jksoft 0:fccb789424fc 220 #endif
jksoft 0:fccb789424fc 221 return (cnt);
jksoft 0:fccb789424fc 222 }
jksoft 0:fccb789424fc 223
jksoft 0:fccb789424fc 224 __inline static void rt_systick_init (void) {
jksoft 0:fccb789424fc 225 NVIC_ST_RELOAD = os_trv;
jksoft 0:fccb789424fc 226 NVIC_ST_CURRENT = 0;
jksoft 0:fccb789424fc 227 NVIC_ST_CTRL = 0x0007;
jksoft 0:fccb789424fc 228 NVIC_SYS_PRI3 |= 0xFF000000;
jksoft 0:fccb789424fc 229 }
jksoft 0:fccb789424fc 230
jksoft 0:fccb789424fc 231 __inline static void rt_svc_init (void) {
jksoft 0:fccb789424fc 232 #if !(__TARGET_ARCH_6S_M)
jksoft 0:fccb789424fc 233 int sh,prigroup;
jksoft 0:fccb789424fc 234 #endif
jksoft 0:fccb789424fc 235 NVIC_SYS_PRI3 |= 0x00FF0000;
jksoft 0:fccb789424fc 236 #if (__TARGET_ARCH_6S_M)
jksoft 0:fccb789424fc 237 NVIC_SYS_PRI2 |= (NVIC_SYS_PRI3<<(8+1)) & 0xFC000000;
jksoft 0:fccb789424fc 238 #else
jksoft 0:fccb789424fc 239 sh = 8 - __clz (~((NVIC_SYS_PRI3 << 8) & 0xFF000000));
jksoft 0:fccb789424fc 240 prigroup = ((NVIC_AIR_CTRL >> 8) & 0x07);
jksoft 0:fccb789424fc 241 if (prigroup >= sh) {
jksoft 0:fccb789424fc 242 sh = prigroup + 1;
jksoft 0:fccb789424fc 243 }
jksoft 0:fccb789424fc 244 NVIC_SYS_PRI2 = ((0xFEFFFFFF << sh) & 0xFF000000) | (NVIC_SYS_PRI2 & 0x00FFFFFF);
jksoft 0:fccb789424fc 245 #endif
jksoft 0:fccb789424fc 246 }
jksoft 0:fccb789424fc 247
jksoft 0:fccb789424fc 248 extern void rt_set_PSP (U32 stack);
jksoft 0:fccb789424fc 249 extern U32 rt_get_PSP (void);
jksoft 0:fccb789424fc 250 extern void os_set_env (void);
jksoft 0:fccb789424fc 251 extern void *_alloc_box (void *box_mem);
jksoft 0:fccb789424fc 252 extern int _free_box (void *box_mem, void *box);
jksoft 0:fccb789424fc 253
jksoft 0:fccb789424fc 254 extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);
jksoft 0:fccb789424fc 255 extern void rt_ret_val (P_TCB p_TCB, U32 v0);
jksoft 0:fccb789424fc 256 extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);
jksoft 0:fccb789424fc 257
jksoft 0:fccb789424fc 258 extern void dbg_init (void);
jksoft 0:fccb789424fc 259 extern void dbg_task_notify (P_TCB p_tcb, BOOL create);
jksoft 0:fccb789424fc 260 extern void dbg_task_switch (U32 task_id);
jksoft 0:fccb789424fc 261
jksoft 0:fccb789424fc 262 #ifdef DBG_MSG
jksoft 0:fccb789424fc 263 #define DBG_INIT() dbg_init()
jksoft 0:fccb789424fc 264 #define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)
jksoft 0:fccb789424fc 265 #define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new_tsk != os_tsk.run)) \
jksoft 0:fccb789424fc 266 dbg_task_switch(task_id)
jksoft 0:fccb789424fc 267 #else
jksoft 0:fccb789424fc 268 #define DBG_INIT()
jksoft 0:fccb789424fc 269 #define DBG_TASK_NOTIFY(p_tcb,create)
jksoft 0:fccb789424fc 270 #define DBG_TASK_SWITCH(task_id)
jksoft 0:fccb789424fc 271 #endif
jksoft 0:fccb789424fc 272
jksoft 0:fccb789424fc 273 /*----------------------------------------------------------------------------
jksoft 0:fccb789424fc 274 * end of file
jksoft 0:fccb789424fc 275 *---------------------------------------------------------------------------*/
jksoft 0:fccb789424fc 276