iOSのBLEコントローラアプリ「RCBController」と接続し、コントローラの操作を取得するサンプルプログラムです。 mbed HRM1017で動作を確認しています。 2014.08.20時点でのBLEライブラリに対応しました。

Dependencies:   BLE_API mbed

Fork of BLE_RCBController by Junichi Katsu

Committer:
jksoft
Date:
Wed Aug 20 13:41:01 2014 +0000
Revision:
4:ebda47d22091
Parent:
nRF51822/nordic/nrf-sdk/s110/nrf_sdm.h@1:48f6e08a3ac2
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Who changed what in which revision?

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jksoft 1:48f6e08a3ac2 1 /*
jksoft 1:48f6e08a3ac2 2 * Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
jksoft 1:48f6e08a3ac2 3 *
jksoft 1:48f6e08a3ac2 4 * The information contained herein is confidential property of Nordic Semiconductor. The use,
jksoft 1:48f6e08a3ac2 5 * copying, transfer or disclosure of such information is prohibited except by express written
jksoft 1:48f6e08a3ac2 6 * agreement with Nordic Semiconductor.
jksoft 1:48f6e08a3ac2 7 *
jksoft 1:48f6e08a3ac2 8 */
jksoft 1:48f6e08a3ac2 9 /**
jksoft 1:48f6e08a3ac2 10 @defgroup nrf_sdm_api SoftDevice Manager API
jksoft 1:48f6e08a3ac2 11 @{
jksoft 1:48f6e08a3ac2 12
jksoft 1:48f6e08a3ac2 13 @brief APIs for SoftDevice management.
jksoft 1:48f6e08a3ac2 14
jksoft 1:48f6e08a3ac2 15 */
jksoft 1:48f6e08a3ac2 16
jksoft 1:48f6e08a3ac2 17 /* Header guard */
jksoft 1:48f6e08a3ac2 18 #ifndef NRF_SDM_H__
jksoft 1:48f6e08a3ac2 19 #define NRF_SDM_H__
jksoft 1:48f6e08a3ac2 20
jksoft 1:48f6e08a3ac2 21 #include "nrf_svc.h"
jksoft 1:48f6e08a3ac2 22 #include "nrf51.h"
jksoft 1:48f6e08a3ac2 23 #include "nrf_soc.h"
jksoft 1:48f6e08a3ac2 24 #include "nrf_error_sdm.h"
jksoft 1:48f6e08a3ac2 25
jksoft 1:48f6e08a3ac2 26 /** @addtogroup NRF_SDM_DEFINES Defines
jksoft 1:48f6e08a3ac2 27 * @{ */
jksoft 1:48f6e08a3ac2 28
jksoft 1:48f6e08a3ac2 29 /**@brief SoftDevice Manager SVC Base number. */
jksoft 1:48f6e08a3ac2 30 #define SDM_SVC_BASE (0x10)
jksoft 1:48f6e08a3ac2 31
jksoft 1:48f6e08a3ac2 32 /** @} */
jksoft 1:48f6e08a3ac2 33
jksoft 1:48f6e08a3ac2 34 /** @addtogroup NRF_SDM_ENUMS Enumerations
jksoft 1:48f6e08a3ac2 35 * @{ */
jksoft 1:48f6e08a3ac2 36
jksoft 1:48f6e08a3ac2 37 /**@brief nRF SoftDevice Manager API SVC numbers. */
jksoft 1:48f6e08a3ac2 38 enum NRF_SD_SVCS
jksoft 1:48f6e08a3ac2 39 {
jksoft 1:48f6e08a3ac2 40 SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */
jksoft 1:48f6e08a3ac2 41 SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */
jksoft 1:48f6e08a3ac2 42 SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */
jksoft 1:48f6e08a3ac2 43 SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */
jksoft 1:48f6e08a3ac2 44 SVC_SDM_LAST /**< Placeholder for last SDM SVC */
jksoft 1:48f6e08a3ac2 45 };
jksoft 1:48f6e08a3ac2 46
jksoft 1:48f6e08a3ac2 47 /**@brief Possible lfclk oscillator sources. */
jksoft 1:48f6e08a3ac2 48 enum NRF_CLOCK_LFCLKSRCS
jksoft 1:48f6e08a3ac2 49 {
jksoft 1:48f6e08a3ac2 50 NRF_CLOCK_LFCLKSRC_SYNTH_250_PPM, /**< LFCLK Synthesized from HFCLK. */
jksoft 1:48f6e08a3ac2 51 NRF_CLOCK_LFCLKSRC_XTAL_500_PPM, /**< LFCLK crystal oscillator 500 PPM accuracy. */
jksoft 1:48f6e08a3ac2 52 NRF_CLOCK_LFCLKSRC_XTAL_250_PPM, /**< LFCLK crystal oscillator 250 PPM accuracy. */
jksoft 1:48f6e08a3ac2 53 NRF_CLOCK_LFCLKSRC_XTAL_150_PPM, /**< LFCLK crystal oscillator 150 PPM accuracy. */
jksoft 1:48f6e08a3ac2 54 NRF_CLOCK_LFCLKSRC_XTAL_100_PPM, /**< LFCLK crystal oscillator 100 PPM accuracy. */
jksoft 1:48f6e08a3ac2 55 NRF_CLOCK_LFCLKSRC_XTAL_75_PPM, /**< LFCLK crystal oscillator 75 PPM accuracy. */
jksoft 1:48f6e08a3ac2 56 NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, /**< LFCLK crystal oscillator 50 PPM accuracy. */
jksoft 1:48f6e08a3ac2 57 NRF_CLOCK_LFCLKSRC_XTAL_30_PPM, /**< LFCLK crystal oscillator 30 PPM accuracy. */
jksoft 1:48f6e08a3ac2 58 NRF_CLOCK_LFCLKSRC_XTAL_20_PPM, /**< LFCLK crystal oscillator 20 PPM accuracy. */
jksoft 1:48f6e08a3ac2 59 NRF_CLOCK_LFCLKSRC_RC_250_PPM_250MS_CALIBRATION, /**< LFCLK RC oscillator, 250ms calibration interval.*/
jksoft 1:48f6e08a3ac2 60 NRF_CLOCK_LFCLKSRC_RC_250_PPM_500MS_CALIBRATION, /**< LFCLK RC oscillator, 500ms calibration interval.*/
jksoft 1:48f6e08a3ac2 61 NRF_CLOCK_LFCLKSRC_RC_250_PPM_1000MS_CALIBRATION, /**< LFCLK RC oscillator, 1000ms calibration interval.*/
jksoft 1:48f6e08a3ac2 62 NRF_CLOCK_LFCLKSRC_RC_250_PPM_2000MS_CALIBRATION, /**< LFCLK RC oscillator, 2000ms calibration interval.*/
jksoft 1:48f6e08a3ac2 63 NRF_CLOCK_LFCLKSRC_RC_250_PPM_4000MS_CALIBRATION, /**< LFCLK RC oscillator, 4000ms calibration interval.*/
jksoft 1:48f6e08a3ac2 64 NRF_CLOCK_LFCLKSRC_RC_250_PPM_8000MS_CALIBRATION, /**< LFCLK RC oscillator, 8000ms calibration interval.*/
jksoft 1:48f6e08a3ac2 65 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_1000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 1000ms, if changed above a threshold, a calibration is done.*/
jksoft 1:48f6e08a3ac2 66 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_2000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 2000ms, if changed above a threshold, a calibration is done.*/
jksoft 1:48f6e08a3ac2 67 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_4000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 4000ms, if changed above a threshold, a calibration is done.*/
jksoft 1:48f6e08a3ac2 68 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_8000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 8000ms, if changed above a threshold, a calibration is done.*/
jksoft 1:48f6e08a3ac2 69 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_16000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 16000ms, if changed above a threshold, a calibration is done.*/
jksoft 1:48f6e08a3ac2 70 };
jksoft 1:48f6e08a3ac2 71
jksoft 1:48f6e08a3ac2 72 /** @} */
jksoft 1:48f6e08a3ac2 73
jksoft 1:48f6e08a3ac2 74 /** @addtogroup NRF_SDM_TYPES Types
jksoft 1:48f6e08a3ac2 75 * @{ */
jksoft 1:48f6e08a3ac2 76
jksoft 1:48f6e08a3ac2 77 /**@brief Type representing lfclk oscillator source. */
jksoft 1:48f6e08a3ac2 78 typedef uint32_t nrf_clock_lfclksrc_t;
jksoft 1:48f6e08a3ac2 79
jksoft 1:48f6e08a3ac2 80
jksoft 1:48f6e08a3ac2 81 /**@brief SoftDevice Assertion Handler type.
jksoft 1:48f6e08a3ac2 82 *
jksoft 1:48f6e08a3ac2 83 * When an unexpected error occurs within the SoftDevice it will call the SoftDevice assertion handler callback.
jksoft 1:48f6e08a3ac2 84 * The protocol stack will be in an undefined state when this happens and the only way to recover will be to
jksoft 1:48f6e08a3ac2 85 * perform a reset, using e.g. CMSIS NVIC_SystemReset().
jksoft 1:48f6e08a3ac2 86 *
jksoft 1:48f6e08a3ac2 87 * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the SoftDevice assert callback.
jksoft 1:48f6e08a3ac2 88 *
jksoft 1:48f6e08a3ac2 89 * @param[in] pc The program counter of the failed assert.
jksoft 1:48f6e08a3ac2 90 * @param[in] line_number Line number where the assert failed.
jksoft 1:48f6e08a3ac2 91 * @param[in] file_name File name where the assert failed.
jksoft 1:48f6e08a3ac2 92 */
jksoft 1:48f6e08a3ac2 93 typedef void (*softdevice_assertion_handler_t)(uint32_t pc, uint16_t line_number, const uint8_t * p_file_name);
jksoft 1:48f6e08a3ac2 94
jksoft 1:48f6e08a3ac2 95 /** @} */
jksoft 1:48f6e08a3ac2 96
jksoft 1:48f6e08a3ac2 97 /** @addtogroup NRF_SDM_FUNCTIONS Functions
jksoft 1:48f6e08a3ac2 98 * @{ */
jksoft 1:48f6e08a3ac2 99
jksoft 1:48f6e08a3ac2 100 /**@brief Enables the SoftDevice and by extension the protocol stack.
jksoft 1:48f6e08a3ac2 101 *
jksoft 1:48f6e08a3ac2 102 * Idempotent function to enable the SoftDevice.
jksoft 1:48f6e08a3ac2 103 *
jksoft 1:48f6e08a3ac2 104 * @note Some care must be taken if a low frequency clock source is already running when calling this function:
jksoft 1:48f6e08a3ac2 105 * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new
jksoft 1:48f6e08a3ac2 106 * clock source will be started.
jksoft 1:48f6e08a3ac2 107 *
jksoft 1:48f6e08a3ac2 108 * @note This function has no effect when returning with an error.
jksoft 1:48f6e08a3ac2 109 *
jksoft 1:48f6e08a3ac2 110 * @post If return code is ::NRF_SUCCESS
jksoft 1:48f6e08a3ac2 111 * - SoC library and protocol stack APIs are made available
jksoft 1:48f6e08a3ac2 112 * - A portion of RAM will be unavailable (see relevant SDS documentation)
jksoft 1:48f6e08a3ac2 113 * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation)
jksoft 1:48f6e08a3ac2 114 * - Interrupts will not arrive from protected peripherals or interrupts
jksoft 1:48f6e08a3ac2 115 * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the softdevice.
jksoft 1:48f6e08a3ac2 116 * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation)
jksoft 1:48f6e08a3ac2 117 * - Chosen low frequency clock source will be running
jksoft 1:48f6e08a3ac2 118 *
jksoft 1:48f6e08a3ac2 119 * @param clock_source Low frequency clock source and accuracy. (Note: In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock).
jksoft 1:48f6e08a3ac2 120 * @param assertion_handler Callback for SoftDevice assertions.
jksoft 1:48f6e08a3ac2 121 *
jksoft 1:48f6e08a3ac2 122 * @retval ::NRF_SUCCESS
jksoft 1:48f6e08a3ac2 123 * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDeviceinterrupt is already enabled, or an enabled interrupt has an illegal priority level
jksoft 1:48f6e08a3ac2 124 * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected
jksoft 1:48f6e08a3ac2 125 */
jksoft 1:48f6e08a3ac2 126 SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lfclksrc_t clock_source, softdevice_assertion_handler_t assertion_handler));
jksoft 1:48f6e08a3ac2 127
jksoft 1:48f6e08a3ac2 128 /**@brief Disables the SoftDevice and by extension the protocol stack.
jksoft 1:48f6e08a3ac2 129 *
jksoft 1:48f6e08a3ac2 130 * Idempotent function to disable the SoftDevice.
jksoft 1:48f6e08a3ac2 131 *
jksoft 1:48f6e08a3ac2 132 * @post SoC library and protocol stack APIs are made unavailable.
jksoft 1:48f6e08a3ac2 133 * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest).
jksoft 1:48f6e08a3ac2 134 * @post All peripherals used by the SoftDevice will be reset to default values.
jksoft 1:48f6e08a3ac2 135 * @post All of RAM become available.
jksoft 1:48f6e08a3ac2 136 * @post All interrupts are forwarded to the application.
jksoft 1:48f6e08a3ac2 137 * @post LFCLK source chosen in ::sd_softdevice_enable will be left running.
jksoft 1:48f6e08a3ac2 138 *
jksoft 1:48f6e08a3ac2 139 * @retval ::NRF_SUCCESS
jksoft 1:48f6e08a3ac2 140 */
jksoft 1:48f6e08a3ac2 141 SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void));
jksoft 1:48f6e08a3ac2 142
jksoft 1:48f6e08a3ac2 143 /**@brief Check if the SoftDevice is enabled.
jksoft 1:48f6e08a3ac2 144 *
jksoft 1:48f6e08a3ac2 145 * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0.
jksoft 1:48f6e08a3ac2 146 *
jksoft 1:48f6e08a3ac2 147 * @retval ::NRF_SUCCESS
jksoft 1:48f6e08a3ac2 148 */
jksoft 1:48f6e08a3ac2 149 SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled));
jksoft 1:48f6e08a3ac2 150
jksoft 1:48f6e08a3ac2 151 /**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice
jksoft 1:48f6e08a3ac2 152 *
jksoft 1:48f6e08a3ac2 153 * This function is only intended to be called when a bootloader is enabled.
jksoft 1:48f6e08a3ac2 154 *
jksoft 1:48f6e08a3ac2 155 * @param[in] address The base address of the interrupt vector table for forwarded interrupts.
jksoft 1:48f6e08a3ac2 156
jksoft 1:48f6e08a3ac2 157 * @retval ::NRF_SUCCESS
jksoft 1:48f6e08a3ac2 158 */
jksoft 1:48f6e08a3ac2 159 SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address));
jksoft 1:48f6e08a3ac2 160
jksoft 1:48f6e08a3ac2 161 /** @} */
jksoft 1:48f6e08a3ac2 162
jksoft 1:48f6e08a3ac2 163 #endif // NRF_SDM_H__
jksoft 1:48f6e08a3ac2 164
jksoft 1:48f6e08a3ac2 165 /**
jksoft 1:48f6e08a3ac2 166 @}
jksoft 1:48f6e08a3ac2 167 */