Seunghee Jeong / Mbed 2 deprecated Dronequadrotor

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Dependencies:   mbed

nRF24L01.h@0:56ba69e447e3, 2022-07-18 (annotated)

Committer:
jjeong
Date:
Mon Jul 18 06:37:14 2022 +0000
Revision:
0:56ba69e447e3
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Who changed what in which revision?

UserRevisionLine numberNew contents of line
jjeong 0:56ba69e447e3 1 /*
jjeong 0:56ba69e447e3 2 Copyright (c) 2007 Stefan Engelke <mbox@stefanengelke.de>
jjeong 0:56ba69e447e3 3 Portions Copyright (C) 2011 Greg Copeland
jjeong 0:56ba69e447e3 4
jjeong 0:56ba69e447e3 5 Permission is hereby granted, free of charge, to any person
jjeong 0:56ba69e447e3 6 obtaining a copy of this software and associated documentation
jjeong 0:56ba69e447e3 7 files (the "Software"), to deal in the Software without
jjeong 0:56ba69e447e3 8 restriction, including without limitation the rights to use, copy,
jjeong 0:56ba69e447e3 9 modify, merge, publish, distribute, sublicense, and/or sell copies
jjeong 0:56ba69e447e3 10 of the Software, and to permit persons to whom the Software is
jjeong 0:56ba69e447e3 11 furnished to do so, subject to the following conditions:
jjeong 0:56ba69e447e3 12
jjeong 0:56ba69e447e3 13 The above copyright notice and this permission notice shall be
jjeong 0:56ba69e447e3 14 included in all copies or substantial portions of the Software.
jjeong 0:56ba69e447e3 15
jjeong 0:56ba69e447e3 16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
jjeong 0:56ba69e447e3 17 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
jjeong 0:56ba69e447e3 18 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
jjeong 0:56ba69e447e3 19 NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
jjeong 0:56ba69e447e3 20 HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
jjeong 0:56ba69e447e3 21 WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
jjeong 0:56ba69e447e3 22 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
jjeong 0:56ba69e447e3 23 DEALINGS IN THE SOFTWARE.
jjeong 0:56ba69e447e3 24 */
jjeong 0:56ba69e447e3 25
jjeong 0:56ba69e447e3 26 /*
jjeong 0:56ba69e447e3 27 * Mbed support added by Akash Vibhute <akash.roboticist@gmail.com>
jjeong 0:56ba69e447e3 28 * Porting completed on Nov/05/2015
jjeong 0:56ba69e447e3 29 *
jjeong 0:56ba69e447e3 30 * Updated 1: Synced with TMRh20's RF24 library on Nov/04/2015 from https://github.com/TMRh20
jjeong 0:56ba69e447e3 31 * Updated 2: Synced with TMRh20's RF24 library on Apr/18/2015 from https://github.com/TMRh20
jjeong 0:56ba69e447e3 32 *
jjeong 0:56ba69e447e3 33 */
jjeong 0:56ba69e447e3 34
jjeong 0:56ba69e447e3 35 /* Memory Map */
jjeong 0:56ba69e447e3 36 #define NRF_CONFIG 0x00
jjeong 0:56ba69e447e3 37 #define EN_AA 0x01
jjeong 0:56ba69e447e3 38 #define EN_RXADDR 0x02
jjeong 0:56ba69e447e3 39 #define SETUP_AW 0x03
jjeong 0:56ba69e447e3 40 #define SETUP_RETR 0x04
jjeong 0:56ba69e447e3 41 #define RF_CH 0x05
jjeong 0:56ba69e447e3 42 #define RF_SETUP 0x06
jjeong 0:56ba69e447e3 43 #define NRF_STATUS 0x07
jjeong 0:56ba69e447e3 44 #define OBSERVE_TX 0x08
jjeong 0:56ba69e447e3 45 #define CD 0x09
jjeong 0:56ba69e447e3 46 #define RX_ADDR_P0 0x0A
jjeong 0:56ba69e447e3 47 #define RX_ADDR_P1 0x0B
jjeong 0:56ba69e447e3 48 #define RX_ADDR_P2 0x0C
jjeong 0:56ba69e447e3 49 #define RX_ADDR_P3 0x0D
jjeong 0:56ba69e447e3 50 #define RX_ADDR_P4 0x0E
jjeong 0:56ba69e447e3 51 #define RX_ADDR_P5 0x0F
jjeong 0:56ba69e447e3 52 #define TX_ADDR 0x10
jjeong 0:56ba69e447e3 53 #define RX_PW_P0 0x11
jjeong 0:56ba69e447e3 54 #define RX_PW_P1 0x12
jjeong 0:56ba69e447e3 55 #define RX_PW_P2 0x13
jjeong 0:56ba69e447e3 56 #define RX_PW_P3 0x14
jjeong 0:56ba69e447e3 57 #define RX_PW_P4 0x15
jjeong 0:56ba69e447e3 58 #define RX_PW_P5 0x16
jjeong 0:56ba69e447e3 59 #define FIFO_STATUS 0x17
jjeong 0:56ba69e447e3 60 #define DYNPD 0x1C
jjeong 0:56ba69e447e3 61 #define FEATURE 0x1D
jjeong 0:56ba69e447e3 62
jjeong 0:56ba69e447e3 63 /* Bit Mnemonics */
jjeong 0:56ba69e447e3 64 #define MASK_RX_DR 6
jjeong 0:56ba69e447e3 65 #define MASK_TX_DS 5
jjeong 0:56ba69e447e3 66 #define MASK_MAX_RT 4
jjeong 0:56ba69e447e3 67 #define EN_CRC 3
jjeong 0:56ba69e447e3 68 #define CRCO 2
jjeong 0:56ba69e447e3 69 #define PWR_UP 1
jjeong 0:56ba69e447e3 70 #define PRIM_RX 0
jjeong 0:56ba69e447e3 71 #define ENAA_P5 5
jjeong 0:56ba69e447e3 72 #define ENAA_P4 4
jjeong 0:56ba69e447e3 73 #define ENAA_P3 3
jjeong 0:56ba69e447e3 74 #define ENAA_P2 2
jjeong 0:56ba69e447e3 75 #define ENAA_P1 1
jjeong 0:56ba69e447e3 76 #define ENAA_P0 0
jjeong 0:56ba69e447e3 77 #define ERX_P5 5
jjeong 0:56ba69e447e3 78 #define ERX_P4 4
jjeong 0:56ba69e447e3 79 #define ERX_P3 3
jjeong 0:56ba69e447e3 80 #define ERX_P2 2
jjeong 0:56ba69e447e3 81 #define ERX_P1 1
jjeong 0:56ba69e447e3 82 #define ERX_P0 0
jjeong 0:56ba69e447e3 83 #define AW 0
jjeong 0:56ba69e447e3 84 #define ARD 4
jjeong 0:56ba69e447e3 85 #define ARC 0
jjeong 0:56ba69e447e3 86 #define PLL_LOCK 4
jjeong 0:56ba69e447e3 87 #define RF_DR 3
jjeong 0:56ba69e447e3 88 #define RF_PWR 6
jjeong 0:56ba69e447e3 89 #define RX_DR 6
jjeong 0:56ba69e447e3 90 #define TX_DS 5
jjeong 0:56ba69e447e3 91 #define MAX_RT 4
jjeong 0:56ba69e447e3 92 #define RX_P_NO 1
jjeong 0:56ba69e447e3 93 #define TX_FULL 0
jjeong 0:56ba69e447e3 94 #define PLOS_CNT 4
jjeong 0:56ba69e447e3 95 #define ARC_CNT 0
jjeong 0:56ba69e447e3 96 #define TX_REUSE 6
jjeong 0:56ba69e447e3 97 #define FIFO_FULL 5
jjeong 0:56ba69e447e3 98 #define TX_EMPTY 4
jjeong 0:56ba69e447e3 99 #define RX_FULL 1
jjeong 0:56ba69e447e3 100 #define RX_EMPTY 0
jjeong 0:56ba69e447e3 101 #define DPL_P5 5
jjeong 0:56ba69e447e3 102 #define DPL_P4 4
jjeong 0:56ba69e447e3 103 #define DPL_P3 3
jjeong 0:56ba69e447e3 104 #define DPL_P2 2
jjeong 0:56ba69e447e3 105 #define DPL_P1 1
jjeong 0:56ba69e447e3 106 #define DPL_P0 0
jjeong 0:56ba69e447e3 107 #define EN_DPL 2
jjeong 0:56ba69e447e3 108 #define EN_ACK_PAY 1
jjeong 0:56ba69e447e3 109 #define EN_DYN_ACK 0
jjeong 0:56ba69e447e3 110
jjeong 0:56ba69e447e3 111 /* Instruction Mnemonics */
jjeong 0:56ba69e447e3 112 #define R_REGISTER 0x00
jjeong 0:56ba69e447e3 113 #define W_REGISTER 0x20
jjeong 0:56ba69e447e3 114 #define REGISTER_MASK 0x1F
jjeong 0:56ba69e447e3 115 #define ACTIVATE 0x50
jjeong 0:56ba69e447e3 116 #define R_RX_PL_WID 0x60
jjeong 0:56ba69e447e3 117 #define R_RX_PAYLOAD 0x61
jjeong 0:56ba69e447e3 118 #define W_TX_PAYLOAD 0xA0
jjeong 0:56ba69e447e3 119 #define W_ACK_PAYLOAD 0xA8
jjeong 0:56ba69e447e3 120 #define FLUSH_TX 0xE1
jjeong 0:56ba69e447e3 121 #define FLUSH_RX 0xE2
jjeong 0:56ba69e447e3 122 #define REUSE_TX_PL 0xE3
jjeong 0:56ba69e447e3 123 #define NOP 0xFF
jjeong 0:56ba69e447e3 124
jjeong 0:56ba69e447e3 125 /* Non-P omissions */
jjeong 0:56ba69e447e3 126 #define LNA_HCURR 0
jjeong 0:56ba69e447e3 127
jjeong 0:56ba69e447e3 128 /* P model memory Map */
jjeong 0:56ba69e447e3 129 #define RPD 0x09
jjeong 0:56ba69e447e3 130 #define W_TX_PAYLOAD_NO_ACK 0xB0
jjeong 0:56ba69e447e3 131
jjeong 0:56ba69e447e3 132 /* P model bit Mnemonics */
jjeong 0:56ba69e447e3 133 #define RF_DR_LOW 5
jjeong 0:56ba69e447e3 134 #define RF_DR_HIGH 3
jjeong 0:56ba69e447e3 135 #define RF_PWR_LOW 1
jjeong 0:56ba69e447e3 136 #define RF_PWR_HIGH 2
jjeong 0:56ba69e447e3 137