jhonatan llanten / Mbed 2 deprecated nfc_targetas_almacenada

Comparador de targetas

Dependencies:   mbed

MFRC522.h@0:7e562a9443f6, 2019-06-04 (annotated)

Committer:
jhonatanll
Date:
Tue Jun 04 11:21:09 2019 +0000
Revision:
0:7e562a9443f6
comparador NFC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jhonatanll 0:7e562a9443f6 1 /**
jhonatanll 0:7e562a9443f6 2 * MFRC522.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
jhonatanll 0:7e562a9443f6 3 * Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
jhonatanll 0:7e562a9443f6 4 * Created by Miguel Balboa (circuitito.com), Jan, 2012.
jhonatanll 0:7e562a9443f6 5 * Rewritten by Soren Thing Andersen (access.thing.dk), fall of 2013 (Translation to English, refactored, comments, anti collision, cascade levels.)
jhonatanll 0:7e562a9443f6 6 * Ported to mbed by Martin Olejar, Dec, 2013
jhonatanll 0:7e562a9443f6 7 *
jhonatanll 0:7e562a9443f6 8 * Please read this file for an overview and then MFRC522.cpp for comments on the specific functions.
jhonatanll 0:7e562a9443f6 9 * Search for "mf-rc522" on ebay.com to purchase the MF-RC522 board.
jhonatanll 0:7e562a9443f6 10 *
jhonatanll 0:7e562a9443f6 11 * There are three hardware components involved:
jhonatanll 0:7e562a9443f6 12 * 1) The micro controller: An Arduino
jhonatanll 0:7e562a9443f6 13 * 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless Reader IC
jhonatanll 0:7e562a9443f6 14 * 3) The PICC (short for Proximity Integrated Circuit Card): A card or tag using the ISO 14443A interface, eg Mifare or NTAG203.
jhonatanll 0:7e562a9443f6 15 *
jhonatanll 0:7e562a9443f6 16 * The microcontroller and card reader uses SPI for communication.
jhonatanll 0:7e562a9443f6 17 * The protocol is described in the MFRC522 datasheet: http://www.nxp.com/documents/data_sheet/MFRC522.pdf
jhonatanll 0:7e562a9443f6 18 *
jhonatanll 0:7e562a9443f6 19 * The card reader and the tags communicate using a 13.56MHz electromagnetic field.
jhonatanll 0:7e562a9443f6 20 * The protocol is defined in ISO/IEC 14443-3 Identification cards -- Contactless integrated circuit cards -- Proximity cards -- Part 3: Initialization and anticollision".
jhonatanll 0:7e562a9443f6 21 * A free version of the final draft can be found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf
jhonatanll 0:7e562a9443f6 22 * Details are found in chapter 6, Type A: Initialization and anticollision.
jhonatanll 0:7e562a9443f6 23 *
jhonatanll 0:7e562a9443f6 24 * If only the PICC UID is wanted, the above documents has all the needed information.
jhonatanll 0:7e562a9443f6 25 * To read and write from MIFARE PICCs, the MIFARE protocol is used after the PICC has been selected.
jhonatanll 0:7e562a9443f6 26 * The MIFARE Classic chips and protocol is described in the datasheets:
jhonatanll 0:7e562a9443f6 27 * 1K: http://www.nxp.com/documents/data_sheet/MF1S503x.pdf
jhonatanll 0:7e562a9443f6 28 * 4K: http://www.nxp.com/documents/data_sheet/MF1S703x.pdf
jhonatanll 0:7e562a9443f6 29 * Mini: http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf
jhonatanll 0:7e562a9443f6 30 * The MIFARE Ultralight chip and protocol is described in the datasheets:
jhonatanll 0:7e562a9443f6 31 * Ultralight: http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf
jhonatanll 0:7e562a9443f6 32 * Ultralight C: http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
jhonatanll 0:7e562a9443f6 33 *
jhonatanll 0:7e562a9443f6 34 * MIFARE Classic 1K (MF1S503x):
jhonatanll 0:7e562a9443f6 35 * Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
jhonatanll 0:7e562a9443f6 36 * The blocks are numbered 0-63.
jhonatanll 0:7e562a9443f6 37 * Block 3 in each sector is the Sector Trailer. See http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7:
jhonatanll 0:7e562a9443f6 38 * Bytes 0-5: Key A
jhonatanll 0:7e562a9443f6 39 * Bytes 6-8: Access Bits
jhonatanll 0:7e562a9443f6 40 * Bytes 9: User data
jhonatanll 0:7e562a9443f6 41 * Bytes 10-15: Key B (or user data)
jhonatanll 0:7e562a9443f6 42 * Block 0 is read only manufacturer data.
jhonatanll 0:7e562a9443f6 43 * To access a block, an authentication using a key from the block's sector must be performed first.
jhonatanll 0:7e562a9443f6 44 * Example: To read from block 10, first authenticate using a key from sector 3 (blocks 8-11).
jhonatanll 0:7e562a9443f6 45 * All keys are set to FFFFFFFFFFFFh at chip delivery.
jhonatanll 0:7e562a9443f6 46 * Warning: Please read section 8.7 "Memory Access". It includes this text: if the PICC detects a format violation the whole sector is irreversibly blocked.
jhonatanll 0:7e562a9443f6 47 * To use a block in "value block" mode (for Increment/Decrement operations) you need to change the sector trailer. Use PICC_SetAccessBits() to calculate the bit patterns.
jhonatanll 0:7e562a9443f6 48 * MIFARE Classic 4K (MF1S703x):
jhonatanll 0:7e562a9443f6 49 * Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector) * 16 bytes/block = 4096 bytes.
jhonatanll 0:7e562a9443f6 50 * The blocks are numbered 0-255.
jhonatanll 0:7e562a9443f6 51 * The last block in each sector is the Sector Trailer like above.
jhonatanll 0:7e562a9443f6 52 * MIFARE Classic Mini (MF1 IC S20):
jhonatanll 0:7e562a9443f6 53 * Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes.
jhonatanll 0:7e562a9443f6 54 * The blocks are numbered 0-19.
jhonatanll 0:7e562a9443f6 55 * The last block in each sector is the Sector Trailer like above.
jhonatanll 0:7e562a9443f6 56 *
jhonatanll 0:7e562a9443f6 57 * MIFARE Ultralight (MF0ICU1):
jhonatanll 0:7e562a9443f6 58 * Has 16 pages of 4 bytes = 64 bytes.
jhonatanll 0:7e562a9443f6 59 * Pages 0 + 1 is used for the 7-byte UID.
jhonatanll 0:7e562a9443f6 60 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
jhonatanll 0:7e562a9443f6 61 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
jhonatanll 0:7e562a9443f6 62 * Pages 4-15 are read/write unless blocked by the lock bytes in page 2.
jhonatanll 0:7e562a9443f6 63 * MIFARE Ultralight C (MF0ICU2):
jhonatanll 0:7e562a9443f6 64 * Has 48 pages of 4 bytes = 64 bytes.
jhonatanll 0:7e562a9443f6 65 * Pages 0 + 1 is used for the 7-byte UID.
jhonatanll 0:7e562a9443f6 66 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
jhonatanll 0:7e562a9443f6 67 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
jhonatanll 0:7e562a9443f6 68 * Pages 4-39 are read/write unless blocked by the lock bytes in page 2.
jhonatanll 0:7e562a9443f6 69 * Page 40 Lock bytes
jhonatanll 0:7e562a9443f6 70 * Page 41 16 bit one way counter
jhonatanll 0:7e562a9443f6 71 * Pages 42-43 Authentication configuration
jhonatanll 0:7e562a9443f6 72 * Pages 44-47 Authentication key
jhonatanll 0:7e562a9443f6 73 */
jhonatanll 0:7e562a9443f6 74 #ifndef MFRC522_h
jhonatanll 0:7e562a9443f6 75 #define MFRC522_h
jhonatanll 0:7e562a9443f6 76
jhonatanll 0:7e562a9443f6 77 #include "mbed.h"
jhonatanll 0:7e562a9443f6 78
jhonatanll 0:7e562a9443f6 79 /**
jhonatanll 0:7e562a9443f6 80 * MFRC522 example
jhonatanll 0:7e562a9443f6 81 *
jhonatanll 0:7e562a9443f6 82 * @code
jhonatanll 0:7e562a9443f6 83 * #include "mbed.h"
jhonatanll 0:7e562a9443f6 84 * #include "MFRC522.h"
jhonatanll 0:7e562a9443f6 85 *
jhonatanll 0:7e562a9443f6 86 * //KL25Z Pins for MFRC522 SPI interface
jhonatanll 0:7e562a9443f6 87 * #define SPI_MOSI PTC6
jhonatanll 0:7e562a9443f6 88 * #define SPI_MISO PTC7
jhonatanll 0:7e562a9443f6 89 * #define SPI_SCLK PTC5
jhonatanll 0:7e562a9443f6 90 * #define SPI_CS PTC4
jhonatanll 0:7e562a9443f6 91 * // KL25Z Pin for MFRC522 reset
jhonatanll 0:7e562a9443f6 92 * #define MF_RESET PTC3
jhonatanll 0:7e562a9443f6 93 * // KL25Z Pins for Debug UART port
jhonatanll 0:7e562a9443f6 94 * #define UART_RX PTA1
jhonatanll 0:7e562a9443f6 95 * #define UART_TX PTA2
jhonatanll 0:7e562a9443f6 96 *
jhonatanll 0:7e562a9443f6 97 * DigitalOut LedRed (LED_RED);
jhonatanll 0:7e562a9443f6 98 * DigitalOut LedGreen (LED_GREEN);
jhonatanll 0:7e562a9443f6 99 *
jhonatanll 0:7e562a9443f6 100 * Serial DebugUART(UART_TX, UART_RX);
jhonatanll 0:7e562a9443f6 101 * MFRC522 RfChip (SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS, MF_RESET);
jhonatanll 0:7e562a9443f6 102 *
jhonatanll 0:7e562a9443f6 103 * int main(void) {
jhonatanll 0:7e562a9443f6 104 * // Set debug UART speed
jhonatanll 0:7e562a9443f6 105 * DebugUART.baud(115200);
jhonatanll 0:7e562a9443f6 106 *
jhonatanll 0:7e562a9443f6 107 * // Init. RC522 Chip
jhonatanll 0:7e562a9443f6 108 * RfChip.PCD_Init();
jhonatanll 0:7e562a9443f6 109 *
jhonatanll 0:7e562a9443f6 110 * while (true) {
jhonatanll 0:7e562a9443f6 111 * LedRed = 1;
jhonatanll 0:7e562a9443f6 112 * LedGreen = 1;
jhonatanll 0:7e562a9443f6 113 *
jhonatanll 0:7e562a9443f6 114 * // Look for new cards
jhonatanll 0:7e562a9443f6 115 * if ( ! RfChip.PICC_IsNewCardPresent())
jhonatanll 0:7e562a9443f6 116 * {
jhonatanll 0:7e562a9443f6 117 * wait_ms(500);
jhonatanll 0:7e562a9443f6 118 * continue;
jhonatanll 0:7e562a9443f6 119 * }
jhonatanll 0:7e562a9443f6 120 *
jhonatanll 0:7e562a9443f6 121 * LedRed = 0;
jhonatanll 0:7e562a9443f6 122 *
jhonatanll 0:7e562a9443f6 123 * // Select one of the cards
jhonatanll 0:7e562a9443f6 124 * if ( ! RfChip.PICC_ReadCardSerial())
jhonatanll 0:7e562a9443f6 125 * {
jhonatanll 0:7e562a9443f6 126 * wait_ms(500);
jhonatanll 0:7e562a9443f6 127 * continue;
jhonatanll 0:7e562a9443f6 128 * }
jhonatanll 0:7e562a9443f6 129 *
jhonatanll 0:7e562a9443f6 130 * LedRed = 1;
jhonatanll 0:7e562a9443f6 131 * LedGreen = 0;
jhonatanll 0:7e562a9443f6 132 *
jhonatanll 0:7e562a9443f6 133 * // Print Card UID
jhonatanll 0:7e562a9443f6 134 * printf("Card UID: ");
jhonatanll 0:7e562a9443f6 135 * for (uint8_t i = 0; i < RfChip.uid.size; i++)
jhonatanll 0:7e562a9443f6 136 * {
jhonatanll 0:7e562a9443f6 137 * printf(" %X02", RfChip.uid.uidByte[i]);
jhonatanll 0:7e562a9443f6 138 * }
jhonatanll 0:7e562a9443f6 139 * printf("\n\r");
jhonatanll 0:7e562a9443f6 140 *
jhonatanll 0:7e562a9443f6 141 * // Print Card type
jhonatanll 0:7e562a9443f6 142 * uint8_t piccType = RfChip.PICC_GetType(RfChip.uid.sak);
jhonatanll 0:7e562a9443f6 143 * printf("PICC Type: %s \n\r", RfChip.PICC_GetTypeName(piccType));
jhonatanll 0:7e562a9443f6 144 * wait_ms(1000);
jhonatanll 0:7e562a9443f6 145 * }
jhonatanll 0:7e562a9443f6 146 * }
jhonatanll 0:7e562a9443f6 147 * @endcode
jhonatanll 0:7e562a9443f6 148 */
jhonatanll 0:7e562a9443f6 149
jhonatanll 0:7e562a9443f6 150 class MFRC522 {
jhonatanll 0:7e562a9443f6 151 public:
jhonatanll 0:7e562a9443f6 152
jhonatanll 0:7e562a9443f6 153 /**
jhonatanll 0:7e562a9443f6 154 * MFRC522 registers (described in chapter 9 of the datasheet).
jhonatanll 0:7e562a9443f6 155 * When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
jhonatanll 0:7e562a9443f6 156 */
jhonatanll 0:7e562a9443f6 157 enum PCD_Register {
jhonatanll 0:7e562a9443f6 158 // Page 0: Command and status
jhonatanll 0:7e562a9443f6 159 // 0x00 // reserved for future use
jhonatanll 0:7e562a9443f6 160 CommandReg = 0x01 << 1, // starts and stops command execution
jhonatanll 0:7e562a9443f6 161 ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits
jhonatanll 0:7e562a9443f6 162 DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits
jhonatanll 0:7e562a9443f6 163 ComIrqReg = 0x04 << 1, // interrupt request bits
jhonatanll 0:7e562a9443f6 164 DivIrqReg = 0x05 << 1, // interrupt request bits
jhonatanll 0:7e562a9443f6 165 ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed
jhonatanll 0:7e562a9443f6 166 Status1Reg = 0x07 << 1, // communication status bits
jhonatanll 0:7e562a9443f6 167 Status2Reg = 0x08 << 1, // receiver and transmitter status bits
jhonatanll 0:7e562a9443f6 168 FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer
jhonatanll 0:7e562a9443f6 169 FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer
jhonatanll 0:7e562a9443f6 170 WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning
jhonatanll 0:7e562a9443f6 171 ControlReg = 0x0C << 1, // miscellaneous control registers
jhonatanll 0:7e562a9443f6 172 BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames
jhonatanll 0:7e562a9443f6 173 CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
jhonatanll 0:7e562a9443f6 174 // 0x0F // reserved for future use
jhonatanll 0:7e562a9443f6 175
jhonatanll 0:7e562a9443f6 176 // Page 1:Command
jhonatanll 0:7e562a9443f6 177 // 0x10 // reserved for future use
jhonatanll 0:7e562a9443f6 178 ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving
jhonatanll 0:7e562a9443f6 179 TxModeReg = 0x12 << 1, // defines transmission data rate and framing
jhonatanll 0:7e562a9443f6 180 RxModeReg = 0x13 << 1, // defines reception data rate and framing
jhonatanll 0:7e562a9443f6 181 TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
jhonatanll 0:7e562a9443f6 182 TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation
jhonatanll 0:7e562a9443f6 183 TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver
jhonatanll 0:7e562a9443f6 184 RxSelReg = 0x17 << 1, // selects internal receiver settings
jhonatanll 0:7e562a9443f6 185 RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder
jhonatanll 0:7e562a9443f6 186 DemodReg = 0x19 << 1, // defines demodulator settings
jhonatanll 0:7e562a9443f6 187 // 0x1A // reserved for future use
jhonatanll 0:7e562a9443f6 188 // 0x1B // reserved for future use
jhonatanll 0:7e562a9443f6 189 MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters
jhonatanll 0:7e562a9443f6 190 MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters
jhonatanll 0:7e562a9443f6 191 // 0x1E // reserved for future use
jhonatanll 0:7e562a9443f6 192 SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface
jhonatanll 0:7e562a9443f6 193
jhonatanll 0:7e562a9443f6 194 // Page 2: Configuration
jhonatanll 0:7e562a9443f6 195 // 0x20 // reserved for future use
jhonatanll 0:7e562a9443f6 196 CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
jhonatanll 0:7e562a9443f6 197 CRCResultRegL = 0x22 << 1,
jhonatanll 0:7e562a9443f6 198 // 0x23 // reserved for future use
jhonatanll 0:7e562a9443f6 199 ModWidthReg = 0x24 << 1, // controls the ModWidth setting?
jhonatanll 0:7e562a9443f6 200 // 0x25 // reserved for future use
jhonatanll 0:7e562a9443f6 201 RFCfgReg = 0x26 << 1, // configures the receiver gain
jhonatanll 0:7e562a9443f6 202 GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
jhonatanll 0:7e562a9443f6 203 CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
jhonatanll 0:7e562a9443f6 204 ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
jhonatanll 0:7e562a9443f6 205 TModeReg = 0x2A << 1, // defines settings for the internal timer
jhonatanll 0:7e562a9443f6 206 TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
jhonatanll 0:7e562a9443f6 207 TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value
jhonatanll 0:7e562a9443f6 208 TReloadRegL = 0x2D << 1,
jhonatanll 0:7e562a9443f6 209 TCntValueRegH = 0x2E << 1, // shows the 16-bit timer value
jhonatanll 0:7e562a9443f6 210 TCntValueRegL = 0x2F << 1,
jhonatanll 0:7e562a9443f6 211
jhonatanll 0:7e562a9443f6 212 // Page 3:Test Registers
jhonatanll 0:7e562a9443f6 213 // 0x30 // reserved for future use
jhonatanll 0:7e562a9443f6 214 TestSel1Reg = 0x31 << 1, // general test signal configuration
jhonatanll 0:7e562a9443f6 215 TestSel2Reg = 0x32 << 1, // general test signal configuration
jhonatanll 0:7e562a9443f6 216 TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7
jhonatanll 0:7e562a9443f6 217 TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
jhonatanll 0:7e562a9443f6 218 TestBusReg = 0x35 << 1, // shows the status of the internal test bus
jhonatanll 0:7e562a9443f6 219 AutoTestReg = 0x36 << 1, // controls the digital self test
jhonatanll 0:7e562a9443f6 220 VersionReg = 0x37 << 1, // shows the software version
jhonatanll 0:7e562a9443f6 221 AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2
jhonatanll 0:7e562a9443f6 222 TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1
jhonatanll 0:7e562a9443f6 223 TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2
jhonatanll 0:7e562a9443f6 224 TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels
jhonatanll 0:7e562a9443f6 225 // 0x3C // reserved for production tests
jhonatanll 0:7e562a9443f6 226 // 0x3D // reserved for production tests
jhonatanll 0:7e562a9443f6 227 // 0x3E // reserved for production tests
jhonatanll 0:7e562a9443f6 228 // 0x3F // reserved for production tests
jhonatanll 0:7e562a9443f6 229 };
jhonatanll 0:7e562a9443f6 230
jhonatanll 0:7e562a9443f6 231 // MFRC522 commands Described in chapter 10 of the datasheet.
jhonatanll 0:7e562a9443f6 232 enum PCD_Command {
jhonatanll 0:7e562a9443f6 233 PCD_Idle = 0x00, // no action, cancels current command execution
jhonatanll 0:7e562a9443f6 234 PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
jhonatanll 0:7e562a9443f6 235 PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
jhonatanll 0:7e562a9443f6 236 PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self test
jhonatanll 0:7e562a9443f6 237 PCD_Transmit = 0x04, // transmits data from the FIFO buffer
jhonatanll 0:7e562a9443f6 238 PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit
jhonatanll 0:7e562a9443f6 239 PCD_Receive = 0x08, // activates the receiver circuits
jhonatanll 0:7e562a9443f6 240 PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
jhonatanll 0:7e562a9443f6 241 PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader
jhonatanll 0:7e562a9443f6 242 PCD_SoftReset = 0x0F // resets the MFRC522
jhonatanll 0:7e562a9443f6 243 };
jhonatanll 0:7e562a9443f6 244
jhonatanll 0:7e562a9443f6 245 // Commands sent to the PICC.
jhonatanll 0:7e562a9443f6 246 enum PICC_Command {
jhonatanll 0:7e562a9443f6 247 // The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
jhonatanll 0:7e562a9443f6 248 PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
jhonatanll 0:7e562a9443f6 249 PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
jhonatanll 0:7e562a9443f6 250 PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
jhonatanll 0:7e562a9443f6 251 PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
jhonatanll 0:7e562a9443f6 252 PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 1
jhonatanll 0:7e562a9443f6 253 PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 1
jhonatanll 0:7e562a9443f6 254 PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
jhonatanll 0:7e562a9443f6 255
jhonatanll 0:7e562a9443f6 256 // The commands used for MIFARE Classic (from http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
jhonatanll 0:7e562a9443f6 257 // Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector.
jhonatanll 0:7e562a9443f6 258 // The read/write commands can also be used for MIFARE Ultralight.
jhonatanll 0:7e562a9443f6 259 PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
jhonatanll 0:7e562a9443f6 260 PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
jhonatanll 0:7e562a9443f6 261 PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
jhonatanll 0:7e562a9443f6 262 PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight.
jhonatanll 0:7e562a9443f6 263 PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register.
jhonatanll 0:7e562a9443f6 264 PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register.
jhonatanll 0:7e562a9443f6 265 PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
jhonatanll 0:7e562a9443f6 266 PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
jhonatanll 0:7e562a9443f6 267
jhonatanll 0:7e562a9443f6 268 // The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
jhonatanll 0:7e562a9443f6 269 // The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
jhonatanll 0:7e562a9443f6 270 PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
jhonatanll 0:7e562a9443f6 271 };
jhonatanll 0:7e562a9443f6 272
jhonatanll 0:7e562a9443f6 273 // MIFARE constants that does not fit anywhere else
jhonatanll 0:7e562a9443f6 274 enum MIFARE_Misc {
jhonatanll 0:7e562a9443f6 275 MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK.
jhonatanll 0:7e562a9443f6 276 MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
jhonatanll 0:7e562a9443f6 277 };
jhonatanll 0:7e562a9443f6 278
jhonatanll 0:7e562a9443f6 279 // PICC types we can detect. Remember to update PICC_GetTypeName() if you add more.
jhonatanll 0:7e562a9443f6 280 enum PICC_Type {
jhonatanll 0:7e562a9443f6 281 PICC_TYPE_UNKNOWN = 0,
jhonatanll 0:7e562a9443f6 282 PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
jhonatanll 0:7e562a9443f6 283 PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
jhonatanll 0:7e562a9443f6 284 PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
jhonatanll 0:7e562a9443f6 285 PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
jhonatanll 0:7e562a9443f6 286 PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
jhonatanll 0:7e562a9443f6 287 PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
jhonatanll 0:7e562a9443f6 288 PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
jhonatanll 0:7e562a9443f6 289 PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure
jhonatanll 0:7e562a9443f6 290 PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
jhonatanll 0:7e562a9443f6 291 };
jhonatanll 0:7e562a9443f6 292
jhonatanll 0:7e562a9443f6 293 // Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
jhonatanll 0:7e562a9443f6 294 enum StatusCode {
jhonatanll 0:7e562a9443f6 295 STATUS_OK = 1, // Success
jhonatanll 0:7e562a9443f6 296 STATUS_ERROR = 2, // Error in communication
jhonatanll 0:7e562a9443f6 297 STATUS_COLLISION = 3, // Collision detected
jhonatanll 0:7e562a9443f6 298 STATUS_TIMEOUT = 4, // Timeout in communication.
jhonatanll 0:7e562a9443f6 299 STATUS_NO_ROOM = 5, // A buffer is not big enough.
jhonatanll 0:7e562a9443f6 300 STATUS_INTERNAL_ERROR = 6, // Internal error in the code. Should not happen ;-)
jhonatanll 0:7e562a9443f6 301 STATUS_INVALID = 7, // Invalid argument.
jhonatanll 0:7e562a9443f6 302 STATUS_CRC_WRONG = 8, // The CRC_A does not match
jhonatanll 0:7e562a9443f6 303 STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
jhonatanll 0:7e562a9443f6 304 };
jhonatanll 0:7e562a9443f6 305
jhonatanll 0:7e562a9443f6 306 // A struct used for passing the UID of a PICC.
jhonatanll 0:7e562a9443f6 307 typedef struct {
jhonatanll 0:7e562a9443f6 308 uint8_t size; // Number of bytes in the UID. 4, 7 or 10.
jhonatanll 0:7e562a9443f6 309 uint8_t uidByte[10];
jhonatanll 0:7e562a9443f6 310 uint8_t sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection.
jhonatanll 0:7e562a9443f6 311 } Uid;
jhonatanll 0:7e562a9443f6 312
jhonatanll 0:7e562a9443f6 313 // A struct used for passing a MIFARE Crypto1 key
jhonatanll 0:7e562a9443f6 314 typedef struct {
jhonatanll 0:7e562a9443f6 315 uint8_t keyByte[MF_KEY_SIZE];
jhonatanll 0:7e562a9443f6 316 } MIFARE_Key;
jhonatanll 0:7e562a9443f6 317
jhonatanll 0:7e562a9443f6 318 // Member variables
jhonatanll 0:7e562a9443f6 319 Uid uid; // Used by PICC_ReadCardSerial().
jhonatanll 0:7e562a9443f6 320
jhonatanll 0:7e562a9443f6 321 // Size of the MFRC522 FIFO
jhonatanll 0:7e562a9443f6 322 static const uint8_t FIFO_SIZE = 64; // The FIFO is 64 bytes.
jhonatanll 0:7e562a9443f6 323
jhonatanll 0:7e562a9443f6 324 /**
jhonatanll 0:7e562a9443f6 325 * MFRC522 constructor
jhonatanll 0:7e562a9443f6 326 *
jhonatanll 0:7e562a9443f6 327 * @param mosi SPI MOSI pin
jhonatanll 0:7e562a9443f6 328 * @param miso SPI MISO pin
jhonatanll 0:7e562a9443f6 329 * @param sclk SPI SCLK pin
jhonatanll 0:7e562a9443f6 330 * @param cs SPI CS pin
jhonatanll 0:7e562a9443f6 331 * @param reset Reset pin
jhonatanll 0:7e562a9443f6 332 */
jhonatanll 0:7e562a9443f6 333 MFRC522(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset);
jhonatanll 0:7e562a9443f6 334
jhonatanll 0:7e562a9443f6 335 /**
jhonatanll 0:7e562a9443f6 336 * MFRC522 destructor
jhonatanll 0:7e562a9443f6 337 */
jhonatanll 0:7e562a9443f6 338 ~MFRC522();
jhonatanll 0:7e562a9443f6 339
jhonatanll 0:7e562a9443f6 340
jhonatanll 0:7e562a9443f6 341 // ************************************************************************************
jhonatanll 0:7e562a9443f6 342 //! @name Functions for manipulating the MFRC522
jhonatanll 0:7e562a9443f6 343 // ************************************************************************************
jhonatanll 0:7e562a9443f6 344 //@{
jhonatanll 0:7e562a9443f6 345
jhonatanll 0:7e562a9443f6 346 /**
jhonatanll 0:7e562a9443f6 347 * Initializes the MFRC522 chip.
jhonatanll 0:7e562a9443f6 348 */
jhonatanll 0:7e562a9443f6 349 void PCD_Init (void);
jhonatanll 0:7e562a9443f6 350
jhonatanll 0:7e562a9443f6 351 /**
jhonatanll 0:7e562a9443f6 352 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
jhonatanll 0:7e562a9443f6 353 */
jhonatanll 0:7e562a9443f6 354 void PCD_Reset (void);
jhonatanll 0:7e562a9443f6 355
jhonatanll 0:7e562a9443f6 356 /**
jhonatanll 0:7e562a9443f6 357 * Turns the antenna on by enabling pins TX1 and TX2.
jhonatanll 0:7e562a9443f6 358 * After a reset these pins disabled.
jhonatanll 0:7e562a9443f6 359 */
jhonatanll 0:7e562a9443f6 360 void PCD_AntennaOn (void);
jhonatanll 0:7e562a9443f6 361
jhonatanll 0:7e562a9443f6 362 /**
jhonatanll 0:7e562a9443f6 363 * Writes a byte to the specified register in the MFRC522 chip.
jhonatanll 0:7e562a9443f6 364 * The interface is described in the datasheet section 8.1.2.
jhonatanll 0:7e562a9443f6 365 *
jhonatanll 0:7e562a9443f6 366 * @param reg The register to write to. One of the PCD_Register enums.
jhonatanll 0:7e562a9443f6 367 * @param value The value to write.
jhonatanll 0:7e562a9443f6 368 */
jhonatanll 0:7e562a9443f6 369 void PCD_WriteRegister (uint8_t reg, uint8_t value);
jhonatanll 0:7e562a9443f6 370
jhonatanll 0:7e562a9443f6 371 /**
jhonatanll 0:7e562a9443f6 372 * Writes a number of bytes to the specified register in the MFRC522 chip.
jhonatanll 0:7e562a9443f6 373 * The interface is described in the datasheet section 8.1.2.
jhonatanll 0:7e562a9443f6 374 *
jhonatanll 0:7e562a9443f6 375 * @param reg The register to write to. One of the PCD_Register enums.
jhonatanll 0:7e562a9443f6 376 * @param count The number of bytes to write to the register
jhonatanll 0:7e562a9443f6 377 * @param values The values to write. Byte array.
jhonatanll 0:7e562a9443f6 378 */
jhonatanll 0:7e562a9443f6 379 void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values);
jhonatanll 0:7e562a9443f6 380
jhonatanll 0:7e562a9443f6 381 /**
jhonatanll 0:7e562a9443f6 382 * Reads a byte from the specified register in the MFRC522 chip.
jhonatanll 0:7e562a9443f6 383 * The interface is described in the datasheet section 8.1.2.
jhonatanll 0:7e562a9443f6 384 *
jhonatanll 0:7e562a9443f6 385 * @param reg The register to read from. One of the PCD_Register enums.
jhonatanll 0:7e562a9443f6 386 * @returns Register value
jhonatanll 0:7e562a9443f6 387 */
jhonatanll 0:7e562a9443f6 388 uint8_t PCD_ReadRegister (uint8_t reg);
jhonatanll 0:7e562a9443f6 389
jhonatanll 0:7e562a9443f6 390 /**
jhonatanll 0:7e562a9443f6 391 * Reads a number of bytes from the specified register in the MFRC522 chip.
jhonatanll 0:7e562a9443f6 392 * The interface is described in the datasheet section 8.1.2.
jhonatanll 0:7e562a9443f6 393 *
jhonatanll 0:7e562a9443f6 394 * @param reg The register to read from. One of the PCD_Register enums.
jhonatanll 0:7e562a9443f6 395 * @param count The number of bytes to read.
jhonatanll 0:7e562a9443f6 396 * @param values Byte array to store the values in.
jhonatanll 0:7e562a9443f6 397 * @param rxAlign Only bit positions rxAlign..7 in values[0] are updated.
jhonatanll 0:7e562a9443f6 398 */
jhonatanll 0:7e562a9443f6 399 void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign = 0);
jhonatanll 0:7e562a9443f6 400
jhonatanll 0:7e562a9443f6 401 /**
jhonatanll 0:7e562a9443f6 402 * Sets the bits given in mask in register reg.
jhonatanll 0:7e562a9443f6 403 *
jhonatanll 0:7e562a9443f6 404 * @param reg The register to update. One of the PCD_Register enums.
jhonatanll 0:7e562a9443f6 405 * @param mask The bits to set.
jhonatanll 0:7e562a9443f6 406 */
jhonatanll 0:7e562a9443f6 407 void PCD_SetRegisterBits(uint8_t reg, uint8_t mask);
jhonatanll 0:7e562a9443f6 408
jhonatanll 0:7e562a9443f6 409 /**
jhonatanll 0:7e562a9443f6 410 * Clears the bits given in mask from register reg.
jhonatanll 0:7e562a9443f6 411 *
jhonatanll 0:7e562a9443f6 412 * @param reg The register to update. One of the PCD_Register enums.
jhonatanll 0:7e562a9443f6 413 * @param mask The bits to clear.
jhonatanll 0:7e562a9443f6 414 */
jhonatanll 0:7e562a9443f6 415 void PCD_ClrRegisterBits(uint8_t reg, uint8_t mask);
jhonatanll 0:7e562a9443f6 416
jhonatanll 0:7e562a9443f6 417 /**
jhonatanll 0:7e562a9443f6 418 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
jhonatanll 0:7e562a9443f6 419 *
jhonatanll 0:7e562a9443f6 420 * @param data Pointer to the data to transfer to the FIFO for CRC calculation.
jhonatanll 0:7e562a9443f6 421 * @param length The number of bytes to transfer.
jhonatanll 0:7e562a9443f6 422 * @param result Pointer to result buffer. Result is written to result[0..1], low byte first.
jhonatanll 0:7e562a9443f6 423 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 424 */
jhonatanll 0:7e562a9443f6 425 uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result);
jhonatanll 0:7e562a9443f6 426
jhonatanll 0:7e562a9443f6 427 /**
jhonatanll 0:7e562a9443f6 428 * Executes the Transceive command.
jhonatanll 0:7e562a9443f6 429 * CRC validation can only be done if backData and backLen are specified.
jhonatanll 0:7e562a9443f6 430 *
jhonatanll 0:7e562a9443f6 431 * @param sendData Pointer to the data to transfer to the FIFO.
jhonatanll 0:7e562a9443f6 432 * @param sendLen Number of bytes to transfer to the FIFO.
jhonatanll 0:7e562a9443f6 433 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
jhonatanll 0:7e562a9443f6 434 * @param backLen Max number of bytes to write to *backData. Out: The number of bytes returned.
jhonatanll 0:7e562a9443f6 435 * @param validBits The number of valid bits in the last byte. 0 for 8 valid bits. Default NULL.
jhonatanll 0:7e562a9443f6 436 * @param rxAlign Defines the bit position in backData[0] for the first bit received. Default 0.
jhonatanll 0:7e562a9443f6 437 * @param checkCRC True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
jhonatanll 0:7e562a9443f6 438 *
jhonatanll 0:7e562a9443f6 439 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 440 */
jhonatanll 0:7e562a9443f6 441 uint8_t PCD_TransceiveData (uint8_t *sendData,
jhonatanll 0:7e562a9443f6 442 uint8_t sendLen,
jhonatanll 0:7e562a9443f6 443 uint8_t *backData,
jhonatanll 0:7e562a9443f6 444 uint8_t *backLen,
jhonatanll 0:7e562a9443f6 445 uint8_t *validBits = NULL,
jhonatanll 0:7e562a9443f6 446 uint8_t rxAlign = 0,
jhonatanll 0:7e562a9443f6 447 bool checkCRC = false);
jhonatanll 0:7e562a9443f6 448
jhonatanll 0:7e562a9443f6 449
jhonatanll 0:7e562a9443f6 450 /**
jhonatanll 0:7e562a9443f6 451 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
jhonatanll 0:7e562a9443f6 452 * CRC validation can only be done if backData and backLen are specified.
jhonatanll 0:7e562a9443f6 453 *
jhonatanll 0:7e562a9443f6 454 * @param command The command to execute. One of the PCD_Command enums.
jhonatanll 0:7e562a9443f6 455 * @param waitIRq The bits in the ComIrqReg register that signals successful completion of the command.
jhonatanll 0:7e562a9443f6 456 * @param sendData Pointer to the data to transfer to the FIFO.
jhonatanll 0:7e562a9443f6 457 * @param sendLen Number of bytes to transfer to the FIFO.
jhonatanll 0:7e562a9443f6 458 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
jhonatanll 0:7e562a9443f6 459 * @param backLen In: Max number of bytes to write to *backData. Out: The number of bytes returned.
jhonatanll 0:7e562a9443f6 460 * @param validBits In/Out: The number of valid bits in the last byte. 0 for 8 valid bits.
jhonatanll 0:7e562a9443f6 461 * @param rxAlign In: Defines the bit position in backData[0] for the first bit received. Default 0.
jhonatanll 0:7e562a9443f6 462 * @param checkCRC In: True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
jhonatanll 0:7e562a9443f6 463 *
jhonatanll 0:7e562a9443f6 464 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 465 */
jhonatanll 0:7e562a9443f6 466 uint8_t PCD_CommunicateWithPICC(uint8_t command,
jhonatanll 0:7e562a9443f6 467 uint8_t waitIRq,
jhonatanll 0:7e562a9443f6 468 uint8_t *sendData,
jhonatanll 0:7e562a9443f6 469 uint8_t sendLen,
jhonatanll 0:7e562a9443f6 470 uint8_t *backData = NULL,
jhonatanll 0:7e562a9443f6 471 uint8_t *backLen = NULL,
jhonatanll 0:7e562a9443f6 472 uint8_t *validBits = NULL,
jhonatanll 0:7e562a9443f6 473 uint8_t rxAlign = 0,
jhonatanll 0:7e562a9443f6 474 bool checkCRC = false);
jhonatanll 0:7e562a9443f6 475
jhonatanll 0:7e562a9443f6 476 /**
jhonatanll 0:7e562a9443f6 477 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
jhonatanll 0:7e562a9443f6 478 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
jhonatanll 0:7e562a9443f6 479 *
jhonatanll 0:7e562a9443f6 480 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
jhonatanll 0:7e562a9443f6 481 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
jhonatanll 0:7e562a9443f6 482 *
jhonatanll 0:7e562a9443f6 483 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 484 */
jhonatanll 0:7e562a9443f6 485 uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize);
jhonatanll 0:7e562a9443f6 486
jhonatanll 0:7e562a9443f6 487 /**
jhonatanll 0:7e562a9443f6 488 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
jhonatanll 0:7e562a9443f6 489 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
jhonatanll 0:7e562a9443f6 490 *
jhonatanll 0:7e562a9443f6 491 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
jhonatanll 0:7e562a9443f6 492 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
jhonatanll 0:7e562a9443f6 493 *
jhonatanll 0:7e562a9443f6 494 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 495 */
jhonatanll 0:7e562a9443f6 496 uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize);
jhonatanll 0:7e562a9443f6 497
jhonatanll 0:7e562a9443f6 498 /**
jhonatanll 0:7e562a9443f6 499 * Transmits REQA or WUPA commands.
jhonatanll 0:7e562a9443f6 500 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
jhonatanll 0:7e562a9443f6 501 *
jhonatanll 0:7e562a9443f6 502 * @param command The command to send - PICC_CMD_REQA or PICC_CMD_WUPA
jhonatanll 0:7e562a9443f6 503 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
jhonatanll 0:7e562a9443f6 504 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
jhonatanll 0:7e562a9443f6 505 *
jhonatanll 0:7e562a9443f6 506 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 507 */
jhonatanll 0:7e562a9443f6 508 uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize);
jhonatanll 0:7e562a9443f6 509
jhonatanll 0:7e562a9443f6 510 /**
jhonatanll 0:7e562a9443f6 511 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
jhonatanll 0:7e562a9443f6 512 * Before calling this function the PICCs must be placed in the READY(*) state by calling PICC_RequestA() or PICC_WakeupA().
jhonatanll 0:7e562a9443f6 513 * On success:
jhonatanll 0:7e562a9443f6 514 * - The chosen PICC is in state ACTIVE(*) and all other PICCs have returned to state IDLE/HALT. (Figure 7 of the ISO/IEC 14443-3 draft.)
jhonatanll 0:7e562a9443f6 515 * - The UID size and value of the chosen PICC is returned in *uid along with the SAK.
jhonatanll 0:7e562a9443f6 516 *
jhonatanll 0:7e562a9443f6 517 * A PICC UID consists of 4, 7 or 10 bytes.
jhonatanll 0:7e562a9443f6 518 * Only 4 bytes can be specified in a SELECT command, so for the longer UIDs two or three iterations are used:
jhonatanll 0:7e562a9443f6 519 *
jhonatanll 0:7e562a9443f6 520 * UID size Number of UID bytes Cascade levels Example of PICC
jhonatanll 0:7e562a9443f6 521 * ======== =================== ============== ===============
jhonatanll 0:7e562a9443f6 522 * single 4 1 MIFARE Classic
jhonatanll 0:7e562a9443f6 523 * double 7 2 MIFARE Ultralight
jhonatanll 0:7e562a9443f6 524 * triple 10 3 Not currently in use?
jhonatanll 0:7e562a9443f6 525 *
jhonatanll 0:7e562a9443f6 526 *
jhonatanll 0:7e562a9443f6 527 * @param uid Pointer to Uid struct. Normally output, but can also be used to supply a known UID.
jhonatanll 0:7e562a9443f6 528 * @param validBits The number of known UID bits supplied in *uid. Normally 0. If set you must also supply uid->size.
jhonatanll 0:7e562a9443f6 529 *
jhonatanll 0:7e562a9443f6 530 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 531 */
jhonatanll 0:7e562a9443f6 532 uint8_t PICC_Select (Uid *uid, uint8_t validBits = 0);
jhonatanll 0:7e562a9443f6 533
jhonatanll 0:7e562a9443f6 534 /**
jhonatanll 0:7e562a9443f6 535 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
jhonatanll 0:7e562a9443f6 536 *
jhonatanll 0:7e562a9443f6 537 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 538 */
jhonatanll 0:7e562a9443f6 539 uint8_t PICC_HaltA (void);
jhonatanll 0:7e562a9443f6 540
jhonatanll 0:7e562a9443f6 541 // ************************************************************************************
jhonatanll 0:7e562a9443f6 542 //@}
jhonatanll 0:7e562a9443f6 543
jhonatanll 0:7e562a9443f6 544
jhonatanll 0:7e562a9443f6 545 // ************************************************************************************
jhonatanll 0:7e562a9443f6 546 //! @name Functions for communicating with MIFARE PICCs
jhonatanll 0:7e562a9443f6 547 // ************************************************************************************
jhonatanll 0:7e562a9443f6 548 //@{
jhonatanll 0:7e562a9443f6 549
jhonatanll 0:7e562a9443f6 550 /**
jhonatanll 0:7e562a9443f6 551 * Executes the MFRC522 MFAuthent command.
jhonatanll 0:7e562a9443f6 552 * This command manages MIFARE authentication to enable a secure communication to any MIFARE Mini, MIFARE 1K and MIFARE 4K card.
jhonatanll 0:7e562a9443f6 553 * The authentication is described in the MFRC522 datasheet section 10.3.1.9 and http://www.nxp.com/documents/data_sheet/MF1S503x.pdf section 10.1.
jhonatanll 0:7e562a9443f6 554 * For use with MIFARE Classic PICCs.
jhonatanll 0:7e562a9443f6 555 * The PICC must be selected - ie in state ACTIVE(*) - before calling this function.
jhonatanll 0:7e562a9443f6 556 * Remember to call PCD_StopCrypto1() after communicating with the authenticated PICC - otherwise no new communications can start.
jhonatanll 0:7e562a9443f6 557 *
jhonatanll 0:7e562a9443f6 558 * All keys are set to FFFFFFFFFFFFh at chip delivery.
jhonatanll 0:7e562a9443f6 559 *
jhonatanll 0:7e562a9443f6 560 * @param command PICC_CMD_MF_AUTH_KEY_A or PICC_CMD_MF_AUTH_KEY_B
jhonatanll 0:7e562a9443f6 561 * @param blockAddr The block number. See numbering in the comments in the .h file.
jhonatanll 0:7e562a9443f6 562 * @param key Pointer to the Crypteo1 key to use (6 bytes)
jhonatanll 0:7e562a9443f6 563 * @param uid Pointer to Uid struct. The first 4 bytes of the UID is used.
jhonatanll 0:7e562a9443f6 564 *
jhonatanll 0:7e562a9443f6 565 * @return STATUS_OK on success, STATUS_??? otherwise. Probably STATUS_TIMEOUT if you supply the wrong key.
jhonatanll 0:7e562a9443f6 566 */
jhonatanll 0:7e562a9443f6 567 uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid);
jhonatanll 0:7e562a9443f6 568
jhonatanll 0:7e562a9443f6 569 /**
jhonatanll 0:7e562a9443f6 570 * Used to exit the PCD from its authenticated state.
jhonatanll 0:7e562a9443f6 571 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
jhonatanll 0:7e562a9443f6 572 */
jhonatanll 0:7e562a9443f6 573 void PCD_StopCrypto1 (void);
jhonatanll 0:7e562a9443f6 574
jhonatanll 0:7e562a9443f6 575 /**
jhonatanll 0:7e562a9443f6 576 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
jhonatanll 0:7e562a9443f6 577 *
jhonatanll 0:7e562a9443f6 578 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
jhonatanll 0:7e562a9443f6 579 *
jhonatanll 0:7e562a9443f6 580 * For MIFARE Ultralight only addresses 00h to 0Fh are decoded.
jhonatanll 0:7e562a9443f6 581 * The MF0ICU1 returns a NAK for higher addresses.
jhonatanll 0:7e562a9443f6 582 * The MF0ICU1 responds to the READ command by sending 16 bytes starting from the page address defined by the command argument.
jhonatanll 0:7e562a9443f6 583 * For example; if blockAddr is 03h then pages 03h, 04h, 05h, 06h are returned.
jhonatanll 0:7e562a9443f6 584 * A roll-back is implemented: If blockAddr is 0Eh, then the contents of pages 0Eh, 0Fh, 00h and 01h are returned.
jhonatanll 0:7e562a9443f6 585 *
jhonatanll 0:7e562a9443f6 586 * The buffer must be at least 18 bytes because a CRC_A is also returned.
jhonatanll 0:7e562a9443f6 587 * Checks the CRC_A before returning STATUS_OK.
jhonatanll 0:7e562a9443f6 588 *
jhonatanll 0:7e562a9443f6 589 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The first page to return data from.
jhonatanll 0:7e562a9443f6 590 * @param buffer The buffer to store the data in
jhonatanll 0:7e562a9443f6 591 * @param bufferSize Buffer size, at least 18 bytes. Also number of bytes returned if STATUS_OK.
jhonatanll 0:7e562a9443f6 592 *
jhonatanll 0:7e562a9443f6 593 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 594 */
jhonatanll 0:7e562a9443f6 595 uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize);
jhonatanll 0:7e562a9443f6 596
jhonatanll 0:7e562a9443f6 597 /**
jhonatanll 0:7e562a9443f6 598 * Writes 16 bytes to the active PICC.
jhonatanll 0:7e562a9443f6 599 *
jhonatanll 0:7e562a9443f6 600 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
jhonatanll 0:7e562a9443f6 601 *
jhonatanll 0:7e562a9443f6 602 * For MIFARE Ultralight the opretaion is called "COMPATIBILITY WRITE".
jhonatanll 0:7e562a9443f6 603 * Even though 16 bytes are transferred to the Ultralight PICC, only the least significant 4 bytes (bytes 0 to 3)
jhonatanll 0:7e562a9443f6 604 * are written to the specified address. It is recommended to set the remaining bytes 04h to 0Fh to all logic 0.
jhonatanll 0:7e562a9443f6 605 *
jhonatanll 0:7e562a9443f6 606 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The page (2-15) to write to.
jhonatanll 0:7e562a9443f6 607 * @param buffer The 16 bytes to write to the PICC
jhonatanll 0:7e562a9443f6 608 * @param bufferSize Buffer size, must be at least 16 bytes. Exactly 16 bytes are written.
jhonatanll 0:7e562a9443f6 609 *
jhonatanll 0:7e562a9443f6 610 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 611 */
jhonatanll 0:7e562a9443f6 612 uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize);
jhonatanll 0:7e562a9443f6 613
jhonatanll 0:7e562a9443f6 614 /**
jhonatanll 0:7e562a9443f6 615 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
jhonatanll 0:7e562a9443f6 616 *
jhonatanll 0:7e562a9443f6 617 * @param page The page (2-15) to write to.
jhonatanll 0:7e562a9443f6 618 * @param buffer The 4 bytes to write to the PICC
jhonatanll 0:7e562a9443f6 619 * @param bufferSize Buffer size, must be at least 4 bytes. Exactly 4 bytes are written.
jhonatanll 0:7e562a9443f6 620 *
jhonatanll 0:7e562a9443f6 621 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 622 */
jhonatanll 0:7e562a9443f6 623 uint8_t MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize);
jhonatanll 0:7e562a9443f6 624
jhonatanll 0:7e562a9443f6 625 /**
jhonatanll 0:7e562a9443f6 626 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
jhonatanll 0:7e562a9443f6 627 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
jhonatanll 0:7e562a9443f6 628 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
jhonatanll 0:7e562a9443f6 629 * Use MIFARE_Transfer() to store the result in a block.
jhonatanll 0:7e562a9443f6 630 *
jhonatanll 0:7e562a9443f6 631 * @param blockAddr The block (0-0xff) number.
jhonatanll 0:7e562a9443f6 632 * @param delta This number is subtracted from the value of block blockAddr.
jhonatanll 0:7e562a9443f6 633 *
jhonatanll 0:7e562a9443f6 634 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 635 */
jhonatanll 0:7e562a9443f6 636 uint8_t MIFARE_Decrement (uint8_t blockAddr, uint32_t delta);
jhonatanll 0:7e562a9443f6 637
jhonatanll 0:7e562a9443f6 638 /**
jhonatanll 0:7e562a9443f6 639 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
jhonatanll 0:7e562a9443f6 640 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
jhonatanll 0:7e562a9443f6 641 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
jhonatanll 0:7e562a9443f6 642 * Use MIFARE_Transfer() to store the result in a block.
jhonatanll 0:7e562a9443f6 643 *
jhonatanll 0:7e562a9443f6 644 * @param blockAddr The block (0-0xff) number.
jhonatanll 0:7e562a9443f6 645 * @param delta This number is added to the value of block blockAddr.
jhonatanll 0:7e562a9443f6 646 *
jhonatanll 0:7e562a9443f6 647 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 648 */
jhonatanll 0:7e562a9443f6 649 uint8_t MIFARE_Increment (uint8_t blockAddr, uint32_t delta);
jhonatanll 0:7e562a9443f6 650
jhonatanll 0:7e562a9443f6 651 /**
jhonatanll 0:7e562a9443f6 652 * MIFARE Restore copies the value of the addressed block into a volatile memory.
jhonatanll 0:7e562a9443f6 653 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
jhonatanll 0:7e562a9443f6 654 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
jhonatanll 0:7e562a9443f6 655 * Use MIFARE_Transfer() to store the result in a block.
jhonatanll 0:7e562a9443f6 656 *
jhonatanll 0:7e562a9443f6 657 * @param blockAddr The block (0-0xff) number.
jhonatanll 0:7e562a9443f6 658 *
jhonatanll 0:7e562a9443f6 659 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 660 */
jhonatanll 0:7e562a9443f6 661 uint8_t MIFARE_Restore (uint8_t blockAddr);
jhonatanll 0:7e562a9443f6 662
jhonatanll 0:7e562a9443f6 663 /**
jhonatanll 0:7e562a9443f6 664 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
jhonatanll 0:7e562a9443f6 665 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
jhonatanll 0:7e562a9443f6 666 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
jhonatanll 0:7e562a9443f6 667 *
jhonatanll 0:7e562a9443f6 668 * @param blockAddr The block (0-0xff) number.
jhonatanll 0:7e562a9443f6 669 *
jhonatanll 0:7e562a9443f6 670 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 671 */
jhonatanll 0:7e562a9443f6 672 uint8_t MIFARE_Transfer (uint8_t blockAddr);
jhonatanll 0:7e562a9443f6 673
jhonatanll 0:7e562a9443f6 674 // ************************************************************************************
jhonatanll 0:7e562a9443f6 675 //@}
jhonatanll 0:7e562a9443f6 676
jhonatanll 0:7e562a9443f6 677
jhonatanll 0:7e562a9443f6 678 // ************************************************************************************
jhonatanll 0:7e562a9443f6 679 //! @name Support functions
jhonatanll 0:7e562a9443f6 680 // ************************************************************************************
jhonatanll 0:7e562a9443f6 681 //@{
jhonatanll 0:7e562a9443f6 682
jhonatanll 0:7e562a9443f6 683 /**
jhonatanll 0:7e562a9443f6 684 * Wrapper for MIFARE protocol communication.
jhonatanll 0:7e562a9443f6 685 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
jhonatanll 0:7e562a9443f6 686 *
jhonatanll 0:7e562a9443f6 687 * @param sendData Pointer to the data to transfer to the FIFO. Do NOT include the CRC_A.
jhonatanll 0:7e562a9443f6 688 * @param sendLen Number of bytes in sendData.
jhonatanll 0:7e562a9443f6 689 * @param acceptTimeout True => A timeout is also success
jhonatanll 0:7e562a9443f6 690 *
jhonatanll 0:7e562a9443f6 691 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 692 */
jhonatanll 0:7e562a9443f6 693 uint8_t PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout = false);
jhonatanll 0:7e562a9443f6 694
jhonatanll 0:7e562a9443f6 695 /**
jhonatanll 0:7e562a9443f6 696 * Translates the SAK (Select Acknowledge) to a PICC type.
jhonatanll 0:7e562a9443f6 697 *
jhonatanll 0:7e562a9443f6 698 * @param sak The SAK byte returned from PICC_Select().
jhonatanll 0:7e562a9443f6 699 *
jhonatanll 0:7e562a9443f6 700 * @return PICC_Type
jhonatanll 0:7e562a9443f6 701 */
jhonatanll 0:7e562a9443f6 702 uint8_t PICC_GetType (uint8_t sak);
jhonatanll 0:7e562a9443f6 703
jhonatanll 0:7e562a9443f6 704 /**
jhonatanll 0:7e562a9443f6 705 * Returns a string pointer to the PICC type name.
jhonatanll 0:7e562a9443f6 706 *
jhonatanll 0:7e562a9443f6 707 * @param type One of the PICC_Type enums.
jhonatanll 0:7e562a9443f6 708 *
jhonatanll 0:7e562a9443f6 709 * @return A string pointer to the PICC type name.
jhonatanll 0:7e562a9443f6 710 */
jhonatanll 0:7e562a9443f6 711 char* PICC_GetTypeName (uint8_t type);
jhonatanll 0:7e562a9443f6 712
jhonatanll 0:7e562a9443f6 713 /**
jhonatanll 0:7e562a9443f6 714 * Returns a string pointer to a status code name.
jhonatanll 0:7e562a9443f6 715 *
jhonatanll 0:7e562a9443f6 716 * @param code One of the StatusCode enums.
jhonatanll 0:7e562a9443f6 717 *
jhonatanll 0:7e562a9443f6 718 * @return A string pointer to a status code name.
jhonatanll 0:7e562a9443f6 719 */
jhonatanll 0:7e562a9443f6 720 char* GetStatusCodeName (uint8_t code);
jhonatanll 0:7e562a9443f6 721
jhonatanll 0:7e562a9443f6 722 /**
jhonatanll 0:7e562a9443f6 723 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
jhonatanll 0:7e562a9443f6 724 *
jhonatanll 0:7e562a9443f6 725 * @param accessBitBuffer Pointer to byte 6, 7 and 8 in the sector trailer. Bytes [0..2] will be set.
jhonatanll 0:7e562a9443f6 726 * @param g0 Access bits [C1 C2 C3] for block 0 (for sectors 0-31) or blocks 0-4 (for sectors 32-39)
jhonatanll 0:7e562a9443f6 727 * @param g1 Access bits [C1 C2 C3] for block 1 (for sectors 0-31) or blocks 5-9 (for sectors 32-39)
jhonatanll 0:7e562a9443f6 728 * @param g2 Access bits [C1 C2 C3] for block 2 (for sectors 0-31) or blocks 10-14 (for sectors 32-39)
jhonatanll 0:7e562a9443f6 729 * @param g3 Access bits [C1 C2 C3] for the sector trailer, block 3 (for sectors 0-31) or block 15 (for sectors 32-39)
jhonatanll 0:7e562a9443f6 730 */
jhonatanll 0:7e562a9443f6 731 void MIFARE_SetAccessBits (uint8_t *accessBitBuffer,
jhonatanll 0:7e562a9443f6 732 uint8_t g0,
jhonatanll 0:7e562a9443f6 733 uint8_t g1,
jhonatanll 0:7e562a9443f6 734 uint8_t g2,
jhonatanll 0:7e562a9443f6 735 uint8_t g3);
jhonatanll 0:7e562a9443f6 736
jhonatanll 0:7e562a9443f6 737 // ************************************************************************************
jhonatanll 0:7e562a9443f6 738 //@}
jhonatanll 0:7e562a9443f6 739
jhonatanll 0:7e562a9443f6 740
jhonatanll 0:7e562a9443f6 741 // ************************************************************************************
jhonatanll 0:7e562a9443f6 742 //! @name Convenience functions - does not add extra functionality
jhonatanll 0:7e562a9443f6 743 // ************************************************************************************
jhonatanll 0:7e562a9443f6 744 //@{
jhonatanll 0:7e562a9443f6 745
jhonatanll 0:7e562a9443f6 746 /**
jhonatanll 0:7e562a9443f6 747 * Returns true if a PICC responds to PICC_CMD_REQA.
jhonatanll 0:7e562a9443f6 748 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
jhonatanll 0:7e562a9443f6 749 *
jhonatanll 0:7e562a9443f6 750 * @return bool
jhonatanll 0:7e562a9443f6 751 */
jhonatanll 0:7e562a9443f6 752 bool PICC_IsNewCardPresent(void);
jhonatanll 0:7e562a9443f6 753
jhonatanll 0:7e562a9443f6 754 /**
jhonatanll 0:7e562a9443f6 755 * Simple wrapper around PICC_Select.
jhonatanll 0:7e562a9443f6 756 * Returns true if a UID could be read.
jhonatanll 0:7e562a9443f6 757 * Remember to call PICC_IsNewCardPresent(), PICC_RequestA() or PICC_WakeupA() first.
jhonatanll 0:7e562a9443f6 758 * The read UID is available in the class variable uid.
jhonatanll 0:7e562a9443f6 759 *
jhonatanll 0:7e562a9443f6 760 * @return bool
jhonatanll 0:7e562a9443f6 761 */
jhonatanll 0:7e562a9443f6 762 bool PICC_ReadCardSerial (void);
jhonatanll 0:7e562a9443f6 763
jhonatanll 0:7e562a9443f6 764 // ************************************************************************************
jhonatanll 0:7e562a9443f6 765 //@}
jhonatanll 0:7e562a9443f6 766
jhonatanll 0:7e562a9443f6 767
jhonatanll 0:7e562a9443f6 768 private:
jhonatanll 0:7e562a9443f6 769 SPI m_SPI;
jhonatanll 0:7e562a9443f6 770 DigitalOut m_CS;
jhonatanll 0:7e562a9443f6 771 DigitalOut m_RESET;
jhonatanll 0:7e562a9443f6 772
jhonatanll 0:7e562a9443f6 773 /**
jhonatanll 0:7e562a9443f6 774 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
jhonatanll 0:7e562a9443f6 775 *
jhonatanll 0:7e562a9443f6 776 * @param command The command to use
jhonatanll 0:7e562a9443f6 777 * @param blockAddr The block (0-0xff) number.
jhonatanll 0:7e562a9443f6 778 * @param data The data to transfer in step 2
jhonatanll 0:7e562a9443f6 779 *
jhonatanll 0:7e562a9443f6 780 * @return STATUS_OK on success, STATUS_??? otherwise.
jhonatanll 0:7e562a9443f6 781 */
jhonatanll 0:7e562a9443f6 782 uint8_t MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data);
jhonatanll 0:7e562a9443f6 783 };
jhonatanll 0:7e562a9443f6 784
jhonatanll 0:7e562a9443f6 785 #endif