.

Dependents:   RTC

Committer:
jhon309
Date:
Thu Aug 13 00:20:09 2015 +0000
Revision:
0:88e313c910d0
RTC Example

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jhon309 0:88e313c910d0 1 /**
jhon309 0:88e313c910d0 2 ******************************************************************************
jhon309 0:88e313c910d0 3 * @file stm32f0xx_hal_smbus.h
jhon309 0:88e313c910d0 4 * @author MCD Application Team
jhon309 0:88e313c910d0 5 * @version V1.2.0
jhon309 0:88e313c910d0 6 * @date 11-December-2014
jhon309 0:88e313c910d0 7 * @brief Header file of SMBUS HAL module.
jhon309 0:88e313c910d0 8 ******************************************************************************
jhon309 0:88e313c910d0 9 * @attention
jhon309 0:88e313c910d0 10 *
jhon309 0:88e313c910d0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
jhon309 0:88e313c910d0 12 *
jhon309 0:88e313c910d0 13 * Redistribution and use in source and binary forms, with or without modification,
jhon309 0:88e313c910d0 14 * are permitted provided that the following conditions are met:
jhon309 0:88e313c910d0 15 * 1. Redistributions of source code must retain the above copyright notice,
jhon309 0:88e313c910d0 16 * this list of conditions and the following disclaimer.
jhon309 0:88e313c910d0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
jhon309 0:88e313c910d0 18 * this list of conditions and the following disclaimer in the documentation
jhon309 0:88e313c910d0 19 * and/or other materials provided with the distribution.
jhon309 0:88e313c910d0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
jhon309 0:88e313c910d0 21 * may be used to endorse or promote products derived from this software
jhon309 0:88e313c910d0 22 * without specific prior written permission.
jhon309 0:88e313c910d0 23 *
jhon309 0:88e313c910d0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jhon309 0:88e313c910d0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jhon309 0:88e313c910d0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
jhon309 0:88e313c910d0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
jhon309 0:88e313c910d0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
jhon309 0:88e313c910d0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
jhon309 0:88e313c910d0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
jhon309 0:88e313c910d0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
jhon309 0:88e313c910d0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
jhon309 0:88e313c910d0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
jhon309 0:88e313c910d0 34 *
jhon309 0:88e313c910d0 35 ******************************************************************************
jhon309 0:88e313c910d0 36 */
jhon309 0:88e313c910d0 37
jhon309 0:88e313c910d0 38 /* Define to prevent recursive inclusion -------------------------------------*/
jhon309 0:88e313c910d0 39 #ifndef __STM32F0xx_HAL_SMBUS_H
jhon309 0:88e313c910d0 40 #define __STM32F0xx_HAL_SMBUS_H
jhon309 0:88e313c910d0 41
jhon309 0:88e313c910d0 42 #ifdef __cplusplus
jhon309 0:88e313c910d0 43 extern "C" {
jhon309 0:88e313c910d0 44 #endif
jhon309 0:88e313c910d0 45
jhon309 0:88e313c910d0 46 /* Includes ------------------------------------------------------------------*/
jhon309 0:88e313c910d0 47 #include "stm32f0xx_hal_def.h"
jhon309 0:88e313c910d0 48
jhon309 0:88e313c910d0 49 /** @addtogroup STM32F0xx_HAL_Driver
jhon309 0:88e313c910d0 50 * @{
jhon309 0:88e313c910d0 51 */
jhon309 0:88e313c910d0 52
jhon309 0:88e313c910d0 53 /** @addtogroup SMBUS
jhon309 0:88e313c910d0 54 * @{
jhon309 0:88e313c910d0 55 */
jhon309 0:88e313c910d0 56
jhon309 0:88e313c910d0 57 /* Exported types ------------------------------------------------------------*/
jhon309 0:88e313c910d0 58 /** @defgroup SMBUS_Exported_Types SMBUS Exported Types
jhon309 0:88e313c910d0 59 * @{
jhon309 0:88e313c910d0 60 */
jhon309 0:88e313c910d0 61
jhon309 0:88e313c910d0 62 /**
jhon309 0:88e313c910d0 63 * @brief SMBUS Configuration Structure definition
jhon309 0:88e313c910d0 64 */
jhon309 0:88e313c910d0 65 typedef struct
jhon309 0:88e313c910d0 66 {
jhon309 0:88e313c910d0 67 uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value.
jhon309 0:88e313c910d0 68 This parameter calculated by referring to SMBUS initialization
jhon309 0:88e313c910d0 69 section in Reference manual */
jhon309 0:88e313c910d0 70 uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not.
jhon309 0:88e313c910d0 71 This parameter can be a a value of @ref SMBUS_Analog_Filter */
jhon309 0:88e313c910d0 72
jhon309 0:88e313c910d0 73 uint32_t OwnAddress1; /*!< Specifies the first device own address.
jhon309 0:88e313c910d0 74 This parameter can be a 7-bit or 10-bit address. */
jhon309 0:88e313c910d0 75
jhon309 0:88e313c910d0 76 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected.
jhon309 0:88e313c910d0 77 This parameter can be a value of @ref SMBUS_addressing_mode */
jhon309 0:88e313c910d0 78
jhon309 0:88e313c910d0 79 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
jhon309 0:88e313c910d0 80 This parameter can be a value of @ref SMBUS_dual_addressing_mode */
jhon309 0:88e313c910d0 81
jhon309 0:88e313c910d0 82 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
jhon309 0:88e313c910d0 83 This parameter can be a 7-bit address. */
jhon309 0:88e313c910d0 84
jhon309 0:88e313c910d0 85 uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
jhon309 0:88e313c910d0 86 This parameter can be a value of @ref SMBUS_own_address2_masks. */
jhon309 0:88e313c910d0 87
jhon309 0:88e313c910d0 88 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
jhon309 0:88e313c910d0 89 This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */
jhon309 0:88e313c910d0 90
jhon309 0:88e313c910d0 91 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
jhon309 0:88e313c910d0 92 This parameter can be a value of @ref SMBUS_nostretch_mode */
jhon309 0:88e313c910d0 93
jhon309 0:88e313c910d0 94 uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected.
jhon309 0:88e313c910d0 95 This parameter can be a value of @ref SMBUS_packet_error_check_mode */
jhon309 0:88e313c910d0 96
jhon309 0:88e313c910d0 97 uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected.
jhon309 0:88e313c910d0 98 This parameter can be a value of @ref SMBUS_peripheral_mode */
jhon309 0:88e313c910d0 99
jhon309 0:88e313c910d0 100 uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value.
jhon309 0:88e313c910d0 101 (Enable bits and different timeout values)
jhon309 0:88e313c910d0 102 This parameter calculated by referring to SMBUS initialization
jhon309 0:88e313c910d0 103 section in Reference manual */
jhon309 0:88e313c910d0 104 } SMBUS_InitTypeDef;
jhon309 0:88e313c910d0 105
jhon309 0:88e313c910d0 106 /**
jhon309 0:88e313c910d0 107 * @brief SMBUS handle Structure definition
jhon309 0:88e313c910d0 108 */
jhon309 0:88e313c910d0 109 typedef struct
jhon309 0:88e313c910d0 110 {
jhon309 0:88e313c910d0 111 I2C_TypeDef *Instance; /*!< SMBUS registers base address */
jhon309 0:88e313c910d0 112
jhon309 0:88e313c910d0 113 SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */
jhon309 0:88e313c910d0 114
jhon309 0:88e313c910d0 115 uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */
jhon309 0:88e313c910d0 116
jhon309 0:88e313c910d0 117 uint16_t XferSize; /*!< SMBUS transfer size */
jhon309 0:88e313c910d0 118
jhon309 0:88e313c910d0 119 __IO uint16_t XferCount; /*!< SMBUS transfer counter */
jhon309 0:88e313c910d0 120
jhon309 0:88e313c910d0 121 __IO uint32_t XferOptions; /*!< SMBUS transfer options */
jhon309 0:88e313c910d0 122
jhon309 0:88e313c910d0 123 __IO uint32_t PreviousState; /*!< SMBUS communication Previous state
jhon309 0:88e313c910d0 124 This parameter can be a value of @ref SMBUS_State */
jhon309 0:88e313c910d0 125
jhon309 0:88e313c910d0 126 HAL_LockTypeDef Lock; /*!< SMBUS locking object */
jhon309 0:88e313c910d0 127
jhon309 0:88e313c910d0 128 __IO uint32_t State; /*!< SMBUS communication state
jhon309 0:88e313c910d0 129 This parameter can be a value of @ref SMBUS_State */
jhon309 0:88e313c910d0 130
jhon309 0:88e313c910d0 131 __IO uint32_t ErrorCode; /*!< SMBUS Error code
jhon309 0:88e313c910d0 132 This parameter can be a value of @ref SMBUS_Error */
jhon309 0:88e313c910d0 133
jhon309 0:88e313c910d0 134 }SMBUS_HandleTypeDef;
jhon309 0:88e313c910d0 135 /**
jhon309 0:88e313c910d0 136 * @}
jhon309 0:88e313c910d0 137 */
jhon309 0:88e313c910d0 138
jhon309 0:88e313c910d0 139 /* Exported constants --------------------------------------------------------*/
jhon309 0:88e313c910d0 140
jhon309 0:88e313c910d0 141 /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants
jhon309 0:88e313c910d0 142 * @{
jhon309 0:88e313c910d0 143 */
jhon309 0:88e313c910d0 144
jhon309 0:88e313c910d0 145 /** @defgroup SMBUS_Error SMBUS Error
jhon309 0:88e313c910d0 146 * @{
jhon309 0:88e313c910d0 147 */
jhon309 0:88e313c910d0 148 #define HAL_SMBUS_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
jhon309 0:88e313c910d0 149 #define HAL_SMBUS_ERROR_BERR ((uint32_t)0x00000001) /*!< BERR error */
jhon309 0:88e313c910d0 150 #define HAL_SMBUS_ERROR_ARLO ((uint32_t)0x00000002) /*!< ARLO error */
jhon309 0:88e313c910d0 151 #define HAL_SMBUS_ERROR_ACKF ((uint32_t)0x00000004) /*!< ACKF error */
jhon309 0:88e313c910d0 152 #define HAL_SMBUS_ERROR_OVR ((uint32_t)0x00000008) /*!< OVR error */
jhon309 0:88e313c910d0 153 #define HAL_SMBUS_ERROR_HALTIMEOUT ((uint32_t)0x00000010) /*!< Timeout error */
jhon309 0:88e313c910d0 154 #define HAL_SMBUS_ERROR_BUSTIMEOUT ((uint32_t)0x00000020) /*!< Bus Timeout error */
jhon309 0:88e313c910d0 155 #define HAL_SMBUS_ERROR_ALERT ((uint32_t)0x00000040) /*!< Alert error */
jhon309 0:88e313c910d0 156 #define HAL_SMBUS_ERROR_PECERR ((uint32_t)0x00000080) /*!< PEC error */
jhon309 0:88e313c910d0 157 /**
jhon309 0:88e313c910d0 158 * @}
jhon309 0:88e313c910d0 159 */
jhon309 0:88e313c910d0 160
jhon309 0:88e313c910d0 161 /** @defgroup SMBUS_State SMBUS State
jhon309 0:88e313c910d0 162 * @{
jhon309 0:88e313c910d0 163 */
jhon309 0:88e313c910d0 164
jhon309 0:88e313c910d0 165 #define HAL_SMBUS_STATE_RESET ((uint32_t)0x00000000) /*!< SMBUS not yet initialized or disabled */
jhon309 0:88e313c910d0 166 #define HAL_SMBUS_STATE_READY ((uint32_t)0x00000001) /*!< SMBUS initialized and ready for use */
jhon309 0:88e313c910d0 167 #define HAL_SMBUS_STATE_BUSY ((uint32_t)0x00000002) /*!< SMBUS internal process is ongoing */
jhon309 0:88e313c910d0 168 #define HAL_SMBUS_STATE_MASTER_BUSY_TX ((uint32_t)0x00000012) /*!< Master Data Transmission process is ongoing */
jhon309 0:88e313c910d0 169 #define HAL_SMBUS_STATE_MASTER_BUSY_RX ((uint32_t)0x00000022) /*!< Master Data Reception process is ongoing */
jhon309 0:88e313c910d0 170 #define HAL_SMBUS_STATE_SLAVE_BUSY_TX ((uint32_t)0x00000032) /*!< Slave Data Transmission process is ongoing */
jhon309 0:88e313c910d0 171 #define HAL_SMBUS_STATE_SLAVE_BUSY_RX ((uint32_t)0x00000042) /*!< Slave Data Reception process is ongoing */
jhon309 0:88e313c910d0 172 #define HAL_SMBUS_STATE_TIMEOUT ((uint32_t)0x00000003) /*!< Timeout state */
jhon309 0:88e313c910d0 173 #define HAL_SMBUS_STATE_ERROR ((uint32_t)0x00000004) /*!< Reception process is ongoing */
jhon309 0:88e313c910d0 174 #define HAL_SMBUS_STATE_SLAVE_LISTEN ((uint32_t)0x00000008) /*!< Address Listen Mode is ongoing */
jhon309 0:88e313c910d0 175 /* Aliases for inter STM32 series compatibility */
jhon309 0:88e313c910d0 176 #define HAL_SMBUS_STATE_LISTEN HAL_SMBUS_STATE_SLAVE_LISTEN
jhon309 0:88e313c910d0 177
jhon309 0:88e313c910d0 178 /**
jhon309 0:88e313c910d0 179 * @}
jhon309 0:88e313c910d0 180 */
jhon309 0:88e313c910d0 181
jhon309 0:88e313c910d0 182 /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter
jhon309 0:88e313c910d0 183 * @{
jhon309 0:88e313c910d0 184 */
jhon309 0:88e313c910d0 185 #define SMBUS_ANALOGFILTER_ENABLED ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 186 #define SMBUS_ANALOGFILTER_DISABLED I2C_CR1_ANFOFF
jhon309 0:88e313c910d0 187
jhon309 0:88e313c910d0 188 #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLED) || \
jhon309 0:88e313c910d0 189 ((FILTER) == SMBUS_ANALOGFILTER_DISABLED))
jhon309 0:88e313c910d0 190 /**
jhon309 0:88e313c910d0 191 * @}
jhon309 0:88e313c910d0 192 */
jhon309 0:88e313c910d0 193
jhon309 0:88e313c910d0 194 /** @defgroup SMBUS_addressing_mode SMBUS addressing mode
jhon309 0:88e313c910d0 195 * @{
jhon309 0:88e313c910d0 196 */
jhon309 0:88e313c910d0 197 #define SMBUS_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001)
jhon309 0:88e313c910d0 198 #define SMBUS_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002)
jhon309 0:88e313c910d0 199
jhon309 0:88e313c910d0 200 #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \
jhon309 0:88e313c910d0 201 ((MODE) == SMBUS_ADDRESSINGMODE_10BIT))
jhon309 0:88e313c910d0 202 /**
jhon309 0:88e313c910d0 203 * @}
jhon309 0:88e313c910d0 204 */
jhon309 0:88e313c910d0 205
jhon309 0:88e313c910d0 206 /** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode
jhon309 0:88e313c910d0 207 * @{
jhon309 0:88e313c910d0 208 */
jhon309 0:88e313c910d0 209
jhon309 0:88e313c910d0 210 #define SMBUS_DUALADDRESS_DISABLED ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 211 #define SMBUS_DUALADDRESS_ENABLED I2C_OAR2_OA2EN
jhon309 0:88e313c910d0 212
jhon309 0:88e313c910d0 213 #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLED) || \
jhon309 0:88e313c910d0 214 ((ADDRESS) == SMBUS_DUALADDRESS_ENABLED))
jhon309 0:88e313c910d0 215 /**
jhon309 0:88e313c910d0 216 * @}
jhon309 0:88e313c910d0 217 */
jhon309 0:88e313c910d0 218
jhon309 0:88e313c910d0 219 /** @defgroup SMBUS_own_address2_masks SMBUS ownaddress2 masks
jhon309 0:88e313c910d0 220 * @{
jhon309 0:88e313c910d0 221 */
jhon309 0:88e313c910d0 222
jhon309 0:88e313c910d0 223 #define SMBUS_OA2_NOMASK ((uint8_t)0x00)
jhon309 0:88e313c910d0 224 #define SMBUS_OA2_MASK01 ((uint8_t)0x01)
jhon309 0:88e313c910d0 225 #define SMBUS_OA2_MASK02 ((uint8_t)0x02)
jhon309 0:88e313c910d0 226 #define SMBUS_OA2_MASK03 ((uint8_t)0x03)
jhon309 0:88e313c910d0 227 #define SMBUS_OA2_MASK04 ((uint8_t)0x04)
jhon309 0:88e313c910d0 228 #define SMBUS_OA2_MASK05 ((uint8_t)0x05)
jhon309 0:88e313c910d0 229 #define SMBUS_OA2_MASK06 ((uint8_t)0x06)
jhon309 0:88e313c910d0 230 #define SMBUS_OA2_MASK07 ((uint8_t)0x07)
jhon309 0:88e313c910d0 231
jhon309 0:88e313c910d0 232 #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \
jhon309 0:88e313c910d0 233 ((MASK) == SMBUS_OA2_MASK01) || \
jhon309 0:88e313c910d0 234 ((MASK) == SMBUS_OA2_MASK02) || \
jhon309 0:88e313c910d0 235 ((MASK) == SMBUS_OA2_MASK03) || \
jhon309 0:88e313c910d0 236 ((MASK) == SMBUS_OA2_MASK04) || \
jhon309 0:88e313c910d0 237 ((MASK) == SMBUS_OA2_MASK05) || \
jhon309 0:88e313c910d0 238 ((MASK) == SMBUS_OA2_MASK06) || \
jhon309 0:88e313c910d0 239 ((MASK) == SMBUS_OA2_MASK07))
jhon309 0:88e313c910d0 240 /**
jhon309 0:88e313c910d0 241 * @}
jhon309 0:88e313c910d0 242 */
jhon309 0:88e313c910d0 243
jhon309 0:88e313c910d0 244
jhon309 0:88e313c910d0 245 /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode
jhon309 0:88e313c910d0 246 * @{
jhon309 0:88e313c910d0 247 */
jhon309 0:88e313c910d0 248 #define SMBUS_GENERALCALL_DISABLED ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 249 #define SMBUS_GENERALCALL_ENABLED I2C_CR1_GCEN
jhon309 0:88e313c910d0 250
jhon309 0:88e313c910d0 251 #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLED) || \
jhon309 0:88e313c910d0 252 ((CALL) == SMBUS_GENERALCALL_ENABLED))
jhon309 0:88e313c910d0 253 /**
jhon309 0:88e313c910d0 254 * @}
jhon309 0:88e313c910d0 255 */
jhon309 0:88e313c910d0 256
jhon309 0:88e313c910d0 257 /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
jhon309 0:88e313c910d0 258 * @{
jhon309 0:88e313c910d0 259 */
jhon309 0:88e313c910d0 260 #define SMBUS_NOSTRETCH_DISABLED ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 261 #define SMBUS_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH
jhon309 0:88e313c910d0 262
jhon309 0:88e313c910d0 263 #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLED) || \
jhon309 0:88e313c910d0 264 ((STRETCH) == SMBUS_NOSTRETCH_ENABLED))
jhon309 0:88e313c910d0 265 /**
jhon309 0:88e313c910d0 266 * @}
jhon309 0:88e313c910d0 267 */
jhon309 0:88e313c910d0 268
jhon309 0:88e313c910d0 269 /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode
jhon309 0:88e313c910d0 270 * @{
jhon309 0:88e313c910d0 271 */
jhon309 0:88e313c910d0 272 #define SMBUS_PEC_DISABLED ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 273 #define SMBUS_PEC_ENABLED I2C_CR1_PECEN
jhon309 0:88e313c910d0 274
jhon309 0:88e313c910d0 275 #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLED) || \
jhon309 0:88e313c910d0 276 ((PEC) == SMBUS_PEC_ENABLED))
jhon309 0:88e313c910d0 277 /**
jhon309 0:88e313c910d0 278 * @}
jhon309 0:88e313c910d0 279 */
jhon309 0:88e313c910d0 280
jhon309 0:88e313c910d0 281 /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode
jhon309 0:88e313c910d0 282 * @{
jhon309 0:88e313c910d0 283 */
jhon309 0:88e313c910d0 284 #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBHEN)
jhon309 0:88e313c910d0 285 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (uint32_t)(0x00000000)
jhon309 0:88e313c910d0 286 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBDEN)
jhon309 0:88e313c910d0 287
jhon309 0:88e313c910d0 288 #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \
jhon309 0:88e313c910d0 289 ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
jhon309 0:88e313c910d0 290 ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
jhon309 0:88e313c910d0 291 /**
jhon309 0:88e313c910d0 292 * @}
jhon309 0:88e313c910d0 293 */
jhon309 0:88e313c910d0 294
jhon309 0:88e313c910d0 295 /** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition
jhon309 0:88e313c910d0 296 * @{
jhon309 0:88e313c910d0 297 */
jhon309 0:88e313c910d0 298
jhon309 0:88e313c910d0 299 #define SMBUS_SOFTEND_MODE ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 300 #define SMBUS_RELOAD_MODE I2C_CR2_RELOAD
jhon309 0:88e313c910d0 301 #define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND
jhon309 0:88e313c910d0 302 #define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE
jhon309 0:88e313c910d0 303
jhon309 0:88e313c910d0 304 #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \
jhon309 0:88e313c910d0 305 ((MODE) == SMBUS_AUTOEND_MODE) || \
jhon309 0:88e313c910d0 306 ((MODE) == SMBUS_SOFTEND_MODE) || \
jhon309 0:88e313c910d0 307 ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \
jhon309 0:88e313c910d0 308 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \
jhon309 0:88e313c910d0 309 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \
jhon309 0:88e313c910d0 310 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE )))
jhon309 0:88e313c910d0 311
jhon309 0:88e313c910d0 312 /**
jhon309 0:88e313c910d0 313 * @}
jhon309 0:88e313c910d0 314 */
jhon309 0:88e313c910d0 315
jhon309 0:88e313c910d0 316 /** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition
jhon309 0:88e313c910d0 317 * @{
jhon309 0:88e313c910d0 318 */
jhon309 0:88e313c910d0 319
jhon309 0:88e313c910d0 320 #define SMBUS_NO_STARTSTOP ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 321 #define SMBUS_GENERATE_STOP I2C_CR2_STOP
jhon309 0:88e313c910d0 322 #define SMBUS_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
jhon309 0:88e313c910d0 323 #define SMBUS_GENERATE_START_WRITE I2C_CR2_START
jhon309 0:88e313c910d0 324
jhon309 0:88e313c910d0 325 #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \
jhon309 0:88e313c910d0 326 ((REQUEST) == SMBUS_GENERATE_START_READ) || \
jhon309 0:88e313c910d0 327 ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \
jhon309 0:88e313c910d0 328 ((REQUEST) == SMBUS_NO_STARTSTOP))
jhon309 0:88e313c910d0 329
jhon309 0:88e313c910d0 330 /**
jhon309 0:88e313c910d0 331 * @}
jhon309 0:88e313c910d0 332 */
jhon309 0:88e313c910d0 333
jhon309 0:88e313c910d0 334 /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition
jhon309 0:88e313c910d0 335 * @{
jhon309 0:88e313c910d0 336 */
jhon309 0:88e313c910d0 337
jhon309 0:88e313c910d0 338 #define SMBUS_FIRST_FRAME ((uint32_t)(SMBUS_SOFTEND_MODE))
jhon309 0:88e313c910d0 339 #define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE))
jhon309 0:88e313c910d0 340 #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE
jhon309 0:88e313c910d0 341 #define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE
jhon309 0:88e313c910d0 342 #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
jhon309 0:88e313c910d0 343 #define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
jhon309 0:88e313c910d0 344
jhon309 0:88e313c910d0 345 #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \
jhon309 0:88e313c910d0 346 ((REQUEST) == SMBUS_NEXT_FRAME) || \
jhon309 0:88e313c910d0 347 ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
jhon309 0:88e313c910d0 348 ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \
jhon309 0:88e313c910d0 349 ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
jhon309 0:88e313c910d0 350 ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
jhon309 0:88e313c910d0 351
jhon309 0:88e313c910d0 352 /**
jhon309 0:88e313c910d0 353 * @}
jhon309 0:88e313c910d0 354 */
jhon309 0:88e313c910d0 355
jhon309 0:88e313c910d0 356 /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition
jhon309 0:88e313c910d0 357 * @brief SMBUS Interrupt definition
jhon309 0:88e313c910d0 358 * Elements values convention: 0xXXXXXXXX
jhon309 0:88e313c910d0 359 * - XXXXXXXX : Interrupt control mask
jhon309 0:88e313c910d0 360 * @{
jhon309 0:88e313c910d0 361 */
jhon309 0:88e313c910d0 362 #define SMBUS_IT_ERRI I2C_CR1_ERRIE
jhon309 0:88e313c910d0 363 #define SMBUS_IT_TCI I2C_CR1_TCIE
jhon309 0:88e313c910d0 364 #define SMBUS_IT_STOPI I2C_CR1_STOPIE
jhon309 0:88e313c910d0 365 #define SMBUS_IT_NACKI I2C_CR1_NACKIE
jhon309 0:88e313c910d0 366 #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE
jhon309 0:88e313c910d0 367 #define SMBUS_IT_RXI I2C_CR1_RXIE
jhon309 0:88e313c910d0 368 #define SMBUS_IT_TXI I2C_CR1_TXIE
jhon309 0:88e313c910d0 369 #define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)
jhon309 0:88e313c910d0 370 #define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI)
jhon309 0:88e313c910d0 371 #define SMBUS_IT_ALERT (SMBUS_IT_ERRI)
jhon309 0:88e313c910d0 372 #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI)
jhon309 0:88e313c910d0 373 /**
jhon309 0:88e313c910d0 374 * @}
jhon309 0:88e313c910d0 375 */
jhon309 0:88e313c910d0 376
jhon309 0:88e313c910d0 377 /** @defgroup SMBUS_Flag_definition SMBUS Flag definition
jhon309 0:88e313c910d0 378 * @brief Flag definition
jhon309 0:88e313c910d0 379 * Elements values convention: 0xXXXXYYYY
jhon309 0:88e313c910d0 380 * - XXXXXXXX : Flag mask
jhon309 0:88e313c910d0 381 * @{
jhon309 0:88e313c910d0 382 */
jhon309 0:88e313c910d0 383
jhon309 0:88e313c910d0 384 #define SMBUS_FLAG_TXE I2C_ISR_TXE
jhon309 0:88e313c910d0 385 #define SMBUS_FLAG_TXIS I2C_ISR_TXIS
jhon309 0:88e313c910d0 386 #define SMBUS_FLAG_RXNE I2C_ISR_RXNE
jhon309 0:88e313c910d0 387 #define SMBUS_FLAG_ADDR I2C_ISR_ADDR
jhon309 0:88e313c910d0 388 #define SMBUS_FLAG_AF I2C_ISR_NACKF
jhon309 0:88e313c910d0 389 #define SMBUS_FLAG_STOPF I2C_ISR_STOPF
jhon309 0:88e313c910d0 390 #define SMBUS_FLAG_TC I2C_ISR_TC
jhon309 0:88e313c910d0 391 #define SMBUS_FLAG_TCR I2C_ISR_TCR
jhon309 0:88e313c910d0 392 #define SMBUS_FLAG_BERR I2C_ISR_BERR
jhon309 0:88e313c910d0 393 #define SMBUS_FLAG_ARLO I2C_ISR_ARLO
jhon309 0:88e313c910d0 394 #define SMBUS_FLAG_OVR I2C_ISR_OVR
jhon309 0:88e313c910d0 395 #define SMBUS_FLAG_PECERR I2C_ISR_PECERR
jhon309 0:88e313c910d0 396 #define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT
jhon309 0:88e313c910d0 397 #define SMBUS_FLAG_ALERT I2C_ISR_ALERT
jhon309 0:88e313c910d0 398 #define SMBUS_FLAG_BUSY I2C_ISR_BUSY
jhon309 0:88e313c910d0 399 #define SMBUS_FLAG_DIR I2C_ISR_DIR
jhon309 0:88e313c910d0 400 /**
jhon309 0:88e313c910d0 401 * @}
jhon309 0:88e313c910d0 402 */
jhon309 0:88e313c910d0 403
jhon309 0:88e313c910d0 404 /**
jhon309 0:88e313c910d0 405 * @}
jhon309 0:88e313c910d0 406 */
jhon309 0:88e313c910d0 407
jhon309 0:88e313c910d0 408 /* Exported macros ------------------------------------------------------------*/
jhon309 0:88e313c910d0 409 /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros
jhon309 0:88e313c910d0 410 * @{
jhon309 0:88e313c910d0 411 */
jhon309 0:88e313c910d0 412
jhon309 0:88e313c910d0 413 /** @brief Reset SMBUS handle state
jhon309 0:88e313c910d0 414 * @param __HANDLE__: SMBUS handle.
jhon309 0:88e313c910d0 415 * @retval None
jhon309 0:88e313c910d0 416 */
jhon309 0:88e313c910d0 417 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
jhon309 0:88e313c910d0 418
jhon309 0:88e313c910d0 419 /** @brief Enable or disable the specified SMBUS interrupts.
jhon309 0:88e313c910d0 420 * @param __HANDLE__: specifies the SMBUS Handle.
jhon309 0:88e313c910d0 421 * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral.
jhon309 0:88e313c910d0 422 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
jhon309 0:88e313c910d0 423 * This parameter can be one of the following values:
jhon309 0:88e313c910d0 424 * @arg SMBUS_IT_ERRI: Errors interrupt enable
jhon309 0:88e313c910d0 425 * @arg SMBUS_IT_TCI: Transfer complete interrupt enable
jhon309 0:88e313c910d0 426 * @arg SMBUS_IT_STOPI: STOP detection interrupt enable
jhon309 0:88e313c910d0 427 * @arg SMBUS_IT_NACKI: NACK received interrupt enable
jhon309 0:88e313c910d0 428 * @arg SMBUS_IT_ADDRI: Address match interrupt enable
jhon309 0:88e313c910d0 429 * @arg SMBUS_IT_RXI: RX interrupt enable
jhon309 0:88e313c910d0 430 * @arg SMBUS_IT_TXI: TX interrupt enable
jhon309 0:88e313c910d0 431 *
jhon309 0:88e313c910d0 432 * @retval None
jhon309 0:88e313c910d0 433 */
jhon309 0:88e313c910d0 434
jhon309 0:88e313c910d0 435 #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
jhon309 0:88e313c910d0 436 #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
jhon309 0:88e313c910d0 437
jhon309 0:88e313c910d0 438 /** @brief Checks if the specified SMBUS interrupt source is enabled or disabled.
jhon309 0:88e313c910d0 439 * @param __HANDLE__: specifies the SMBUS Handle.
jhon309 0:88e313c910d0 440 * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral.
jhon309 0:88e313c910d0 441 * @param __INTERRUPT__: specifies the SMBUS interrupt source to check.
jhon309 0:88e313c910d0 442 * This parameter can be one of the following values:
jhon309 0:88e313c910d0 443 * @arg SMBUS_IT_ERRI: Errors interrupt enable
jhon309 0:88e313c910d0 444 * @arg SMBUS_IT_TCI: Transfer complete interrupt enable
jhon309 0:88e313c910d0 445 * @arg SMBUS_IT_STOPI: STOP detection interrupt enable
jhon309 0:88e313c910d0 446 * @arg SMBUS_IT_NACKI: NACK received interrupt enable
jhon309 0:88e313c910d0 447 * @arg SMBUS_IT_ADDRI: Address match interrupt enable
jhon309 0:88e313c910d0 448 * @arg SMBUS_IT_RXI: RX interrupt enable
jhon309 0:88e313c910d0 449 * @arg SMBUS_IT_TXI: TX interrupt enable
jhon309 0:88e313c910d0 450 *
jhon309 0:88e313c910d0 451 * @retval The new state of __IT__ (TRUE or FALSE).
jhon309 0:88e313c910d0 452 */
jhon309 0:88e313c910d0 453 #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
jhon309 0:88e313c910d0 454
jhon309 0:88e313c910d0 455 /** @brief Checks whether the specified SMBUS flag is set or not.
jhon309 0:88e313c910d0 456 * @param __HANDLE__: specifies the SMBUS Handle.
jhon309 0:88e313c910d0 457 * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral.
jhon309 0:88e313c910d0 458 * @param __FLAG__: specifies the flag to check.
jhon309 0:88e313c910d0 459 * This parameter can be one of the following values:
jhon309 0:88e313c910d0 460 * @arg SMBUS_FLAG_TXE: Transmit data register empty
jhon309 0:88e313c910d0 461 * @arg SMBUS_FLAG_TXIS: Transmit interrupt status
jhon309 0:88e313c910d0 462 * @arg SMBUS_FLAG_RXNE: Receive data register not empty
jhon309 0:88e313c910d0 463 * @arg SMBUS_FLAG_ADDR: Address matched (slave mode)
jhon309 0:88e313c910d0 464 * @arg SMBUS_FLAG_AF: NACK received flag
jhon309 0:88e313c910d0 465 * @arg SMBUS_FLAG_STOPF: STOP detection flag
jhon309 0:88e313c910d0 466 * @arg SMBUS_FLAG_TC: Transfer complete (master mode)
jhon309 0:88e313c910d0 467 * @arg SMBUS_FLAG_TCR: Transfer complete reload
jhon309 0:88e313c910d0 468 * @arg SMBUS_FLAG_BERR: Bus error
jhon309 0:88e313c910d0 469 * @arg SMBUS_FLAG_ARLO: Arbitration lost
jhon309 0:88e313c910d0 470 * @arg SMBUS_FLAG_OVR: Overrun/Underrun
jhon309 0:88e313c910d0 471 * @arg SMBUS_FLAG_PECERR: PEC error in reception
jhon309 0:88e313c910d0 472 * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag
jhon309 0:88e313c910d0 473 * @arg SMBUS_FLAG_ALERT: SMBus alert
jhon309 0:88e313c910d0 474 * @arg SMBUS_FLAG_BUSY: Bus busy
jhon309 0:88e313c910d0 475 * @arg SMBUS_FLAG_DIR: Transfer direction (slave mode)
jhon309 0:88e313c910d0 476 *
jhon309 0:88e313c910d0 477 * @retval The new state of __FLAG__ (TRUE or FALSE).
jhon309 0:88e313c910d0 478 */
jhon309 0:88e313c910d0 479 #define SMBUS_FLAG_MASK ((uint32_t)0x0001FFFF)
jhon309 0:88e313c910d0 480 #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
jhon309 0:88e313c910d0 481
jhon309 0:88e313c910d0 482 /** @brief Clears the SMBUS pending flags which are cleared by writing 1 in a specific bit.
jhon309 0:88e313c910d0 483 * @param __HANDLE__: specifies the SMBUS Handle.
jhon309 0:88e313c910d0 484 * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral.
jhon309 0:88e313c910d0 485 * @param __FLAG__: specifies the flag to clear.
jhon309 0:88e313c910d0 486 * This parameter can be any combination of the following values:
jhon309 0:88e313c910d0 487 * @arg SMBUS_FLAG_ADDR: Address matched (slave mode)
jhon309 0:88e313c910d0 488 * @arg SMBUS_FLAG_AF: NACK received flag
jhon309 0:88e313c910d0 489 * @arg SMBUS_FLAG_STOPF: STOP detection flag
jhon309 0:88e313c910d0 490 * @arg SMBUS_FLAG_BERR: Bus error
jhon309 0:88e313c910d0 491 * @arg SMBUS_FLAG_ARLO: Arbitration lost
jhon309 0:88e313c910d0 492 * @arg SMBUS_FLAG_OVR: Overrun/Underrun
jhon309 0:88e313c910d0 493 * @arg SMBUS_FLAG_PECERR: PEC error in reception
jhon309 0:88e313c910d0 494 * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag
jhon309 0:88e313c910d0 495 * @arg SMBUS_FLAG_ALERT: SMBus alert
jhon309 0:88e313c910d0 496 *
jhon309 0:88e313c910d0 497 * @retval None
jhon309 0:88e313c910d0 498 */
jhon309 0:88e313c910d0 499 #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
jhon309 0:88e313c910d0 500
jhon309 0:88e313c910d0 501
jhon309 0:88e313c910d0 502 #define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE)
jhon309 0:88e313c910d0 503 #define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE)
jhon309 0:88e313c910d0 504
jhon309 0:88e313c910d0 505 #define __HAL_SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN)))
jhon309 0:88e313c910d0 506 #define __HAL_SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
jhon309 0:88e313c910d0 507
jhon309 0:88e313c910d0 508 #define __HAL_SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
jhon309 0:88e313c910d0 509 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
jhon309 0:88e313c910d0 510
jhon309 0:88e313c910d0 511 #define __HAL_SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17)
jhon309 0:88e313c910d0 512 #define __HAL_SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16)
jhon309 0:88e313c910d0 513 #define __HAL_SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
jhon309 0:88e313c910d0 514 #define __HAL_SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE)
jhon309 0:88e313c910d0 515 #define __HAL_SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN)
jhon309 0:88e313c910d0 516 #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= I2C_CR2_NACK)
jhon309 0:88e313c910d0 517
jhon309 0:88e313c910d0 518 #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
jhon309 0:88e313c910d0 519 #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
jhon309 0:88e313c910d0 520 /**
jhon309 0:88e313c910d0 521 * @}
jhon309 0:88e313c910d0 522 */
jhon309 0:88e313c910d0 523
jhon309 0:88e313c910d0 524 /* Exported functions --------------------------------------------------------*/
jhon309 0:88e313c910d0 525 /** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions
jhon309 0:88e313c910d0 526 * @{
jhon309 0:88e313c910d0 527 */
jhon309 0:88e313c910d0 528
jhon309 0:88e313c910d0 529 /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
jhon309 0:88e313c910d0 530 * @{
jhon309 0:88e313c910d0 531 */
jhon309 0:88e313c910d0 532
jhon309 0:88e313c910d0 533 /* Initialization and de-initialization functions **********************************/
jhon309 0:88e313c910d0 534 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 535 HAL_StatusTypeDef HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 536 void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 537 void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 538
jhon309 0:88e313c910d0 539 /**
jhon309 0:88e313c910d0 540 * @}
jhon309 0:88e313c910d0 541 */
jhon309 0:88e313c910d0 542
jhon309 0:88e313c910d0 543 /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
jhon309 0:88e313c910d0 544 * @{
jhon309 0:88e313c910d0 545 */
jhon309 0:88e313c910d0 546
jhon309 0:88e313c910d0 547 /* IO operation functions *****************************************************/
jhon309 0:88e313c910d0 548 /******* Blocking mode: Polling */
jhon309 0:88e313c910d0 549 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
jhon309 0:88e313c910d0 550
jhon309 0:88e313c910d0 551 /******* Non-Blocking mode: Interrupt */
jhon309 0:88e313c910d0 552 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
jhon309 0:88e313c910d0 553 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
jhon309 0:88e313c910d0 554 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
jhon309 0:88e313c910d0 555 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
jhon309 0:88e313c910d0 556 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
jhon309 0:88e313c910d0 557
jhon309 0:88e313c910d0 558 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 559 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 560 HAL_StatusTypeDef HAL_SMBUS_Slave_Listen_IT(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 561 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 562
jhon309 0:88e313c910d0 563 /* Aliases for new API and to insure inter STM32 series compatibility */
jhon309 0:88e313c910d0 564 #define HAL_SMBUS_EnableListen_IT HAL_SMBUS_Slave_Listen_IT
jhon309 0:88e313c910d0 565
jhon309 0:88e313c910d0 566 /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
jhon309 0:88e313c910d0 567 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 568 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 569 void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 570 void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 571 void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 572 void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 573 void HAL_SMBUS_SlaveAddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
jhon309 0:88e313c910d0 574 void HAL_SMBUS_SlaveListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 575
jhon309 0:88e313c910d0 576 /* Aliases for new API and to insure inter STM32 series compatibility */
jhon309 0:88e313c910d0 577 #define HAL_SMBUS_AddrCallback HAL_SMBUS_SlaveAddrCallback
jhon309 0:88e313c910d0 578 #define HAL_SMBUS_ListenCpltCallback HAL_SMBUS_SlaveListenCpltCallback
jhon309 0:88e313c910d0 579
jhon309 0:88e313c910d0 580 void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 581
jhon309 0:88e313c910d0 582 /**
jhon309 0:88e313c910d0 583 * @}
jhon309 0:88e313c910d0 584 */
jhon309 0:88e313c910d0 585
jhon309 0:88e313c910d0 586 /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
jhon309 0:88e313c910d0 587 * @{
jhon309 0:88e313c910d0 588 */
jhon309 0:88e313c910d0 589
jhon309 0:88e313c910d0 590 /* Peripheral State and Errors functions **************************************************/
jhon309 0:88e313c910d0 591 uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 592 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
jhon309 0:88e313c910d0 593
jhon309 0:88e313c910d0 594 /**
jhon309 0:88e313c910d0 595 * @}
jhon309 0:88e313c910d0 596 */
jhon309 0:88e313c910d0 597
jhon309 0:88e313c910d0 598 /**
jhon309 0:88e313c910d0 599 * @}
jhon309 0:88e313c910d0 600 */
jhon309 0:88e313c910d0 601
jhon309 0:88e313c910d0 602 /**
jhon309 0:88e313c910d0 603 * @}
jhon309 0:88e313c910d0 604 */
jhon309 0:88e313c910d0 605
jhon309 0:88e313c910d0 606 /**
jhon309 0:88e313c910d0 607 * @}
jhon309 0:88e313c910d0 608 */
jhon309 0:88e313c910d0 609 #ifdef __cplusplus
jhon309 0:88e313c910d0 610 }
jhon309 0:88e313c910d0 611 #endif
jhon309 0:88e313c910d0 612
jhon309 0:88e313c910d0 613
jhon309 0:88e313c910d0 614 #endif /* __STM32F0xx_HAL_SMBUS_H */
jhon309 0:88e313c910d0 615
jhon309 0:88e313c910d0 616 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
jhon309 0:88e313c910d0 617