Jhon Plantikow / mbed

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Dependents:   RTC

TARGET_NUCLEO_F072RB/stm32f0xx_hal_cec.h@0:88e313c910d0, 2015-08-13 (annotated)

Committer:
jhon309
Date:
Thu Aug 13 00:20:09 2015 +0000
Revision:
0:88e313c910d0
RTC Example

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jhon309 0:88e313c910d0 1 /**
jhon309 0:88e313c910d0 2 ******************************************************************************
jhon309 0:88e313c910d0 3 * @file stm32f0xx_hal_cec.h
jhon309 0:88e313c910d0 4 * @author MCD Application Team
jhon309 0:88e313c910d0 5 * @version V1.2.0
jhon309 0:88e313c910d0 6 * @date 11-December-2014
jhon309 0:88e313c910d0 7 * @brief Header file of CEC HAL module.
jhon309 0:88e313c910d0 8 ******************************************************************************
jhon309 0:88e313c910d0 9 * @attention
jhon309 0:88e313c910d0 10 *
jhon309 0:88e313c910d0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
jhon309 0:88e313c910d0 12 *
jhon309 0:88e313c910d0 13 * Redistribution and use in source and binary forms, with or without modification,
jhon309 0:88e313c910d0 14 * are permitted provided that the following conditions are met:
jhon309 0:88e313c910d0 15 * 1. Redistributions of source code must retain the above copyright notice,
jhon309 0:88e313c910d0 16 * this list of conditions and the following disclaimer.
jhon309 0:88e313c910d0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
jhon309 0:88e313c910d0 18 * this list of conditions and the following disclaimer in the documentation
jhon309 0:88e313c910d0 19 * and/or other materials provided with the distribution.
jhon309 0:88e313c910d0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
jhon309 0:88e313c910d0 21 * may be used to endorse or promote products derived from this software
jhon309 0:88e313c910d0 22 * without specific prior written permission.
jhon309 0:88e313c910d0 23 *
jhon309 0:88e313c910d0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jhon309 0:88e313c910d0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jhon309 0:88e313c910d0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
jhon309 0:88e313c910d0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
jhon309 0:88e313c910d0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
jhon309 0:88e313c910d0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
jhon309 0:88e313c910d0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
jhon309 0:88e313c910d0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
jhon309 0:88e313c910d0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
jhon309 0:88e313c910d0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
jhon309 0:88e313c910d0 34 *
jhon309 0:88e313c910d0 35 ******************************************************************************
jhon309 0:88e313c910d0 36 */
jhon309 0:88e313c910d0 37
jhon309 0:88e313c910d0 38 /* Define to prevent recursive inclusion -------------------------------------*/
jhon309 0:88e313c910d0 39 #ifndef __STM32F0xx_HAL_CEC_H
jhon309 0:88e313c910d0 40 #define __STM32F0xx_HAL_CEC_H
jhon309 0:88e313c910d0 41
jhon309 0:88e313c910d0 42 #ifdef __cplusplus
jhon309 0:88e313c910d0 43 extern "C" {
jhon309 0:88e313c910d0 44 #endif
jhon309 0:88e313c910d0 45
jhon309 0:88e313c910d0 46 #if defined(STM32F042x6) || defined(STM32F048xx) ||\
jhon309 0:88e313c910d0 47 defined(STM32F051x8) || defined(STM32F058xx) ||\
jhon309 0:88e313c910d0 48 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||\
jhon309 0:88e313c910d0 49 defined(STM32F091xC) || defined(STM32F098xx)
jhon309 0:88e313c910d0 50 /* Includes ------------------------------------------------------------------*/
jhon309 0:88e313c910d0 51 #include "stm32f0xx_hal_def.h"
jhon309 0:88e313c910d0 52
jhon309 0:88e313c910d0 53 /** @addtogroup STM32F0xx_HAL_Driver
jhon309 0:88e313c910d0 54 * @{
jhon309 0:88e313c910d0 55 */
jhon309 0:88e313c910d0 56
jhon309 0:88e313c910d0 57 /** @addtogroup CEC CEC HAL Module Driver
jhon309 0:88e313c910d0 58 * @{
jhon309 0:88e313c910d0 59 */
jhon309 0:88e313c910d0 60
jhon309 0:88e313c910d0 61 /* Exported types ------------------------------------------------------------*/
jhon309 0:88e313c910d0 62 /** @defgroup CEC_Exported_Types CEC Exported Types
jhon309 0:88e313c910d0 63 * @{
jhon309 0:88e313c910d0 64 */
jhon309 0:88e313c910d0 65
jhon309 0:88e313c910d0 66 /**
jhon309 0:88e313c910d0 67 * @brief CEC Init Structure definition
jhon309 0:88e313c910d0 68 */
jhon309 0:88e313c910d0 69 typedef struct
jhon309 0:88e313c910d0 70 {
jhon309 0:88e313c910d0 71 uint32_t SignalFreeTime; /*!< Set SFT field, specifies the Signal Free Time.
jhon309 0:88e313c910d0 72 It can be one of @ref CEC_Signal_Free_Time
jhon309 0:88e313c910d0 73 and belongs to the set {0,...,7} where
jhon309 0:88e313c910d0 74 0x0 is the default configuration
jhon309 0:88e313c910d0 75 else means 0.5 + (SignalFreeTime - 1) nominal data bit periods */
jhon309 0:88e313c910d0 76
jhon309 0:88e313c910d0 77 uint32_t Tolerance; /*!< Set RXTOL bit, specifies the tolerance accepted on the received waveforms,
jhon309 0:88e313c910d0 78 it can be a value of @ref CEC_Tolerance : it is either CEC_STANDARD_TOLERANCE
jhon309 0:88e313c910d0 79 or CEC_EXTENDED_TOLERANCE */
jhon309 0:88e313c910d0 80
jhon309 0:88e313c910d0 81 uint32_t BRERxStop; /*!< Set BRESTP bit @ref CEC_BRERxStop : specifies whether or not a Bit Rising Error stops the reception.
jhon309 0:88e313c910d0 82 CEC_NO_RX_STOP_ON_BRE: reception is not stopped.
jhon309 0:88e313c910d0 83 CEC_RX_STOP_ON_BRE: reception is stopped. */
jhon309 0:88e313c910d0 84
jhon309 0:88e313c910d0 85 uint32_t BREErrorBitGen; /*!< Set BREGEN bit @ref CEC_BREErrorBitGen : specifies whether or not an Error-Bit is generated on the
jhon309 0:88e313c910d0 86 CEC line upon Bit Rising Error detection.
jhon309 0:88e313c910d0 87 CEC_BRE_ERRORBIT_NO_GENERATION: no error-bit generation.
jhon309 0:88e313c910d0 88 CEC_BRE_ERRORBIT_GENERATION: error-bit generation if BRESTP is set. */
jhon309 0:88e313c910d0 89
jhon309 0:88e313c910d0 90 uint32_t LBPEErrorBitGen; /*!< Set LBPEGEN bit @ref CEC_LBPEErrorBitGen : specifies whether or not an Error-Bit is generated on the
jhon309 0:88e313c910d0 91 CEC line upon Long Bit Period Error detection.
jhon309 0:88e313c910d0 92 CEC_LBPE_ERRORBIT_NO_GENERATION: no error-bit generation.
jhon309 0:88e313c910d0 93 CEC_LBPE_ERRORBIT_GENERATION: error-bit generation. */
jhon309 0:88e313c910d0 94
jhon309 0:88e313c910d0 95 uint32_t BroadcastMsgNoErrorBitGen; /*!< Set BRDNOGEN bit @ref CEC_BroadCastMsgErrorBitGen : allows to avoid an Error-Bit generation on the CEC line
jhon309 0:88e313c910d0 96 upon an error detected on a broadcast message.
jhon309 0:88e313c910d0 97
jhon309 0:88e313c910d0 98 It supersedes BREGEN and LBPEGEN bits for a broadcast message error handling. It can take two values:
jhon309 0:88e313c910d0 99
jhon309 0:88e313c910d0 100 1) CEC_BROADCASTERROR_ERRORBIT_GENERATION.
jhon309 0:88e313c910d0 101 a) BRE detection: error-bit generation on the CEC line if BRESTP=CEC_RX_STOP_ON_BRE
jhon309 0:88e313c910d0 102 and BREGEN=CEC_BRE_ERRORBIT_NO_GENERATION.
jhon309 0:88e313c910d0 103 b) LBPE detection: error-bit generation on the CEC line
jhon309 0:88e313c910d0 104 if LBPGEN=CEC_LBPE_ERRORBIT_NO_GENERATION.
jhon309 0:88e313c910d0 105
jhon309 0:88e313c910d0 106 2) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION.
jhon309 0:88e313c910d0 107 no error-bit generation in case neither a) nor b) are satisfied. Additionally,
jhon309 0:88e313c910d0 108 there is no error-bit generation in case of Short Bit Period Error detection in
jhon309 0:88e313c910d0 109 a broadcast message while LSTN bit is set. */
jhon309 0:88e313c910d0 110
jhon309 0:88e313c910d0 111 uint32_t SignalFreeTimeOption; /*!< Set SFTOP bit @ref CEC_SFT_Option : specifies when SFT timer starts.
jhon309 0:88e313c910d0 112 CEC_SFT_START_ON_TXSOM SFT: timer starts when TXSOM is set by software.
jhon309 0:88e313c910d0 113 CEC_SFT_START_ON_TX_RX_END: SFT timer starts automatically at the end of message transmission/reception. */
jhon309 0:88e313c910d0 114
jhon309 0:88e313c910d0 115 uint32_t OwnAddress; /*!< Set OAR field, specifies CEC device address within a 15-bit long field */
jhon309 0:88e313c910d0 116
jhon309 0:88e313c910d0 117 uint32_t ListenMode; /*!< Set LSTN bit @ref CEC_Listening_Mode : specifies device listening mode. It can take two values:
jhon309 0:88e313c910d0 118
jhon309 0:88e313c910d0 119 CEC_REDUCED_LISTENING_MODE: CEC peripheral receives only message addressed to its
jhon309 0:88e313c910d0 120 own address (OAR). Messages addressed to different destination are ignored.
jhon309 0:88e313c910d0 121 Broadcast messages are always received.
jhon309 0:88e313c910d0 122
jhon309 0:88e313c910d0 123 CEC_FULL_LISTENING_MODE: CEC peripheral receives messages addressed to its own
jhon309 0:88e313c910d0 124 address (OAR) with positive acknowledge. Messages addressed to different destination
jhon309 0:88e313c910d0 125 are received, but without interfering with the CEC bus: no acknowledge sent. */
jhon309 0:88e313c910d0 126
jhon309 0:88e313c910d0 127 uint8_t InitiatorAddress; /* Initiator address (source logical address, sent in each header) */
jhon309 0:88e313c910d0 128
jhon309 0:88e313c910d0 129 }CEC_InitTypeDef;
jhon309 0:88e313c910d0 130
jhon309 0:88e313c910d0 131 /**
jhon309 0:88e313c910d0 132 * @brief HAL CEC State structures definition
jhon309 0:88e313c910d0 133 */
jhon309 0:88e313c910d0 134 typedef enum
jhon309 0:88e313c910d0 135 {
jhon309 0:88e313c910d0 136 HAL_CEC_STATE_RESET = 0x00, /*!< Peripheral Reset state */
jhon309 0:88e313c910d0 137 HAL_CEC_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
jhon309 0:88e313c910d0 138 HAL_CEC_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
jhon309 0:88e313c910d0 139 HAL_CEC_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
jhon309 0:88e313c910d0 140 HAL_CEC_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
jhon309 0:88e313c910d0 141 HAL_CEC_STATE_STANDBY_RX = 0x05, /*!< IP ready to receive, doesn't prevent IP to transmit */
jhon309 0:88e313c910d0 142 HAL_CEC_STATE_TIMEOUT = 0x06, /*!< Timeout state */
jhon309 0:88e313c910d0 143 HAL_CEC_STATE_ERROR = 0x07 /*!< State Error */
jhon309 0:88e313c910d0 144 }HAL_CEC_StateTypeDef;
jhon309 0:88e313c910d0 145
jhon309 0:88e313c910d0 146 /**
jhon309 0:88e313c910d0 147 * @brief HAL Error structures definition
jhon309 0:88e313c910d0 148 */
jhon309 0:88e313c910d0 149 typedef enum
jhon309 0:88e313c910d0 150 {
jhon309 0:88e313c910d0 151 HAL_CEC_ERROR_NONE = (uint32_t) 0x0, /*!< no error */
jhon309 0:88e313c910d0 152 HAL_CEC_ERROR_RXOVR = CEC_ISR_RXOVR, /*!< CEC Rx-Overrun */
jhon309 0:88e313c910d0 153 HAL_CEC_ERROR_BRE = CEC_ISR_BRE, /*!< CEC Rx Bit Rising Error */
jhon309 0:88e313c910d0 154 HAL_CEC_ERROR_SBPE = CEC_ISR_SBPE, /*!< CEC Rx Short Bit period Error */
jhon309 0:88e313c910d0 155 HAL_CEC_ERROR_LBPE = CEC_ISR_LBPE, /*!< CEC Rx Long Bit period Error */
jhon309 0:88e313c910d0 156 HAL_CEC_ERROR_RXACKE = CEC_ISR_RXACKE, /*!< CEC Rx Missing Acknowledge */
jhon309 0:88e313c910d0 157 HAL_CEC_ERROR_ARBLST = CEC_ISR_ARBLST, /*!< CEC Arbitration Lost */
jhon309 0:88e313c910d0 158 HAL_CEC_ERROR_TXUDR = CEC_ISR_TXUDR, /*!< CEC Tx-Buffer Underrun */
jhon309 0:88e313c910d0 159 HAL_CEC_ERROR_TXERR = CEC_ISR_TXERR, /*!< CEC Tx-Error */
jhon309 0:88e313c910d0 160 HAL_CEC_ERROR_TXACKE = CEC_ISR_TXACKE /*!< CEC Tx Missing Acknowledge */
jhon309 0:88e313c910d0 161 }
jhon309 0:88e313c910d0 162 HAL_CEC_ErrorTypeDef;
jhon309 0:88e313c910d0 163
jhon309 0:88e313c910d0 164 /**
jhon309 0:88e313c910d0 165 * @brief CEC handle Structure definition
jhon309 0:88e313c910d0 166 */
jhon309 0:88e313c910d0 167 typedef struct
jhon309 0:88e313c910d0 168 {
jhon309 0:88e313c910d0 169 CEC_TypeDef *Instance; /* CEC registers base address */
jhon309 0:88e313c910d0 170
jhon309 0:88e313c910d0 171 CEC_InitTypeDef Init; /* CEC communication parameters */
jhon309 0:88e313c910d0 172
jhon309 0:88e313c910d0 173 uint8_t *pTxBuffPtr; /* Pointer to CEC Tx transfer Buffer */
jhon309 0:88e313c910d0 174
jhon309 0:88e313c910d0 175 uint16_t TxXferCount; /* CEC Tx Transfer Counter */
jhon309 0:88e313c910d0 176
jhon309 0:88e313c910d0 177 uint8_t *pRxBuffPtr; /* Pointer to CEC Rx transfer Buffer */
jhon309 0:88e313c910d0 178
jhon309 0:88e313c910d0 179 uint16_t RxXferSize; /* CEC Rx Transfer size, 0: header received only */
jhon309 0:88e313c910d0 180
jhon309 0:88e313c910d0 181 __IO uint32_t ErrorCode; /* For errors handling purposes, copy of ISR register
jhon309 0:88e313c910d0 182 in case error is reported */
jhon309 0:88e313c910d0 183
jhon309 0:88e313c910d0 184 HAL_LockTypeDef Lock; /* Locking object */
jhon309 0:88e313c910d0 185
jhon309 0:88e313c910d0 186 HAL_CEC_StateTypeDef State; /* CEC communication state */
jhon309 0:88e313c910d0 187
jhon309 0:88e313c910d0 188 }CEC_HandleTypeDef;
jhon309 0:88e313c910d0 189 /**
jhon309 0:88e313c910d0 190 * @}
jhon309 0:88e313c910d0 191 */
jhon309 0:88e313c910d0 192
jhon309 0:88e313c910d0 193 /* Exported constants --------------------------------------------------------*/
jhon309 0:88e313c910d0 194 /** @defgroup CEC_Exported_Constants CEC Exported Constants
jhon309 0:88e313c910d0 195 * @{
jhon309 0:88e313c910d0 196 */
jhon309 0:88e313c910d0 197
jhon309 0:88e313c910d0 198 /** @defgroup CEC_Signal_Free_Time Signal Free Time setting parameter
jhon309 0:88e313c910d0 199 * @{
jhon309 0:88e313c910d0 200 */
jhon309 0:88e313c910d0 201 #define CEC_DEFAULT_SFT ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 202 #define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001)
jhon309 0:88e313c910d0 203 #define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002)
jhon309 0:88e313c910d0 204 #define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003)
jhon309 0:88e313c910d0 205 #define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004)
jhon309 0:88e313c910d0 206 #define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005)
jhon309 0:88e313c910d0 207 #define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006)
jhon309 0:88e313c910d0 208 #define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007)
jhon309 0:88e313c910d0 209 #define IS_CEC_SIGNALFREETIME(SFT) ((SFT) <= CEC_CFGR_SFT)
jhon309 0:88e313c910d0 210 /**
jhon309 0:88e313c910d0 211 * @}
jhon309 0:88e313c910d0 212 */
jhon309 0:88e313c910d0 213
jhon309 0:88e313c910d0 214 /** @defgroup CEC_Tolerance Receiver Tolerance
jhon309 0:88e313c910d0 215 * @{
jhon309 0:88e313c910d0 216 */
jhon309 0:88e313c910d0 217 #define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 218 #define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL)
jhon309 0:88e313c910d0 219 #define IS_CEC_TOLERANCE(RXTOL) (((RXTOL) == CEC_STANDARD_TOLERANCE) || \
jhon309 0:88e313c910d0 220 ((RXTOL) == CEC_EXTENDED_TOLERANCE))
jhon309 0:88e313c910d0 221 /**
jhon309 0:88e313c910d0 222 * @}
jhon309 0:88e313c910d0 223 */
jhon309 0:88e313c910d0 224
jhon309 0:88e313c910d0 225 /** @defgroup CEC_BRERxStop Reception Stop on Error
jhon309 0:88e313c910d0 226 * @{
jhon309 0:88e313c910d0 227 */
jhon309 0:88e313c910d0 228 #define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 229 #define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP)
jhon309 0:88e313c910d0 230 #define IS_CEC_BRERXSTOP(BRERXSTOP) (((BRERXSTOP) == CEC_NO_RX_STOP_ON_BRE) || \
jhon309 0:88e313c910d0 231 ((BRERXSTOP) == CEC_RX_STOP_ON_BRE))
jhon309 0:88e313c910d0 232 /**
jhon309 0:88e313c910d0 233 * @}
jhon309 0:88e313c910d0 234 */
jhon309 0:88e313c910d0 235
jhon309 0:88e313c910d0 236 /** @defgroup CEC_BREErrorBitGen Error Bit Generation if Bit Rise Error reported
jhon309 0:88e313c910d0 237 * @{
jhon309 0:88e313c910d0 238 */
jhon309 0:88e313c910d0 239 #define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 240 #define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN)
jhon309 0:88e313c910d0 241 #define IS_CEC_BREERRORBITGEN(ERRORBITGEN) (((ERRORBITGEN) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
jhon309 0:88e313c910d0 242 ((ERRORBITGEN) == CEC_BRE_ERRORBIT_GENERATION))
jhon309 0:88e313c910d0 243 /**
jhon309 0:88e313c910d0 244 * @}
jhon309 0:88e313c910d0 245 */
jhon309 0:88e313c910d0 246
jhon309 0:88e313c910d0 247 /** @defgroup CEC_LBPEErrorBitGen Error Bit Generation if Long Bit Period Error reported
jhon309 0:88e313c910d0 248 * @{
jhon309 0:88e313c910d0 249 */
jhon309 0:88e313c910d0 250 #define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 251 #define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN)
jhon309 0:88e313c910d0 252 #define IS_CEC_LBPEERRORBITGEN(ERRORBITGEN) (((ERRORBITGEN) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
jhon309 0:88e313c910d0 253 ((ERRORBITGEN) == CEC_LBPE_ERRORBIT_GENERATION))
jhon309 0:88e313c910d0 254 /**
jhon309 0:88e313c910d0 255 * @}
jhon309 0:88e313c910d0 256 */
jhon309 0:88e313c910d0 257
jhon309 0:88e313c910d0 258 /** @defgroup CEC_BroadCastMsgErrorBitGen Error Bit Generation on Broadcast message
jhon309 0:88e313c910d0 259 * @{
jhon309 0:88e313c910d0 260 */
jhon309 0:88e313c910d0 261 #define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 262 #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN)
jhon309 0:88e313c910d0 263 #define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(ERRORBITGEN) (((ERRORBITGEN) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
jhon309 0:88e313c910d0 264 ((ERRORBITGEN) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION))
jhon309 0:88e313c910d0 265 /**
jhon309 0:88e313c910d0 266 * @}
jhon309 0:88e313c910d0 267 */
jhon309 0:88e313c910d0 268
jhon309 0:88e313c910d0 269 /** @defgroup CEC_SFT_Option Signal Free Time start option
jhon309 0:88e313c910d0 270 * @{
jhon309 0:88e313c910d0 271 */
jhon309 0:88e313c910d0 272 #define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 273 #define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT)
jhon309 0:88e313c910d0 274 #define IS_CEC_SFTOP(SFTOP) (((SFTOP) == CEC_SFT_START_ON_TXSOM) || \
jhon309 0:88e313c910d0 275 ((SFTOP) == CEC_SFT_START_ON_TX_RX_END))
jhon309 0:88e313c910d0 276 /**
jhon309 0:88e313c910d0 277 * @}
jhon309 0:88e313c910d0 278 */
jhon309 0:88e313c910d0 279
jhon309 0:88e313c910d0 280 /** @defgroup CEC_Listening_Mode Listening mode option
jhon309 0:88e313c910d0 281 * @{
jhon309 0:88e313c910d0 282 */
jhon309 0:88e313c910d0 283 #define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000)
jhon309 0:88e313c910d0 284 #define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN)
jhon309 0:88e313c910d0 285 #define IS_CEC_LISTENING_MODE(MODE) (((MODE) == CEC_REDUCED_LISTENING_MODE) || \
jhon309 0:88e313c910d0 286 ((MODE) == CEC_FULL_LISTENING_MODE))
jhon309 0:88e313c910d0 287 /**
jhon309 0:88e313c910d0 288 * @}
jhon309 0:88e313c910d0 289 */
jhon309 0:88e313c910d0 290
jhon309 0:88e313c910d0 291 /** @defgroup CEC_ALL_ERROR all RX or TX errors flags in CEC ISR register
jhon309 0:88e313c910d0 292 * @{
jhon309 0:88e313c910d0 293 */
jhon309 0:88e313c910d0 294 #define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\
jhon309 0:88e313c910d0 295 CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
jhon309 0:88e313c910d0 296 /**
jhon309 0:88e313c910d0 297 * @}
jhon309 0:88e313c910d0 298 */
jhon309 0:88e313c910d0 299
jhon309 0:88e313c910d0 300 /** @defgroup CEC_IER_ALL_RX all RX errors interrupts enabling flag
jhon309 0:88e313c910d0 301 * @{
jhon309 0:88e313c910d0 302 */
jhon309 0:88e313c910d0 303 #define CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE)
jhon309 0:88e313c910d0 304 /**
jhon309 0:88e313c910d0 305 * @}
jhon309 0:88e313c910d0 306 */
jhon309 0:88e313c910d0 307
jhon309 0:88e313c910d0 308 /** @defgroup CEC_IER_ALL_TX all TX errors interrupts enabling flag
jhon309 0:88e313c910d0 309 * @{
jhon309 0:88e313c910d0 310 */
jhon309 0:88e313c910d0 311 #define CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE)
jhon309 0:88e313c910d0 312 /**
jhon309 0:88e313c910d0 313 * @}
jhon309 0:88e313c910d0 314 */
jhon309 0:88e313c910d0 315
jhon309 0:88e313c910d0 316 /** @defgroup CEC_OAR_Position Device Own Address position in CEC CFGR register
jhon309 0:88e313c910d0 317 * @{
jhon309 0:88e313c910d0 318 */
jhon309 0:88e313c910d0 319 #define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16)
jhon309 0:88e313c910d0 320 /**
jhon309 0:88e313c910d0 321 * @}
jhon309 0:88e313c910d0 322 */
jhon309 0:88e313c910d0 323
jhon309 0:88e313c910d0 324 /** @defgroup CEC_Initiator_Position Initiator logical address position in message header
jhon309 0:88e313c910d0 325 * @{
jhon309 0:88e313c910d0 326 */
jhon309 0:88e313c910d0 327 #define CEC_INITIATOR_LSB_POS ((uint32_t) 4)
jhon309 0:88e313c910d0 328 /**
jhon309 0:88e313c910d0 329 * @}
jhon309 0:88e313c910d0 330 */
jhon309 0:88e313c910d0 331
jhon309 0:88e313c910d0 332 /**
jhon309 0:88e313c910d0 333 * @}
jhon309 0:88e313c910d0 334 */
jhon309 0:88e313c910d0 335
jhon309 0:88e313c910d0 336 /* Exported macros -----------------------------------------------------------*/
jhon309 0:88e313c910d0 337 /** @defgroup CEC_Exported_Macros CEC Exported Macros
jhon309 0:88e313c910d0 338 * @{
jhon309 0:88e313c910d0 339 */
jhon309 0:88e313c910d0 340
jhon309 0:88e313c910d0 341 /** @brief Reset CEC handle state
jhon309 0:88e313c910d0 342 * @param __HANDLE__: CEC handle.
jhon309 0:88e313c910d0 343 * @retval None
jhon309 0:88e313c910d0 344 */
jhon309 0:88e313c910d0 345 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CEC_STATE_RESET)
jhon309 0:88e313c910d0 346
jhon309 0:88e313c910d0 347 /** @brief Checks whether or not the specified CEC interrupt flag is set.
jhon309 0:88e313c910d0 348 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 349 * @param __INTERRUPT__: specifies the interrupt to check.
jhon309 0:88e313c910d0 350 * This parameter can be one of the following values:
jhon309 0:88e313c910d0 351 * @arg CEC_ISR_RXBR : Rx-Byte Received
jhon309 0:88e313c910d0 352 * @arg CEC_ISR_RXEND : End of Reception
jhon309 0:88e313c910d0 353 * @arg CEC_ISR_RXOVR : Rx Overrun
jhon309 0:88e313c910d0 354 * @arg CEC_ISR_BRE : Rx Bit Rising Error
jhon309 0:88e313c910d0 355 * @arg CEC_ISR_SBPE : Rx Short Bit Period Error
jhon309 0:88e313c910d0 356 * @arg CEC_ISR_LBPE : Rx Long Bit Period Error
jhon309 0:88e313c910d0 357 * @arg CEC_ISR_RXACKE : Rx Missing Acknowledge
jhon309 0:88e313c910d0 358 * @arg CEC_ISR_ARBLST : Arbitration lost
jhon309 0:88e313c910d0 359 * @arg CEC_ISR_TXBR : Tx-Byte Request
jhon309 0:88e313c910d0 360 * @arg CEC_ISR_TXEND : End of Transmission
jhon309 0:88e313c910d0 361 * @arg CEC_ISR_TXUDR : Tx-buffer Underrun
jhon309 0:88e313c910d0 362 * @arg CEC_ISR_TXERR : Tx Error
jhon309 0:88e313c910d0 363 * @arg CEC_ISR_TXACKE : Tx Missing Acknowledge
jhon309 0:88e313c910d0 364 * @retval ITStatus
jhon309 0:88e313c910d0 365 */
jhon309 0:88e313c910d0 366 #define __HAL_CEC_GET_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->ISR & (__INTERRUPT__))
jhon309 0:88e313c910d0 367
jhon309 0:88e313c910d0 368 /** @brief Clears the interrupt or status flag when raised (write at 1)
jhon309 0:88e313c910d0 369 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 370 * @param __FLAG__: specifies the interrupt/status flag to clear.
jhon309 0:88e313c910d0 371 * This parameter can be one of the following values:
jhon309 0:88e313c910d0 372 * @arg CEC_ISR_RXBR : Rx-Byte Received
jhon309 0:88e313c910d0 373 * @arg CEC_ISR_RXEND : End of Reception
jhon309 0:88e313c910d0 374 * @arg CEC_ISR_RXOVR : Rx Overrun
jhon309 0:88e313c910d0 375 * @arg CEC_ISR_BRE : Rx Bit Rising Error
jhon309 0:88e313c910d0 376 * @arg CEC_ISR_SBPE : Rx Short Bit Period Error
jhon309 0:88e313c910d0 377 * @arg CEC_ISR_LBPE : Rx Long Bit Period Error
jhon309 0:88e313c910d0 378 * @arg CEC_ISR_RXACKE : Rx Missing Acknowledge
jhon309 0:88e313c910d0 379 * @arg CEC_ISR_ARBLST : Arbitration lost
jhon309 0:88e313c910d0 380 * @arg CEC_ISR_TXBR : Tx-Byte Request
jhon309 0:88e313c910d0 381 * @arg CEC_ISR_TXEND : End of Transmission
jhon309 0:88e313c910d0 382 * @arg CEC_ISR_TXUDR : Tx-buffer Underrun
jhon309 0:88e313c910d0 383 * @arg CEC_ISR_TXERR : Tx Error
jhon309 0:88e313c910d0 384 * @arg CEC_ISR_TXACKE : Tx Missing Acknowledge
jhon309 0:88e313c910d0 385 * @retval none
jhon309 0:88e313c910d0 386 */
jhon309 0:88e313c910d0 387 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR = (__FLAG__))
jhon309 0:88e313c910d0 388
jhon309 0:88e313c910d0 389 /** @brief Enables the specified CEC interrupt.
jhon309 0:88e313c910d0 390 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 391 * @param __INTERRUPT__: specifies the CEC interrupt to enable.
jhon309 0:88e313c910d0 392 * This parameter can be one of the following values:
jhon309 0:88e313c910d0 393 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
jhon309 0:88e313c910d0 394 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
jhon309 0:88e313c910d0 395 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
jhon309 0:88e313c910d0 396 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
jhon309 0:88e313c910d0 397 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
jhon309 0:88e313c910d0 398 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
jhon309 0:88e313c910d0 399 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
jhon309 0:88e313c910d0 400 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
jhon309 0:88e313c910d0 401 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
jhon309 0:88e313c910d0 402 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
jhon309 0:88e313c910d0 403 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
jhon309 0:88e313c910d0 404 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
jhon309 0:88e313c910d0 405 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
jhon309 0:88e313c910d0 406 * @retval none
jhon309 0:88e313c910d0 407 */
jhon309 0:88e313c910d0 408 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
jhon309 0:88e313c910d0 409
jhon309 0:88e313c910d0 410 /** @brief Disables the specified CEC interrupt.
jhon309 0:88e313c910d0 411 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 412 * @param __INTERRUPT__: specifies the CEC interrupt to disable.
jhon309 0:88e313c910d0 413 * This parameter can be one of the following values:
jhon309 0:88e313c910d0 414 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
jhon309 0:88e313c910d0 415 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
jhon309 0:88e313c910d0 416 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
jhon309 0:88e313c910d0 417 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
jhon309 0:88e313c910d0 418 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
jhon309 0:88e313c910d0 419 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
jhon309 0:88e313c910d0 420 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
jhon309 0:88e313c910d0 421 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
jhon309 0:88e313c910d0 422 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
jhon309 0:88e313c910d0 423 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
jhon309 0:88e313c910d0 424 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
jhon309 0:88e313c910d0 425 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
jhon309 0:88e313c910d0 426 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
jhon309 0:88e313c910d0 427 * @retval none
jhon309 0:88e313c910d0 428 */
jhon309 0:88e313c910d0 429 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
jhon309 0:88e313c910d0 430
jhon309 0:88e313c910d0 431 /** @brief Checks whether or not the specified CEC interrupt is enabled.
jhon309 0:88e313c910d0 432 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 433 * @param __INTERRUPT__: specifies the CEC interrupt to check.
jhon309 0:88e313c910d0 434 * This parameter can be one of the following values:
jhon309 0:88e313c910d0 435 * @arg CEC_IER_RXBRIE : Rx-Byte Received IT Enable
jhon309 0:88e313c910d0 436 * @arg CEC_IER_RXENDIE : End Of Reception IT Enable
jhon309 0:88e313c910d0 437 * @arg CEC_IER_RXOVRIE : Rx-Overrun IT Enable
jhon309 0:88e313c910d0 438 * @arg CEC_IER_BREIE : Rx Bit Rising Error IT Enable
jhon309 0:88e313c910d0 439 * @arg CEC_IER_SBPEIE : Rx Short Bit period Error IT Enable
jhon309 0:88e313c910d0 440 * @arg CEC_IER_LBPEIE : Rx Long Bit period Error IT Enable
jhon309 0:88e313c910d0 441 * @arg CEC_IER_RXACKEIE : Rx Missing Acknowledge IT Enable
jhon309 0:88e313c910d0 442 * @arg CEC_IER_ARBLSTIE : Arbitration Lost IT Enable
jhon309 0:88e313c910d0 443 * @arg CEC_IER_TXBRIE : Tx Byte Request IT Enable
jhon309 0:88e313c910d0 444 * @arg CEC_IER_TXENDIE : End of Transmission IT Enable
jhon309 0:88e313c910d0 445 * @arg CEC_IER_TXUDRIE : Tx-Buffer Underrun IT Enable
jhon309 0:88e313c910d0 446 * @arg CEC_IER_TXERRIE : Tx-Error IT Enable
jhon309 0:88e313c910d0 447 * @arg CEC_IER_TXACKEIE : Tx Missing Acknowledge IT Enable
jhon309 0:88e313c910d0 448 * @retval FlagStatus
jhon309 0:88e313c910d0 449 */
jhon309 0:88e313c910d0 450 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
jhon309 0:88e313c910d0 451
jhon309 0:88e313c910d0 452 /** @brief Enables the CEC device
jhon309 0:88e313c910d0 453 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 454 * @retval none
jhon309 0:88e313c910d0 455 */
jhon309 0:88e313c910d0 456 #define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN)
jhon309 0:88e313c910d0 457
jhon309 0:88e313c910d0 458 /** @brief Disables the CEC device
jhon309 0:88e313c910d0 459 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 460 * @retval none
jhon309 0:88e313c910d0 461 */
jhon309 0:88e313c910d0 462 #define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN)
jhon309 0:88e313c910d0 463
jhon309 0:88e313c910d0 464 /** @brief Set Transmission Start flag
jhon309 0:88e313c910d0 465 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 466 * @retval none
jhon309 0:88e313c910d0 467 */
jhon309 0:88e313c910d0 468 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM)
jhon309 0:88e313c910d0 469
jhon309 0:88e313c910d0 470 /** @brief Set Transmission End flag
jhon309 0:88e313c910d0 471 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 472 * @retval none
jhon309 0:88e313c910d0 473 * If the CEC message consists of only one byte, TXEOM must be set before of TXSOM.
jhon309 0:88e313c910d0 474 */
jhon309 0:88e313c910d0 475 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM)
jhon309 0:88e313c910d0 476
jhon309 0:88e313c910d0 477 /** @brief Get Transmission Start flag
jhon309 0:88e313c910d0 478 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 479 * @retval FlagStatus
jhon309 0:88e313c910d0 480 */
jhon309 0:88e313c910d0 481 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM)
jhon309 0:88e313c910d0 482
jhon309 0:88e313c910d0 483 /** @brief Get Transmission End flag
jhon309 0:88e313c910d0 484 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 485 * @retval FlagStatus
jhon309 0:88e313c910d0 486 */
jhon309 0:88e313c910d0 487 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM)
jhon309 0:88e313c910d0 488
jhon309 0:88e313c910d0 489 /** @brief Clear OAR register
jhon309 0:88e313c910d0 490 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 491 * @retval none
jhon309 0:88e313c910d0 492 */
jhon309 0:88e313c910d0 493 #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR)
jhon309 0:88e313c910d0 494
jhon309 0:88e313c910d0 495 /** @brief Set OAR register (without resetting previously set address in case of multi-address mode)
jhon309 0:88e313c910d0 496 * To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand
jhon309 0:88e313c910d0 497 * @param __HANDLE__: specifies the CEC Handle.
jhon309 0:88e313c910d0 498 * @param __ADDRESS__: Own Address value (CEC logical address is identified by bit position)
jhon309 0:88e313c910d0 499 * @retval none
jhon309 0:88e313c910d0 500 */
jhon309 0:88e313c910d0 501 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS)
jhon309 0:88e313c910d0 502
jhon309 0:88e313c910d0 503 /** @brief Check CEC device Own Address Register (OAR) setting.
jhon309 0:88e313c910d0 504 * OAR address is written in a 15-bit field within CEC_CFGR register.
jhon309 0:88e313c910d0 505 * @param __ADDRESS__: CEC own address.
jhon309 0:88e313c910d0 506 * @retval Test result (TRUE or FALSE).
jhon309 0:88e313c910d0 507 */
jhon309 0:88e313c910d0 508 #define IS_CEC_OAR_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x07FFF)
jhon309 0:88e313c910d0 509
jhon309 0:88e313c910d0 510 /** @brief Check CEC initiator or destination logical address setting.
jhon309 0:88e313c910d0 511 * Initiator and destination addresses are coded over 4 bits.
jhon309 0:88e313c910d0 512 * @param __ADDRESS__: CEC initiator or logical address.
jhon309 0:88e313c910d0 513 * @retval Test result (TRUE or FALSE).
jhon309 0:88e313c910d0 514 */
jhon309 0:88e313c910d0 515 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
jhon309 0:88e313c910d0 516
jhon309 0:88e313c910d0 517 /** @brief Check CEC message size.
jhon309 0:88e313c910d0 518 * The message size is the payload size: without counting the header,
jhon309 0:88e313c910d0 519 * it varies from 0 byte (ping operation, one header only, no payload) to
jhon309 0:88e313c910d0 520 * 15 bytes (1 opcode and up to 14 operands following the header).
jhon309 0:88e313c910d0 521 * @param __SIZE__: CEC message size.
jhon309 0:88e313c910d0 522 * @retval Test result (TRUE or FALSE).
jhon309 0:88e313c910d0 523 */
jhon309 0:88e313c910d0 524 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0xF)
jhon309 0:88e313c910d0 525
jhon309 0:88e313c910d0 526 /**
jhon309 0:88e313c910d0 527 * @}
jhon309 0:88e313c910d0 528 */
jhon309 0:88e313c910d0 529
jhon309 0:88e313c910d0 530 /* Exported functions --------------------------------------------------------*/
jhon309 0:88e313c910d0 531 /** @addtogroup CEC_Exported_Functions CEC Exported Functions
jhon309 0:88e313c910d0 532 * @{
jhon309 0:88e313c910d0 533 */
jhon309 0:88e313c910d0 534 /** @addtogroup CEC_Exported_Functions_Group1 Initialization/de-initialization function
jhon309 0:88e313c910d0 535 * @brief Initialization and Configuration functions
jhon309 0:88e313c910d0 536 * @{
jhon309 0:88e313c910d0 537 */
jhon309 0:88e313c910d0 538 /* Initialization and de-initialization functions ****************************/
jhon309 0:88e313c910d0 539 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 540 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 541 void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 542 void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 543 /**
jhon309 0:88e313c910d0 544 * @}
jhon309 0:88e313c910d0 545 */
jhon309 0:88e313c910d0 546
jhon309 0:88e313c910d0 547 /** @addtogroup CEC_Exported_Functions_Group2 IO operation function
jhon309 0:88e313c910d0 548 * @brief CEC Transmit/Receive functions
jhon309 0:88e313c910d0 549 * @{
jhon309 0:88e313c910d0 550 */
jhon309 0:88e313c910d0 551 /* I/O operation functions ***************************************************/
jhon309 0:88e313c910d0 552 HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout);
jhon309 0:88e313c910d0 553 HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout);
jhon309 0:88e313c910d0 554 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
jhon309 0:88e313c910d0 555 HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData);
jhon309 0:88e313c910d0 556 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 557 void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 558 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 559 void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 560 /**
jhon309 0:88e313c910d0 561 * @}
jhon309 0:88e313c910d0 562 */
jhon309 0:88e313c910d0 563
jhon309 0:88e313c910d0 564 /** @addtogroup CEC_Exported_Functions_Group3 Peripheral Control function
jhon309 0:88e313c910d0 565 * @brief CEC control functions
jhon309 0:88e313c910d0 566 * @{
jhon309 0:88e313c910d0 567 */
jhon309 0:88e313c910d0 568 /* Peripheral State functions ************************************************/
jhon309 0:88e313c910d0 569 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 570 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
jhon309 0:88e313c910d0 571 /**
jhon309 0:88e313c910d0 572 * @}
jhon309 0:88e313c910d0 573 */
jhon309 0:88e313c910d0 574
jhon309 0:88e313c910d0 575 /**
jhon309 0:88e313c910d0 576 * @}
jhon309 0:88e313c910d0 577 */
jhon309 0:88e313c910d0 578
jhon309 0:88e313c910d0 579 /**
jhon309 0:88e313c910d0 580 * @}
jhon309 0:88e313c910d0 581 */
jhon309 0:88e313c910d0 582
jhon309 0:88e313c910d0 583 /**
jhon309 0:88e313c910d0 584 * @}
jhon309 0:88e313c910d0 585 */
jhon309 0:88e313c910d0 586
jhon309 0:88e313c910d0 587 #endif /* defined(STM32F042x6) || defined(STM32F048xx) || */
jhon309 0:88e313c910d0 588 /* defined(STM32F051x8) || defined(STM32F058xx) || */
jhon309 0:88e313c910d0 589 /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */
jhon309 0:88e313c910d0 590 /* defined(STM32F091xC) || defined(STM32F098xx) */
jhon309 0:88e313c910d0 591 #ifdef __cplusplus
jhon309 0:88e313c910d0 592 }
jhon309 0:88e313c910d0 593 #endif
jhon309 0:88e313c910d0 594
jhon309 0:88e313c910d0 595 #endif /* __STM32F0xx_HAL_CEC_H */
jhon309 0:88e313c910d0 596
jhon309 0:88e313c910d0 597 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
jhon309 0:88e313c910d0 598