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TARGET_NUCLEO_F072RB/stm32f0xx_hal_pwr_ex.h@0:88e313c910d0, 2015-08-13 (annotated)

Committer:
jhon309
Date:
Thu Aug 13 00:20:09 2015 +0000
Revision:
0:88e313c910d0
RTC Example

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UserRevisionLine numberNew contents of line
jhon309 0:88e313c910d0 1 /**
jhon309 0:88e313c910d0 2 ******************************************************************************
jhon309 0:88e313c910d0 3 * @file stm32f0xx_hal_pwr_ex.h
jhon309 0:88e313c910d0 4 * @author MCD Application Team
jhon309 0:88e313c910d0 5 * @version V1.2.0
jhon309 0:88e313c910d0 6 * @date 11-December-2014
jhon309 0:88e313c910d0 7 * @brief Header file of PWR HAL Extension module.
jhon309 0:88e313c910d0 8 ******************************************************************************
jhon309 0:88e313c910d0 9 * @attention
jhon309 0:88e313c910d0 10 *
jhon309 0:88e313c910d0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
jhon309 0:88e313c910d0 12 *
jhon309 0:88e313c910d0 13 * Redistribution and use in source and binary forms, with or without modification,
jhon309 0:88e313c910d0 14 * are permitted provided that the following conditions are met:
jhon309 0:88e313c910d0 15 * 1. Redistributions of source code must retain the above copyright notice,
jhon309 0:88e313c910d0 16 * this list of conditions and the following disclaimer.
jhon309 0:88e313c910d0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
jhon309 0:88e313c910d0 18 * this list of conditions and the following disclaimer in the documentation
jhon309 0:88e313c910d0 19 * and/or other materials provided with the distribution.
jhon309 0:88e313c910d0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
jhon309 0:88e313c910d0 21 * may be used to endorse or promote products derived from this software
jhon309 0:88e313c910d0 22 * without specific prior written permission.
jhon309 0:88e313c910d0 23 *
jhon309 0:88e313c910d0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jhon309 0:88e313c910d0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jhon309 0:88e313c910d0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
jhon309 0:88e313c910d0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
jhon309 0:88e313c910d0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
jhon309 0:88e313c910d0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
jhon309 0:88e313c910d0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
jhon309 0:88e313c910d0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
jhon309 0:88e313c910d0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
jhon309 0:88e313c910d0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
jhon309 0:88e313c910d0 34 *
jhon309 0:88e313c910d0 35 ******************************************************************************
jhon309 0:88e313c910d0 36 */
jhon309 0:88e313c910d0 37
jhon309 0:88e313c910d0 38 /* Define to prevent recursive inclusion -------------------------------------*/
jhon309 0:88e313c910d0 39 #ifndef __STM32F0xx_HAL_PWR_EX_H
jhon309 0:88e313c910d0 40 #define __STM32F0xx_HAL_PWR_EX_H
jhon309 0:88e313c910d0 41
jhon309 0:88e313c910d0 42 #ifdef __cplusplus
jhon309 0:88e313c910d0 43 extern "C" {
jhon309 0:88e313c910d0 44 #endif
jhon309 0:88e313c910d0 45
jhon309 0:88e313c910d0 46 /* Includes ------------------------------------------------------------------*/
jhon309 0:88e313c910d0 47 #include "stm32f0xx_hal_def.h"
jhon309 0:88e313c910d0 48
jhon309 0:88e313c910d0 49 /** @addtogroup STM32F0xx_HAL_Driver
jhon309 0:88e313c910d0 50 * @{
jhon309 0:88e313c910d0 51 */
jhon309 0:88e313c910d0 52
jhon309 0:88e313c910d0 53 /** @addtogroup PWREx
jhon309 0:88e313c910d0 54 * @{
jhon309 0:88e313c910d0 55 */
jhon309 0:88e313c910d0 56
jhon309 0:88e313c910d0 57 /* Exported types ------------------------------------------------------------*/
jhon309 0:88e313c910d0 58
jhon309 0:88e313c910d0 59 /** @defgroup PWREx_Exported_Types PWREx Exported Types
jhon309 0:88e313c910d0 60 * @{
jhon309 0:88e313c910d0 61 */
jhon309 0:88e313c910d0 62
jhon309 0:88e313c910d0 63 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:88e313c910d0 64 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:88e313c910d0 65 defined (STM32F091xC)
jhon309 0:88e313c910d0 66
jhon309 0:88e313c910d0 67 /**
jhon309 0:88e313c910d0 68 * @brief PWR PVD configuration structure definition
jhon309 0:88e313c910d0 69 */
jhon309 0:88e313c910d0 70 typedef struct
jhon309 0:88e313c910d0 71 {
jhon309 0:88e313c910d0 72 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level
jhon309 0:88e313c910d0 73 This parameter can be a value of @ref PWREx_PVD_detection_level */
jhon309 0:88e313c910d0 74
jhon309 0:88e313c910d0 75 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
jhon309 0:88e313c910d0 76 This parameter can be a value of @ref PWREx_PVD_Mode */
jhon309 0:88e313c910d0 77 }PWR_PVDTypeDef;
jhon309 0:88e313c910d0 78
jhon309 0:88e313c910d0 79 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:88e313c910d0 80 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:88e313c910d0 81 /* defined (STM32F091xC) */
jhon309 0:88e313c910d0 82 /**
jhon309 0:88e313c910d0 83 * @}
jhon309 0:88e313c910d0 84 */
jhon309 0:88e313c910d0 85 /* Exported constants --------------------------------------------------------*/
jhon309 0:88e313c910d0 86
jhon309 0:88e313c910d0 87 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
jhon309 0:88e313c910d0 88 * @{
jhon309 0:88e313c910d0 89 */
jhon309 0:88e313c910d0 90
jhon309 0:88e313c910d0 91
jhon309 0:88e313c910d0 92 /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins
jhon309 0:88e313c910d0 93 * @{
jhon309 0:88e313c910d0 94 */
jhon309 0:88e313c910d0 95 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
jhon309 0:88e313c910d0 96 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
jhon309 0:88e313c910d0 97 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
jhon309 0:88e313c910d0 98 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
jhon309 0:88e313c910d0 99 #define PWR_WAKEUP_PIN3 ((uint32_t)0x02)
jhon309 0:88e313c910d0 100 #define PWR_WAKEUP_PIN4 ((uint32_t)0x03)
jhon309 0:88e313c910d0 101 #define PWR_WAKEUP_PIN5 ((uint32_t)0x04)
jhon309 0:88e313c910d0 102 #define PWR_WAKEUP_PIN6 ((uint32_t)0x05)
jhon309 0:88e313c910d0 103 #define PWR_WAKEUP_PIN7 ((uint32_t)0x06)
jhon309 0:88e313c910d0 104 #define PWR_WAKEUP_PIN8 ((uint32_t)0x07)
jhon309 0:88e313c910d0 105
jhon309 0:88e313c910d0 106 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
jhon309 0:88e313c910d0 107 ((PIN) == PWR_WAKEUP_PIN2) || \
jhon309 0:88e313c910d0 108 ((PIN) == PWR_WAKEUP_PIN3) || \
jhon309 0:88e313c910d0 109 ((PIN) == PWR_WAKEUP_PIN4) || \
jhon309 0:88e313c910d0 110 ((PIN) == PWR_WAKEUP_PIN5) || \
jhon309 0:88e313c910d0 111 ((PIN) == PWR_WAKEUP_PIN6) || \
jhon309 0:88e313c910d0 112 ((PIN) == PWR_WAKEUP_PIN7) || \
jhon309 0:88e313c910d0 113 ((PIN) == PWR_WAKEUP_PIN8))
jhon309 0:88e313c910d0 114 #else
jhon309 0:88e313c910d0 115 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
jhon309 0:88e313c910d0 116 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
jhon309 0:88e313c910d0 117
jhon309 0:88e313c910d0 118 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
jhon309 0:88e313c910d0 119 ((PIN) == PWR_WAKEUP_PIN2))
jhon309 0:88e313c910d0 120 #endif /* defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || */
jhon309 0:88e313c910d0 121 /* defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
jhon309 0:88e313c910d0 122 /**
jhon309 0:88e313c910d0 123 * @}
jhon309 0:88e313c910d0 124 */
jhon309 0:88e313c910d0 125
jhon309 0:88e313c910d0 126 /** @defgroup PWREx_EXTI_Line PWREx EXTI Line
jhon309 0:88e313c910d0 127 * @{
jhon309 0:88e313c910d0 128 */
jhon309 0:88e313c910d0 129 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:88e313c910d0 130 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:88e313c910d0 131 defined (STM32F091xC)
jhon309 0:88e313c910d0 132
jhon309 0:88e313c910d0 133 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
jhon309 0:88e313c910d0 134
jhon309 0:88e313c910d0 135 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:88e313c910d0 136 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:88e313c910d0 137 /* defined (STM32F091xC) */
jhon309 0:88e313c910d0 138
jhon309 0:88e313c910d0 139 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:88e313c910d0 140 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:88e313c910d0 141 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:88e313c910d0 142
jhon309 0:88e313c910d0 143 #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)0x80000000) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */
jhon309 0:88e313c910d0 144
jhon309 0:88e313c910d0 145 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
jhon309 0:88e313c910d0 146 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:88e313c910d0 147 defined (STM32F091xC) || defined (STM32F098xx) ||*/
jhon309 0:88e313c910d0 148 /**
jhon309 0:88e313c910d0 149 * @}
jhon309 0:88e313c910d0 150 */
jhon309 0:88e313c910d0 151
jhon309 0:88e313c910d0 152 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:88e313c910d0 153 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:88e313c910d0 154 defined (STM32F091xC)
jhon309 0:88e313c910d0 155 /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level
jhon309 0:88e313c910d0 156 * @{
jhon309 0:88e313c910d0 157 */
jhon309 0:88e313c910d0 158 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
jhon309 0:88e313c910d0 159 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
jhon309 0:88e313c910d0 160 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
jhon309 0:88e313c910d0 161 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
jhon309 0:88e313c910d0 162 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
jhon309 0:88e313c910d0 163 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
jhon309 0:88e313c910d0 164 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
jhon309 0:88e313c910d0 165 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
jhon309 0:88e313c910d0 166 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
jhon309 0:88e313c910d0 167 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
jhon309 0:88e313c910d0 168 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
jhon309 0:88e313c910d0 169 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
jhon309 0:88e313c910d0 170 /**
jhon309 0:88e313c910d0 171 * @}
jhon309 0:88e313c910d0 172 */
jhon309 0:88e313c910d0 173
jhon309 0:88e313c910d0 174 /** @defgroup PWREx_PVD_Mode PWREx PVD Mode
jhon309 0:88e313c910d0 175 * @{
jhon309 0:88e313c910d0 176 */
jhon309 0:88e313c910d0 177 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
jhon309 0:88e313c910d0 178 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
jhon309 0:88e313c910d0 179 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
jhon309 0:88e313c910d0 180 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
jhon309 0:88e313c910d0 181 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
jhon309 0:88e313c910d0 182 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
jhon309 0:88e313c910d0 183 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
jhon309 0:88e313c910d0 184
jhon309 0:88e313c910d0 185 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
jhon309 0:88e313c910d0 186 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
jhon309 0:88e313c910d0 187 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
jhon309 0:88e313c910d0 188 ((MODE) == PWR_PVD_MODE_NORMAL))
jhon309 0:88e313c910d0 189 /**
jhon309 0:88e313c910d0 190 * @}
jhon309 0:88e313c910d0 191 */
jhon309 0:88e313c910d0 192 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:88e313c910d0 193 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:88e313c910d0 194 /* defined (STM32F091xC) */
jhon309 0:88e313c910d0 195
jhon309 0:88e313c910d0 196 /** @defgroup PWREx_Flag PWREx Flag
jhon309 0:88e313c910d0 197 * @{
jhon309 0:88e313c910d0 198 */
jhon309 0:88e313c910d0 199 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:88e313c910d0 200 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:88e313c910d0 201 defined (STM32F091xC)
jhon309 0:88e313c910d0 202
jhon309 0:88e313c910d0 203 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:88e313c910d0 204 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:88e313c910d0 205 #define PWR_FLAG_PVDO PWR_CSR_PVDO
jhon309 0:88e313c910d0 206 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
jhon309 0:88e313c910d0 207 #elif defined (STM32F070x6) || defined (STM32F070xB) || defined (STM32F030xC)
jhon309 0:88e313c910d0 208 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:88e313c910d0 209 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:88e313c910d0 210 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
jhon309 0:88e313c910d0 211 #else
jhon309 0:88e313c910d0 212 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:88e313c910d0 213 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:88e313c910d0 214
jhon309 0:88e313c910d0 215 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:88e313c910d0 216 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:88e313c910d0 217 /* defined (STM32F091xC) */
jhon309 0:88e313c910d0 218 /**
jhon309 0:88e313c910d0 219 * @}
jhon309 0:88e313c910d0 220 */
jhon309 0:88e313c910d0 221
jhon309 0:88e313c910d0 222 /**
jhon309 0:88e313c910d0 223 * @}
jhon309 0:88e313c910d0 224 */
jhon309 0:88e313c910d0 225
jhon309 0:88e313c910d0 226 /* Exported macro ------------------------------------------------------------*/
jhon309 0:88e313c910d0 227 /** @defgroup PWREx_Exported_Macros PWREx Exported Macros
jhon309 0:88e313c910d0 228 * @{
jhon309 0:88e313c910d0 229 */
jhon309 0:88e313c910d0 230 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:88e313c910d0 231 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:88e313c910d0 232 defined (STM32F091xC)
jhon309 0:88e313c910d0 233 /**
jhon309 0:88e313c910d0 234 * @brief Enable interrupt on PVD Exti Line 16.
jhon309 0:88e313c910d0 235 * @retval None.
jhon309 0:88e313c910d0 236 */
jhon309 0:88e313c910d0 237 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
jhon309 0:88e313c910d0 238
jhon309 0:88e313c910d0 239 /**
jhon309 0:88e313c910d0 240 * @brief Disable interrupt on PVD Exti Line 16.
jhon309 0:88e313c910d0 241 * @retval None.
jhon309 0:88e313c910d0 242 */
jhon309 0:88e313c910d0 243 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
jhon309 0:88e313c910d0 244
jhon309 0:88e313c910d0 245 /**
jhon309 0:88e313c910d0 246 * @brief Enable event on PVD Exti Line 16.
jhon309 0:88e313c910d0 247 * @retval None.
jhon309 0:88e313c910d0 248 */
jhon309 0:88e313c910d0 249 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
jhon309 0:88e313c910d0 250
jhon309 0:88e313c910d0 251 /**
jhon309 0:88e313c910d0 252 * @brief Disable event on PVD Exti Line 16.
jhon309 0:88e313c910d0 253 * @retval None.
jhon309 0:88e313c910d0 254 */
jhon309 0:88e313c910d0 255 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
jhon309 0:88e313c910d0 256
jhon309 0:88e313c910d0 257 /**
jhon309 0:88e313c910d0 258 * @brief PVD EXTI line configuration: clear falling edge and rising edge trigger.
jhon309 0:88e313c910d0 259 * @retval None.
jhon309 0:88e313c910d0 260 */
jhon309 0:88e313c910d0 261 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \
jhon309 0:88e313c910d0 262 EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD)
jhon309 0:88e313c910d0 263
jhon309 0:88e313c910d0 264 /**
jhon309 0:88e313c910d0 265 * @brief PVD EXTI line configuration: set falling edge trigger.
jhon309 0:88e313c910d0 266 * @retval None.
jhon309 0:88e313c910d0 267 */
jhon309 0:88e313c910d0 268 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
jhon309 0:88e313c910d0 269
jhon309 0:88e313c910d0 270 /**
jhon309 0:88e313c910d0 271 * @brief PVD EXTI line configuration: set rising edge trigger.
jhon309 0:88e313c910d0 272 * @retval None.
jhon309 0:88e313c910d0 273 */
jhon309 0:88e313c910d0 274 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
jhon309 0:88e313c910d0 275
jhon309 0:88e313c910d0 276 /**
jhon309 0:88e313c910d0 277 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
jhon309 0:88e313c910d0 278 * @retval EXTI PVD Line Status.
jhon309 0:88e313c910d0 279 */
jhon309 0:88e313c910d0 280 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
jhon309 0:88e313c910d0 281
jhon309 0:88e313c910d0 282 /**
jhon309 0:88e313c910d0 283 * @brief Clear the PVD EXTI flag.
jhon309 0:88e313c910d0 284 * @retval None.
jhon309 0:88e313c910d0 285 */
jhon309 0:88e313c910d0 286 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
jhon309 0:88e313c910d0 287
jhon309 0:88e313c910d0 288 /**
jhon309 0:88e313c910d0 289 * @brief Generate a Software interrupt on selected EXTI line.
jhon309 0:88e313c910d0 290 * @retval None.
jhon309 0:88e313c910d0 291 */
jhon309 0:88e313c910d0 292 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
jhon309 0:88e313c910d0 293
jhon309 0:88e313c910d0 294 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:88e313c910d0 295 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:88e313c910d0 296 /* defined (STM32F091xC) */
jhon309 0:88e313c910d0 297
jhon309 0:88e313c910d0 298
jhon309 0:88e313c910d0 299 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:88e313c910d0 300 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:88e313c910d0 301 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:88e313c910d0 302 /**
jhon309 0:88e313c910d0 303 * @brief Enable interrupt on Vddio2 Monitor Exti Line 31.
jhon309 0:88e313c910d0 304 * @retval None.
jhon309 0:88e313c910d0 305 */
jhon309 0:88e313c910d0 306 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2))
jhon309 0:88e313c910d0 307
jhon309 0:88e313c910d0 308 /**
jhon309 0:88e313c910d0 309 * @brief Disable interrupt on Vddio2 Monitor Exti Line 31.
jhon309 0:88e313c910d0 310 * @retval None.
jhon309 0:88e313c910d0 311 */
jhon309 0:88e313c910d0 312 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2))
jhon309 0:88e313c910d0 313
jhon309 0:88e313c910d0 314 /**
jhon309 0:88e313c910d0 315 * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger.
jhon309 0:88e313c910d0 316 * @retval None.
jhon309 0:88e313c910d0 317 */
jhon309 0:88e313c910d0 318 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
jhon309 0:88e313c910d0 319 EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2)
jhon309 0:88e313c910d0 320
jhon309 0:88e313c910d0 321 /**
jhon309 0:88e313c910d0 322 * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger.
jhon309 0:88e313c910d0 323 * @retval None.
jhon309 0:88e313c910d0 324 */
jhon309 0:88e313c910d0 325 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2)
jhon309 0:88e313c910d0 326
jhon309 0:88e313c910d0 327 /**
jhon309 0:88e313c910d0 328 * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not.
jhon309 0:88e313c910d0 329 * @retval EXTI VDDIO2 Monitor Line Status.
jhon309 0:88e313c910d0 330 */
jhon309 0:88e313c910d0 331 #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2))
jhon309 0:88e313c910d0 332
jhon309 0:88e313c910d0 333 /**
jhon309 0:88e313c910d0 334 * @brief Clear the VDDIO2 Monitor EXTI flag.
jhon309 0:88e313c910d0 335 * @retval None.
jhon309 0:88e313c910d0 336 */
jhon309 0:88e313c910d0 337 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2))
jhon309 0:88e313c910d0 338
jhon309 0:88e313c910d0 339 /**
jhon309 0:88e313c910d0 340 * @brief Generate a Software interrupt on selected EXTI line.
jhon309 0:88e313c910d0 341 * @retval None.
jhon309 0:88e313c910d0 342 */
jhon309 0:88e313c910d0 343 #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2))
jhon309 0:88e313c910d0 344
jhon309 0:88e313c910d0 345
jhon309 0:88e313c910d0 346 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
jhon309 0:88e313c910d0 347 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:88e313c910d0 348 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:88e313c910d0 349
jhon309 0:88e313c910d0 350 /**
jhon309 0:88e313c910d0 351 * @}
jhon309 0:88e313c910d0 352 */
jhon309 0:88e313c910d0 353
jhon309 0:88e313c910d0 354 /* Exported functions --------------------------------------------------------*/
jhon309 0:88e313c910d0 355
jhon309 0:88e313c910d0 356 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
jhon309 0:88e313c910d0 357 * @{
jhon309 0:88e313c910d0 358 */
jhon309 0:88e313c910d0 359
jhon309 0:88e313c910d0 360 /** @addtogroup PWREx_Exported_Functions_Group1
jhon309 0:88e313c910d0 361 * @{
jhon309 0:88e313c910d0 362 */
jhon309 0:88e313c910d0 363 /* I/O operation functions ***************************************************/
jhon309 0:88e313c910d0 364 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:88e313c910d0 365 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:88e313c910d0 366 defined (STM32F091xC)
jhon309 0:88e313c910d0 367 void HAL_PWR_PVD_IRQHandler(void);
jhon309 0:88e313c910d0 368 void HAL_PWR_PVDCallback(void);
jhon309 0:88e313c910d0 369 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:88e313c910d0 370 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:88e313c910d0 371 /* defined (STM32F091xC) */
jhon309 0:88e313c910d0 372
jhon309 0:88e313c910d0 373 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:88e313c910d0 374 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:88e313c910d0 375 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:88e313c910d0 376 void HAL_PWR_Vddio2Monitor_IRQHandler(void);
jhon309 0:88e313c910d0 377 void HAL_PWR_Vddio2MonitorCallback(void);
jhon309 0:88e313c910d0 378 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:88e313c910d0 379 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:88e313c910d0 380 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:88e313c910d0 381
jhon309 0:88e313c910d0 382 /* Peripheral Control functions **********************************************/
jhon309 0:88e313c910d0 383 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:88e313c910d0 384 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:88e313c910d0 385 defined (STM32F091xC)
jhon309 0:88e313c910d0 386 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
jhon309 0:88e313c910d0 387 void HAL_PWR_EnablePVD(void);
jhon309 0:88e313c910d0 388 void HAL_PWR_DisablePVD(void);
jhon309 0:88e313c910d0 389 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:88e313c910d0 390 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:88e313c910d0 391 /* defined (STM32F091xC) */
jhon309 0:88e313c910d0 392
jhon309 0:88e313c910d0 393 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:88e313c910d0 394 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:88e313c910d0 395 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:88e313c910d0 396 void HAL_PWR_EnableVddio2Monitor(void);
jhon309 0:88e313c910d0 397 void HAL_PWR_DisableVddio2Monitor(void);
jhon309 0:88e313c910d0 398 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:88e313c910d0 399 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:88e313c910d0 400 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:88e313c910d0 401
jhon309 0:88e313c910d0 402 /**
jhon309 0:88e313c910d0 403 * @}
jhon309 0:88e313c910d0 404 */
jhon309 0:88e313c910d0 405
jhon309 0:88e313c910d0 406 /**
jhon309 0:88e313c910d0 407 * @}
jhon309 0:88e313c910d0 408 */
jhon309 0:88e313c910d0 409
jhon309 0:88e313c910d0 410 /**
jhon309 0:88e313c910d0 411 * @}
jhon309 0:88e313c910d0 412 */
jhon309 0:88e313c910d0 413
jhon309 0:88e313c910d0 414 /**
jhon309 0:88e313c910d0 415 * @}
jhon309 0:88e313c910d0 416 */
jhon309 0:88e313c910d0 417
jhon309 0:88e313c910d0 418 #ifdef __cplusplus
jhon309 0:88e313c910d0 419 }
jhon309 0:88e313c910d0 420 #endif
jhon309 0:88e313c910d0 421
jhon309 0:88e313c910d0 422 #endif /* __STM32F0xx_HAL_PWR_EX_H */
jhon309 0:88e313c910d0 423
jhon309 0:88e313c910d0 424 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
jhon309 0:88e313c910d0 425